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GET /api/patches/2232263/?format=api
HTTP 200 OK
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{
    "id": 2232263,
    "url": "http://patchwork.ozlabs.org/api/patches/2232263/?format=api",
    "web_url": "http://patchwork.ozlabs.org/project/linux-pci/patch/20260504065441.99033-1-w15303746062@163.com/",
    "project": {
        "id": 28,
        "url": "http://patchwork.ozlabs.org/api/projects/28/?format=api",
        "name": "Linux PCI development",
        "link_name": "linux-pci",
        "list_id": "linux-pci.vger.kernel.org",
        "list_email": "linux-pci@vger.kernel.org",
        "web_url": null,
        "scm_url": null,
        "webscm_url": null,
        "list_archive_url": "",
        "list_archive_url_format": "",
        "commit_url_format": ""
    },
    "msgid": "<20260504065441.99033-1-w15303746062@163.com>",
    "list_archive_url": null,
    "date": "2026-05-04T06:54:41",
    "name": "char: agp: amd64 - fix null-ptr-deref in amd64_fetch_size and related functions",
    "commit_ref": null,
    "pull_url": null,
    "state": "new",
    "archived": false,
    "hash": "9cf77d6bda7ed19b26a6abf34fc44d2abfef00e8",
    "submitter": {
        "id": 93320,
        "url": "http://patchwork.ozlabs.org/api/people/93320/?format=api",
        "name": null,
        "email": "w15303746062@163.com"
    },
    "delegate": null,
    "mbox": "http://patchwork.ozlabs.org/project/linux-pci/patch/20260504065441.99033-1-w15303746062@163.com/mbox/",
    "series": [
        {
            "id": 502617,
            "url": "http://patchwork.ozlabs.org/api/series/502617/?format=api",
            "web_url": "http://patchwork.ozlabs.org/project/linux-pci/list/?series=502617",
            "date": "2026-05-04T06:54:41",
            "name": "char: agp: amd64 - fix null-ptr-deref in amd64_fetch_size and related functions",
            "version": 1,
            "mbox": "http://patchwork.ozlabs.org/series/502617/mbox/"
        }
    ],
    "comments": "http://patchwork.ozlabs.org/api/patches/2232263/comments/",
    "check": "pending",
    "checks": "http://patchwork.ozlabs.org/api/patches/2232263/checks/",
    "tags": {},
    "related": [],
    "headers": {
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        "From": "w15303746062@163.com",
        "To": "airlied@redhat.com",
        "Cc": "dri-devel@lists.freedesktop.org,\n\tlinux-kernel@vger.kernel.org,\n\tx86@kernel.org,\n\tlinux-pci@vger.kernel.org,\n\tMingyu Wang <25181214217@stu.xidian.edu.cn>",
        "Subject": "[PATCH] char: agp: amd64 - fix null-ptr-deref in amd64_fetch_size and\n related functions",
        "Date": "Mon,  4 May 2026 14:54:41 +0800",
        "Message-Id": "<20260504065441.99033-1-w15303746062@163.com>",
        "X-Mailer": "git-send-email 2.34.1",
        "Precedence": "bulk",
        "X-Mailing-List": "linux-pci@vger.kernel.org",
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        "Content-Transfer-Encoding": "8bit",
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        "X-CM-SenderInfo": "jzrvjiatxuliiws6il2tof0z/xtbDAB5YPGn4Qr7DNwAA3j"
    },
    "content": "From: Mingyu Wang <25181214217@stu.xidian.edu.cn>\n\nA NULL pointer dereference vulnerability was identified in the AMD64 AGP\ndriver (amd64-agp) during driver initialization and aperture size fetching.\n\nWhen the `amd64_agp` module is loaded on a system without a physical AMD\nNorthbridge (e.g., in a QEMU/KVM virtualized environment with a simulated\nAMD 8151 AGP bridge), the underlying hardware query `node_to_amd_nb(0)`\nreturns NULL.\n\nIn `amd64_fetch_size()`, the code previously attempted to unconditionally\ndereference the `misc` member of the returned pointer:\n    `dev = node_to_amd_nb(0)->misc;`\n\nSince `node_to_amd_nb(0)` can return NULL (either due to missing hardware\nor when CONFIG_AMD_NB is disabled), this direct dereference results in a\nGeneral Protection Fault (GPF) and a subsequent kernel panic, as caught\nby KASAN.\n\nFix this by introducing proper sanity checks. Before accessing the `misc`\npointer, explicitly verify that the pointer returned by `node_to_amd_nb()`\nis not NULL.\n\nFurthermore, to prevent similar crashes, this patch sweeps the entire\ndriver and applies the same safeguard to all other functions that iterate\nover or directly access the AMD Northbridge descriptors, including\n`amd_8151_configure()`, `amd64_cleanup()`, `cache_nbs()`, `uli_agp_init()`,\nand `nforce3_agp_init()`.\n\nSigned-off-by: Mingyu Wang <25181214217@stu.xidian.edu.cn>\n---\n drivers/char/agp/amd64-agp.c | 50 ++++++++++++++++++++++++++++--------\n 1 file changed, 40 insertions(+), 10 deletions(-)",
    "diff": "diff --git a/drivers/char/agp/amd64-agp.c b/drivers/char/agp/amd64-agp.c\nindex 2505df1f4e69..7bbadfc74ffe 100644\n--- a/drivers/char/agp/amd64-agp.c\n+++ b/drivers/char/agp/amd64-agp.c\n@@ -121,14 +121,16 @@ static struct aper_size_info_32 amd64_aperture_sizes[7] =\n static int amd64_fetch_size(void)\n {\n \tstruct pci_dev *dev;\n+\tstruct amd_northbridge *nb;\n \tint i;\n \tu32 temp;\n \tstruct aper_size_info_32 *values;\n \n-\tdev = node_to_amd_nb(0)->misc;\n-\tif (dev==NULL)\n+\tnb = node_to_amd_nb(0);\n+\tif (!nb || !nb->misc)\n \t\treturn 0;\n \n+\tdev = nb->misc;\n \tpci_read_config_dword(dev, AMD64_GARTAPERTURECTL, &temp);\n \ttemp = (temp & 0xe);\n \tvalues = A_SIZE_32(amd64_aperture_sizes);\n@@ -187,8 +189,12 @@ static int amd_8151_configure(void)\n \n \t/* Configure AGP regs in each x86-64 host bridge. */\n \tfor (i = 0; i < amd_nb_num(); i++) {\n-\t\tagp_bridge->gart_bus_addr =\n-\t\t\tamd64_configure(node_to_amd_nb(i)->misc, gatt_bus);\n+\t\tstruct amd_northbridge *nb = node_to_amd_nb(i);\n+\n+\t\tif (!nb || !nb->misc)\n+\t\t\tcontinue;\n+\n+\t\tagp_bridge->gart_bus_addr = amd64_configure(nb->misc, gatt_bus);\n \t}\n \tamd_flush_garts();\n \treturn 0;\n@@ -204,7 +210,13 @@ static void amd64_cleanup(void)\n \t\treturn;\n \n \tfor (i = 0; i < amd_nb_num(); i++) {\n-\t\tstruct pci_dev *dev = node_to_amd_nb(i)->misc;\n+\t\tstruct amd_northbridge *nb = node_to_amd_nb(i);\n+\t\tstruct pci_dev *dev;\n+\n+\t\tif (!nb || !nb->misc)\n+\t\t\tcontinue;\n+\n+\t\tdev = nb->misc;\n \t\t/* disable gart translation */\n \t\tpci_read_config_dword(dev, AMD64_GARTAPERTURECTL, &tmp);\n \t\ttmp &= ~GARTEN;\n@@ -335,7 +347,13 @@ static int cache_nbs(struct pci_dev *pdev, u32 cap_ptr)\n \n \ti = 0;\n \tfor (i = 0; i < amd_nb_num(); i++) {\n-\t\tstruct pci_dev *dev = node_to_amd_nb(i)->misc;\n+\t\tstruct amd_northbridge *nb = node_to_amd_nb(i);\n+\t\tstruct pci_dev *dev;\n+\n+\t\tif (!nb || !nb->misc)\n+\t\t\tcontinue;\n+\n+\t\tdev = nb->misc;\n \t\tif (fix_northbridge(dev, pdev, cap_ptr) < 0) {\n \t\t\tdev_err(&dev->dev, \"no usable aperture found\\n\");\n #ifdef __x86_64__\n@@ -391,6 +409,7 @@ static int uli_agp_init(struct pci_dev *pdev)\n {\n \tu32 httfea,baseaddr,enuscr;\n \tstruct pci_dev *dev1;\n+\tstruct amd_northbridge *nb;\n \tint i, ret;\n \tunsigned size = amd64_fetch_size();\n \n@@ -411,9 +430,14 @@ static int uli_agp_init(struct pci_dev *pdev)\n \t\tgoto put;\n \t}\n \n+\tnb = node_to_amd_nb(0);\n+\tif (!nb || !nb->misc) {\n+\t\tret = -ENODEV;\n+\t\tgoto put;\n+\t}\n+\n \t/* shadow x86-64 registers into ULi registers */\n-\tpci_read_config_dword (node_to_amd_nb(0)->misc, AMD64_GARTAPERTUREBASE,\n-\t\t\t       &httfea);\n+\tpci_read_config_dword(nb->misc, AMD64_GARTAPERTUREBASE, &httfea);\n \n \t/* if x86-64 aperture base is beyond 4G, exit here */\n \tif ((httfea & 0x7fff) >> (32 - 25)) {\n@@ -453,6 +477,7 @@ static int nforce3_agp_init(struct pci_dev *pdev)\n {\n \tu32 tmp, apbase, apbar, aplimit;\n \tstruct pci_dev *dev1;\n+\tstruct amd_northbridge *nb;\n \tint i, ret;\n \tunsigned size = amd64_fetch_size();\n \n@@ -479,9 +504,14 @@ static int nforce3_agp_init(struct pci_dev *pdev)\n \ttmp |= nforce3_sizes[i].size_value;\n \tpci_write_config_dword(dev1, NVIDIA_X86_64_1_APSIZE, tmp);\n \n+\tnb = node_to_amd_nb(0);\n+\tif (!nb || !nb->misc) {\n+\t\tret = -ENODEV;\n+\t\tgoto put;\n+\t}\n+\n \t/* shadow x86-64 registers into NVIDIA registers */\n-\tpci_read_config_dword (node_to_amd_nb(0)->misc, AMD64_GARTAPERTUREBASE,\n-\t\t\t       &apbase);\n+\tpci_read_config_dword(nb->misc, AMD64_GARTAPERTUREBASE, &apbase);\n \n \t/* if x86-64 aperture base is beyond 4G, exit here */\n \tif ( (apbase & 0x7fff) >> (32 - 25) ) {\n",
    "prefixes": []
}