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GET /api/patches/2232131/?format=api
{ "id": 2232131, "url": "http://patchwork.ozlabs.org/api/patches/2232131/?format=api", "web_url": "http://patchwork.ozlabs.org/project/gcc/patch/91f0a200-45b8-4fdf-bae3-60f204e68dcc@gmail.com/", "project": { "id": 17, "url": "http://patchwork.ozlabs.org/api/projects/17/?format=api", "name": "GNU Compiler Collection", "link_name": "gcc", "list_id": "gcc-patches.gcc.gnu.org", "list_email": "gcc-patches@gcc.gnu.org", "web_url": null, "scm_url": null, "webscm_url": null, "list_archive_url": "", "list_archive_url_format": "", "commit_url_format": "" }, "msgid": "<91f0a200-45b8-4fdf-bae3-60f204e68dcc@gmail.com>", "list_archive_url": null, "date": "2026-05-03T02:10:46", "name": "[to-be-committed,RISC-V,PR,target/124009] Improve select between 2^n and 0 on RISC-V", "commit_ref": null, "pull_url": null, "state": "new", "archived": false, "hash": "c24bd78cc0e09ac27fd3d686e7b414482a4112a3", "submitter": { "id": 81263, "url": "http://patchwork.ozlabs.org/api/people/81263/?format=api", "name": "Jeffrey Law", "email": "jeffreyalaw@gmail.com" }, "delegate": null, "mbox": "http://patchwork.ozlabs.org/project/gcc/patch/91f0a200-45b8-4fdf-bae3-60f204e68dcc@gmail.com/mbox/", "series": [ { "id": 502558, "url": "http://patchwork.ozlabs.org/api/series/502558/?format=api", "web_url": "http://patchwork.ozlabs.org/project/gcc/list/?series=502558", "date": "2026-05-03T02:10:46", "name": "[to-be-committed,RISC-V,PR,target/124009] Improve select between 2^n and 0 on RISC-V", "version": 1, "mbox": "http://patchwork.ozlabs.org/series/502558/mbox/" } ], "comments": "http://patchwork.ozlabs.org/api/patches/2232131/comments/", "check": "pending", "checks": "http://patchwork.ozlabs.org/api/patches/2232131/checks/", "tags": {}, "related": [], "headers": { "Return-Path": "<gcc-patches-bounces~incoming=patchwork.ozlabs.org@gcc.gnu.org>", "X-Original-To": [ "incoming@patchwork.ozlabs.org", "gcc-patches@gcc.gnu.org" ], "Delivered-To": [ "patchwork-incoming@legolas.ozlabs.org", "gcc-patches@gcc.gnu.org" ], "Authentication-Results": [ "legolas.ozlabs.org;\n\tdkim=pass (2048-bit key;\n unprotected) header.d=gmail.com header.i=@gmail.com header.a=rsa-sha256\n header.s=20251104 header.b=lT+G7lZ2;\n\tdkim-atps=neutral", "legolas.ozlabs.org;\n spf=pass (sender SPF authorized) smtp.mailfrom=gcc.gnu.org\n (client-ip=2620:52:6:3111::32; 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boundary=\"------------mEPJDOW00L2y0J2hrccWV2qA\"", "Message-ID": "<91f0a200-45b8-4fdf-bae3-60f204e68dcc@gmail.com>", "Date": "Sat, 2 May 2026 20:10:46 -0600", "MIME-Version": "1.0", "User-Agent": "Mozilla Thunderbird", "Content-Language": "en-US", "From": "Jeffrey Law <jeffreyalaw@gmail.com>", "To": "'GCC Patches' <gcc-patches@gcc.gnu.org>", "Subject": "[to-be-committed][RISC-V][PR target/124009] Improve select between\n 2^n and 0 on RISC-V", "X-BeenThere": "gcc-patches@gcc.gnu.org", "X-Mailman-Version": "2.1.30", "Precedence": "list", "List-Id": "Gcc-patches mailing list <gcc-patches.gcc.gnu.org>", "List-Unsubscribe": "<https://gcc.gnu.org/mailman/options/gcc-patches>,\n <mailto:gcc-patches-request@gcc.gnu.org?subject=unsubscribe>", "List-Archive": "<https://gcc.gnu.org/pipermail/gcc-patches/>", "List-Post": "<mailto:gcc-patches@gcc.gnu.org>", "List-Help": "<mailto:gcc-patches-request@gcc.gnu.org?subject=help>", "List-Subscribe": "<https://gcc.gnu.org/mailman/listinfo/gcc-patches>,\n <mailto:gcc-patches-request@gcc.gnu.org?subject=subscribe>", "Errors-To": "gcc-patches-bounces~incoming=patchwork.ozlabs.org@gcc.gnu.org" }, "content": "So this was something I noticed a while back, I'm pretty sure while \nthrowing hot blocks into an LLM to see what the LLM thought might be \noptimizable. In this case it was mcf from spec2017.\n\nSo the basic idea is for code like this:\n\nint foo(int x, int y) { return (y < x) ? 1 : -1; }\n\nWe get something like this for rv64gcbv_zicond:\n\n slt a1,a1,a0 # 27 [c=4 l=4] slt_didi3\n li a5,2 # 28 [c=4 l=4] *movdi_64bit/1\n czero.eqz a0,a5,a1 # 29 [c=4 l=4] *czero.eqz.didi\n addi a0,a0,-1 # 17 [c=4 l=4] *adddi3/1\n\n\n\nThat's not bad, in particular it avoids a likely tough to predict \nconditional branch. But we can do better.\n\nEssentially the code is selecting between 1 and -1. So if we take the \noutput of the SLT (0/1) shift it left by one position (0/2), then \nsubtract one we get a select for -1, 1.\n\nAfter this patch we get the expected:\n\n slt a1,a1,a0 # 28 [c=4 l=4] slt_didi3\n slli a0,a1,1 # 29 [c=4 l=4] ashldi3\n addi a0,a0,-1 # 17 [c=4 l=4] *adddi3/1\n\nIt's probably not any faster on a modern design, but it will encode more \nefficiently, saving either 2 or 4 bytes (potentially improving \nperformance by getting more ops per fetch block). There's some very \nobvious generalizations. We can select between 2^n and 0, we can select \nbetween 2^n-1 and -1. But we can also do things like select between 3, \n5 or 9 and 0 (think using shNadd where both source operands are the \noutput of the slt). There's all kinds of interesting possibilities here.\n\nThe key is to implement a splitter which handles 2^n and 0. Once that \nis in place pre-existing code will handle the 2^n-1 and -1 case \nautomatically. While cases like selecting between 9 and 0 aren't yet \nhandled, it would be a fairly simple extension to these new splitters \nwith the basic framework in place.\n\nAnyway, while working on this I realized the scc_0 iterator didn't \ninclude any_lt, which seems like a dreadful oversight on my part. So I \nfixed that as well.\n\nGiven the high degree of non-orthogonality in the sCC capabilities of \nthe RISC-V ISA, this is actually several splitters to deal with the \ndifferent cases of sCC we can handle in a single instruction.\n\nTested on riscv32-elf and riscv64-elf. Will wait for pre-commit CI \nbefore moving forward.\n\nJeff\nPR target/124009\ngcc/\n\n\t* config/riscv/iterators.md (scc_0: Add any_lt.\n\t* config/riscv/zicond.md: Add splitters to select between 2^n and 0.\n\ngcc/testsuite/\n\n\t* gcc.target/riscv/pr124009.c: New test.", "diff": "diff --git a/gcc/config/riscv/iterators.md b/gcc/config/riscv/iterators.md\nindex 192556e92e27..076911e5e7f1 100644\n--- a/gcc/config/riscv/iterators.md\n+++ b/gcc/config/riscv/iterators.md\n@@ -266,7 +266,7 @@ (define_code_iterator any_le [le leu])\n (define_code_iterator any_eq [eq ne])\n \n ;; Iterators for conditions we can emit a sCC against 0 or a reg directly\n-(define_code_iterator scc_0 [eq ne gt gtu])\n+(define_code_iterator scc_0 [any_eq any_gt any_lt])\n \n ; atomics code iterator\n (define_code_iterator any_atomic [plus ior xor and])\ndiff --git a/gcc/config/riscv/zicond.md b/gcc/config/riscv/zicond.md\nindex ac1aa3a6b7ea..34fe2ce29c6d 100644\n--- a/gcc/config/riscv/zicond.md\n+++ b/gcc/config/riscv/zicond.md\n@@ -403,3 +403,69 @@ (define_insn_and_split \"conditional_rand<mode>\"\n \"operands[4] = gen_reg_rtx (word_mode);\n operands[5] = gen_reg_rtx (word_mode);\")\n \n+;; We want to select between 2^n and 0. Use an sCC insn to generate 1/0, then\n+;; left shift that by N to get the final result\n+(define_split\n+ [(set (match_operand:X 0 \"register_operand\")\n+\t(if_then_else:X\n+\t (scc_0:X (match_operand:X 1 \"register_operand\")\n+\t\t (const_int 0))\n+\t (match_operand 2 \"const_int_operand\")\n+\t (const_int 0)))\n+ (clobber (match_operand:X 3 \"register_operand\"))]\n+ \"exact_log2 (INTVAL (operands[2])) >= 0\"\n+ [(set (match_dup 3) (scc_0:X (match_dup 1) (const_int 0)))\n+ (set (match_dup 0) (ashift:X (match_dup 3) (match_dup 4)))]\n+ { operands[4] = GEN_INT (exact_log2 (INTVAL (operands[2]))); })\n+\n+(define_split\n+ [(set (match_operand:X 0 \"register_operand\")\n+\t(if_then_else:X\n+\t (any_gt:X (match_operand:X 1 \"register_operand\")\n+\t\t (match_operand:X 2 \"reg_or_0_operand\"))\n+\t (match_operand 3 \"const_int_operand\")\n+\t (const_int 0)))\n+ (clobber (match_operand:X 4 \"register_operand\"))]\n+ \"exact_log2 (INTVAL (operands[3])) >= 0\"\n+ [(set (match_dup 4) (any_gt:X (match_dup 1) (match_dup 2)))\n+ (set (match_dup 0) (ashift:X (match_dup 4) (match_dup 5)))]\n+ { operands[5] = GEN_INT (exact_log2 (INTVAL (operands[3]))); })\n+\n+(define_split\n+ [(set (match_operand:X 0 \"register_operand\")\n+\t(if_then_else:X\n+\t (any_ge:X (match_operand:X 1 \"register_operand\")\n+\t\t (const_int 1))\n+\t (match_operand 2 \"const_int_operand\")\n+\t (const_int 0)))\n+ (clobber (match_operand:X 3 \"register_operand\"))]\n+ \"exact_log2 (INTVAL (operands[2])) >= 0\"\n+ [(set (match_dup 3) (any_gt:X (match_dup 1) (const_int 1)))\n+ (set (match_dup 0) (ashift:X (match_dup 3) (match_dup 4)))]\n+ { operands[4] = GEN_INT (exact_log2 (INTVAL (operands[2]))); })\n+\n+(define_split\n+ [(set (match_operand:X 0 \"register_operand\")\n+\t(if_then_else:X\n+\t (any_lt:X (match_operand:X 1 \"register_operand\")\n+\t\t (match_operand:X 2 \"arith_operand\"))\n+\t (match_operand 3 \"const_int_operand\")\n+\t (const_int 0)))\n+ (clobber (match_operand:X 4 \"register_operand\"))]\n+ \"exact_log2 (INTVAL (operands[3])) >= 0\"\n+ [(set (match_dup 4) (any_lt:X (match_dup 1) (match_dup 2)))\n+ (set (match_dup 0) (ashift:X (match_dup 4) (match_dup 5)))]\n+ { operands[5] = GEN_INT (exact_log2 (INTVAL (operands[3]))); })\n+\n+(define_split\n+ [(set (match_operand:X 0 \"register_operand\")\n+\t(if_then_else:X\n+\t (any_le:X (match_operand:X 1 \"register_operand\")\n+\t\t (match_operand:X 2 \"sle_operand\"))\n+\t (match_operand 3 \"const_int_operand\")\n+\t (const_int 0)))\n+ (clobber (match_operand:X 4 \"register_operand\"))]\n+ \"exact_log2 (INTVAL (operands[3])) >= 0\"\n+ [(set (match_dup 4) (any_le:X (match_dup 1) (match_dup 2)))\n+ (set (match_dup 0) (ashift:X (match_dup 4) (match_dup 5)))]\n+ { operands[5] = GEN_INT (exact_log2 (INTVAL (operands[3]))); })\ndiff --git a/gcc/testsuite/gcc.target/riscv/pr124009.c b/gcc/testsuite/gcc.target/riscv/pr124009.c\nnew file mode 100644\nindex 000000000000..6f541cacbb85\n--- /dev/null\n+++ b/gcc/testsuite/gcc.target/riscv/pr124009.c\n@@ -0,0 +1,11 @@\n+/* { dg-do compile } */\n+/* { dg-options \"-O2 -march=rv64gcbv_zicond -mabi=lp64d\" { target { rv64 } } } */\n+/* { dg-options \"-O2 -march=rv32gcbv_zicond -mabi=ilp32\" { target { rv32 } } } */\n+\n+int foo(int x, int y) { return (y < x) ? 1 : -1; }\n+\n+\n+/* { dg-final { scan-assembler-times {slli\\t} 1 } } */\n+/* { dg-final { scan-assembler-times {addi\\t} 1 } } */\n+/* { dg-final { scan-assembler-not {czero.eqz\\t} } } */\n+\n", "prefixes": [ "to-be-committed", "RISC-V", "PR", "target/124009" ] }