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GET /api/patches/2232089/?format=api
{ "id": 2232089, "url": "http://patchwork.ozlabs.org/api/patches/2232089/?format=api", "web_url": "http://patchwork.ozlabs.org/project/gcc/patch/20260502144949.3756492-1-xry111@xry111.site/", "project": { "id": 17, "url": "http://patchwork.ozlabs.org/api/projects/17/?format=api", "name": "GNU Compiler Collection", "link_name": "gcc", "list_id": "gcc-patches.gcc.gnu.org", "list_email": "gcc-patches@gcc.gnu.org", "web_url": null, "scm_url": null, "webscm_url": null, "list_archive_url": "", "list_archive_url_format": "", "commit_url_format": "" }, "msgid": "<20260502144949.3756492-1-xry111@xry111.site>", "list_archive_url": null, "date": "2026-05-02T14:49:34", "name": "LoongArch: Improve xor+xor+ior sequence when possible [PR 96692]", "commit_ref": null, "pull_url": null, "state": "new", "archived": false, "hash": "b9090994834940be53027e23bfba6287c27b8767", "submitter": { "id": 84026, "url": "http://patchwork.ozlabs.org/api/people/84026/?format=api", "name": "Xi Ruoyao", "email": "xry111@xry111.site" }, "delegate": null, "mbox": "http://patchwork.ozlabs.org/project/gcc/patch/20260502144949.3756492-1-xry111@xry111.site/mbox/", "series": [ { "id": 502536, "url": "http://patchwork.ozlabs.org/api/series/502536/?format=api", "web_url": "http://patchwork.ozlabs.org/project/gcc/list/?series=502536", "date": "2026-05-02T14:49:34", "name": "LoongArch: Improve xor+xor+ior sequence when possible [PR 96692]", "version": 1, "mbox": "http://patchwork.ozlabs.org/series/502536/mbox/" } ], "comments": "http://patchwork.ozlabs.org/api/patches/2232089/comments/", "check": "pending", "checks": "http://patchwork.ozlabs.org/api/patches/2232089/checks/", "tags": {}, "related": [], "headers": { "Return-Path": "<gcc-patches-bounces~incoming=patchwork.ozlabs.org@gcc.gnu.org>", "X-Original-To": [ "incoming@patchwork.ozlabs.org", "gcc-patches@gcc.gnu.org" ], "Delivered-To": [ "patchwork-incoming@legolas.ozlabs.org", "gcc-patches@gcc.gnu.org" ], "Authentication-Results": [ "legolas.ozlabs.org;\n\tdkim=pass (1024-bit key;\n unprotected) header.d=xry111.site header.i=@xry111.site header.a=rsa-sha256\n header.s=default header.b=LiMvHO2s;\n\tdkim-atps=neutral", "legolas.ozlabs.org;\n spf=pass (sender SPF authorized) smtp.mailfrom=gcc.gnu.org\n (client-ip=38.145.34.32; helo=vm01.sourceware.org;\n envelope-from=gcc-patches-bounces~incoming=patchwork.ozlabs.org@gcc.gnu.org;\n receiver=patchwork.ozlabs.org)", "sourceware.org;\n\tdkim=pass (1024-bit key,\n unprotected) header.d=xry111.site header.i=@xry111.site header.a=rsa-sha256\n header.s=default header.b=LiMvHO2s", "sourceware.org;\n dmarc=pass (p=reject dis=none) header.from=xry111.site", "sourceware.org; spf=pass smtp.mailfrom=xry111.site", "server2.sourceware.org;\n arc=none smtp.remote-ip=89.208.246.23" ], "Received": [ "from vm01.sourceware.org (vm01.sourceware.org [38.145.34.32])\n\t(using TLSv1.3 with cipher TLS_AES_256_GCM_SHA384 (256/256 bits)\n\t key-exchange x25519 server-signature ECDSA (secp384r1) server-digest SHA384)\n\t(No client certificate requested)\n\tby legolas.ozlabs.org (Postfix) with ESMTPS id 4g79nj4x50z1yJ0\n\tfor <incoming@patchwork.ozlabs.org>; Sun, 03 May 2026 00:50:49 +1000 (AEST)", "from vm01.sourceware.org (localhost [127.0.0.1])\n\tby sourceware.org (Postfix) with ESMTP id 465FB4BB3B90\n\tfor <incoming@patchwork.ozlabs.org>; Sat, 2 May 2026 14:50:46 +0000 (GMT)", "from xry111.site (xry111.site [89.208.246.23])\n by sourceware.org (Postfix) with ESMTPS id 5D4934BB24F4\n for <gcc-patches@gcc.gnu.org>; Sat, 2 May 2026 14:50:19 +0000 (GMT)", "from stargazer (unknown\n [IPv6:2409:8a4c:e1c:abf0:bb72:8d18:d3cb:9175])\n (using TLSv1.3 with cipher TLS_AES_256_GCM_SHA384 (256/256 bits)\n key-exchange X25519 server-signature ECDSA (secp384r1) server-digest SHA384)\n (Client did not present a certificate)\n (Authenticated sender: xry111@xry111.site)\n by xry111.site (Postfix) with ESMTPSA id 53F2D65992;\n Sat, 2 May 2026 10:50:14 -0400 (EDT)" ], "DKIM-Filter": [ "OpenDKIM Filter v2.11.0 sourceware.org 465FB4BB3B90", "OpenDKIM Filter v2.11.0 sourceware.org 5D4934BB24F4" ], "DMARC-Filter": "OpenDMARC Filter v1.4.2 sourceware.org 5D4934BB24F4", "ARC-Filter": "OpenARC Filter v1.0.0 sourceware.org 5D4934BB24F4", "ARC-Seal": "i=1; a=rsa-sha256; d=sourceware.org; s=key; t=1777733419; cv=none;\n b=OAywm81a+HD96ugWEkqfomJvKVduiooW4bvzpKJyCblq7hREl9yYYTe7NysaTiBOncA0/EiifTiz8NA1LD7Kap5HpUvbMMlQUMJVpUlBaFQVP4gJRWCYtfFGbcbbAIHC/dGYyEpfV/OvViaQOyDJyWc3IcLDBbRXuStBfxlnaOc=", "ARC-Message-Signature": "i=1; a=rsa-sha256; d=sourceware.org; s=key;\n t=1777733419; c=relaxed/simple;\n bh=Iqx01ZU1CyC0I3TXfS6dVYQ/Z5hkGcsvN5hG2k4iL+0=;\n h=DKIM-Signature:From:To:Subject:Date:Message-ID:MIME-Version;\n b=S8Qbdao1WoLMBKoGjQ6nXaethQoQsjJtT0W1Gd+/uqGBEdSp99EWvLwNZBzLGdG5I5mf7h+Ki3QwBE2ywrcTtvfp4UAya9Bwlsizxi8ICEmtVoxYpgWFCJHj1TayJF/Jg361EhsThJxyRKuyPLfpCWqrQPQJ2Xs2v2K3TtPSShY=", "ARC-Authentication-Results": "i=1; server2.sourceware.org", "DKIM-Signature": "v=1; a=rsa-sha256; c=relaxed/relaxed; d=xry111.site;\n s=default; t=1777733418;\n bh=GlVfWOlz2Fl+W2Ji/mNCM1T7LfjBJOdWyufK7WZqmgo=;\n h=From:To:Cc:Subject:Date:From;\n b=LiMvHO2snJB3xi7riJ206ID8JtIl2oRATwdfGlY2T1TllA8pqo3IyUnWBVzaC1dih\n knLDw4w4ea2dJi+0vGdibTmaUAGPZDuTr9TKMRNrmoEUpUzDJ59Q6Fv1ngV2bI+rXd\n jEAQbJJr5KyTn7MgQE/Ckm1oMIDV4kSdhAoXrIqQ=", "From": "Xi Ruoyao <xry111@xry111.site>", "To": "gcc-patches@gcc.gnu.org", "Cc": "Lulu Cheng <chenglulu@loongson.cn>, WANG Xuerui <i@xen0n.name>,\n Mingcong Bai <jeffbai@aosc.io>, Zixing Liu <liushuyu@aosc.io>,\n Xi Ruoyao <xry111@xry111.site>", "Subject": "[PATCH] LoongArch: Improve xor+xor+ior sequence when possible [PR\n 96692]", "Date": "Sat, 2 May 2026 22:49:34 +0800", "Message-ID": "<20260502144949.3756492-1-xry111@xry111.site>", "X-Mailer": "git-send-email 2.54.0", "MIME-Version": "1.0", "Content-Transfer-Encoding": "8bit", "X-BeenThere": "gcc-patches@gcc.gnu.org", "X-Mailman-Version": "2.1.30", "Precedence": "list", "List-Id": "Gcc-patches mailing list <gcc-patches.gcc.gnu.org>", "List-Unsubscribe": "<https://gcc.gnu.org/mailman/options/gcc-patches>,\n <mailto:gcc-patches-request@gcc.gnu.org?subject=unsubscribe>", "List-Archive": "<https://gcc.gnu.org/pipermail/gcc-patches/>", "List-Post": "<mailto:gcc-patches@gcc.gnu.org>", "List-Help": "<mailto:gcc-patches-request@gcc.gnu.org?subject=help>", "List-Subscribe": "<https://gcc.gnu.org/mailman/listinfo/gcc-patches>,\n <mailto:gcc-patches-request@gcc.gnu.org?subject=subscribe>", "Errors-To": "gcc-patches-bounces~incoming=patchwork.ozlabs.org@gcc.gnu.org" }, "content": "Copy the a ^ b ^ (a | c) => (a &~ c) ^ b optimization from RISC-V zbb\n(r17-241) as we have the andn instruction in LA64 and LA32S.\n\n\tPR rtl-optimization/96692\n\ngcc/\n\n\t* config/loongarch/loongarch.md (define_split): New splitters\n\tturning a ^ b ^ (a | c) => (a &~ c) ^ b.\n\ngcc/testsuite/\n\n\t* gcc.target/loongarch/pr96692.c: New test.\n---\n\nBootstrapped and regtested on loongarch64-linux-gnu. Ok for trunk?\n\n gcc/config/loongarch/loongarch.md | 23 ++++++++++++++++++++\n gcc/testsuite/gcc.target/loongarch/pr96692.c | 11 ++++++++++\n 2 files changed, 34 insertions(+)\n create mode 100644 gcc/testsuite/gcc.target/loongarch/pr96692.c", "diff": "diff --git a/gcc/config/loongarch/loongarch.md b/gcc/config/loongarch/loongarch.md\nindex 1fea712f668..f3c08b521dd 100644\n--- a/gcc/config/loongarch/loongarch.md\n+++ b/gcc/config/loongarch/loongarch.md\n@@ -1829,6 +1829,29 @@ (define_insn \"*<optab>nsi_internal\"\n \"<insn>n\\t%0,%2,%1\"\n [(set_attr \"type\" \"logical\")\n (set_attr \"mode\" \"SI\")])\n+\n+(define_split\n+ [(set (match_operand:X 0 \"register_operand\")\n+ (xor:X (xor:X (ior:X (match_operand:X 1 \"register_operand\")\n+ (match_operand:X 2 \"register_operand\"))\n+ (match_dup 1))\n+ (match_operand:X 3 \"register_operand\")))\n+ (clobber (match_operand:X 4 \"register_operand\"))]\n+ \"TARGET_64BIT || TARGET_32BIT_S\"\n+ [(set (match_dup 4) (and:X (not:X (match_dup 1)) (match_dup 2)))\n+ (set (match_dup 0) (xor:X (match_dup 4) (match_dup 3)))])\n+\n+(define_split\n+ [(set (match_operand:X 0 \"register_operand\")\n+ (xor:X (xor:X (ior:X (match_operand:X 1 \"register_operand\")\n+ (match_operand:X 2 \"register_operand\"))\n+ (match_dup 2))\n+ (match_operand:X 3 \"register_operand\")))\n+ (clobber (match_operand:X 4 \"register_operand\"))]\n+ \"TARGET_64BIT || TARGET_32BIT_S\"\n+ [(set (match_dup 4) (and:X (not:X (match_dup 2)) (match_dup 1)))\n+ (set (match_dup 0) (xor:X (match_dup 4) (match_dup 3)))])\n+\n \f\n ;;\n ;; ....................\ndiff --git a/gcc/testsuite/gcc.target/loongarch/pr96692.c b/gcc/testsuite/gcc.target/loongarch/pr96692.c\nnew file mode 100644\nindex 00000000000..1c2011af264\n--- /dev/null\n+++ b/gcc/testsuite/gcc.target/loongarch/pr96692.c\n@@ -0,0 +1,11 @@\n+/* { dg-do compile } */\n+/* { dg-options \"-march=loongarch64 -O\" { target lp64 } } */\n+/* { dg-options \"-march=la32v1.0 -O\" { target ilp32 } } */\n+\n+int f(int a, int b, int c)\n+{\n+ return (a ^ b) ^ (a | c);\n+}\n+\n+/* { dg-final { scan-assembler-times \"xor\\t\" 1 } } */\n+/* { dg-final { scan-assembler-times \"andn\\t\" 1 } } */\n", "prefixes": [] }