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{
    "id": 2231586,
    "url": "http://patchwork.ozlabs.org/api/patches/2231586/?format=api",
    "web_url": "http://patchwork.ozlabs.org/project/uboot/patch/20260430-apple-dt-upstream-v1-3-dda66c16e0da@jannau.net/",
    "project": {
        "id": 18,
        "url": "http://patchwork.ozlabs.org/api/projects/18/?format=api",
        "name": "U-Boot",
        "link_name": "uboot",
        "list_id": "u-boot.lists.denx.de",
        "list_email": "u-boot@lists.denx.de",
        "web_url": null,
        "scm_url": null,
        "webscm_url": null,
        "list_archive_url": "",
        "list_archive_url_format": "",
        "commit_url_format": ""
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    "msgid": "<20260430-apple-dt-upstream-v1-3-dda66c16e0da@jannau.net>",
    "list_archive_url": null,
    "date": "2026-04-30T21:25:48",
    "name": "[3/3] arm: dts: Switch Apple silicon devices to dts/upstream",
    "commit_ref": null,
    "pull_url": null,
    "state": "new",
    "archived": false,
    "hash": "dfeced66cce368b5d2270e72a8a42b556214e482",
    "submitter": {
        "id": 46572,
        "url": "http://patchwork.ozlabs.org/api/people/46572/?format=api",
        "name": "Janne Grunau",
        "email": "j@jannau.net"
    },
    "delegate": null,
    "mbox": "http://patchwork.ozlabs.org/project/uboot/patch/20260430-apple-dt-upstream-v1-3-dda66c16e0da@jannau.net/mbox/",
    "series": [
        {
            "id": 502388,
            "url": "http://patchwork.ozlabs.org/api/series/502388/?format=api",
            "web_url": "http://patchwork.ozlabs.org/project/uboot/list/?series=502388",
            "date": "2026-04-30T21:25:45",
            "name": "Switch Apple silicon boards to upstream device trees",
            "version": 1,
            "mbox": "http://patchwork.ozlabs.org/series/502388/mbox/"
        }
    ],
    "comments": "http://patchwork.ozlabs.org/api/patches/2231586/comments/",
    "check": "pending",
    "checks": "http://patchwork.ozlabs.org/api/patches/2231586/checks/",
    "tags": {},
    "related": [],
    "headers": {
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        "From": "Janne Grunau <j@jannau.net>",
        "Date": "Thu, 30 Apr 2026 23:25:48 +0200",
        "Subject": "[PATCH 3/3] arm: dts: Switch Apple silicon devices to dts/upstream",
        "MIME-Version": "1.0",
        "Content-Type": "text/plain; charset=\"utf-8\"",
        "Content-Transfer-Encoding": "7bit",
        "Message-Id": "<20260430-apple-dt-upstream-v1-3-dda66c16e0da@jannau.net>",
        "References": "<20260430-apple-dt-upstream-v1-0-dda66c16e0da@jannau.net>",
        "In-Reply-To": "<20260430-apple-dt-upstream-v1-0-dda66c16e0da@jannau.net>",
        "To": "u-boot@lists.denx.de",
        "Cc": "Tom Rini <trini@konsulko.com>, Mark Kettenis <kettenis@openbsd.org>,\n Janne Grunau <j@jannau.net>",
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    "content": "The device tree on Apple silicon devices is passed from a previous\nbootloader stage. The bootloader fills in dynamic information so\nu-boot can not use its own device tree.\nAs documented in doc/board/apple/m1.rst it is possible to build boot\nbundles (bootloader + device tree + gzipped u-boot binary). These are\nuseful for testing.\nInstead of using u-boot's own device trees for M1 (t8103) devices use\nupstream device trees from dts/upstream/src/arm64/apple. The u-boot\ndevice trees have not seen updates since 2022. The upstream linux device\ntrees have feature parity for the M1 devices. In addition linux has\ndevice trees for M1 Pro/Max/Ultra, M2 and M2 Pro/Max/Ultra devices.\nKeep t8103-j274 as default device tree to avoid further updates.\n\nSigned-off-by: Janne Grunau <j@jannau.net>\n---\n arch/arm/Kconfig                    |    1 +\n arch/arm/dts/Makefile               |    7 -\n arch/arm/dts/t8103-j274-u-boot.dtsi |    1 -\n arch/arm/dts/t8103-j274.dts         |  129 ----\n arch/arm/dts/t8103-j293-u-boot.dtsi |    1 -\n arch/arm/dts/t8103-j293.dts         |  116 ----\n arch/arm/dts/t8103-j313-u-boot.dtsi |    1 -\n arch/arm/dts/t8103-j313.dts         |  111 ----\n arch/arm/dts/t8103-j456-u-boot.dtsi |    1 -\n arch/arm/dts/t8103-j456.dts         |  117 ----\n arch/arm/dts/t8103-j457-u-boot.dtsi |    1 -\n arch/arm/dts/t8103-j457.dts         |  105 ----\n arch/arm/dts/t8103-jxxx.dtsi        |  143 -----\n arch/arm/dts/t8103-pmgr.dtsi        | 1138 -----------------------------------\n arch/arm/dts/t8103-u-boot.dtsi      |   25 -\n arch/arm/dts/t8103.dtsi             |  696 ---------------------\n configs/apple_m1_defconfig          |    2 +-\n doc/board/apple/m1.rst              |    5 +-\n 18 files changed, 4 insertions(+), 2596 deletions(-)",
    "diff": "diff --git a/arch/arm/Kconfig b/arch/arm/Kconfig\nindex cd6a454fd60..3f9bbfe6c5b 100644\n--- a/arch/arm/Kconfig\n+++ b/arch/arm/Kconfig\n@@ -1068,6 +1068,7 @@ config ARCH_APPLE\n \timply CMD_GPT\n \timply BOOTSTD_FULL\n \timply OF_HAS_PRIOR_STAGE\n+\timply OF_UPSTREAM\n \n config ARCH_OWL\n \tbool \"Actions Semi OWL SoCs\"\ndiff --git a/arch/arm/dts/Makefile b/arch/arm/dts/Makefile\nindex 82ad3035308..3ff2577c605 100644\n--- a/arch/arm/dts/Makefile\n+++ b/arch/arm/dts/Makefile\n@@ -32,13 +32,6 @@ dtb-$(CONFIG_TARGET_A5Y17LTE) += exynos78x0-axy17lte.dtb\n dtb-$(CONFIG_TARGET_A3Y17LTE) += exynos78x0-axy17lte.dtb\n dtb-$(CONFIG_TARGET_A7Y17LTE) += exynos78x0-axy17lte.dtb\n \n-dtb-$(CONFIG_ARCH_APPLE) += \\\n-\tt8103-j274.dtb \\\n-\tt8103-j293.dtb \\\n-\tt8103-j313.dtb \\\n-\tt8103-j456.dtb \\\n-\tt8103-j457.dtb\n-\n dtb-$(CONFIG_ARCH_DAVINCI) += \\\n \tda850-lcdk.dtb \\\n \tda850-lego-ev3.dtb\ndiff --git a/arch/arm/dts/t8103-j274-u-boot.dtsi b/arch/arm/dts/t8103-j274-u-boot.dtsi\ndeleted file mode 100644\nindex 6c8dd5a56f8..00000000000\n--- a/arch/arm/dts/t8103-j274-u-boot.dtsi\n+++ /dev/null\n@@ -1 +0,0 @@\n-#include \"t8103-u-boot.dtsi\"\ndiff --git a/arch/arm/dts/t8103-j274.dts b/arch/arm/dts/t8103-j274.dts\ndeleted file mode 100644\nindex 9bc592bcdbf..00000000000\n--- a/arch/arm/dts/t8103-j274.dts\n+++ /dev/null\n@@ -1,129 +0,0 @@\n-// SPDX-License-Identifier: GPL-2.0+ OR MIT\n-/*\n- * Apple Mac mini (M1, 2020)\n- *\n- * target-type: J274\n- *\n- * Copyright The Asahi Linux Contributors\n- */\n-\n-/dts-v1/;\n-\n-#include \"t8103.dtsi\"\n-#include \"t8103-jxxx.dtsi\"\n-\n-/ {\n-\tcompatible = \"apple,j274\", \"apple,t8103\", \"apple,arm-platform\";\n-\tmodel = \"Apple Mac mini (M1, 2020)\";\n-\n-\taliases {\n-\t\tethernet0 = &ethernet0;\n-\t};\n-};\n-\n-&wifi0 {\n-\tbrcm,board-type = \"apple,atlantisb\";\n-};\n-\n-/*\n- * Provide labels for the USB type C ports.\n- */\n-\n-&typec0 {\n-\tlabel = \"USB-C Back-left\";\n-};\n-\n-&typec1 {\n-\tlabel = \"USB-C Back-right\";\n-};\n-\n-/*\n- * Force the bus number assignments so that we can declare some of the\n- * on-board devices and properties that are populated by the bootloader\n- * (such as MAC addresses).\n- */\n-\n-&port01 {\n-\tbus-range = <2 2>;\n-};\n-\n-&port02 {\n-\tbus-range = <3 3>;\n-\tethernet0: ethernet@0,0 {\n-\t\treg = <0x30000 0x0 0x0 0x0 0x0>;\n-\t\t/* To be filled by the loader */\n-\t\tlocal-mac-address = [00 10 18 00 00 00];\n-\t};\n-};\n-\n-&i2c1 {\n-\tclock-frequency = <50000>;\n-\n-\tspeaker_amp: codec@31 {\n-\t\tcompatible = \"ti,tas5770l\", \"ti,tas2770\";\n-\t\treg = <0x31>;\n-\t\treset-gpios = <&pinctrl_ap 181 GPIO_ACTIVE_HIGH>;\n-\t\t#sound-dai-cells = <0>;\n-\t};\n-};\n-\n-&i2c2 {\n-\tstatus = \"okay\";\n-\n-\tclock-frequency = <50000>;\n-\n-\tjack_codec: codec@48 {\n-\t\tcompatible = \"cirrus,cs42l83\", \"cirrus,cs42l42\";\n-\t\treg = <0x48>;\n-\t\treset-gpios = <&pinctrl_nub 11 GPIO_ACTIVE_HIGH>;\n-\t\tinterrupt-parent = <&pinctrl_ap>;\n-\t\tinterrupts = <183 IRQ_TYPE_LEVEL_LOW>;\n-\t\t#sound-dai-cells = <0>;\n-\t\tcirrus,ts-inv = <1>;\n-\t};\n-};\n-\n-/ {\n-\tsound {\n-\t\tcompatible = \"simple-audio-card\";\n-\t\tsimple-audio-card,name = \"Mac mini integrated audio\";\n-\t\t#address-cells = <1>;\n-\t\t#size-cells = <0>;\n-\n-\t\tsimple-audio-card,dai-link@0 {\n-\t\t\treg = <0>;\n-\t\t\tformat = \"left_j\";\n-\t\t\ttdm-slot-width = <32>;\n-\t\t\tmclk-fs = <64>;\n-\n-\t\t\tlink0_cpu: cpu {\n-\t\t\t\tsound-dai = <&mca 0>;\n-\t\t\t\tbitclock-master;\n-\t\t\t\tframe-master;\n-\t\t\t};\n-\n-\t\t\tlink0_codec: codec {\n-\t\t\t\tsound-dai = <&speaker_amp>;\n-\t\t\t};\n-\t\t};\n-\n-\t\tsimple-audio-card,dai-link@1 {\n-\t\t\tbitclock-inversion;\n-\t\t\tframe-inversion;\n-\t\t\treg = <1>;\n-\t\t\tformat = \"i2s\";\n-\t\t\tmclk-fs = <64>;\n-\t\t\ttdm-slot-width = <32>;\n-\n-\t\t\tlink1_cpu: cpu {\n-\t\t\t\tsound-dai = <&mca 2>;\n-\t\t\t\tbitclock-master;\n-\t\t\t\tframe-master;\n-\t\t\t};\n-\n-\t\t\tlink1_codec: codec {\n-\t\t\t\tsound-dai = <&jack_codec>;\n-\t\t\t};\n-\t\t};\n-\t};\n-};\ndiff --git a/arch/arm/dts/t8103-j293-u-boot.dtsi b/arch/arm/dts/t8103-j293-u-boot.dtsi\ndeleted file mode 100644\nindex 6c8dd5a56f8..00000000000\n--- a/arch/arm/dts/t8103-j293-u-boot.dtsi\n+++ /dev/null\n@@ -1 +0,0 @@\n-#include \"t8103-u-boot.dtsi\"\ndiff --git a/arch/arm/dts/t8103-j293.dts b/arch/arm/dts/t8103-j293.dts\ndeleted file mode 100644\nindex de1a21d97cd..00000000000\n--- a/arch/arm/dts/t8103-j293.dts\n+++ /dev/null\n@@ -1,116 +0,0 @@\n-// SPDX-License-Identifier: GPL-2.0+ OR MIT\n-/*\n- * Apple MacBook Pro (13-inch, M1, 2020)\n- *\n- * target-type: J293\n- *\n- * Copyright The Asahi Linux Contributors\n- */\n-\n-/dts-v1/;\n-\n-#include \"t8103.dtsi\"\n-#include \"t8103-jxxx.dtsi\"\n-\n-/ {\n-\tcompatible = \"apple,j293\", \"apple,t8103\", \"apple,arm-platform\";\n-\tmodel = \"Apple MacBook Pro (13-inch, M1, 2020)\";\n-};\n-\n-&wifi0 {\n-\tbrcm,board-type = \"apple,honshu\";\n-};\n-\n-/*\n- * Provide labels for the USB type C ports.\n- */\n-\n-&typec0 {\n-\tlabel = \"USB-C Left-back\";\n-};\n-\n-&typec1 {\n-\tlabel = \"USB-C Left-front\";\n-};\n-\n-&spi3 {\n-\tstatus = \"okay\";\n-\n-\thid-transport@0 {\n-\t\tcompatible = \"apple,spi-hid-transport\";\n-\t\treg = <0>;\n-\t\tspi-max-frequency = <8000000>;\n-\t\t/*\n-\t\t * cs-setup and cs-hold delays are derived from Apple's ADT\n-\t\t * Mac OS driver meta data secify 45 us for 'cs to clock' and\n-\t\t * 'clock to cs' delays.\n-\t\t */\n-\t\tspi-cs-setup-delay-ns = <20000>;\n-\t\tspi-cs-hold-delay-ns = <20000>;\n-\t\tspi-cs-inactive-delay-ns = <250000>;\n-\t\tspien-gpios = <&pinctrl_ap 195 0>;\n-\t\tinterrupts-extended = <&pinctrl_nub 13 IRQ_TYPE_LEVEL_LOW>;\n-\t};\n-};\n-\n-/*\n- * Remove unused PCIe ports and disable the associated DARTs.\n- */\n-\n-&pcie0_dart_1 {\n-\tstatus = \"disabled\";\n-};\n-\n-&pcie0_dart_2 {\n-\tstatus = \"disabled\";\n-};\n-\n-/delete-node/ &port01;\n-/delete-node/ &port02;\n-\n-&i2c2 {\n-\tstatus = \"okay\";\n-\tclock-frequency = <50000>;\n-\n-\tjack_codec: codec@48 {\n-\t\tcompatible = \"cirrus,cs42l83\", \"cirrus,cs42l42\";\n-\t\treg = <0x48>;\n-\t\treset-gpios = <&pinctrl_nub 11 GPIO_ACTIVE_HIGH>;\n-\t\tinterrupt-parent = <&pinctrl_ap>;\n-\t\tinterrupts = <183 IRQ_TYPE_LEVEL_LOW>;\n-\t\t#sound-dai-cells = <0>;\n-\t\tcirrus,ts-inv = <1>;\n-\t};\n-};\n-\n-&i2c4 {\n-\tstatus = \"okay\";\n-};\n-\n-/ {\n-\tsound {\n-\t\tcompatible = \"simple-audio-card\";\n-\t\tsimple-audio-card,name = \"MacBook integrated audio\";\n-\t\t#address-cells = <1>;\n-\t\t#size-cells = <0>;\n-\n-\t\tsimple-audio-card,dai-link@0 {\n-\t\t\tbitclock-inversion;\n-\t\t\tframe-inversion;\n-\t\t\treg = <0>;\n-\t\t\tformat = \"i2s\";\n-\t\t\tmclk-fs = <64>;\n-\t\t\ttdm-slot-width = <32>;\n-\n-\t\t\tlink0_cpu: cpu {\n-\t\t\t\tsound-dai = <&mca 2>;\n-\t\t\t\tbitclock-master;\n-\t\t\t\tframe-master;\n-\t\t\t};\n-\n-\t\t\tlink0_codec: codec {\n-\t\t\t\tsound-dai = <&jack_codec>;\n-\t\t\t};\n-\t\t};\n-\t};\n-};\ndiff --git a/arch/arm/dts/t8103-j313-u-boot.dtsi b/arch/arm/dts/t8103-j313-u-boot.dtsi\ndeleted file mode 100644\nindex 6c8dd5a56f8..00000000000\n--- a/arch/arm/dts/t8103-j313-u-boot.dtsi\n+++ /dev/null\n@@ -1 +0,0 @@\n-#include \"t8103-u-boot.dtsi\"\ndiff --git a/arch/arm/dts/t8103-j313.dts b/arch/arm/dts/t8103-j313.dts\ndeleted file mode 100644\nindex 5efe8d7a63b..00000000000\n--- a/arch/arm/dts/t8103-j313.dts\n+++ /dev/null\n@@ -1,111 +0,0 @@\n-// SPDX-License-Identifier: GPL-2.0+ OR MIT\n-/*\n- * Apple MacBook Air (M1, 2020)\n- *\n- * target-type: J313\n- *\n- * Copyright The Asahi Linux Contributors\n- */\n-\n-/dts-v1/;\n-\n-#include \"t8103.dtsi\"\n-#include \"t8103-jxxx.dtsi\"\n-\n-/ {\n-\tcompatible = \"apple,j313\", \"apple,t8103\", \"apple,arm-platform\";\n-\tmodel = \"Apple MacBook Air (M1, 2020)\";\n-};\n-\n-&wifi0 {\n-\tbrcm,board-type = \"apple,shikoku\";\n-};\n-\n-/*\n- * Provide labels for the USB type C ports.\n- */\n-\n-&typec0 {\n-\tlabel = \"USB-C Left-back\";\n-};\n-\n-&typec1 {\n-\tlabel = \"USB-C Left-front\";\n-};\n-\n-&spi3 {\n-\tstatus = \"okay\";\n-\n-\thid-transport@0 {\n-\t\tcompatible = \"apple,spi-hid-transport\";\n-\t\treg = <0>;\n-\t\tspi-max-frequency = <8000000>;\n-\t\t/*\n-\t\t * cs-setup and cs-hold delays are derived from Apple's ADT\n-\t\t * Mac OS driver meta data secify 45 us for 'cs to clock' and\n-\t\t * 'clock to cs' delays.\n-\t\t */\n-\t\tspi-cs-setup-delay-ns = <20000>;\n-\t\tspi-cs-hold-delay-ns = <20000>;\n-\t\tspi-cs-inactive-delay-ns = <250000>;\n-\t\tspien-gpios = <&pinctrl_ap 195 0>;\n-\t\tinterrupts-extended = <&pinctrl_nub 13 IRQ_TYPE_LEVEL_LOW>;\n-\t};\n-};\n-\n-/*\n- * Remove unused PCIe ports and disable the associated DARTs.\n- */\n-\n-&pcie0_dart_1 {\n-\tstatus = \"disabled\";\n-};\n-\n-&pcie0_dart_2 {\n-\tstatus = \"disabled\";\n-};\n-\n-/delete-node/ &port01;\n-/delete-node/ &port02;\n-\n-&i2c3 {\n-\tclock-frequency = <50000>;\n-\n-\tjack_codec: codec@48 {\n-\t\tcompatible = \"cirrus,cs42l83\", \"cirrus,cs42l42\";\n-\t\treg = <0x48>;\n-\t\treset-gpios = <&pinctrl_nub 11 GPIO_ACTIVE_HIGH>;\n-\t\tinterrupt-parent = <&pinctrl_ap>;\n-\t\tinterrupts = <183 IRQ_TYPE_LEVEL_LOW>;\n-\t\t#sound-dai-cells = <0>;\n-\t\tcirrus,ts-inv = <1>;\n-\t};\n-};\n-\n-/ {\n-\tsound {\n-\t\tcompatible = \"simple-audio-card\";\n-\t\tsimple-audio-card,name = \"MacBook integrated audio\";\n-\t\t#address-cells = <1>;\n-\t\t#size-cells = <0>;\n-\n-\t\tsimple-audio-card,dai-link@0 {\n-\t\t\tbitclock-inversion;\n-\t\t\tframe-inversion;\n-\t\t\treg = <0>;\n-\t\t\tformat = \"i2s\";\n-\t\t\tmclk-fs = <64>;\n-\t\t\ttdm-slot-width = <32>;\n-\n-\t\t\tlink0_cpu: cpu {\n-\t\t\t\tsound-dai = <&mca 2>;\n-\t\t\t\tbitclock-master;\n-\t\t\t\tframe-master;\n-\t\t\t};\n-\n-\t\t\tlink0_codec: codec {\n-\t\t\t\tsound-dai = <&jack_codec>;\n-\t\t\t};\n-\t\t};\n-\t};\n-};\ndiff --git a/arch/arm/dts/t8103-j456-u-boot.dtsi b/arch/arm/dts/t8103-j456-u-boot.dtsi\ndeleted file mode 100644\nindex 6c8dd5a56f8..00000000000\n--- a/arch/arm/dts/t8103-j456-u-boot.dtsi\n+++ /dev/null\n@@ -1 +0,0 @@\n-#include \"t8103-u-boot.dtsi\"\ndiff --git a/arch/arm/dts/t8103-j456.dts b/arch/arm/dts/t8103-j456.dts\ndeleted file mode 100644\nindex 8624168bdb7..00000000000\n--- a/arch/arm/dts/t8103-j456.dts\n+++ /dev/null\n@@ -1,117 +0,0 @@\n-// SPDX-License-Identifier: GPL-2.0+ OR MIT\n-/*\n- * Apple iMac (24-inch, 4x USB-C, M1, 2020)\n- *\n- * target-type: J456\n- *\n- * Copyright The Asahi Linux Contributors\n- */\n-\n-/dts-v1/;\n-\n-#include \"t8103.dtsi\"\n-#include \"t8103-jxxx.dtsi\"\n-\n-/ {\n-\tcompatible = \"apple,j456\", \"apple,t8103\", \"apple,arm-platform\";\n-\tmodel = \"Apple iMac (24-inch, 4x USB-C, M1, 2020)\";\n-\n-\taliases {\n-\t\tethernet0 = &ethernet0;\n-\t};\n-};\n-\n-&wifi0 {\n-\tbrcm,board-type = \"apple,capri\";\n-};\n-\n-&i2c0 {\n-\thpm2: usb-pd@3b {\n-\t\tcompatible = \"apple,cd321x\";\n-\t\treg = <0x3b>;\n-\t\tinterrupt-parent = <&pinctrl_ap>;\n-\t\tinterrupts = <106 IRQ_TYPE_LEVEL_LOW>;\n-\t\tinterrupt-names = \"irq\";\n-\t};\n-\n-\thpm3: usb-pd@3c {\n-\t\tcompatible = \"apple,cd321x\";\n-\t\treg = <0x3c>;\n-\t\tinterrupt-parent = <&pinctrl_ap>;\n-\t\tinterrupts = <106 IRQ_TYPE_LEVEL_LOW>;\n-\t\tinterrupt-names = \"irq\";\n-\t};\n-};\n-\n-/*\n- * Provide labels for the USB type C ports.\n- */\n-\n-&typec0 {\n-\tlabel = \"USB-C Back-right\";\n-};\n-\n-&typec1 {\n-\tlabel = \"USB-C Back-right-middle\";\n-};\n-\n-/*\n- * Force the bus number assignments so that we can declare some of the\n- * on-board devices and properties that are populated by the bootloader\n- * (such as MAC addresses).\n- */\n-\n-&port01 {\n-\tbus-range = <2 2>;\n-};\n-\n-&port02 {\n-\tbus-range = <3 3>;\n-\tethernet0: ethernet@0,0 {\n-\t\treg = <0x30000 0x0 0x0 0x0 0x0>;\n-\t\t/* To be filled by the loader */\n-\t\tlocal-mac-address = [00 10 18 00 00 00];\n-\t};\n-};\n-\n-&i2c1 {\n-\tclock-frequency = <50000>;\n-\n-\tjack_codec: codec@48 {\n-\t\tcompatible = \"cirrus,cs42l83\", \"cirrus,cs42l42\";\n-\t\treg = <0x48>;\n-\t\treset-gpios = <&pinctrl_nub 11 GPIO_ACTIVE_HIGH>;\n-\t\tinterrupt-parent = <&pinctrl_ap>;\n-\t\tinterrupts = <183 IRQ_TYPE_LEVEL_LOW>;\n-\t\t#sound-dai-cells = <0>;\n-\t\tcirrus,ts-inv = <1>;\n-\t};\n-};\n-\n-/ {\n-\tsound {\n-\t\tcompatible = \"simple-audio-card\";\n-\t\tsimple-audio-card,name = \"iMac integrated audio\";\n-\t\t#address-cells = <1>;\n-\t\t#size-cells = <0>;\n-\n-\t\tsimple-audio-card,dai-link@0 {\n-\t\t\tbitclock-inversion;\n-\t\t\tframe-inversion;\n-\t\t\treg = <0>;\n-\t\t\tformat = \"i2s\";\n-\t\t\tmclk-fs = <64>;\n-\t\t\ttdm-slot-width = <32>;\n-\n-\t\t\tlink0_cpu: cpu {\n-\t\t\t\tsound-dai = <&mca 2>;\n-\t\t\t\tbitclock-master;\n-\t\t\t\tframe-master;\n-\t\t\t};\n-\n-\t\t\tlink0_codec: codec {\n-\t\t\t\tsound-dai = <&jack_codec>;\n-\t\t\t};\n-\t\t};\n-\t};\n-};\ndiff --git a/arch/arm/dts/t8103-j457-u-boot.dtsi b/arch/arm/dts/t8103-j457-u-boot.dtsi\ndeleted file mode 100644\nindex 6c8dd5a56f8..00000000000\n--- a/arch/arm/dts/t8103-j457-u-boot.dtsi\n+++ /dev/null\n@@ -1 +0,0 @@\n-#include \"t8103-u-boot.dtsi\"\ndiff --git a/arch/arm/dts/t8103-j457.dts b/arch/arm/dts/t8103-j457.dts\ndeleted file mode 100644\nindex f3eec8d4729..00000000000\n--- a/arch/arm/dts/t8103-j457.dts\n+++ /dev/null\n@@ -1,105 +0,0 @@\n-// SPDX-License-Identifier: GPL-2.0+ OR MIT\n-/*\n- * Apple iMac (24-inch, 2x USB-C, M1, 2020)\n- *\n- * target-type: J457\n- *\n- * Copyright The Asahi Linux Contributors\n- */\n-\n-/dts-v1/;\n-\n-#include \"t8103.dtsi\"\n-#include \"t8103-jxxx.dtsi\"\n-\n-/ {\n-\tcompatible = \"apple,j457\", \"apple,t8103\", \"apple,arm-platform\";\n-\tmodel = \"Apple iMac (24-inch, 2x USB-C, M1, 2020)\";\n-\n-\taliases {\n-\t\tethernet0 = &ethernet0;\n-\t};\n-};\n-\n-&wifi0 {\n-\tbrcm,board-type = \"apple,santorini\";\n-};\n-\n-/*\n- * Provide labels for the USB type C ports.\n- */\n-\n-&typec0 {\n-\tlabel = \"USB-C Back-right\";\n-};\n-\n-&typec1 {\n-\tlabel = \"USB-C Back-left\";\n-};\n-\n-/*\n- * Force the bus number assignments so that we can declare some of the\n- * on-board devices and properties that are populated by the bootloader\n- * (such as MAC addresses).\n- */\n-\n-&port02 {\n-\tbus-range = <3 3>;\n-\tethernet0: ethernet@0,0 {\n-\t\treg = <0x30000 0x0 0x0 0x0 0x0>;\n-\t\t/* To be filled by the loader */\n-\t\tlocal-mac-address = [00 10 18 00 00 00];\n-\t};\n-};\n-\n-/*\n- * Remove unused PCIe port and disable the associated DART.\n- */\n-\n-&pcie0_dart_1 {\n-\tstatus = \"disabled\";\n-};\n-\n-/delete-node/ &port01;\n-\n-&i2c1 {\n-\tclock-frequency = <50000>;\n-\n-\tjack_codec: codec@48 {\n-\t\tcompatible = \"cirrus,cs42l83\", \"cirrus,cs42l42\";\n-\t\treg = <0x48>;\n-\t\treset-gpios = <&pinctrl_nub 11 GPIO_ACTIVE_HIGH>;\n-\t\tinterrupt-parent = <&pinctrl_ap>;\n-\t\tinterrupts = <183 IRQ_TYPE_LEVEL_LOW>;\n-\t\t#sound-dai-cells = <0>;\n-\t\tcirrus,ts-inv = <1>;\n-\t};\n-};\n-\n-/ {\n-\tsound {\n-\t\tcompatible = \"simple-audio-card\";\n-\t\tsimple-audio-card,name = \"iMac integrated audio\";\n-\t\t#address-cells = <1>;\n-\t\t#size-cells = <0>;\n-\n-\t\tsimple-audio-card,dai-link@0 {\n-\t\t\tbitclock-inversion;\n-\t\t\tframe-inversion;\n-\t\t\treg = <0>;\n-\t\t\tformat = \"i2s\";\n-\t\t\tmclk-fs = <64>;\n-\t\t\ttdm-slot-width = <32>;\n-\n-\t\t\tlink0_cpu: cpu {\n-\t\t\t\tsound-dai = <&mca 2>;\n-\t\t\t\tbitclock-master;\n-\t\t\t\tframe-master;\n-\t\t\t};\n-\n-\t\t\tlink0_codec: codec {\n-\t\t\t\tsound-dai = <&jack_codec>;\n-\t\t\t};\n-\t\t};\n-\t};\n-};\ndiff --git a/arch/arm/dts/t8103-jxxx.dtsi b/arch/arm/dts/t8103-jxxx.dtsi\ndeleted file mode 100644\nindex b4bd8c4238a..00000000000\n--- a/arch/arm/dts/t8103-jxxx.dtsi\n+++ /dev/null\n@@ -1,143 +0,0 @@\n-// SPDX-License-Identifier: GPL-2.0+ OR MIT\n-/*\n- * Apple M1 Mac mini, MacBook Air/Pro, iMac 24\" (M1, 2020/2021)\n- *\n- * This file contains parts common to all Apple M1 devices using the t8103.\n- *\n- * target-type: J274, J293, J313, J456, J457\n- *\n- * Copyright The Asahi Linux Contributors\n- */\n-\n-#include <dt-bindings/spmi/spmi.h>\n-\n-/ {\n-\taliases {\n-\t\tserial0 = &serial0;\n-\t\tserial2 = &serial2;\n-\t\twifi0 = &wifi0;\n-\t};\n-\n-\tchosen {\n-\t\t#address-cells = <2>;\n-\t\t#size-cells = <2>;\n-\t\tranges;\n-\n-\t\tstdout-path = \"serial0\";\n-\n-\t\tframebuffer0: framebuffer@0 {\n-\t\t\tcompatible = \"apple,simple-framebuffer\", \"simple-framebuffer\";\n-\t\t\treg = <0 0 0 0>; /* To be filled by loader */\n-\t\t\t/* Format properties will be added by loader */\n-\t\t\tstatus = \"disabled\";\n-\t\t};\n-\t};\n-\n-\tmemory@800000000 {\n-\t\tdevice_type = \"memory\";\n-\t\treg = <0x8 0 0x2 0>; /* To be filled by loader */\n-\t};\n-};\n-\n-&serial0 {\n-\tstatus = \"okay\";\n-};\n-\n-&serial2 {\n-\tstatus = \"okay\";\n-};\n-\n-&i2c0 {\n-\thpm0: usb-pd@38 {\n-\t\tcompatible = \"apple,cd321x\";\n-\t\treg = <0x38>;\n-\t\tinterrupt-parent = <&pinctrl_ap>;\n-\t\tinterrupts = <106 IRQ_TYPE_LEVEL_LOW>;\n-\t\tinterrupt-names = \"irq\";\n-\n-\t\ttypec0: connector {\n-\t\t\tcompatible = \"usb-c-connector\";\n-\t\t\tpower-role = \"dual\";\n-\t\t\tdata-role = \"dual\";\n-\n-\t\t\tports {\n-\t\t\t\t#address-cells = <1>;\n-\t\t\t\t#size-cells = <0>;\n-\t\t\t\tport@0 {\n-\t\t\t\t\treg = <0>;\n-\t\t\t\t\ttypec0_con_hs: endpoint {\n-\t\t\t\t\t\tremote-endpoint = <&typec0_usb_hs>;\n-\t\t\t\t\t};\n-\t\t\t\t};\n-\t\t\t};\n-\t\t};\n-\t};\n-\n-\thpm1: usb-pd@3f {\n-\t\tcompatible = \"apple,cd321x\";\n-\t\treg = <0x3f>;\n-\t\tinterrupt-parent = <&pinctrl_ap>;\n-\t\tinterrupts = <106 IRQ_TYPE_LEVEL_LOW>;\n-\t\tinterrupt-names = \"irq\";\n-\n-\t\ttypec1: connector {\n-\t\t\tcompatible = \"usb-c-connector\";\n-\t\t\tpower-role = \"dual\";\n-\t\t\tdata-role = \"dual\";\n-\n-\t\t\tports {\n-\t\t\t\t#address-cells = <1>;\n-\t\t\t\t#size-cells = <0>;\n-\t\t\t\tport@0 {\n-\t\t\t\t\treg = <0>;\n-\t\t\t\t\ttypec1_con_hs: endpoint {\n-\t\t\t\t\t\tremote-endpoint = <&typec1_usb_hs>;\n-\t\t\t\t\t};\n-\t\t\t\t};\n-\t\t\t};\n-\t\t};\n-\t};\n-};\n-\n-/* USB controllers */\n-&dwc3_0 {\n-\tport {\n-\t\ttypec0_usb_hs: endpoint {\n-\t\t\tremote-endpoint = <&typec0_con_hs>;\n-\t\t};\n-\t};\n-};\n-\n-&dwc3_1 {\n-\tport {\n-\t\ttypec1_usb_hs: endpoint {\n-\t\t\tremote-endpoint = <&typec1_con_hs>;\n-\t\t};\n-\t};\n-};\n-\n-/*\n- * Force the bus number assignments so that we can declare some of the\n- * on-board devices and properties that are populated by the bootloader\n- * (such as MAC addresses).\n- */\n-&port00 {\n-\tbus-range = <1 1>;\n-\tpwren-gpios = <&smc 13 0>;\n-\twifi0: network@0,0 {\n-\t\tcompatible = \"pci14e4,4425\";\n-\t\treg = <0x10000 0x0 0x0 0x0 0x0>;\n-\t\t/* To be filled by the loader */\n-\t\tlocal-mac-address = [00 00 00 00 00 00];\n-\t\tapple,antenna-sku = \"XX\";\n-\t};\n-};\n-\n-&spmi {\n-\tstatus = \"okay\";\n-\n-\tpmu@f {\n-\t\tcompatible = \"apple,sera-pmu\";\n-\t\treg = <0xf SPMI_USID>;\n-\t};\n-};\ndiff --git a/arch/arm/dts/t8103-pmgr.dtsi b/arch/arm/dts/t8103-pmgr.dtsi\ndeleted file mode 100644\nindex 82ea4aa322e..00000000000\n--- a/arch/arm/dts/t8103-pmgr.dtsi\n+++ /dev/null\n@@ -1,1138 +0,0 @@\n-// SPDX-License-Identifier: GPL-2.0+ OR MIT\n-/*\n- * PMGR Power domains for the Apple T8103 \"M1\" SoC\n- *\n- * Copyright The Asahi Linux Contributors\n- */\n-\n-\n-&pmgr {\n-\tps_sbr: power-controller@100 {\n-\t\tcompatible = \"apple,t8103-pmgr-pwrstate\", \"apple,pmgr-pwrstate\";\n-\t\treg = <0x100 4>;\n-\t\t#power-domain-cells = <0>;\n-\t\t#reset-cells = <0>;\n-\t\tlabel = \"sbr\";\n-\t\tapple,always-on; /* Core device */\n-\t};\n-\n-\tps_aic: power-controller@108 {\n-\t\tcompatible = \"apple,t8103-pmgr-pwrstate\", \"apple,pmgr-pwrstate\";\n-\t\treg = <0x108 4>;\n-\t\t#power-domain-cells = <0>;\n-\t\t#reset-cells = <0>;\n-\t\tlabel = \"aic\";\n-\t\tapple,always-on; /* Core device */\n-\t};\n-\n-\tps_dwi: power-controller@110 {\n-\t\tcompatible = \"apple,t8103-pmgr-pwrstate\", \"apple,pmgr-pwrstate\";\n-\t\treg = <0x110 4>;\n-\t\t#power-domain-cells = <0>;\n-\t\t#reset-cells = <0>;\n-\t\tlabel = \"dwi\";\n-\t\tapple,always-on; /* Core device */\n-\t};\n-\n-\tps_soc_spmi0: power-controller@118 {\n-\t\tcompatible = \"apple,t8103-pmgr-pwrstate\", \"apple,pmgr-pwrstate\";\n-\t\treg = <0x118 4>;\n-\t\t#power-domain-cells = <0>;\n-\t\t#reset-cells = <0>;\n-\t\tlabel = \"soc_spmi0\";\n-\t};\n-\n-\tps_soc_spmi1: power-controller@120 {\n-\t\tcompatible = \"apple,t8103-pmgr-pwrstate\", \"apple,pmgr-pwrstate\";\n-\t\treg = <0x120 4>;\n-\t\t#power-domain-cells = <0>;\n-\t\t#reset-cells = <0>;\n-\t\tlabel = \"soc_spmi1\";\n-\t};\n-\n-\tps_soc_spmi2: power-controller@128 {\n-\t\tcompatible = \"apple,t8103-pmgr-pwrstate\", \"apple,pmgr-pwrstate\";\n-\t\treg = <0x128 4>;\n-\t\t#power-domain-cells = <0>;\n-\t\t#reset-cells = <0>;\n-\t\tlabel = \"soc_spmi2\";\n-\t};\n-\n-\tps_gpio: power-controller@130 {\n-\t\tcompatible = \"apple,t8103-pmgr-pwrstate\", \"apple,pmgr-pwrstate\";\n-\t\treg = <0x130 4>;\n-\t\t#power-domain-cells = <0>;\n-\t\t#reset-cells = <0>;\n-\t\tlabel = \"gpio\";\n-\t};\n-\n-\tps_pms_busif: power-controller@138 {\n-\t\tcompatible = \"apple,t8103-pmgr-pwrstate\", \"apple,pmgr-pwrstate\";\n-\t\treg = <0x138 4>;\n-\t\t#power-domain-cells = <0>;\n-\t\t#reset-cells = <0>;\n-\t\tlabel = \"pms_busif\";\n-\t\tapple,always-on; /* Core device */\n-\t};\n-\n-\tps_pms: power-controller@140 {\n-\t\tcompatible = \"apple,t8103-pmgr-pwrstate\", \"apple,pmgr-pwrstate\";\n-\t\treg = <0x140 4>;\n-\t\t#power-domain-cells = <0>;\n-\t\t#reset-cells = <0>;\n-\t\tlabel = \"pms\";\n-\t\tapple,always-on; /* Core device */\n-\t};\n-\n-\tps_pms_fpwm0: power-controller@148 {\n-\t\tcompatible = \"apple,t8103-pmgr-pwrstate\", \"apple,pmgr-pwrstate\";\n-\t\treg = <0x148 4>;\n-\t\t#power-domain-cells = <0>;\n-\t\t#reset-cells = <0>;\n-\t\tlabel = \"pms_fpwm0\";\n-\t\tpower-domains = <&ps_pms>;\n-\t};\n-\n-\tps_pms_fpwm1: power-controller@150 {\n-\t\tcompatible = \"apple,t8103-pmgr-pwrstate\", \"apple,pmgr-pwrstate\";\n-\t\treg = <0x150 4>;\n-\t\t#power-domain-cells = <0>;\n-\t\t#reset-cells = <0>;\n-\t\tlabel = \"pms_fpwm1\";\n-\t\tpower-domains = <&ps_pms>;\n-\t};\n-\n-\tps_pms_fpwm2: power-controller@158 {\n-\t\tcompatible = \"apple,t8103-pmgr-pwrstate\", \"apple,pmgr-pwrstate\";\n-\t\treg = <0x158 4>;\n-\t\t#power-domain-cells = <0>;\n-\t\t#reset-cells = <0>;\n-\t\tlabel = \"pms_fpwm2\";\n-\t\tpower-domains = <&ps_pms>;\n-\t};\n-\n-\tps_pms_fpwm3: power-controller@160 {\n-\t\tcompatible = \"apple,t8103-pmgr-pwrstate\", \"apple,pmgr-pwrstate\";\n-\t\treg = <0x160 4>;\n-\t\t#power-domain-cells = <0>;\n-\t\t#reset-cells = <0>;\n-\t\tlabel = \"pms_fpwm3\";\n-\t\tpower-domains = <&ps_pms>;\n-\t};\n-\n-\tps_pms_fpwm4: power-controller@168 {\n-\t\tcompatible = \"apple,t8103-pmgr-pwrstate\", \"apple,pmgr-pwrstate\";\n-\t\treg = <0x168 4>;\n-\t\t#power-domain-cells = <0>;\n-\t\t#reset-cells = <0>;\n-\t\tlabel = \"pms_fpwm4\";\n-\t\tpower-domains = <&ps_pms>;\n-\t};\n-\n-\tps_soc_dpe: power-controller@170 {\n-\t\tcompatible = \"apple,t8103-pmgr-pwrstate\", \"apple,pmgr-pwrstate\";\n-\t\treg = <0x170 4>;\n-\t\t#power-domain-cells = <0>;\n-\t\t#reset-cells = <0>;\n-\t\tlabel = \"soc_dpe\";\n-\t\tapple,always-on; /* Core device */\n-\t};\n-\n-\tps_pmgr_soc_ocla: power-controller@178 {\n-\t\tcompatible = \"apple,t8103-pmgr-pwrstate\", \"apple,pmgr-pwrstate\";\n-\t\treg = <0x178 4>;\n-\t\t#power-domain-cells = <0>;\n-\t\t#reset-cells = <0>;\n-\t\tlabel = \"pmgr_soc_ocla\";\n-\t};\n-\n-\tps_ispsens0: power-controller@180 {\n-\t\tcompatible = \"apple,t8103-pmgr-pwrstate\", \"apple,pmgr-pwrstate\";\n-\t\treg = <0x180 4>;\n-\t\t#power-domain-cells = <0>;\n-\t\t#reset-cells = <0>;\n-\t\tlabel = \"ispsens0\";\n-\t};\n-\n-\tps_ispsens1: power-controller@188 {\n-\t\tcompatible = \"apple,t8103-pmgr-pwrstate\", \"apple,pmgr-pwrstate\";\n-\t\treg = <0x188 4>;\n-\t\t#power-domain-cells = <0>;\n-\t\t#reset-cells = <0>;\n-\t\tlabel = \"ispsens1\";\n-\t};\n-\n-\tps_ispsens2: power-controller@190 {\n-\t\tcompatible = \"apple,t8103-pmgr-pwrstate\", \"apple,pmgr-pwrstate\";\n-\t\treg = <0x190 4>;\n-\t\t#power-domain-cells = <0>;\n-\t\t#reset-cells = <0>;\n-\t\tlabel = \"ispsens2\";\n-\t};\n-\n-\tps_ispsens3: power-controller@198 {\n-\t\tcompatible = \"apple,t8103-pmgr-pwrstate\", \"apple,pmgr-pwrstate\";\n-\t\treg = <0x198 4>;\n-\t\t#power-domain-cells = <0>;\n-\t\t#reset-cells = <0>;\n-\t\tlabel = \"ispsens3\";\n-\t};\n-\n-\tps_pcie_ref: power-controller@1a0 {\n-\t\tcompatible = \"apple,t8103-pmgr-pwrstate\", \"apple,pmgr-pwrstate\";\n-\t\treg = <0x1a0 4>;\n-\t\t#power-domain-cells = <0>;\n-\t\t#reset-cells = <0>;\n-\t\tlabel = \"pcie_ref\";\n-\t};\n-\n-\tps_aft0: power-controller@1a8 {\n-\t\tcompatible = \"apple,t8103-pmgr-pwrstate\", \"apple,pmgr-pwrstate\";\n-\t\treg = <0x1a8 4>;\n-\t\t#power-domain-cells = <0>;\n-\t\t#reset-cells = <0>;\n-\t\tlabel = \"aft0\";\n-\t};\n-\n-\tps_devc0_ivdmc: power-controller@1b0 {\n-\t\tcompatible = \"apple,t8103-pmgr-pwrstate\", \"apple,pmgr-pwrstate\";\n-\t\treg = <0x1b0 4>;\n-\t\t#power-domain-cells = <0>;\n-\t\t#reset-cells = <0>;\n-\t\tlabel = \"devc0_ivdmc\";\n-\t};\n-\n-\tps_imx: power-controller@1b8 {\n-\t\tcompatible = \"apple,t8103-pmgr-pwrstate\", \"apple,pmgr-pwrstate\";\n-\t\treg = <0x1b8 4>;\n-\t\t#power-domain-cells = <0>;\n-\t\t#reset-cells = <0>;\n-\t\tlabel = \"imx\";\n-\t\tapple,always-on; /* Apple fabric, critical block */\n-\t};\n-\n-\tps_sio_busif: power-controller@1c0 {\n-\t\tcompatible = \"apple,t8103-pmgr-pwrstate\", \"apple,pmgr-pwrstate\";\n-\t\treg = <0x1c0 4>;\n-\t\t#power-domain-cells = <0>;\n-\t\t#reset-cells = <0>;\n-\t\tlabel = \"sio_busif\";\n-\t};\n-\n-\tps_sio: power-controller@1c8 {\n-\t\tcompatible = \"apple,t8103-pmgr-pwrstate\", \"apple,pmgr-pwrstate\";\n-\t\treg = <0x1c8 4>;\n-\t\t#power-domain-cells = <0>;\n-\t\t#reset-cells = <0>;\n-\t\tlabel = \"sio\";\n-\t\tpower-domains = <&ps_sio_busif>;\n-\t};\n-\n-\tps_sio_cpu: power-controller@1d0 {\n-\t\tcompatible = \"apple,t8103-pmgr-pwrstate\", \"apple,pmgr-pwrstate\";\n-\t\treg = <0x1d0 4>;\n-\t\t#power-domain-cells = <0>;\n-\t\t#reset-cells = <0>;\n-\t\tlabel = \"sio_cpu\";\n-\t\tpower-domains = <&ps_sio>;\n-\t};\n-\n-\tps_fpwm0: power-controller@1d8 {\n-\t\tcompatible = \"apple,t8103-pmgr-pwrstate\", \"apple,pmgr-pwrstate\";\n-\t\treg = <0x1d8 4>;\n-\t\t#power-domain-cells = <0>;\n-\t\t#reset-cells = <0>;\n-\t\tlabel = \"fpwm0\";\n-\t};\n-\n-\tps_fpwm1: power-controller@1e0 {\n-\t\tcompatible = \"apple,t8103-pmgr-pwrstate\", \"apple,pmgr-pwrstate\";\n-\t\treg = <0x1e0 4>;\n-\t\t#power-domain-cells = <0>;\n-\t\t#reset-cells = <0>;\n-\t\tlabel = \"fpwm1\";\n-\t};\n-\n-\tps_fpwm2: power-controller@1e8 {\n-\t\tcompatible = \"apple,t8103-pmgr-pwrstate\", \"apple,pmgr-pwrstate\";\n-\t\treg = <0x1e8 4>;\n-\t\t#power-domain-cells = <0>;\n-\t\t#reset-cells = <0>;\n-\t\tlabel = \"fpwm2\";\n-\t};\n-\n-\tps_i2c0: power-controller@1f0 {\n-\t\tcompatible = \"apple,t8103-pmgr-pwrstate\", \"apple,pmgr-pwrstate\";\n-\t\treg = <0x1f0 4>;\n-\t\t#power-domain-cells = <0>;\n-\t\t#reset-cells = <0>;\n-\t\tlabel = \"i2c0\";\n-\t\tpower-domains = <&ps_sio>;\n-\t};\n-\n-\tps_i2c1: power-controller@1f8 {\n-\t\tcompatible = \"apple,t8103-pmgr-pwrstate\", \"apple,pmgr-pwrstate\";\n-\t\treg = <0x1f8 4>;\n-\t\t#power-domain-cells = <0>;\n-\t\t#reset-cells = <0>;\n-\t\tlabel = \"i2c1\";\n-\t\tpower-domains = <&ps_sio>;\n-\t};\n-\n-\tps_i2c2: power-controller@200 {\n-\t\tcompatible = \"apple,t8103-pmgr-pwrstate\", \"apple,pmgr-pwrstate\";\n-\t\treg = <0x200 4>;\n-\t\t#power-domain-cells = <0>;\n-\t\t#reset-cells = <0>;\n-\t\tlabel = \"i2c2\";\n-\t\tpower-domains = <&ps_sio>;\n-\t};\n-\n-\tps_i2c3: power-controller@208 {\n-\t\tcompatible = \"apple,t8103-pmgr-pwrstate\", \"apple,pmgr-pwrstate\";\n-\t\treg = <0x208 4>;\n-\t\t#power-domain-cells = <0>;\n-\t\t#reset-cells = <0>;\n-\t\tlabel = \"i2c3\";\n-\t\tpower-domains = <&ps_sio>;\n-\t};\n-\n-\tps_i2c4: power-controller@210 {\n-\t\tcompatible = \"apple,t8103-pmgr-pwrstate\", \"apple,pmgr-pwrstate\";\n-\t\treg = <0x210 4>;\n-\t\t#power-domain-cells = <0>;\n-\t\t#reset-cells = <0>;\n-\t\tlabel = \"i2c4\";\n-\t\tpower-domains = <&ps_sio>;\n-\t};\n-\n-\tps_spi_p: power-controller@218 {\n-\t\tcompatible = \"apple,t8103-pmgr-pwrstate\", \"apple,pmgr-pwrstate\";\n-\t\treg = <0x218 4>;\n-\t\t#power-domain-cells = <0>;\n-\t\t#reset-cells = <0>;\n-\t\tlabel = \"spi_p\";\n-\t\tpower-domains = <&ps_sio>;\n-\t};\n-\n-\tps_uart_p: power-controller@220 {\n-\t\tcompatible = \"apple,t8103-pmgr-pwrstate\", \"apple,pmgr-pwrstate\";\n-\t\treg = <0x220 4>;\n-\t\t#power-domain-cells = <0>;\n-\t\t#reset-cells = <0>;\n-\t\tlabel = \"uart_p\";\n-\t\tpower-domains = <&ps_sio>;\n-\t};\n-\n-\tps_audio_p: power-controller@228 {\n-\t\tcompatible = \"apple,t8103-pmgr-pwrstate\", \"apple,pmgr-pwrstate\";\n-\t\treg = <0x228 4>;\n-\t\t#power-domain-cells = <0>;\n-\t\t#reset-cells = <0>;\n-\t\tlabel = \"audio_p\";\n-\t\tpower-domains = <&ps_sio>;\n-\t};\n-\n-\tps_sio_adma: power-controller@230 {\n-\t\tcompatible = \"apple,t8103-pmgr-pwrstate\", \"apple,pmgr-pwrstate\";\n-\t\treg = <0x230 4>;\n-\t\t#power-domain-cells = <0>;\n-\t\t#reset-cells = <0>;\n-\t\tlabel = \"sio_adma\";\n-\t\tpower-domains = <&ps_sio>, <&ps_pms>;\n-\t};\n-\n-\tps_aes: power-controller@238 {\n-\t\tcompatible = \"apple,t8103-pmgr-pwrstate\", \"apple,pmgr-pwrstate\";\n-\t\treg = <0x238 4>;\n-\t\t#power-domain-cells = <0>;\n-\t\t#reset-cells = <0>;\n-\t\tlabel = \"aes\";\n-\t\tpower-domains = <&ps_sio>;\n-\t};\n-\n-\tps_spi0: power-controller@240 {\n-\t\tcompatible = \"apple,t8103-pmgr-pwrstate\", \"apple,pmgr-pwrstate\";\n-\t\treg = <0x240 4>;\n-\t\t#power-domain-cells = <0>;\n-\t\t#reset-cells = <0>;\n-\t\tlabel = \"spi0\";\n-\t\tpower-domains = <&ps_sio>, <&ps_spi_p>;\n-\t};\n-\n-\tps_spi1: power-controller@248 {\n-\t\tcompatible = \"apple,t8103-pmgr-pwrstate\", \"apple,pmgr-pwrstate\";\n-\t\treg = <0x248 4>;\n-\t\t#power-domain-cells = <0>;\n-\t\t#reset-cells = <0>;\n-\t\tlabel = \"spi1\";\n-\t\tpower-domains = <&ps_sio>, <&ps_spi_p>;\n-\t};\n-\n-\tps_spi2: power-controller@250 {\n-\t\tcompatible = \"apple,t8103-pmgr-pwrstate\", \"apple,pmgr-pwrstate\";\n-\t\treg = <0x250 4>;\n-\t\t#power-domain-cells = <0>;\n-\t\t#reset-cells = <0>;\n-\t\tlabel = \"spi2\";\n-\t\tpower-domains = <&ps_sio>, <&ps_spi_p>;\n-\t};\n-\n-\tps_spi3: power-controller@258 {\n-\t\tcompatible = \"apple,t8103-pmgr-pwrstate\", \"apple,pmgr-pwrstate\";\n-\t\treg = <0x258 4>;\n-\t\t#power-domain-cells = <0>;\n-\t\t#reset-cells = <0>;\n-\t\tlabel = \"spi3\";\n-\t\tpower-domains = <&ps_sio>, <&ps_spi_p>;\n-\t};\n-\n-\tps_uart_n: power-controller@268 {\n-\t\tcompatible = \"apple,t8103-pmgr-pwrstate\", \"apple,pmgr-pwrstate\";\n-\t\treg = <0x268 4>;\n-\t\t#power-domain-cells = <0>;\n-\t\t#reset-cells = <0>;\n-\t\tlabel = \"uart_n\";\n-\t\tpower-domains = <&ps_uart_p>;\n-\t};\n-\n-\tps_uart0: power-controller@270 {\n-\t\tcompatible = \"apple,t8103-pmgr-pwrstate\", \"apple,pmgr-pwrstate\";\n-\t\treg = <0x270 4>;\n-\t\t#power-domain-cells = <0>;\n-\t\t#reset-cells = <0>;\n-\t\tlabel = \"uart0\";\n-\t\tpower-domains = <&ps_uart_p>;\n-\t};\n-\n-\tps_uart1: power-controller@278 {\n-\t\tcompatible = \"apple,t8103-pmgr-pwrstate\", \"apple,pmgr-pwrstate\";\n-\t\treg = <0x278 4>;\n-\t\t#power-domain-cells = <0>;\n-\t\t#reset-cells = <0>;\n-\t\tlabel = \"uart1\";\n-\t\tpower-domains = <&ps_uart_p>;\n-\t};\n-\n-\tps_uart2: power-controller@280 {\n-\t\tcompatible = \"apple,t8103-pmgr-pwrstate\", \"apple,pmgr-pwrstate\";\n-\t\treg = <0x280 4>;\n-\t\t#power-domain-cells = <0>;\n-\t\t#reset-cells = <0>;\n-\t\tlabel = \"uart2\";\n-\t\tpower-domains = <&ps_uart_p>;\n-\t};\n-\n-\tps_uart3: power-controller@288 {\n-\t\tcompatible = \"apple,t8103-pmgr-pwrstate\", \"apple,pmgr-pwrstate\";\n-\t\treg = <0x288 4>;\n-\t\t#power-domain-cells = <0>;\n-\t\t#reset-cells = <0>;\n-\t\tlabel = \"uart3\";\n-\t\tpower-domains = <&ps_uart_p>;\n-\t};\n-\n-\tps_uart4: power-controller@290 {\n-\t\tcompatible = \"apple,t8103-pmgr-pwrstate\", \"apple,pmgr-pwrstate\";\n-\t\treg = <0x290 4>;\n-\t\t#power-domain-cells = <0>;\n-\t\t#reset-cells = <0>;\n-\t\tlabel = \"uart4\";\n-\t\tpower-domains = <&ps_uart_p>;\n-\t};\n-\n-\tps_uart5: power-controller@298 {\n-\t\tcompatible = \"apple,t8103-pmgr-pwrstate\", \"apple,pmgr-pwrstate\";\n-\t\treg = <0x298 4>;\n-\t\t#power-domain-cells = <0>;\n-\t\t#reset-cells = <0>;\n-\t\tlabel = \"uart5\";\n-\t\tpower-domains = <&ps_uart_p>;\n-\t};\n-\n-\tps_uart6: power-controller@2a0 {\n-\t\tcompatible = \"apple,t8103-pmgr-pwrstate\", \"apple,pmgr-pwrstate\";\n-\t\treg = <0x2a0 4>;\n-\t\t#power-domain-cells = <0>;\n-\t\t#reset-cells = <0>;\n-\t\tlabel = \"uart6\";\n-\t\tpower-domains = <&ps_uart_p>;\n-\t};\n-\n-\tps_uart7: power-controller@2a8 {\n-\t\tcompatible = \"apple,t8103-pmgr-pwrstate\", \"apple,pmgr-pwrstate\";\n-\t\treg = <0x2a8 4>;\n-\t\t#power-domain-cells = <0>;\n-\t\t#reset-cells = <0>;\n-\t\tlabel = \"uart7\";\n-\t\tpower-domains = <&ps_uart_p>;\n-\t};\n-\n-\tps_uart8: power-controller@2b0 {\n-\t\tcompatible = \"apple,t8103-pmgr-pwrstate\", \"apple,pmgr-pwrstate\";\n-\t\treg = <0x2b0 4>;\n-\t\t#power-domain-cells = <0>;\n-\t\t#reset-cells = <0>;\n-\t\tlabel = \"uart8\";\n-\t\tpower-domains = <&ps_uart_p>;\n-\t};\n-\n-\tps_mca0: power-controller@2b8 {\n-\t\tcompatible = \"apple,t8103-pmgr-pwrstate\", \"apple,pmgr-pwrstate\";\n-\t\treg = <0x2b8 4>;\n-\t\t#power-domain-cells = <0>;\n-\t\t#reset-cells = <0>;\n-\t\tlabel = \"mca0\";\n-\t\tpower-domains = <&ps_audio_p>, <&ps_sio_adma>, <&ps_mca1>, <&ps_mca2>, <&ps_mca3>, <&ps_mca4>, <&ps_mca5>;\n-\t};\n-\n-\tps_mca1: power-controller@2c0 {\n-\t\tcompatible = \"apple,t8103-pmgr-pwrstate\", \"apple,pmgr-pwrstate\";\n-\t\treg = <0x2c0 4>;\n-\t\t#power-domain-cells = <0>;\n-\t\t#reset-cells = <0>;\n-\t\tlabel = \"mca1\";\n-\t\tpower-domains = <&ps_audio_p>, <&ps_sio_adma>;\n-\t};\n-\n-\tps_mca2: power-controller@2c8 {\n-\t\tcompatible = \"apple,t8103-pmgr-pwrstate\", \"apple,pmgr-pwrstate\";\n-\t\treg = <0x2c8 4>;\n-\t\t#power-domain-cells = <0>;\n-\t\t#reset-cells = <0>;\n-\t\tlabel = \"mca2\";\n-\t\tpower-domains = <&ps_audio_p>, <&ps_sio_adma>;\n-\t};\n-\n-\tps_mca3: power-controller@2d0 {\n-\t\tcompatible = \"apple,t8103-pmgr-pwrstate\", \"apple,pmgr-pwrstate\";\n-\t\treg = <0x2d0 4>;\n-\t\t#power-domain-cells = <0>;\n-\t\t#reset-cells = <0>;\n-\t\tlabel = \"mca3\";\n-\t\tpower-domains = <&ps_audio_p>, <&ps_sio_adma>;\n-\t};\n-\n-\tps_mca4: power-controller@2d8 {\n-\t\tcompatible = \"apple,t8103-pmgr-pwrstate\", \"apple,pmgr-pwrstate\";\n-\t\treg = <0x2d8 4>;\n-\t\t#power-domain-cells = <0>;\n-\t\t#reset-cells = <0>;\n-\t\tlabel = \"mca4\";\n-\t\tpower-domains = <&ps_audio_p>, <&ps_sio_adma>;\n-\t};\n-\n-\tps_mca5: power-controller@2e0 {\n-\t\tcompatible = \"apple,t8103-pmgr-pwrstate\", \"apple,pmgr-pwrstate\";\n-\t\treg = <0x2e0 4>;\n-\t\t#power-domain-cells = <0>;\n-\t\t#reset-cells = <0>;\n-\t\tlabel = \"mca5\";\n-\t\tpower-domains = <&ps_audio_p>, <&ps_sio_adma>;\n-\t};\n-\n-\tps_dpa0: power-controller@2e8 {\n-\t\tcompatible = \"apple,t8103-pmgr-pwrstate\", \"apple,pmgr-pwrstate\";\n-\t\treg = <0x2e8 4>;\n-\t\t#power-domain-cells = <0>;\n-\t\t#reset-cells = <0>;\n-\t\tlabel = \"dpa0\";\n-\t\tpower-domains = <&ps_audio_p>;\n-\t};\n-\n-\tps_dpa1: power-controller@2f0 {\n-\t\tcompatible = \"apple,t8103-pmgr-pwrstate\", \"apple,pmgr-pwrstate\";\n-\t\treg = <0x2f0 4>;\n-\t\t#power-domain-cells = <0>;\n-\t\t#reset-cells = <0>;\n-\t\tlabel = \"dpa1\";\n-\t\tpower-domains = <&ps_audio_p>;\n-\t};\n-\n-\tps_mcc: power-controller@2f8 {\n-\t\tcompatible = \"apple,t8103-pmgr-pwrstate\", \"apple,pmgr-pwrstate\";\n-\t\treg = <0x2f8 4>;\n-\t\t#power-domain-cells = <0>;\n-\t\t#reset-cells = <0>;\n-\t\tlabel = \"mcc\";\n-\t\tapple,always-on; /* Memory controller */\n-\t};\n-\n-\tps_spi4: power-controller@260 {\n-\t\tcompatible = \"apple,t8103-pmgr-pwrstate\", \"apple,pmgr-pwrstate\";\n-\t\treg = <0x260 4>;\n-\t\t#power-domain-cells = <0>;\n-\t\t#reset-cells = <0>;\n-\t\tlabel = \"spi4\";\n-\t\tpower-domains = <&ps_sio>, <&ps_spi_p>;\n-\t};\n-\n-\tps_dcs0: power-controller@300 {\n-\t\tcompatible = \"apple,t8103-pmgr-pwrstate\", \"apple,pmgr-pwrstate\";\n-\t\treg = <0x300 4>;\n-\t\t#power-domain-cells = <0>;\n-\t\t#reset-cells = <0>;\n-\t\tlabel = \"dcs0\";\n-\t\tapple,always-on; /* LPDDR4 interface */\n-\t};\n-\n-\tps_dcs1: power-controller@310 {\n-\t\tcompatible = \"apple,t8103-pmgr-pwrstate\", \"apple,pmgr-pwrstate\";\n-\t\treg = <0x310 4>;\n-\t\t#power-domain-cells = <0>;\n-\t\t#reset-cells = <0>;\n-\t\tlabel = \"dcs1\";\n-\t\tapple,always-on; /* LPDDR4 interface */\n-\t};\n-\n-\tps_dcs2: power-controller@308 {\n-\t\tcompatible = \"apple,t8103-pmgr-pwrstate\", \"apple,pmgr-pwrstate\";\n-\t\treg = <0x308 4>;\n-\t\t#power-domain-cells = <0>;\n-\t\t#reset-cells = <0>;\n-\t\tlabel = \"dcs2\";\n-\t\tapple,always-on; /* LPDDR4 interface */\n-\t};\n-\n-\tps_dcs3: power-controller@318 {\n-\t\tcompatible = \"apple,t8103-pmgr-pwrstate\", \"apple,pmgr-pwrstate\";\n-\t\treg = <0x318 4>;\n-\t\t#power-domain-cells = <0>;\n-\t\t#reset-cells = <0>;\n-\t\tlabel = \"dcs3\";\n-\t\tapple,always-on; /* LPDDR4 interface */\n-\t};\n-\n-\tps_smx: power-controller@340 {\n-\t\tcompatible = \"apple,t8103-pmgr-pwrstate\", \"apple,pmgr-pwrstate\";\n-\t\treg = <0x340 4>;\n-\t\t#power-domain-cells = <0>;\n-\t\t#reset-cells = <0>;\n-\t\tlabel = \"smx\";\n-\t\tapple,always-on; /* Apple fabric, critical block */\n-\t};\n-\n-\tps_apcie: power-controller@348 {\n-\t\tcompatible = \"apple,t8103-pmgr-pwrstate\", \"apple,pmgr-pwrstate\";\n-\t\treg = <0x348 4>;\n-\t\t#power-domain-cells = <0>;\n-\t\t#reset-cells = <0>;\n-\t\tlabel = \"apcie\";\n-\t\tpower-domains = <&ps_imx>, <&ps_pcie_ref>;\n-\t};\n-\n-\tps_rmx: power-controller@350 {\n-\t\tcompatible = \"apple,t8103-pmgr-pwrstate\", \"apple,pmgr-pwrstate\";\n-\t\treg = <0x350 4>;\n-\t\t#power-domain-cells = <0>;\n-\t\t#reset-cells = <0>;\n-\t\tlabel = \"rmx\";\n-\t\t/* Apple Fabric, display/image stuff: this can power down */\n-\t};\n-\n-\tps_mmx: power-controller@358 {\n-\t\tcompatible = \"apple,t8103-pmgr-pwrstate\", \"apple,pmgr-pwrstate\";\n-\t\treg = <0x358 4>;\n-\t\t#power-domain-cells = <0>;\n-\t\t#reset-cells = <0>;\n-\t\tlabel = \"mmx\";\n-\t\t/* Apple Fabric, media stuff: this can power down */\n-\t};\n-\n-\tps_disp0_fe: power-controller@360 {\n-\t\tcompatible = \"apple,t8103-pmgr-pwrstate\", \"apple,pmgr-pwrstate\";\n-\t\treg = <0x360 4>;\n-\t\t#power-domain-cells = <0>;\n-\t\t#reset-cells = <0>;\n-\t\tlabel = \"disp0_fe\";\n-\t\tpower-domains = <&ps_rmx>;\n-\t\tapple,always-on; /* TODO: figure out if we can enable PM here */\n-\t};\n-\n-\tps_dispext_fe: power-controller@368 {\n-\t\tcompatible = \"apple,t8103-pmgr-pwrstate\", \"apple,pmgr-pwrstate\";\n-\t\treg = <0x368 4>;\n-\t\t#power-domain-cells = <0>;\n-\t\t#reset-cells = <0>;\n-\t\tlabel = \"dispext_fe\";\n-\t\tpower-domains = <&ps_rmx>;\n-\t};\n-\n-\tps_dispext_cpu0: power-controller@378 {\n-\t\tcompatible = \"apple,t8103-pmgr-pwrstate\", \"apple,pmgr-pwrstate\";\n-\t\treg = <0x378 4>;\n-\t\t#power-domain-cells = <0>;\n-\t\t#reset-cells = <0>;\n-\t\tlabel = \"dispext_cpu0\";\n-\t\tpower-domains = <&ps_dispext_fe>;\n-\t\tapple,min-state = <4>;\n-\t};\n-\n-\tps_jpg: power-controller@3c0 {\n-\t\tcompatible = \"apple,t8103-pmgr-pwrstate\", \"apple,pmgr-pwrstate\";\n-\t\treg = <0x3c0 4>;\n-\t\t#power-domain-cells = <0>;\n-\t\t#reset-cells = <0>;\n-\t\tlabel = \"jpg\";\n-\t\tpower-domains = <&ps_mmx>;\n-\t};\n-\n-\tps_msr: power-controller@3c8 {\n-\t\tcompatible = \"apple,t8103-pmgr-pwrstate\", \"apple,pmgr-pwrstate\";\n-\t\treg = <0x3c8 4>;\n-\t\t#power-domain-cells = <0>;\n-\t\t#reset-cells = <0>;\n-\t\tlabel = \"msr\";\n-\t\tpower-domains = <&ps_mmx>;\n-\t};\n-\n-\tps_msr_ase_core: power-controller@3d0 {\n-\t\tcompatible = \"apple,t8103-pmgr-pwrstate\", \"apple,pmgr-pwrstate\";\n-\t\treg = <0x3d0 4>;\n-\t\t#power-domain-cells = <0>;\n-\t\t#reset-cells = <0>;\n-\t\tlabel = \"msr_ase_core\";\n-\t};\n-\n-\tps_pmp: power-controller@3d8 {\n-\t\tcompatible = \"apple,t8103-pmgr-pwrstate\", \"apple,pmgr-pwrstate\";\n-\t\treg = <0x3d8 4>;\n-\t\t#power-domain-cells = <0>;\n-\t\t#reset-cells = <0>;\n-\t\tlabel = \"pmp\";\n-\t};\n-\n-\tps_pms_sram: power-controller@3e0 {\n-\t\tcompatible = \"apple,t8103-pmgr-pwrstate\", \"apple,pmgr-pwrstate\";\n-\t\treg = <0x3e0 4>;\n-\t\t#power-domain-cells = <0>;\n-\t\t#reset-cells = <0>;\n-\t\tlabel = \"pms_sram\";\n-\t};\n-\n-\tps_apcie_gp: power-controller@3e8 {\n-\t\tcompatible = \"apple,t8103-pmgr-pwrstate\", \"apple,pmgr-pwrstate\";\n-\t\treg = <0x3e8 4>;\n-\t\t#power-domain-cells = <0>;\n-\t\t#reset-cells = <0>;\n-\t\tlabel = \"apcie_gp\";\n-\t\tpower-domains = <&ps_apcie>;\n-\t};\n-\n-\tps_ans2: power-controller@3f0 {\n-\t\tcompatible = \"apple,t8103-pmgr-pwrstate\", \"apple,pmgr-pwrstate\";\n-\t\treg = <0x3f0 4>;\n-\t\t#power-domain-cells = <0>;\n-\t\t#reset-cells = <0>;\n-\t\tlabel = \"ans2\";\n-\t\t/*\n-\t\t * The ADT makes ps_apcie_st depend on ps_ans2 instead, but this\n-\t\t * doesn't make much sense since ANS2 uses APCIE_ST.\n-\t\t */\n-\t\tpower-domains = <&ps_apcie_st>;\n-\t};\n-\n-\tps_gfx: power-controller@3f8 {\n-\t\tcompatible = \"apple,t8103-pmgr-pwrstate\", \"apple,pmgr-pwrstate\";\n-\t\treg = <0x3f8 4>;\n-\t\t#power-domain-cells = <0>;\n-\t\t#reset-cells = <0>;\n-\t\tlabel = \"gfx\";\n-\t};\n-\n-\tps_dcs4: power-controller@320 {\n-\t\tcompatible = \"apple,t8103-pmgr-pwrstate\", \"apple,pmgr-pwrstate\";\n-\t\treg = <0x320 4>;\n-\t\t#power-domain-cells = <0>;\n-\t\t#reset-cells = <0>;\n-\t\tlabel = \"dcs4\";\n-\t\tapple,always-on; /* LPDDR4 interface */\n-\t};\n-\n-\tps_dcs5: power-controller@330 {\n-\t\tcompatible = \"apple,t8103-pmgr-pwrstate\", \"apple,pmgr-pwrstate\";\n-\t\treg = <0x330 4>;\n-\t\t#power-domain-cells = <0>;\n-\t\t#reset-cells = <0>;\n-\t\tlabel = \"dcs5\";\n-\t\tapple,always-on; /* LPDDR4 interface */\n-\t};\n-\n-\tps_dcs6: power-controller@328 {\n-\t\tcompatible = \"apple,t8103-pmgr-pwrstate\", \"apple,pmgr-pwrstate\";\n-\t\treg = <0x328 4>;\n-\t\t#power-domain-cells = <0>;\n-\t\t#reset-cells = <0>;\n-\t\tlabel = \"dcs6\";\n-\t\tapple,always-on; /* LPDDR4 interface */\n-\t};\n-\n-\tps_dcs7: power-controller@338 {\n-\t\tcompatible = \"apple,t8103-pmgr-pwrstate\", \"apple,pmgr-pwrstate\";\n-\t\treg = <0x338 4>;\n-\t\t#power-domain-cells = <0>;\n-\t\t#reset-cells = <0>;\n-\t\tlabel = \"dcs7\";\n-\t\tapple,always-on; /* LPDDR4 interface */\n-\t};\n-\n-\tps_dispdfr_fe: power-controller@3a8 {\n-\t\tcompatible = \"apple,t8103-pmgr-pwrstate\", \"apple,pmgr-pwrstate\";\n-\t\treg = <0x3a8 4>;\n-\t\t#power-domain-cells = <0>;\n-\t\t#reset-cells = <0>;\n-\t\tlabel = \"dispdfr_fe\";\n-\t\tpower-domains = <&ps_rmx>;\n-\t};\n-\n-\tps_dispdfr_be: power-controller@3b0 {\n-\t\tcompatible = \"apple,t8103-pmgr-pwrstate\", \"apple,pmgr-pwrstate\";\n-\t\treg = <0x3b0 4>;\n-\t\t#power-domain-cells = <0>;\n-\t\t#reset-cells = <0>;\n-\t\tlabel = \"dispdfr_be\";\n-\t\tpower-domains = <&ps_dispdfr_fe>;\n-\t};\n-\n-\tps_mipi_dsi: power-controller@3b8 {\n-\t\tcompatible = \"apple,t8103-pmgr-pwrstate\", \"apple,pmgr-pwrstate\";\n-\t\treg = <0x3b8 4>;\n-\t\t#power-domain-cells = <0>;\n-\t\t#reset-cells = <0>;\n-\t\tlabel = \"mipi_dsi\";\n-\t\tpower-domains = <&ps_dispdfr_be>;\n-\t};\n-\n-\tps_isp_sys: power-controller@400 {\n-\t\tcompatible = \"apple,t8103-pmgr-pwrstate\", \"apple,pmgr-pwrstate\";\n-\t\treg = <0x400 4>;\n-\t\t#power-domain-cells = <0>;\n-\t\t#reset-cells = <0>;\n-\t\tlabel = \"isp_sys\";\n-\t\tpower-domains = <&ps_rmx>;\n-\t};\n-\n-\tps_venc_sys: power-controller@408 {\n-\t\tcompatible = \"apple,t8103-pmgr-pwrstate\", \"apple,pmgr-pwrstate\";\n-\t\treg = <0x408 4>;\n-\t\t#power-domain-cells = <0>;\n-\t\t#reset-cells = <0>;\n-\t\tlabel = \"venc_sys\";\n-\t\tpower-domains = <&ps_mmx>;\n-\t};\n-\n-\tps_avd_sys: power-controller@410 {\n-\t\tcompatible = \"apple,t8103-pmgr-pwrstate\", \"apple,pmgr-pwrstate\";\n-\t\treg = <0x410 4>;\n-\t\t#power-domain-cells = <0>;\n-\t\t#reset-cells = <0>;\n-\t\tlabel = \"avd_sys\";\n-\t\tpower-domains = <&ps_mmx>;\n-\t};\n-\n-\tps_apcie_st: power-controller@418 {\n-\t\tcompatible = \"apple,t8103-pmgr-pwrstate\", \"apple,pmgr-pwrstate\";\n-\t\treg = <0x418 4>;\n-\t\t#power-domain-cells = <0>;\n-\t\t#reset-cells = <0>;\n-\t\tlabel = \"apcie_st\";\n-\t\tpower-domains = <&ps_apcie>;\n-\t};\n-\n-\tps_ane_sys: power-controller@470 {\n-\t\tcompatible = \"apple,t8103-pmgr-pwrstate\", \"apple,pmgr-pwrstate\";\n-\t\treg = <0x470 4>;\n-\t\t#power-domain-cells = <0>;\n-\t\t#reset-cells = <0>;\n-\t\tlabel = \"ane_sys\";\n-\t};\n-\n-\tps_atc0_common: power-controller@420 {\n-\t\tcompatible = \"apple,t8103-pmgr-pwrstate\", \"apple,pmgr-pwrstate\";\n-\t\treg = <0x420 4>;\n-\t\t#power-domain-cells = <0>;\n-\t\t#reset-cells = <0>;\n-\t\tlabel = \"atc0_common\";\n-\t};\n-\n-\tps_atc0_pcie: power-controller@428 {\n-\t\tcompatible = \"apple,t8103-pmgr-pwrstate\", \"apple,pmgr-pwrstate\";\n-\t\treg = <0x428 4>;\n-\t\t#power-domain-cells = <0>;\n-\t\t#reset-cells = <0>;\n-\t\tlabel = \"atc0_pcie\";\n-\t\tpower-domains = <&ps_atc0_common>;\n-\t};\n-\n-\tps_atc0_cio: power-controller@430 {\n-\t\tcompatible = \"apple,t8103-pmgr-pwrstate\", \"apple,pmgr-pwrstate\";\n-\t\treg = <0x430 4>;\n-\t\t#power-domain-cells = <0>;\n-\t\t#reset-cells = <0>;\n-\t\tlabel = \"atc0_cio\";\n-\t\tpower-domains = <&ps_atc0_common>;\n-\t};\n-\n-\tps_atc0_cio_pcie: power-controller@438 {\n-\t\tcompatible = \"apple,t8103-pmgr-pwrstate\", \"apple,pmgr-pwrstate\";\n-\t\treg = <0x438 4>;\n-\t\t#power-domain-cells = <0>;\n-\t\t#reset-cells = <0>;\n-\t\tlabel = \"atc0_cio_pcie\";\n-\t\tpower-domains = <&ps_atc0_cio>;\n-\t};\n-\n-\tps_atc0_cio_usb: power-controller@440 {\n-\t\tcompatible = \"apple,t8103-pmgr-pwrstate\", \"apple,pmgr-pwrstate\";\n-\t\treg = <0x440 4>;\n-\t\t#power-domain-cells = <0>;\n-\t\t#reset-cells = <0>;\n-\t\tlabel = \"atc0_cio_usb\";\n-\t\tpower-domains = <&ps_atc0_cio>;\n-\t};\n-\n-\tps_atc1_common: power-controller@448 {\n-\t\tcompatible = \"apple,t8103-pmgr-pwrstate\", \"apple,pmgr-pwrstate\";\n-\t\treg = <0x448 4>;\n-\t\t#power-domain-cells = <0>;\n-\t\t#reset-cells = <0>;\n-\t\tlabel = \"atc1_common\";\n-\t};\n-\n-\tps_atc1_pcie: power-controller@450 {\n-\t\tcompatible = \"apple,t8103-pmgr-pwrstate\", \"apple,pmgr-pwrstate\";\n-\t\treg = <0x450 4>;\n-\t\t#power-domain-cells = <0>;\n-\t\t#reset-cells = <0>;\n-\t\tlabel = \"atc1_pcie\";\n-\t\tpower-domains = <&ps_atc1_common>;\n-\t};\n-\n-\tps_atc1_cio: power-controller@458 {\n-\t\tcompatible = \"apple,t8103-pmgr-pwrstate\", \"apple,pmgr-pwrstate\";\n-\t\treg = <0x458 4>;\n-\t\t#power-domain-cells = <0>;\n-\t\t#reset-cells = <0>;\n-\t\tlabel = \"atc1_cio\";\n-\t\tpower-domains = <&ps_atc1_common>;\n-\t};\n-\n-\tps_atc1_cio_pcie: power-controller@460 {\n-\t\tcompatible = \"apple,t8103-pmgr-pwrstate\", \"apple,pmgr-pwrstate\";\n-\t\treg = <0x460 4>;\n-\t\t#power-domain-cells = <0>;\n-\t\t#reset-cells = <0>;\n-\t\tlabel = \"atc1_cio_pcie\";\n-\t\tpower-domains = <&ps_atc1_cio>;\n-\t};\n-\n-\tps_atc1_cio_usb: power-controller@468 {\n-\t\tcompatible = \"apple,t8103-pmgr-pwrstate\", \"apple,pmgr-pwrstate\";\n-\t\treg = <0x468 4>;\n-\t\t#power-domain-cells = <0>;\n-\t\t#reset-cells = <0>;\n-\t\tlabel = \"atc1_cio_usb\";\n-\t\tpower-domains = <&ps_atc1_cio>;\n-\t};\n-\n-\tps_sep: power-controller@c00 {\n-\t\tcompatible = \"apple,t8103-pmgr-pwrstate\", \"apple,pmgr-pwrstate\";\n-\t\treg = <0xc00 4>;\n-\t\t#power-domain-cells = <0>;\n-\t\t#reset-cells = <0>;\n-\t\tlabel = \"sep\";\n-\t\tapple,always-on; /* Locked on */\n-\t};\n-\n-\tps_venc_dma: power-controller@8000 {\n-\t\tcompatible = \"apple,t8103-pmgr-pwrstate\", \"apple,pmgr-pwrstate\";\n-\t\treg = <0x8000 4>;\n-\t\t#power-domain-cells = <0>;\n-\t\t#reset-cells = <0>;\n-\t\tlabel = \"venc_dma\";\n-\t\tpower-domains = <&ps_venc_sys>;\n-\t};\n-\n-\tps_venc_pipe4: power-controller@8008 {\n-\t\tcompatible = \"apple,t8103-pmgr-pwrstate\", \"apple,pmgr-pwrstate\";\n-\t\treg = <0x8008 4>;\n-\t\t#power-domain-cells = <0>;\n-\t\t#reset-cells = <0>;\n-\t\tlabel = \"venc_pipe4\";\n-\t\tpower-domains = <&ps_venc_dma>;\n-\t};\n-\n-\tps_venc_pipe5: power-controller@8010 {\n-\t\tcompatible = \"apple,t8103-pmgr-pwrstate\", \"apple,pmgr-pwrstate\";\n-\t\treg = <0x8010 4>;\n-\t\t#power-domain-cells = <0>;\n-\t\t#reset-cells = <0>;\n-\t\tlabel = \"venc_pipe5\";\n-\t\tpower-domains = <&ps_venc_dma>;\n-\t};\n-\n-\tps_venc_me0: power-controller@8018 {\n-\t\tcompatible = \"apple,t8103-pmgr-pwrstate\", \"apple,pmgr-pwrstate\";\n-\t\treg = <0x8018 4>;\n-\t\t#power-domain-cells = <0>;\n-\t\t#reset-cells = <0>;\n-\t\tlabel = \"venc_me0\";\n-\t\tpower-domains = <&ps_venc_pipe4>, <&ps_venc_pipe5>;\n-\t};\n-\n-\tps_venc_me1: power-controller@8020 {\n-\t\tcompatible = \"apple,t8103-pmgr-pwrstate\", \"apple,pmgr-pwrstate\";\n-\t\treg = <0x8020 4>;\n-\t\t#power-domain-cells = <0>;\n-\t\t#reset-cells = <0>;\n-\t\tlabel = \"venc_me1\";\n-\t\tpower-domains = <&ps_venc_pipe4>, <&ps_venc_pipe5>;\n-\t};\n-\n-\tps_ane_sys_cpu: power-controller@c000 {\n-\t\tcompatible = \"apple,t8103-pmgr-pwrstate\", \"apple,pmgr-pwrstate\";\n-\t\treg = <0xc000 4>;\n-\t\t#power-domain-cells = <0>;\n-\t\t#reset-cells = <0>;\n-\t\tlabel = \"ane_sys_cpu\";\n-\t\tpower-domains = <&ps_ane_sys>;\n-\t};\n-\n-\tps_disp0_cpu0: power-controller@10018 {\n-\t\tcompatible = \"apple,t8103-pmgr-pwrstate\", \"apple,pmgr-pwrstate\";\n-\t\treg = <0x10018 4>;\n-\t\t#power-domain-cells = <0>;\n-\t\t#reset-cells = <0>;\n-\t\tlabel = \"disp0_cpu0\";\n-\t\tpower-domains = <&ps_disp0_fe>;\n-\t\tapple,always-on; /* TODO: figure out if we can enable PM here */\n-\t\tapple,min-state = <4>;\n-\t};\n-};\n-\n-&pmgr_mini {\n-\tps_debug: power-controller@58 {\n-\t\tcompatible = \"apple,t8103-pmgr-pwrstate\", \"apple,pmgr-pwrstate\";\n-\t\treg = <0x58 4>;\n-\t\t#power-domain-cells = <0>;\n-\t\t#reset-cells = <0>;\n-\t\tlabel = \"debug\";\n-\t\tapple,always-on; /* Core AON device */\n-\t};\n-\n-\tps_nub_spmi0: power-controller@60 {\n-\t\tcompatible = \"apple,t8103-pmgr-pwrstate\", \"apple,pmgr-pwrstate\";\n-\t\treg = <0x60 4>;\n-\t\t#power-domain-cells = <0>;\n-\t\t#reset-cells = <0>;\n-\t\tlabel = \"nub_spmi0\";\n-\t\tapple,always-on; /* Core AON device */\n-\t};\n-\n-\tps_nub_aon: power-controller@70 {\n-\t\tcompatible = \"apple,t8103-pmgr-pwrstate\", \"apple,pmgr-pwrstate\";\n-\t\treg = <0x70 4>;\n-\t\t#power-domain-cells = <0>;\n-\t\t#reset-cells = <0>;\n-\t\tlabel = \"nub_aon\";\n-\t\tapple,always-on; /* Core AON device */\n-\t};\n-\n-\tps_nub_gpio: power-controller@80 {\n-\t\tcompatible = \"apple,t8103-pmgr-pwrstate\", \"apple,pmgr-pwrstate\";\n-\t\treg = <0x80 4>;\n-\t\t#power-domain-cells = <0>;\n-\t\t#reset-cells = <0>;\n-\t\tlabel = \"nub_gpio\";\n-\t\tapple,always-on; /* Core AON device */\n-\t};\n-\n-\tps_nub_fabric: power-controller@a8 {\n-\t\tcompatible = \"apple,t8103-pmgr-pwrstate\", \"apple,pmgr-pwrstate\";\n-\t\treg = <0xa8 4>;\n-\t\t#power-domain-cells = <0>;\n-\t\t#reset-cells = <0>;\n-\t\tlabel = \"nub_fabric\";\n-\t\tapple,always-on; /* Core AON device */\n-\t};\n-\n-\tps_nub_sram: power-controller@b0 {\n-\t\tcompatible = \"apple,t8103-pmgr-pwrstate\", \"apple,pmgr-pwrstate\";\n-\t\treg = <0xb0 4>;\n-\t\t#power-domain-cells = <0>;\n-\t\t#reset-cells = <0>;\n-\t\tlabel = \"nub_sram\";\n-\t\tapple,always-on; /* Core AON device */\n-\t};\n-\n-\tps_debug_usb: power-controller@b8 {\n-\t\tcompatible = \"apple,t8103-pmgr-pwrstate\", \"apple,pmgr-pwrstate\";\n-\t\treg = <0xb8 4>;\n-\t\t#power-domain-cells = <0>;\n-\t\t#reset-cells = <0>;\n-\t\tlabel = \"debug_usb\";\n-\t\tapple,always-on; /* Core AON device */\n-\t\tpower-domains = <&ps_debug>;\n-\t};\n-\n-\tps_debug_auth: power-controller@c0 {\n-\t\tcompatible = \"apple,t8103-pmgr-pwrstate\", \"apple,pmgr-pwrstate\";\n-\t\treg = <0xc0 4>;\n-\t\t#power-domain-cells = <0>;\n-\t\t#reset-cells = <0>;\n-\t\tlabel = \"debug_auth\";\n-\t\tapple,always-on; /* Core AON device */\n-\t\tpower-domains = <&ps_debug>;\n-\t};\n-\n-\tps_nub_spmi1: power-controller@68 {\n-\t\tcompatible = \"apple,t8103-pmgr-pwrstate\", \"apple,pmgr-pwrstate\";\n-\t\treg = <0x68 4>;\n-\t\t#power-domain-cells = <0>;\n-\t\t#reset-cells = <0>;\n-\t\tlabel = \"nub_spmi1\";\n-\t\tapple,always-on; /* Core AON device */\n-\t};\n-\n-\tps_msg: power-controller@78 {\n-\t\tcompatible = \"apple,t8103-pmgr-pwrstate\", \"apple,pmgr-pwrstate\";\n-\t\treg = <0x78 4>;\n-\t\t#power-domain-cells = <0>;\n-\t\t#reset-cells = <0>;\n-\t\tlabel = \"msg\";\n-\t};\n-\n-\tps_atc0_usb_aon: power-controller@88 {\n-\t\tcompatible = \"apple,t8103-pmgr-pwrstate\", \"apple,pmgr-pwrstate\";\n-\t\treg = <0x88 4>;\n-\t\t#power-domain-cells = <0>;\n-\t\t#reset-cells = <0>;\n-\t\tlabel = \"atc0_usb_aon\";\n-\t};\n-\n-\tps_atc1_usb_aon: power-controller@90 {\n-\t\tcompatible = \"apple,t8103-pmgr-pwrstate\", \"apple,pmgr-pwrstate\";\n-\t\treg = <0x90 4>;\n-\t\t#power-domain-cells = <0>;\n-\t\t#reset-cells = <0>;\n-\t\tlabel = \"atc1_usb_aon\";\n-\t};\n-\n-\tps_atc0_usb: power-controller@98 {\n-\t\tcompatible = \"apple,t8103-pmgr-pwrstate\", \"apple,pmgr-pwrstate\";\n-\t\treg = <0x98 4>;\n-\t\t#power-domain-cells = <0>;\n-\t\t#reset-cells = <0>;\n-\t\tlabel = \"atc0_usb\";\n-\t\tpower-domains = <&ps_atc0_usb_aon>, <&ps_atc0_common>;\n-\t};\n-\n-\tps_atc1_usb: power-controller@a0 {\n-\t\tcompatible = \"apple,t8103-pmgr-pwrstate\", \"apple,pmgr-pwrstate\";\n-\t\treg = <0xa0 4>;\n-\t\t#power-domain-cells = <0>;\n-\t\t#reset-cells = <0>;\n-\t\tlabel = \"atc1_usb\";\n-\t\tpower-domains = <&ps_atc1_usb_aon>, <&ps_atc1_common>;\n-\t};\n-};\ndiff --git a/arch/arm/dts/t8103-u-boot.dtsi b/arch/arm/dts/t8103-u-boot.dtsi\ndeleted file mode 100644\nindex e9e593a00cf..00000000000\n--- a/arch/arm/dts/t8103-u-boot.dtsi\n+++ /dev/null\n@@ -1,25 +0,0 @@\n-// SPDX-License-Identifier: GPL-2.0+ OR MIT\n-\n-&serial0 {\n-\tbootph-all;\n-};\n-\n-&pmgr {\n-\tbootph-all;\n-};\n-\n-&ps_sio_busif {\n-\tbootph-all;\n-};\n-\n-&ps_sio {\n-\tbootph-all;\n-};\n-\n-&ps_uart_p {\n-\tbootph-all;\n-};\n-\n-&ps_uart0 {\n-\tbootph-all;\n-};\ndiff --git a/arch/arm/dts/t8103.dtsi b/arch/arm/dts/t8103.dtsi\ndeleted file mode 100644\nindex ed7840f94b6..00000000000\n--- a/arch/arm/dts/t8103.dtsi\n+++ /dev/null\n@@ -1,696 +0,0 @@\n-// SPDX-License-Identifier: GPL-2.0+ OR MIT\n-/*\n- * Apple T8103 \"M1\" SoC\n- *\n- * Other names: H13G, \"Tonga\"\n- *\n- * Copyright The Asahi Linux Contributors\n- */\n-\n-#include <dt-bindings/gpio/gpio.h>\n-#include <dt-bindings/interrupt-controller/apple-aic.h>\n-#include <dt-bindings/interrupt-controller/irq.h>\n-#include <dt-bindings/pinctrl/apple.h>\n-\n-/ {\n-\tcompatible = \"apple,t8103\", \"apple,arm-platform\";\n-\n-\t#address-cells = <2>;\n-\t#size-cells = <2>;\n-\n-\tcpus {\n-\t\t#address-cells = <2>;\n-\t\t#size-cells = <0>;\n-\n-\t\tcpu0: cpu@0 {\n-\t\t\tcompatible = \"apple,icestorm\";\n-\t\t\tdevice_type = \"cpu\";\n-\t\t\treg = <0x0 0x0>;\n-\t\t\tenable-method = \"spin-table\";\n-\t\t\tcpu-release-addr = <0 0>; /* To be filled by loader */\n-\t\t};\n-\n-\t\tcpu1: cpu@1 {\n-\t\t\tcompatible = \"apple,icestorm\";\n-\t\t\tdevice_type = \"cpu\";\n-\t\t\treg = <0x0 0x1>;\n-\t\t\tenable-method = \"spin-table\";\n-\t\t\tcpu-release-addr = <0 0>; /* To be filled by loader */\n-\t\t};\n-\n-\t\tcpu2: cpu@2 {\n-\t\t\tcompatible = \"apple,icestorm\";\n-\t\t\tdevice_type = \"cpu\";\n-\t\t\treg = <0x0 0x2>;\n-\t\t\tenable-method = \"spin-table\";\n-\t\t\tcpu-release-addr = <0 0>; /* To be filled by loader */\n-\t\t};\n-\n-\t\tcpu3: cpu@3 {\n-\t\t\tcompatible = \"apple,icestorm\";\n-\t\t\tdevice_type = \"cpu\";\n-\t\t\treg = <0x0 0x3>;\n-\t\t\tenable-method = \"spin-table\";\n-\t\t\tcpu-release-addr = <0 0>; /* To be filled by loader */\n-\t\t};\n-\n-\t\tcpu4: cpu@10100 {\n-\t\t\tcompatible = \"apple,firestorm\";\n-\t\t\tdevice_type = \"cpu\";\n-\t\t\treg = <0x0 0x10100>;\n-\t\t\tenable-method = \"spin-table\";\n-\t\t\tcpu-release-addr = <0 0>; /* To be filled by loader */\n-\t\t};\n-\n-\t\tcpu5: cpu@10101 {\n-\t\t\tcompatible = \"apple,firestorm\";\n-\t\t\tdevice_type = \"cpu\";\n-\t\t\treg = <0x0 0x10101>;\n-\t\t\tenable-method = \"spin-table\";\n-\t\t\tcpu-release-addr = <0 0>; /* To be filled by loader */\n-\t\t};\n-\n-\t\tcpu6: cpu@10102 {\n-\t\t\tcompatible = \"apple,firestorm\";\n-\t\t\tdevice_type = \"cpu\";\n-\t\t\treg = <0x0 0x10102>;\n-\t\t\tenable-method = \"spin-table\";\n-\t\t\tcpu-release-addr = <0 0>; /* To be filled by loader */\n-\t\t};\n-\n-\t\tcpu7: cpu@10103 {\n-\t\t\tcompatible = \"apple,firestorm\";\n-\t\t\tdevice_type = \"cpu\";\n-\t\t\treg = <0x0 0x10103>;\n-\t\t\tenable-method = \"spin-table\";\n-\t\t\tcpu-release-addr = <0 0>; /* To be filled by loader */\n-\t\t};\n-\t};\n-\n-\ttimer {\n-\t\tcompatible = \"arm,armv8-timer\";\n-\t\tinterrupt-parent = <&aic>;\n-\t\tinterrupt-names = \"phys\", \"virt\", \"hyp-phys\", \"hyp-virt\";\n-\t\tinterrupts = <AIC_FIQ AIC_TMR_GUEST_PHYS IRQ_TYPE_LEVEL_HIGH>,\n-\t\t\t     <AIC_FIQ AIC_TMR_GUEST_VIRT IRQ_TYPE_LEVEL_HIGH>,\n-\t\t\t     <AIC_FIQ AIC_TMR_HV_PHYS IRQ_TYPE_LEVEL_HIGH>,\n-\t\t\t     <AIC_FIQ AIC_TMR_HV_VIRT IRQ_TYPE_LEVEL_HIGH>;\n-\t};\n-\n-\tclkref: clock-ref {\n-\t\tcompatible = \"fixed-clock\";\n-\t\t#clock-cells = <0>;\n-\t\tclock-frequency = <24000000>;\n-\t\tclock-output-names = \"clkref\";\n-\t};\n-\n-\tclk_120m: clock-120m {\n-\t\tcompatible = \"fixed-clock\";\n-\t\t#clock-cells = <0>;\n-\t\tclock-frequency = <120000000>;\n-\t\tclock-output-names = \"clk_120m\";\n-\t};\n-\n-\tsoc {\n-\t\tcompatible = \"simple-bus\";\n-\t\t#address-cells = <2>;\n-\t\t#size-cells = <2>;\n-\n-\t\tranges;\n-\t\tnonposted-mmio;\n-\n-\t\ti2c0: i2c@235010000 {\n-\t\t\tcompatible = \"apple,t8103-i2c\", \"apple,i2c\";\n-\t\t\treg = <0x2 0x35010000 0x0 0x4000>;\n-\t\t\tclocks = <&clkref>;\n-\t\t\tinterrupt-parent = <&aic>;\n-\t\t\tinterrupts = <AIC_IRQ 627 IRQ_TYPE_LEVEL_HIGH>;\n-\t\t\tpinctrl-0 = <&i2c0_pins>;\n-\t\t\tpinctrl-names = \"default\";\n-\t\t\t#address-cells = <0x1>;\n-\t\t\t#size-cells = <0x0>;\n-\t\t\tpower-domains = <&ps_i2c0>;\n-\t\t};\n-\n-\t\ti2c1: i2c@235014000 {\n-\t\t\tcompatible = \"apple,t8103-i2c\", \"apple,i2c\";\n-\t\t\treg = <0x2 0x35014000 0x0 0x4000>;\n-\t\t\tclocks = <&clkref>;\n-\t\t\tinterrupt-parent = <&aic>;\n-\t\t\tinterrupts = <AIC_IRQ 628 IRQ_TYPE_LEVEL_HIGH>;\n-\t\t\tpinctrl-0 = <&i2c1_pins>;\n-\t\t\tpinctrl-names = \"default\";\n-\t\t\t#address-cells = <0x1>;\n-\t\t\t#size-cells = <0x0>;\n-\t\t\tpower-domains = <&ps_i2c1>;\n-\t\t};\n-\n-\t\ti2c2: i2c@235018000 {\n-\t\t\tcompatible = \"apple,t8103-i2c\", \"apple,i2c\";\n-\t\t\treg = <0x2 0x35018000 0x0 0x4000>;\n-\t\t\tclocks = <&clkref>;\n-\t\t\tinterrupt-parent = <&aic>;\n-\t\t\tinterrupts = <AIC_IRQ 629 IRQ_TYPE_LEVEL_HIGH>;\n-\t\t\tpinctrl-0 = <&i2c2_pins>;\n-\t\t\tpinctrl-names = \"default\";\n-\t\t\t#address-cells = <0x1>;\n-\t\t\t#size-cells = <0x0>;\n-\t\t\tpower-domains = <&ps_i2c2>;\n-\t\t\tstatus = \"disabled\"; /* not used in all devices */\n-\t\t};\n-\n-\t\ti2c3: i2c@23501c000 {\n-\t\t\tcompatible = \"apple,t8103-i2c\", \"apple,i2c\";\n-\t\t\treg = <0x2 0x3501c000 0x0 0x4000>;\n-\t\t\tclocks = <&clkref>;\n-\t\t\tinterrupt-parent = <&aic>;\n-\t\t\tinterrupts = <AIC_IRQ 630 IRQ_TYPE_LEVEL_HIGH>;\n-\t\t\tpinctrl-0 = <&i2c3_pins>;\n-\t\t\tpinctrl-names = \"default\";\n-\t\t\t#address-cells = <0x1>;\n-\t\t\t#size-cells = <0x0>;\n-\t\t\tpower-domains = <&ps_i2c3>;\n-\t\t};\n-\n-\t\ti2c4: i2c@235020000 {\n-\t\t\tcompatible = \"apple,t8103-i2c\", \"apple,i2c\";\n-\t\t\treg = <0x2 0x35020000 0x0 0x4000>;\n-\t\t\tclocks = <&clkref>;\n-\t\t\tinterrupt-parent = <&aic>;\n-\t\t\tinterrupts = <AIC_IRQ 631 IRQ_TYPE_LEVEL_HIGH>;\n-\t\t\tpinctrl-0 = <&i2c4_pins>;\n-\t\t\tpinctrl-names = \"default\";\n-\t\t\t#address-cells = <0x1>;\n-\t\t\t#size-cells = <0x0>;\n-\t\t\tpower-domains = <&ps_i2c4>;\n-\t\t\tstatus = \"disabled\"; /* only used in J293 */\n-\t\t};\n-\n-\t\tspi3: spi@23510c000 {\n-\t\t\tcompatible = \"apple,t8103-spi\", \"apple,spi\";\n-\t\t\treg = <0x2 0x3510c000 0x0 0x4000>;\n-\t\t\tinterrupt-parent = <&aic>;\n-\t\t\tinterrupts = <AIC_IRQ 617 IRQ_TYPE_LEVEL_HIGH>;\n-\t\t\tclocks = <&clk_120m>;\n-\t\t\tpinctrl-0 = <&spi3_pins>;\n-\t\t\tpinctrl-names = \"default\";\n-\t\t\tpower-domains = <&ps_spi3>;\n-\t\t\t#address-cells = <1>;\n-\t\t\t#size-cells = <0>;\n-\t\t\tstatus = \"disabled\"; /* only used in J293/J313 */\n-\t\t};\n-\n-\t\tserial0: serial@235200000 {\n-\t\t\tcompatible = \"apple,s5l-uart\";\n-\t\t\treg = <0x2 0x35200000 0x0 0x1000>;\n-\t\t\treg-io-width = <4>;\n-\t\t\tinterrupt-parent = <&aic>;\n-\t\t\tinterrupts = <AIC_IRQ 605 IRQ_TYPE_LEVEL_HIGH>;\n-\t\t\t/*\n-\t\t\t * TODO: figure out the clocking properly, there may\n-\t\t\t * be a third selectable clock.\n-\t\t\t */\n-\t\t\tclocks = <&clkref>, <&clkref>;\n-\t\t\tclock-names = \"uart\", \"clk_uart_baud0\";\n-\t\t\tpower-domains = <&ps_uart0>;\n-\t\t\tstatus = \"disabled\";\n-\t\t};\n-\n-\t\tserial2: serial@235208000 {\n-\t\t\tcompatible = \"apple,s5l-uart\";\n-\t\t\treg = <0x2 0x35208000 0x0 0x1000>;\n-\t\t\treg-io-width = <4>;\n-\t\t\tinterrupt-parent = <&aic>;\n-\t\t\tinterrupts = <AIC_IRQ 607 IRQ_TYPE_LEVEL_HIGH>;\n-\t\t\tclocks = <&clkref>, <&clkref>;\n-\t\t\tclock-names = \"uart\", \"clk_uart_baud0\";\n-\t\t\tpower-domains = <&ps_uart2>;\n-\t\t\tstatus = \"disabled\";\n-\t\t};\n-\n-\t\taic: interrupt-controller@23b100000 {\n-\t\t\tcompatible = \"apple,t8103-aic\", \"apple,aic\";\n-\t\t\t#interrupt-cells = <3>;\n-\t\t\tinterrupt-controller;\n-\t\t\treg = <0x2 0x3b100000 0x0 0x8000>;\n-\t\t\tpower-domains = <&ps_aic>;\n-\t\t};\n-\n-\t\tpmgr: power-management@23b700000 {\n-\t\t\tcompatible = \"apple,t8103-pmgr\", \"apple,pmgr\", \"syscon\", \"simple-mfd\";\n-\t\t\t#address-cells = <1>;\n-\t\t\t#size-cells = <1>;\n-\t\t\treg = <0x2 0x3b700000 0 0x14000>;\n-\t\t};\n-\n-\t\tpinctrl_ap: pinctrl@23c100000 {\n-\t\t\tcompatible = \"apple,t8103-pinctrl\", \"apple,pinctrl\";\n-\t\t\treg = <0x2 0x3c100000 0x0 0x100000>;\n-\t\t\tpower-domains = <&ps_gpio>;\n-\n-\t\t\tgpio-controller;\n-\t\t\t#gpio-cells = <2>;\n-\t\t\tgpio-ranges = <&pinctrl_ap 0 0 212>;\n-\t\t\tapple,npins = <212>;\n-\n-\t\t\tinterrupt-controller;\n-\t\t\t#interrupt-cells = <2>;\n-\t\t\tinterrupt-parent = <&aic>;\n-\t\t\tinterrupts = <AIC_IRQ 190 IRQ_TYPE_LEVEL_HIGH>,\n-\t\t\t\t     <AIC_IRQ 191 IRQ_TYPE_LEVEL_HIGH>,\n-\t\t\t\t     <AIC_IRQ 192 IRQ_TYPE_LEVEL_HIGH>,\n-\t\t\t\t     <AIC_IRQ 193 IRQ_TYPE_LEVEL_HIGH>,\n-\t\t\t\t     <AIC_IRQ 194 IRQ_TYPE_LEVEL_HIGH>,\n-\t\t\t\t     <AIC_IRQ 195 IRQ_TYPE_LEVEL_HIGH>,\n-\t\t\t\t     <AIC_IRQ 196 IRQ_TYPE_LEVEL_HIGH>;\n-\n-\t\t\ti2c0_pins: i2c0-pins {\n-\t\t\t\tpinmux = <APPLE_PINMUX(192, 1)>,\n-\t\t\t\t\t <APPLE_PINMUX(188, 1)>;\n-\t\t\t};\n-\n-\t\t\ti2c1_pins: i2c1-pins {\n-\t\t\t\tpinmux = <APPLE_PINMUX(201, 1)>,\n-\t\t\t\t\t <APPLE_PINMUX(199, 1)>;\n-\t\t\t};\n-\n-\t\t\ti2c2_pins: i2c2-pins {\n-\t\t\t\tpinmux = <APPLE_PINMUX(163, 1)>,\n-\t\t\t\t\t <APPLE_PINMUX(162, 1)>;\n-\t\t\t};\n-\n-\t\t\ti2c3_pins: i2c3-pins {\n-\t\t\t\tpinmux = <APPLE_PINMUX(73, 1)>,\n-\t\t\t\t\t <APPLE_PINMUX(72, 1)>;\n-\t\t\t};\n-\n-\t\t\ti2c4_pins: i2c4-pins {\n-\t\t\t\tpinmux = <APPLE_PINMUX(135, 1)>,\n-\t\t\t\t\t <APPLE_PINMUX(134, 1)>;\n-\t\t\t};\n-\n-\t\t\tspi3_pins: spi3-pins {\n-\t\t\t\tpinmux = <APPLE_PINMUX(46, 1)>,\n-\t\t\t\t\t<APPLE_PINMUX(47, 1)>,\n-\t\t\t\t\t<APPLE_PINMUX(48, 1)>,\n-\t\t\t\t\t<APPLE_PINMUX(49, 1)>;\n-\t\t\t};\n-\n-\t\t\tpcie_pins: pcie-pins {\n-\t\t\t\tpinmux = <APPLE_PINMUX(150, 1)>,\n-\t\t\t\t\t <APPLE_PINMUX(151, 1)>,\n-\t\t\t\t\t <APPLE_PINMUX(32, 1)>;\n-\t\t\t};\n-\t\t};\n-\n-\t\tspmi: spmi@23d0d9300 {\n-\t\t\tcompatible = \"apple,t8103-spmi\", \"apple,spmi\";\n-\t\t\treg = <0x2 0x3d0d9300 0x0 0x100>;\n-\t\t\tinterrupt-parent = <&aic>;\n-\t\t\tinterrupts = <AIC_IRQ 343 IRQ_TYPE_LEVEL_HIGH>;\n-\t\t\t#address-cells = <2>;\n-\t\t\t#size-cells = <0>;\n-\t\t\tstatus = \"disabled\";\n-\t\t};\n-\n-\t\tpinctrl_nub: pinctrl@23d1f0000 {\n-\t\t\tcompatible = \"apple,t8103-pinctrl\", \"apple,pinctrl\";\n-\t\t\treg = <0x2 0x3d1f0000 0x0 0x4000>;\n-\t\t\tpower-domains = <&ps_nub_gpio>;\n-\n-\t\t\tgpio-controller;\n-\t\t\t#gpio-cells = <2>;\n-\t\t\tgpio-ranges = <&pinctrl_nub 0 0 23>;\n-\t\t\tapple,npins = <23>;\n-\n-\t\t\tinterrupt-controller;\n-\t\t\t#interrupt-cells = <2>;\n-\t\t\tinterrupt-parent = <&aic>;\n-\t\t\tinterrupts = <AIC_IRQ 330 IRQ_TYPE_LEVEL_HIGH>,\n-\t\t\t\t     <AIC_IRQ 331 IRQ_TYPE_LEVEL_HIGH>,\n-\t\t\t\t     <AIC_IRQ 332 IRQ_TYPE_LEVEL_HIGH>,\n-\t\t\t\t     <AIC_IRQ 333 IRQ_TYPE_LEVEL_HIGH>,\n-\t\t\t\t     <AIC_IRQ 334 IRQ_TYPE_LEVEL_HIGH>,\n-\t\t\t\t     <AIC_IRQ 335 IRQ_TYPE_LEVEL_HIGH>,\n-\t\t\t\t     <AIC_IRQ 336 IRQ_TYPE_LEVEL_HIGH>;\n-\t\t};\n-\n-\t\tpmgr_mini: power-management@23d280000 {\n-\t\t\tcompatible = \"apple,t8103-pmgr\", \"apple,pmgr\", \"syscon\", \"simple-mfd\";\n-\t\t\t#address-cells = <1>;\n-\t\t\t#size-cells = <1>;\n-\t\t\treg = <0x2 0x3d280000 0 0x4000>;\n-\t\t};\n-\n-\t\twdt: watchdog@23d2b0000 {\n-\t\t\tcompatible = \"apple,t8103-wdt\", \"apple,wdt\";\n-\t\t\treg = <0x2 0x3d2b0000 0x0 0x4000>;\n-\t\t\tclocks = <&clkref>;\n-\t\t\tinterrupt-parent = <&aic>;\n-\t\t\tinterrupts = <AIC_IRQ 338 IRQ_TYPE_LEVEL_HIGH>;\n-\t\t};\n-\n-\t\tpinctrl_smc: pinctrl@23e820000 {\n-\t\t\tcompatible = \"apple,t8103-pinctrl\", \"apple,pinctrl\";\n-\t\t\treg = <0x2 0x3e820000 0x0 0x4000>;\n-\n-\t\t\tgpio-controller;\n-\t\t\t#gpio-cells = <2>;\n-\t\t\tgpio-ranges = <&pinctrl_smc 0 0 16>;\n-\t\t\tapple,npins = <16>;\n-\n-\t\t\tinterrupt-controller;\n-\t\t\t#interrupt-cells = <2>;\n-\t\t\tinterrupt-parent = <&aic>;\n-\t\t\tinterrupts = <AIC_IRQ 391 IRQ_TYPE_LEVEL_HIGH>,\n-\t\t\t\t     <AIC_IRQ 392 IRQ_TYPE_LEVEL_HIGH>,\n-\t\t\t\t     <AIC_IRQ 393 IRQ_TYPE_LEVEL_HIGH>,\n-\t\t\t\t     <AIC_IRQ 394 IRQ_TYPE_LEVEL_HIGH>,\n-\t\t\t\t     <AIC_IRQ 395 IRQ_TYPE_LEVEL_HIGH>,\n-\t\t\t\t     <AIC_IRQ 396 IRQ_TYPE_LEVEL_HIGH>,\n-\t\t\t\t     <AIC_IRQ 397 IRQ_TYPE_LEVEL_HIGH>;\n-\t\t};\n-\n-\t\tsmc_mbox: mbox@23e408000 {\n-\t\t\tcompatible = \"apple,t8103-asc-mailbox\", \"apple,asc-mailbox-v4\";\n-\t\t\treg = <0x2 0x3e408000 0x0 0x4000>;\n-\t\t\tinterrupt-parent = <&aic>;\n-\t\t\tinterrupts = <AIC_IRQ 400 IRQ_TYPE_LEVEL_HIGH>,\n-\t\t\t\t     <AIC_IRQ 401 IRQ_TYPE_LEVEL_HIGH>,\n-\t\t\t\t     <AIC_IRQ 402 IRQ_TYPE_LEVEL_HIGH>,\n-\t\t\t\t     <AIC_IRQ 403 IRQ_TYPE_LEVEL_HIGH>;\n-\t\t\tinterrupt-names = \"send-empty\", \"send-not-empty\",\n-\t\t\t\t\t  \"recv-empty\", \"recv-not-empty\";\n-\t\t\t#mbox-cells = <0>;\n-\t\t};\n-\n-\t\tsmc: smc@23e050000 {\n-\t\t\tcompatible = \"apple,smc\";\n-\t\t\treg = <0x2 0x3e050000 0x0 0x4000>;\n-\t\t\tmboxes = <&smc_mbox>;\n-\t\t\tgpio-controller;\n-\t\t\t#gpio-cells = <2>;\n-\t\t\tgpio-13 = <0x00800000>;\n-\t\t};\n-\n-\t\tpinctrl_aop: pinctrl@24a820000 {\n-\t\t\tcompatible = \"apple,t8103-pinctrl\", \"apple,pinctrl\";\n-\t\t\treg = <0x2 0x4a820000 0x0 0x4000>;\n-\n-\t\t\tgpio-controller;\n-\t\t\t#gpio-cells = <2>;\n-\t\t\tgpio-ranges = <&pinctrl_aop 0 0 42>;\n-\t\t\tapple,npins = <42>;\n-\n-\t\t\tinterrupt-controller;\n-\t\t\t#interrupt-cells = <2>;\n-\t\t\tinterrupt-parent = <&aic>;\n-\t\t\tinterrupts = <AIC_IRQ 268 IRQ_TYPE_LEVEL_HIGH>,\n-\t\t\t\t     <AIC_IRQ 269 IRQ_TYPE_LEVEL_HIGH>,\n-\t\t\t\t     <AIC_IRQ 270 IRQ_TYPE_LEVEL_HIGH>,\n-\t\t\t\t     <AIC_IRQ 271 IRQ_TYPE_LEVEL_HIGH>,\n-\t\t\t\t     <AIC_IRQ 272 IRQ_TYPE_LEVEL_HIGH>,\n-\t\t\t\t     <AIC_IRQ 273 IRQ_TYPE_LEVEL_HIGH>,\n-\t\t\t\t     <AIC_IRQ 274 IRQ_TYPE_LEVEL_HIGH>;\n-\t\t};\n-\n-\t\tans_mbox: mbox@277408000 {\n-\t\t\tcompatible = \"apple,t8103-asc-mailbox\", \"apple,asc-mailbox-v4\";\n-\t\t\treg = <0x2 0x77408000 0x0 0x4000>;\n-\t\t\tinterrupt-parent = <&aic>;\n-\t\t\tinterrupts = <AIC_IRQ 583 IRQ_TYPE_LEVEL_HIGH>,\n-\t\t\t\t<AIC_IRQ 584 IRQ_TYPE_LEVEL_HIGH>,\n-\t\t\t\t<AIC_IRQ 585 IRQ_TYPE_LEVEL_HIGH>,\n-\t\t\t\t<AIC_IRQ 586 IRQ_TYPE_LEVEL_HIGH>;\n-\t\t\tinterrupt-names = \"send-empty\", \"send-not-empty\",\n-\t\t\t\t\"recv-empty\", \"recv-not-empty\";\n-\t\t\t#mbox-cells = <0>;\n-\t\t\tpower-domains = <&ps_ans2>;\n-\t\t};\n-\n-\t\tsart: sart@27bc50000 {\n-\t\t\tcompatible = \"apple,t8103-sart\", \"apple,sart2\";\n-\t\t\treg = <0x2 0x7bc50000 0x0 0x10000>;\n-\t\t\tpower-domains = <&ps_ans2>;\n-\t\t};\n-\n-\t\tnvme@27bcc0000 {\n-\t\t\tcompatible = \"apple,t8103-nvme-ans2\", \"apple,nvme-ans2\";\n-\t\t\treg = <0x2 0x7bcc0000 0x0 0x40000>,\n-\t\t\t\t<0x2 0x77400000 0x0 0x4000>;\n-\t\t\treg-names = \"nvme\", \"ans\";\n-\t\t\tinterrupt-parent = <&aic>;\n-\t\t\tinterrupts = <AIC_IRQ 590 IRQ_TYPE_LEVEL_HIGH>;\n-\t\t\tmboxes = <&ans_mbox>;\n-\t\t\tapple,sart = <&sart>;\n-\t\t\tpower-domains = <&ps_ans2>;\n-\t\t\tresets = <&ps_ans2>;\n-\t\t};\n-\n-\t\tdwc3_0: usb@382280000 {\n-\t\t\tcompatible = \"apple,t8103-dwc3\", \"apple,dwc3\", \"snps,dwc3\";\n-\t\t\treg = <0x3 0x82280000 0x0 0x100000>;\n-\t\t\tinterrupt-parent = <&aic>;\n-\t\t\tinterrupts = <AIC_IRQ 777 IRQ_TYPE_LEVEL_HIGH>;\n-\t\t\tusb-role-switch;\n-\t\t\trole-switch-default-mode = \"host\";\n-\t\t\tiommus = <&dwc3_0_dart_0 0>, <&dwc3_0_dart_1 1>;\n-\t\t\tpower-domains = <&ps_atc0_usb>;\n-\t\t};\n-\n-\t\tdwc3_0_dart_0: iommu@382f00000 {\n-\t\t\tcompatible = \"apple,t8103-dart\";\n-\t\t\treg = <0x3 0x82f00000 0x0 0x4000>;\n-\t\t\tinterrupt-parent = <&aic>;\n-\t\t\tinterrupts = <AIC_IRQ 781 IRQ_TYPE_LEVEL_HIGH>;\n-\t\t\t#iommu-cells = <1>;\n-\t\t\tpower-domains = <&ps_atc0_usb>;\n-\t\t};\n-\n-\t\tdwc3_0_dart_1: iommu@382f80000 {\n-\t\t\tcompatible = \"apple,t8103-dart\";\n-\t\t\treg = <0x3 0x82f80000 0x0 0x4000>;\n-\t\t\tinterrupt-parent = <&aic>;\n-\t\t\tinterrupts = <AIC_IRQ 781 IRQ_TYPE_LEVEL_HIGH>;\n-\t\t\t#iommu-cells = <1>;\n-\t\t\tpower-domains = <&ps_atc0_usb>;\n-\t\t};\n-\n-\t\tdwc3_1: usb@502280000 {\n-\t\t\tcompatible = \"apple,t8103-dwc3\", \"apple,dwc3\", \"snps,dwc3\";\n-\t\t\treg = <0x5 0x02280000 0x0 0x100000>;\n-\t\t\tinterrupt-parent = <&aic>;\n-\t\t\tinterrupts = <AIC_IRQ 857 IRQ_TYPE_LEVEL_HIGH>;\n-\t\t\tusb-role-switch;\n-\t\t\trole-switch-default-mode = \"host\";\n-\t\t\tiommus = <&dwc3_1_dart_0 0>, <&dwc3_1_dart_1 1>;\n-\t\t\tpower-domains = <&ps_atc1_usb>;\n-\t\t};\n-\n-\t\tdwc3_1_dart_0: iommu@502f00000 {\n-\t\t\tcompatible = \"apple,t8103-dart\";\n-\t\t\treg = <0x5 0x02f00000 0x0 0x4000>;\n-\t\t\tinterrupt-parent = <&aic>;\n-\t\t\tinterrupts = <AIC_IRQ 861 IRQ_TYPE_LEVEL_HIGH>;\n-\t\t\t#iommu-cells = <1>;\n-\t\t\tpower-domains = <&ps_atc1_usb>;\n-\t\t};\n-\n-\t\tdwc3_1_dart_1: iommu@502f80000 {\n-\t\t\tcompatible = \"apple,t8103-dart\";\n-\t\t\treg = <0x5 0x02f80000 0x0 0x4000>;\n-\t\t\tinterrupt-parent = <&aic>;\n-\t\t\tinterrupts = <AIC_IRQ 861 IRQ_TYPE_LEVEL_HIGH>;\n-\t\t\t#iommu-cells = <1>;\n-\t\t\tpower-domains = <&ps_atc1_usb>;\n-\t\t};\n-\n-\t\tpcie0_dart_0: dart@681008000 {\n-\t\t\tcompatible = \"apple,t8103-dart\";\n-\t\t\treg = <0x6 0x81008000 0x0 0x4000>;\n-\t\t\t#iommu-cells = <1>;\n-\t\t\tinterrupt-parent = <&aic>;\n-\t\t\tinterrupts = <AIC_IRQ 696 IRQ_TYPE_LEVEL_HIGH>;\n-\t\t\tpower-domains = <&ps_apcie_gp>;\n-\t\t};\n-\n-\t\tpcie0_dart_1: dart@682008000 {\n-\t\t\tcompatible = \"apple,t8103-dart\";\n-\t\t\treg = <0x6 0x82008000 0x0 0x4000>;\n-\t\t\t#iommu-cells = <1>;\n-\t\t\tinterrupt-parent = <&aic>;\n-\t\t\tinterrupts = <AIC_IRQ 699 IRQ_TYPE_LEVEL_HIGH>;\n-\t\t\tpower-domains = <&ps_apcie_gp>;\n-\t\t};\n-\n-\t\tpcie0_dart_2: dart@683008000 {\n-\t\t\tcompatible = \"apple,t8103-dart\";\n-\t\t\treg = <0x6 0x83008000 0x0 0x4000>;\n-\t\t\t#iommu-cells = <1>;\n-\t\t\tinterrupt-parent = <&aic>;\n-\t\t\tinterrupts = <AIC_IRQ 702 IRQ_TYPE_LEVEL_HIGH>;\n-\t\t\tpower-domains = <&ps_apcie_gp>;\n-\t\t};\n-\n-\t\tpcie0: pcie@690000000 {\n-\t\t\tcompatible = \"apple,t8103-pcie\", \"apple,pcie\";\n-\t\t\tdevice_type = \"pci\";\n-\n-\t\t\treg = <0x6 0x90000000 0x0 0x1000000>,\n-\t\t\t      <0x6 0x80000000 0x0 0x100000>,\n-\t\t\t      <0x6 0x81000000 0x0 0x4000>,\n-\t\t\t      <0x6 0x82000000 0x0 0x4000>,\n-\t\t\t      <0x6 0x83000000 0x0 0x4000>;\n-\t\t\treg-names = \"config\", \"rc\", \"port0\", \"port1\", \"port2\";\n-\n-\t\t\tinterrupt-parent = <&aic>;\n-\t\t\tinterrupts = <AIC_IRQ 695 IRQ_TYPE_LEVEL_HIGH>,\n-\t\t\t\t     <AIC_IRQ 698 IRQ_TYPE_LEVEL_HIGH>,\n-\t\t\t\t     <AIC_IRQ 701 IRQ_TYPE_LEVEL_HIGH>;\n-\n-\t\t\tmsi-controller;\n-\t\t\tmsi-parent = <&pcie0>;\n-\t\t\tmsi-ranges = <&aic AIC_IRQ 704 IRQ_TYPE_EDGE_RISING 32>;\n-\n-\n-\t\t\tiommu-map = <0x100 &pcie0_dart_0 1 1>,\n-\t\t\t\t    <0x200 &pcie0_dart_1 1 1>,\n-\t\t\t\t    <0x300 &pcie0_dart_2 1 1>;\n-\t\t\tiommu-map-mask = <0xff00>;\n-\n-\t\t\tbus-range = <0 3>;\n-\t\t\t#address-cells = <3>;\n-\t\t\t#size-cells = <2>;\n-\t\t\tranges = <0x43000000 0x6 0xa0000000 0x6 0xa0000000 0x0 0x20000000>,\n-\t\t\t\t <0x02000000 0x0 0xc0000000 0x6 0xc0000000 0x0 0x40000000>;\n-\n-\t\t\tpower-domains = <&ps_apcie_gp>;\n-\t\t\tpinctrl-0 = <&pcie_pins>;\n-\t\t\tpinctrl-names = \"default\";\n-\n-\t\t\tport00: pci@0,0 {\n-\t\t\t\tdevice_type = \"pci\";\n-\t\t\t\treg = <0x0 0x0 0x0 0x0 0x0>;\n-\t\t\t\treset-gpios = <&pinctrl_ap 152 GPIO_ACTIVE_LOW>;\n-\n-\t\t\t\t#address-cells = <3>;\n-\t\t\t\t#size-cells = <2>;\n-\t\t\t\tranges;\n-\n-\t\t\t\tinterrupt-controller;\n-\t\t\t\t#interrupt-cells = <1>;\n-\n-\t\t\t\tinterrupt-map-mask = <0 0 0 7>;\n-\t\t\t\tinterrupt-map = <0 0 0 1 &port00 0 0 0 0>,\n-\t\t\t\t\t\t<0 0 0 2 &port00 0 0 0 1>,\n-\t\t\t\t\t\t<0 0 0 3 &port00 0 0 0 2>,\n-\t\t\t\t\t\t<0 0 0 4 &port00 0 0 0 3>;\n-\t\t\t};\n-\n-\t\t\tport01: pci@1,0 {\n-\t\t\t\tdevice_type = \"pci\";\n-\t\t\t\treg = <0x800 0x0 0x0 0x0 0x0>;\n-\t\t\t\treset-gpios = <&pinctrl_ap 153 GPIO_ACTIVE_LOW>;\n-\n-\t\t\t\t#address-cells = <3>;\n-\t\t\t\t#size-cells = <2>;\n-\t\t\t\tranges;\n-\n-\t\t\t\tinterrupt-controller;\n-\t\t\t\t#interrupt-cells = <1>;\n-\n-\t\t\t\tinterrupt-map-mask = <0 0 0 7>;\n-\t\t\t\tinterrupt-map = <0 0 0 1 &port01 0 0 0 0>,\n-\t\t\t\t\t\t<0 0 0 2 &port01 0 0 0 1>,\n-\t\t\t\t\t\t<0 0 0 3 &port01 0 0 0 2>,\n-\t\t\t\t\t\t<0 0 0 4 &port01 0 0 0 3>;\n-\t\t\t};\n-\n-\t\t\tport02: pci@2,0 {\n-\t\t\t\tdevice_type = \"pci\";\n-\t\t\t\treg = <0x1000 0x0 0x0 0x0 0x0>;\n-\t\t\t\treset-gpios = <&pinctrl_ap 33 GPIO_ACTIVE_LOW>;\n-\n-\t\t\t\t#address-cells = <3>;\n-\t\t\t\t#size-cells = <2>;\n-\t\t\t\tranges;\n-\n-\t\t\t\tinterrupt-controller;\n-\t\t\t\t#interrupt-cells = <1>;\n-\n-\t\t\t\tinterrupt-map-mask = <0 0 0 7>;\n-\t\t\t\tinterrupt-map = <0 0 0 1 &port02 0 0 0 0>,\n-\t\t\t\t\t\t<0 0 0 2 &port02 0 0 0 1>,\n-\t\t\t\t\t\t<0 0 0 3 &port02 0 0 0 2>,\n-\t\t\t\t\t\t<0 0 0 4 &port02 0 0 0 3>;\n-\t\t\t};\n-\t\t};\n-\n-\t\tdart_sio: iommu@235004000 {\n-\t\t\tcompatible = \"apple,t8103-dart\", \"apple,dart\";\n-\t\t\treg = <0x2 0x35004000 0x0 0x4000>;\n-\t\t\tinterrupt-parent = <&aic>;\n-\t\t\tinterrupts = <AIC_IRQ 635 IRQ_TYPE_LEVEL_HIGH>;\n-\t\t\t#iommu-cells = <1>;\n-\t\t\tpower-domains = <&ps_sio_cpu>;\n-\t\t};\n-\n-\t\tnco_inp: clock-ref {\n-\t\t\tcompatible = \"fixed-factor-clock\";\n-\t\t\tclocks = <&clkref>;\n-\t\t\t#clock-cells = <0>;\n-\t\t\tclock-mult = <75>;\n-\t\t\tclock-div = <2>; // 24 MHz * (75/2) = 900 MHz\n-\t\t\tclock-output-names = \"nco_inp\";\n-\t\t};\n-\n-\t\tnco: nco@23b044000 {\n-\t\t\tcompatible = \"apple,t8103-nco\", \"apple,nco\";\n-\t\t\treg = <0x2 0x3b044000 0x0 0x14000>;\n-\t\t\tclocks = <&nco_inp>;\n-\t\t\t#clock-cells = <1>;\n-\t\t\tapple,nchannels = <5>;\n-\t\t};\n-\n-\t\tadmac: dma-controller@238200000 {\n-\t\t\tcompatible = \"apple,t8103-admac\", \"apple,admac\";\n-\t\t\treg = <0x2 0x38200000 0x0 0x34000>;\n-\t\t\tdma-channels = <12>;\n-\t\t\tinterrupt-parent = <&aic>;\n-\t\t\tinterrupts = <AIC_IRQ 626 IRQ_TYPE_LEVEL_HIGH>;\n-\t\t\t#dma-cells = <1>;\n-\t\t\tiommus = <&dart_sio 2>;\n-\t\t\tpower-domains = <&ps_sio_adma>;\n-\t\t};\n-\n-\t\tmca: mca {\n-\t\t\tcompatible = \"apple,t8103-mca\", \"apple,mca\";\n-\t\t\treg = <0x2 0x38400000 0x0 0x18000>,\n-\t\t\t\t<0x2 0x38300000 0x0 0x30000>;\n-\t\t\treg-names = \"clusters\", \"switch\";\n-\t\t\tclocks = <&nco 0>, <&nco 1>, <&nco 2>, <&nco 3>;\n-\t\t\tpower-domains = <&ps_mca0>; //, <&ps_mca1>, <&ps_mca2>, <&ps_mca3>, <&ps_mca4>, <&ps_mca5>;\n-\t\t\tresets = <&ps_mca0>, <&ps_mca1>, <&ps_mca2>, <&ps_mca3>, <&ps_mca4>, <&ps_mca5>;\n-\n-\t\t\t#sound-dai-cells = <1>;\n-\t\t\tapple,nclusters = <6>;\n-\t\t\tapple,mclk-range = <2600000 25000000>;\n-\n-\t\t\troute {\n-\t\t\t\tdmas = <&admac 2>;\n-\t\t\t\tdma-names = \"tx\";\n-\t\t\t\tapple,serdes = <1>;\n-\t\t\t\tsound-dai = <&mca 0>;\n-\t\t\t};\n-\n-\t\t\troute2 {\n-\t\t\t\tdmas = <&admac 6>;\n-\t\t\t\tdma-names = \"tx\";\n-\t\t\t\tapple,serdes = <3>;\n-\t\t\t\tsound-dai = <&mca 2>;\n-\t\t\t};\n-\t\t};\n-\t};\n-};\n-\n-#include \"t8103-pmgr.dtsi\"\ndiff --git a/configs/apple_m1_defconfig b/configs/apple_m1_defconfig\nindex 1ce69f2882a..d0cfd5f5591 100644\n--- a/configs/apple_m1_defconfig\n+++ b/configs/apple_m1_defconfig\n@@ -1,6 +1,6 @@\n CONFIG_ARM=y\n CONFIG_ARCH_APPLE=y\n-CONFIG_DEFAULT_DEVICE_TREE=\"t8103-j274\"\n+CONFIG_DEFAULT_DEVICE_TREE=\"apple/t8103-j274\"\n CONFIG_SYS_BOOTM_LEN=0x800000\n CONFIG_SYS_LOAD_ADDR=0x0\n CONFIG_BOOTCOMMAND=\"bootflow scan -b\"\ndiff --git a/doc/board/apple/m1.rst b/doc/board/apple/m1.rst\nindex 5d2cf750fde..900c5e6d91e 100644\n--- a/doc/board/apple/m1.rst\n+++ b/doc/board/apple/m1.rst\n@@ -24,9 +24,8 @@ On these SoCs the following hardware is supported:\n  - NVMe storage\n  - USB 3.1 Type-C ports\n \n-Device trees are currently provided for the M1 Mac mini (2020, J274),\n-M1 MacBook Pro 13\" (2020, J293), M1 MacBook Air (2020, J313) and M1\n-iMac (2021, J456/J457).\n+Device trees are provided in dts/upstream/src/arm64/apple/ and available\n+for all M1 and M2 (t8103, t8112, t600x and t602x) devices.\n \n Building U-Boot\n ---------------\n",
    "prefixes": [
        "3/3"
    ]
}