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GET /api/patches/2231477/?format=api
{ "id": 2231477, "url": "http://patchwork.ozlabs.org/api/patches/2231477/?format=api", "web_url": "http://patchwork.ozlabs.org/project/qemu-devel/patch/ff0c870a705914ed4f5968802d398c24d19a13e7.1777571962.git.matyas.bobek@gmail.com/", "project": { "id": 14, "url": "http://patchwork.ozlabs.org/api/projects/14/?format=api", "name": "QEMU Development", "link_name": "qemu-devel", "list_id": "qemu-devel.nongnu.org", "list_email": "qemu-devel@nongnu.org", "web_url": "", "scm_url": "", "webscm_url": "", "list_archive_url": "", "list_archive_url_format": "", "commit_url_format": "" }, "msgid": "<ff0c870a705914ed4f5968802d398c24d19a13e7.1777571962.git.matyas.bobek@gmail.com>", "list_archive_url": null, "date": "2026-04-30T18:26:04", "name": "[v3,2/7] hw/arm/sabrelite: Introduce class SabreliteMachineState", "commit_ref": null, "pull_url": null, "state": "new", "archived": false, "hash": "8f4224e8bd015e618072335702d1980e1fe807b4", "submitter": { "id": 92267, "url": "http://patchwork.ozlabs.org/api/people/92267/?format=api", "name": "Matyáš Bobek", "email": "matyas.bobek@gmail.com" }, "delegate": null, "mbox": "http://patchwork.ozlabs.org/project/qemu-devel/patch/ff0c870a705914ed4f5968802d398c24d19a13e7.1777571962.git.matyas.bobek@gmail.com/mbox/", "series": [ { "id": 502356, "url": "http://patchwork.ozlabs.org/api/series/502356/?format=api", "web_url": "http://patchwork.ozlabs.org/project/qemu-devel/list/?series=502356", "date": "2026-04-30T18:26:02", "name": "hw/arm/sabrelite: Add FlexCAN support", "version": 3, "mbox": "http://patchwork.ozlabs.org/series/502356/mbox/" } ], "comments": "http://patchwork.ozlabs.org/api/patches/2231477/comments/", "check": "pending", "checks": "http://patchwork.ozlabs.org/api/patches/2231477/checks/", "tags": {}, "related": [], "headers": { "Return-Path": "<qemu-devel-bounces+incoming=patchwork.ozlabs.org@nongnu.org>", "X-Original-To": "incoming@patchwork.ozlabs.org", "Delivered-To": "patchwork-incoming@legolas.ozlabs.org", "Authentication-Results": [ "legolas.ozlabs.org;\n\tdkim=pass (2048-bit key;\n unprotected) header.d=gmail.com header.i=@gmail.com header.a=rsa-sha256\n header.s=20251104 header.b=ROuLToVY;\n\tdkim-atps=neutral", "legolas.ozlabs.org;\n spf=pass (sender SPF authorized) smtp.mailfrom=nongnu.org\n (client-ip=209.51.188.17; helo=lists1p.gnu.org;\n envelope-from=qemu-devel-bounces+incoming=patchwork.ozlabs.org@nongnu.org;\n receiver=patchwork.ozlabs.org)" ], "Received": [ "from lists1p.gnu.org (lists1p.gnu.org [209.51.188.17])\n\t(using TLSv1.2 with cipher ECDHE-ECDSA-AES256-GCM-SHA384 (256/256 bits))\n\t(No client certificate requested)\n\tby legolas.ozlabs.org (Postfix) with ESMTPS id 4g62hx1WLgz1yHZ\n\tfor <incoming@patchwork.ozlabs.org>; Fri, 01 May 2026 04:27:43 +1000 (AEST)", "from localhost ([::1] helo=lists1p.gnu.org)\n\tby lists1p.gnu.org with esmtp (Exim 4.90_1)\n\t(envelope-from <qemu-devel-bounces@nongnu.org>)\n\tid 1wIW6K-0006ah-M2; Thu, 30 Apr 2026 14:27:06 -0400", "from eggs.gnu.org ([2001:470:142:3::10])\n by lists1p.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_256_GCM_SHA384:256)\n (Exim 4.90_1) (envelope-from <matyas.bobek@gmail.com>)\n id 1wIW5i-0006WC-9k\n for qemu-devel@nongnu.org; Thu, 30 Apr 2026 14:26:32 -0400", "from mail-wr1-x429.google.com ([2a00:1450:4864:20::429])\n by eggs.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_128_GCM_SHA256:128)\n (Exim 4.90_1) (envelope-from <matyas.bobek@gmail.com>)\n id 1wIW5e-0005UM-Ce\n for qemu-devel@nongnu.org; Thu, 30 Apr 2026 14:26:25 -0400", "by mail-wr1-x429.google.com with SMTP id\n ffacd0b85a97d-43eb012ac4fso767734f8f.0\n for <qemu-devel@nongnu.org>; Thu, 30 Apr 2026 11:26:22 -0700 (PDT)", "from acidburn.pod.cvut.cz (acidburn.pod.cvut.cz. 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FslIMX6State was only instantiated in the\nsabrelite_init function. For FlexCAN device, machine properties\nwill be used to select QEMU CAN buses. A custom class is therefore\nrequired, so the CanBusState \"connections\" can then be added as fields.\n\nSigned-off-by: Matyáš Bobek <matyas.bobek@gmail.com>\nSigned-off-by: Pavel Pisa <pisa@fel.cvut.cz>\nTested-by: Pavel Pisa <pisa@fel.cvut.cz>\nReviewed-by: Bernhard Beschow <shentey@gmail.com>\nReviewed-by: Pavel Pisa <pisa@fel.cvut.cz>\n---\n hw/arm/sabrelite.c | 28 ++++++++++++++++++----------\n 1 file changed, 18 insertions(+), 10 deletions(-)", "diff": "diff --git a/hw/arm/sabrelite.c b/hw/arm/sabrelite.c\nindex 04484aaa14..7e036e6388 100644\n--- a/hw/arm/sabrelite.c\n+++ b/hw/arm/sabrelite.c\n@@ -20,6 +20,15 @@\n #include \"qemu/error-report.h\"\n #include \"system/qtest.h\"\n \n+struct SabreliteMachineState {\n+ MachineState parent_obj;\n+\n+ FslIMX6State soc;\n+};\n+\n+#define TYPE_SABRELITE_MACHINE MACHINE_TYPE_NAME(\"sabrelite\")\n+OBJECT_DECLARE_SIMPLE_TYPE(SabreliteMachineState, SABRELITE_MACHINE)\n+\n static struct arm_boot_info sabrelite_binfo = {\n /* DDR memory start */\n .loader_start = FSL_IMX6_MMDC_ADDR,\n@@ -41,7 +50,7 @@ static void sabrelite_reset_secondary(ARMCPU *cpu,\n \n static void sabrelite_init(MachineState *machine)\n {\n- FslIMX6State *s;\n+ SabreliteMachineState *s = SABRELITE_MACHINE(machine);\n \n /* Check the amount of memory is compatible with the SOC */\n if (machine->ram_size > FSL_IMX6_MMDC_SIZE) {\n@@ -50,13 +59,12 @@ static void sabrelite_init(MachineState *machine)\n exit(1);\n }\n \n- s = FSL_IMX6(object_new(TYPE_FSL_IMX6));\n- object_property_add_child(OBJECT(machine), \"soc\", OBJECT(s));\n+ object_initialize_child(OBJECT(machine), \"soc\", &s->soc, TYPE_FSL_IMX6);\n \n /* Ethernet PHY address is 6 */\n- object_property_set_int(OBJECT(s), \"fec-phy-num\", 6, &error_fatal);\n+ object_property_set_int(OBJECT(&s->soc), \"fec-phy-num\", 6, &error_fatal);\n \n- qdev_realize(DEVICE(s), NULL, &error_fatal);\n+ qdev_realize(DEVICE(&s->soc), NULL, &error_fatal);\n \n memory_region_add_subregion(get_system_memory(), FSL_IMX6_MMDC_ADDR,\n machine->ram);\n@@ -70,7 +78,7 @@ static void sabrelite_init(MachineState *machine)\n /* Add the sst25vf016b NOR FLASH memory to first SPI */\n Object *spi_dev;\n \n- spi_dev = object_resolve_path_component(OBJECT(s), \"spi1\");\n+ spi_dev = object_resolve_path_component(OBJECT(&s->soc), \"spi1\");\n if (spi_dev) {\n SSIBus *spi_bus;\n \n@@ -89,7 +97,7 @@ static void sabrelite_init(MachineState *machine)\n qdev_realize_and_unref(flash_dev, BUS(spi_bus), &error_fatal);\n \n cs_line = qdev_get_gpio_in_named(flash_dev, SSI_GPIO_CS, 0);\n- qdev_connect_gpio_out(DEVICE(&s->gpio[2]), 19, cs_line);\n+ qdev_connect_gpio_out(DEVICE(&s->soc.gpio[2]), 19, cs_line);\n }\n }\n }\n@@ -100,7 +108,7 @@ static void sabrelite_init(MachineState *machine)\n sabrelite_binfo.secondary_cpu_reset_hook = sabrelite_reset_secondary;\n \n if (!qtest_enabled()) {\n- arm_load_kernel(&s->cpu[0], machine, &sabrelite_binfo);\n+ arm_load_kernel(&s->soc.cpu[0], machine, &sabrelite_binfo);\n }\n }\n \n@@ -117,10 +125,10 @@ static void sabrelite_machine_class_init(ObjectClass *oc, const void *data)\n }\n \n static const TypeInfo sabrelite_machine_init_typeinfo = {\n- .name = MACHINE_TYPE_NAME(\"sabrelite\"),\n+ .name = TYPE_SABRELITE_MACHINE,\n .parent = TYPE_MACHINE,\n .class_init = sabrelite_machine_class_init,\n- .instance_size = sizeof(MachineState),\n+ .instance_size = sizeof(SabreliteMachineState),\n .abstract = false,\n .interfaces = arm_machine_interfaces,\n };\n", "prefixes": [ "v3", "2/7" ] }