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GET /api/patches/2231453/?format=api
{ "id": 2231453, "url": "http://patchwork.ozlabs.org/api/patches/2231453/?format=api", "web_url": "http://patchwork.ozlabs.org/project/qemu-devel/patch/20260430172204.1006673-30-pbonzini@redhat.com/", "project": { "id": 14, "url": "http://patchwork.ozlabs.org/api/projects/14/?format=api", "name": "QEMU Development", "link_name": "qemu-devel", "list_id": "qemu-devel.nongnu.org", "list_email": "qemu-devel@nongnu.org", "web_url": "", "scm_url": "", "webscm_url": "", "list_archive_url": "", "list_archive_url_format": "", "commit_url_format": "" }, "msgid": "<20260430172204.1006673-30-pbonzini@redhat.com>", "list_archive_url": null, "date": "2026-04-30T17:21:35", "name": "[PULL,29/58] whpx: i386: introduce proper cpuid support", "commit_ref": null, "pull_url": null, "state": "new", "archived": false, "hash": "d4b1558d336fba4b541c7741c701003cbdc898af", "submitter": { "id": 2701, "url": "http://patchwork.ozlabs.org/api/people/2701/?format=api", "name": "Paolo Bonzini", "email": "pbonzini@redhat.com" }, "delegate": null, "mbox": "http://patchwork.ozlabs.org/project/qemu-devel/patch/20260430172204.1006673-30-pbonzini@redhat.com/mbox/", "series": [ { "id": 502347, "url": "http://patchwork.ozlabs.org/api/series/502347/?format=api", "web_url": "http://patchwork.ozlabs.org/project/qemu-devel/list/?series=502347", "date": "2026-04-30T17:21:16", "name": "[PULL,01/58] pythondeps: bump to meson 1.11.1", "version": 1, "mbox": "http://patchwork.ozlabs.org/series/502347/mbox/" } ], "comments": "http://patchwork.ozlabs.org/api/patches/2231453/comments/", "check": "pending", "checks": "http://patchwork.ozlabs.org/api/patches/2231453/checks/", "tags": {}, "related": [], "headers": { "Return-Path": "<qemu-devel-bounces+incoming=patchwork.ozlabs.org@nongnu.org>", "X-Original-To": "incoming@patchwork.ozlabs.org", "Delivered-To": "patchwork-incoming@legolas.ozlabs.org", "Authentication-Results": [ "legolas.ozlabs.org;\n\tdkim=pass (1024-bit key;\n unprotected) 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e6daGRzzqRQQZiXrh+cXFg61j6/h9Lm7se3UnvLrpzsbtGOfueFHAwpXy/UzT70RIqbWHJHQJ57\n cVDlow8PeAlrG2ziNrSb4Tolc50DoLPg7U77R2FFyRbqSljCgTcuNiMC77uwp+2C1cAsOZvsBl5\n M2ybOs8EvkO09CJRzgThwRcYVoJJ6YXE3f28w=", "X-Received": [ "by 2002:a05:6102:2b83:b0:607:a215:5b7e with SMTP id\n ada2fe7eead31-62ad233d0c3mr2606631137.7.1777569819577;\n Thu, 30 Apr 2026 10:23:39 -0700 (PDT)", "by 2002:a05:6102:2b83:b0:607:a215:5b7e with SMTP id\n ada2fe7eead31-62ad233d0c3mr2606398137.7.1777569817452;\n Thu, 30 Apr 2026 10:23:37 -0700 (PDT)" ], "From": "Paolo Bonzini <pbonzini@redhat.com>", "To": "qemu-devel@nongnu.org", "Cc": "Mohamed Mediouni <mohamed@unpredictable.fr>", "Subject": "[PULL 29/58] whpx: i386: introduce proper cpuid support", "Date": "Thu, 30 Apr 2026 19:21:35 +0200", "Message-ID": "<20260430172204.1006673-30-pbonzini@redhat.com>", "X-Mailer": "git-send-email 2.54.0", "In-Reply-To": "<20260430172204.1006673-1-pbonzini@redhat.com>", "References": "<20260430172204.1006673-1-pbonzini@redhat.com>", "MIME-Version": "1.0", "Content-Transfer-Encoding": "8bit", "Received-SPF": "pass client-ip=170.10.129.124;\n envelope-from=pbonzini@redhat.com;\n helo=us-smtp-delivery-124.mimecast.com", "X-Spam_score_int": "-20", "X-Spam_score": "-2.1", "X-Spam_bar": "--", "X-Spam_report": "(-2.1 / 5.0 requ) BAYES_00=-1.9, DKIMWL_WL_HIGH=-0.001,\n DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1,\n RCVD_IN_DNSWL_NONE=-0.0001, RCVD_IN_MSPIKE_H4=0.001, RCVD_IN_MSPIKE_WL=0.001,\n SPF_HELO_PASS=-0.001, SPF_PASS=-0.001 autolearn=ham autolearn_force=no", "X-Spam_action": "no action", "X-BeenThere": "qemu-devel@nongnu.org", "X-Mailman-Version": "2.1.29", "Precedence": "list", "List-Id": "qemu development <qemu-devel.nongnu.org>", "List-Unsubscribe": "<https://lists.nongnu.org/mailman/options/qemu-devel>,\n <mailto:qemu-devel-request@nongnu.org?subject=unsubscribe>", "List-Archive": "<https://lists.nongnu.org/archive/html/qemu-devel>", "List-Post": "<mailto:qemu-devel@nongnu.org>", "List-Help": "<mailto:qemu-devel-request@nongnu.org?subject=help>", "List-Subscribe": "<https://lists.nongnu.org/mailman/listinfo/qemu-devel>,\n <mailto:qemu-devel-request@nongnu.org?subject=subscribe>", "Errors-To": "qemu-devel-bounces+incoming=patchwork.ozlabs.org@nongnu.org", "Sender": "qemu-devel-bounces+incoming=patchwork.ozlabs.org@nongnu.org" }, "content": "From: Mohamed Mediouni <mohamed@unpredictable.fr>\n\nUnlike the implementation in QEMU 10.2, this one works.\n\nIt's not optimal though as it doesn't use the Hyper-V support for this.\n\nSigned-off-by: Mohamed Mediouni <mohamed@unpredictable.fr>\nLink: https://lore.kernel.org/r/20260422214225.2242-8-mohamed@unpredictable.fr\nSigned-off-by: Paolo Bonzini <pbonzini@redhat.com>\n---\n target/i386/whpx/whpx-all.c | 136 +++++++++++++++++++++++++----\n target/i386/whpx/whpx-cpu-legacy.c | 15 +---\n 2 files changed, 122 insertions(+), 29 deletions(-)", "diff": "diff --git a/target/i386/whpx/whpx-all.c b/target/i386/whpx/whpx-all.c\nindex f9f330c038f..73e351d895d 100644\n--- a/target/i386/whpx/whpx-all.c\n+++ b/target/i386/whpx/whpx-all.c\n@@ -2168,18 +2168,11 @@ int whpx_vcpu_run(CPUState *cpu)\n vcpu->exit_ctx.VpContext.Rip +\n vcpu->exit_ctx.VpContext.InstructionLength;\n \n- if (whpx_is_legacy_os()) {\n- reg_values[1].Reg64 = vcpu->exit_ctx.CpuidAccess.DefaultResultRax;\n- reg_values[2].Reg64 = vcpu->exit_ctx.CpuidAccess.DefaultResultRcx;\n- reg_values[3].Reg64 = vcpu->exit_ctx.CpuidAccess.DefaultResultRdx;\n- reg_values[4].Reg64 = vcpu->exit_ctx.CpuidAccess.DefaultResultRbx;\n- } else {\n- cpu_x86_cpuid(env, vcpu->exit_ctx.CpuidAccess.Rax,\n- vcpu->exit_ctx.CpuidAccess.Rcx,\n- (UINT32 *)®_values[1].Reg32,\n- (UINT32 *)®_values[4].Reg32, (UINT32 *)®_values[2].Reg32,\n- (UINT32 *)®_values[3].Reg32);\n- }\n+ cpu_x86_cpuid(env, vcpu->exit_ctx.CpuidAccess.Rax,\n+ vcpu->exit_ctx.CpuidAccess.Rcx,\n+ (UINT32 *)®_values[1].Reg32,\n+ (UINT32 *)®_values[4].Reg32, (UINT32 *)®_values[2].Reg32,\n+ (UINT32 *)®_values[3].Reg32);\n \n if (!whpx->hyperv_enlightenments_enabled) {\n switch (vcpu->exit_ctx.CpuidAccess.Rax) {\n@@ -2220,6 +2213,68 @@ int whpx_vcpu_run(CPUState *cpu)\n }\n break;\n }\n+ } else {\n+ switch (vcpu->exit_ctx.CpuidAccess.Rax) {\n+ case 0x40000000:\n+ case 0x40000001:\n+ case 0x40000010:\n+ reg_values[1].Reg64 = vcpu->exit_ctx.CpuidAccess.DefaultResultRax;\n+ reg_values[2].Reg64 = vcpu->exit_ctx.CpuidAccess.DefaultResultRcx;\n+ reg_values[3].Reg64 = vcpu->exit_ctx.CpuidAccess.DefaultResultRdx;\n+ reg_values[4].Reg64 = vcpu->exit_ctx.CpuidAccess.DefaultResultRbx;\n+ break;\n+ }\n+ }\n+\n+ if (vcpu->exit_ctx.CpuidAccess.Rax == 0x1) {\n+ if (cpu_has_x2apic_feature(env)) {\n+ reg_values[2].Reg64 |= CPUID_EXT_X2APIC;\n+ } else {\n+ reg_values[2].Reg32 &= ~CPUID_EXT_X2APIC;\n+ }\n+ }\n+\n+ /* Dynamic depending on XCR0 and XSS, so query DefaultResult */\n+ if (vcpu->exit_ctx.CpuidAccess.Rax == 0x07\n+ && vcpu->exit_ctx.CpuidAccess.Rcx == 0) {\n+ if (vcpu->exit_ctx.CpuidAccess.DefaultResultRdx\n+ & CPUID_7_0_EDX_CET_IBT) {\n+ reg_values[3].Reg32 |= CPUID_7_0_EDX_CET_IBT;\n+ } else {\n+ reg_values[3].Reg32 &= ~CPUID_7_0_EDX_CET_IBT;\n+ }\n+\n+ if (vcpu->exit_ctx.CpuidAccess.DefaultResultRcx\n+ & CPUID_7_0_ECX_CET_SHSTK) {\n+ reg_values[2].Reg32 |= CPUID_7_0_ECX_CET_SHSTK;\n+ } else {\n+ reg_values[2].Reg32 &= ~CPUID_7_0_ECX_CET_SHSTK;\n+ }\n+\n+ if (vcpu->exit_ctx.CpuidAccess.DefaultResultRcx\n+ & CPUID_7_0_ECX_OSPKE) {\n+ reg_values[2].Reg32 |= CPUID_7_0_ECX_OSPKE;\n+ } else {\n+ reg_values[2].Reg32 &= ~CPUID_7_0_ECX_OSPKE;\n+ }\n+ }\n+\n+ /* CPUID[0xD,{1,2}].EBX are dynamic depending on guest features. */\n+ if (vcpu->exit_ctx.CpuidAccess.Rax == 0xd) {\n+ if (vcpu->exit_ctx.CpuidAccess.Rcx == 1\n+ || vcpu->exit_ctx.CpuidAccess.Rcx == 2) {\n+ reg_values[4].Reg64 = vcpu->exit_ctx.CpuidAccess.DefaultResultRbx;\n+ }\n+ }\n+\n+ /* OSXSAVE is dynamic. Do this instead of syncing CR4 */\n+ if (vcpu->exit_ctx.CpuidAccess.Rax == 1) {\n+ if (vcpu->exit_ctx.CpuidAccess.DefaultResultRcx\n+ & CPUID_EXT_OSXSAVE) {\n+ reg_values[2].Reg32 |= CPUID_EXT_OSXSAVE;\n+ } else {\n+ reg_values[2].Reg32 &= ~CPUID_EXT_OSXSAVE;\n+ }\n }\n \n hr = whp_dispatch.WHvSetVirtualProcessorRegisters(\n@@ -2409,6 +2464,45 @@ error:\n return ret;\n }\n \n+static void whpx_cpu_xsave_init(void)\n+{\n+ static bool first = true;\n+ int i;\n+\n+ if (!first) {\n+ return;\n+ }\n+ first = false;\n+\n+ /* x87 and SSE states are in the legacy region of the XSAVE area. */\n+ x86_ext_save_areas[XSTATE_FP_BIT].offset = 0;\n+ x86_ext_save_areas[XSTATE_SSE_BIT].offset = 0;\n+\n+ for (i = XSTATE_SSE_BIT + 1; i < XSAVE_STATE_AREA_COUNT; i++) {\n+ ExtSaveArea *esa = &x86_ext_save_areas[i];\n+\n+ if (esa->size) {\n+ int sz = whpx_get_supported_cpuid(0xd, i, R_EAX);\n+ if (sz != 0) {\n+ assert(esa->size == sz);\n+ esa->offset = whpx_get_supported_cpuid(0xd, i, R_EBX);\n+ }\n+ }\n+ }\n+}\n+\n+static void whpx_cpu_max_instance_init(X86CPU *cpu)\n+{\n+ CPUX86State *env = &cpu->env;\n+\n+ env->cpuid_min_level =\n+ whpx_get_supported_cpuid(0x0, 0, R_EAX);\n+ env->cpuid_min_xlevel =\n+ whpx_get_supported_cpuid(0x80000000, 0, R_EAX);\n+ env->cpuid_min_xlevel2 =\n+ whpx_get_supported_cpuid(0xC0000000, 0, R_EAX);\n+}\n+\n static PropValue whpx_default_props[] = {\n { \"x2apic\", \"on\" },\n { NULL, NULL },\n@@ -2418,9 +2512,18 @@ static PropValue whpx_default_props[] = {\n void whpx_cpu_instance_init(CPUState *cs)\n {\n X86CPU *cpu = X86_CPU(cs);\n+ X86CPUClass *xcc = X86_CPU_GET_CLASS(cpu);\n \n host_cpu_instance_init(cpu);\n x86_cpu_apply_props(cpu, whpx_default_props);\n+\n+ if (xcc->max_features) {\n+ whpx_cpu_max_instance_init(cpu);\n+ }\n+\n+ if (whpx_has_xsave()) {\n+ whpx_cpu_xsave_init();\n+ }\n }\n \n /*\n@@ -2438,8 +2541,11 @@ int whpx_accel_init(AccelState *as, MachineState *ms)\n WHV_CAPABILITY_FEATURES features = {0};\n WHV_PROCESSOR_FEATURES_BANKS processor_features;\n WHV_PROCESSOR_PERFMON_FEATURES perfmon_features;\n- UINT32 cpuidExitList[] = {1};\n- UINT32 cpuidExitList_nohyperv[] = {1, 0x40000000, 0x40000001, 0x40000010};\n+\n+ UINT32 cpuidExitList[] = {0x0, 0x1, 0x6, 0x7, 0xb, 0xd, 0x14, 0x24, 0x29, 0x1E,\n+ 0x40000000, 0x40000001, 0x40000010, 0x80000000, 0x80000001,\n+ 0x80000002, 0x80000003, 0x80000004, 0x80000007, 0x80000008,\n+ 0x8000000A, 0x80000021, 0x80000022, 0xC0000000, 0xC0000001};\n \n whpx = &whpx_global;\n \n@@ -2698,7 +2804,7 @@ int whpx_accel_init(AccelState *as, MachineState *ms)\n hr = whp_dispatch.WHvSetPartitionProperty(\n whpx->partition,\n WHvPartitionPropertyCodeCpuidExitList,\n- whpx->hyperv_enlightenments_enabled ? cpuidExitList : cpuidExitList_nohyperv,\n+ cpuidExitList,\n RTL_NUMBER_OF(cpuidExitList) * sizeof(UINT32));\n \n if (FAILED(hr)) {\ndiff --git a/target/i386/whpx/whpx-cpu-legacy.c b/target/i386/whpx/whpx-cpu-legacy.c\nindex 477429b460f..d341e6f4fd1 100644\n--- a/target/i386/whpx/whpx-cpu-legacy.c\n+++ b/target/i386/whpx/whpx-cpu-legacy.c\n@@ -4,20 +4,7 @@\n * Copyright (c) 2003 Fabrice Bellard\n * Copyright (c) 2017 Google Inc.\n *\n- * This program is free software; you can redistribute it and/or\n- * modify it under the terms of the GNU Lesser General Public\n- * License as published by the Free Software Foundation; either\n- * version 2.1 of the License, or (at your option) any later version.\n- *\n- * This program is distributed in the hope that it will be useful,\n- * but WITHOUT ANY WARRANTY; without even the implied warranty of\n- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU\n- * Lesser General Public License for more details.\n- *\n- * You should have received a copy of the GNU Lesser General Public\n- * License along with this program; if not, see <http://www.gnu.org/licenses/>.\n- *\n- * cpuid\n+ * SPDX-License-Identifier: LGPL-2.1-or-later\n */\n \n #include \"qemu/osdep.h\"\n", "prefixes": [ "PULL", "29/58" ] }