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GET /api/patches/2231438/?format=api
{ "id": 2231438, "url": "http://patchwork.ozlabs.org/api/patches/2231438/?format=api", "web_url": "http://patchwork.ozlabs.org/project/qemu-devel/patch/20260430172204.1006673-57-pbonzini@redhat.com/", "project": { "id": 14, "url": "http://patchwork.ozlabs.org/api/projects/14/?format=api", "name": "QEMU Development", "link_name": "qemu-devel", "list_id": "qemu-devel.nongnu.org", "list_email": "qemu-devel@nongnu.org", "web_url": "", "scm_url": "", "webscm_url": "", "list_archive_url": "", "list_archive_url_format": "", "commit_url_format": "" }, "msgid": "<20260430172204.1006673-57-pbonzini@redhat.com>", "list_archive_url": null, "date": "2026-04-30T17:22:02", "name": "[PULL,56/58] whpx: i386: add feature to intercept #GP MSR accesses", "commit_ref": null, "pull_url": null, "state": "new", "archived": false, "hash": "a6b4d5f2b2ceed4717aa62b4367407c1b6e8148f", "submitter": { "id": 2701, "url": "http://patchwork.ozlabs.org/api/people/2701/?format=api", "name": "Paolo Bonzini", "email": "pbonzini@redhat.com" }, "delegate": null, "mbox": "http://patchwork.ozlabs.org/project/qemu-devel/patch/20260430172204.1006673-57-pbonzini@redhat.com/mbox/", "series": [ { "id": 502347, "url": "http://patchwork.ozlabs.org/api/series/502347/?format=api", "web_url": "http://patchwork.ozlabs.org/project/qemu-devel/list/?series=502347", "date": "2026-04-30T17:21:16", "name": "[PULL,01/58] pythondeps: bump to meson 1.11.1", "version": 1, "mbox": "http://patchwork.ozlabs.org/series/502347/mbox/" } ], "comments": "http://patchwork.ozlabs.org/api/patches/2231438/comments/", "check": "pending", "checks": "http://patchwork.ozlabs.org/api/patches/2231438/checks/", "tags": {}, "related": [], "headers": { "Return-Path": "<qemu-devel-bounces+incoming=patchwork.ozlabs.org@nongnu.org>", "X-Original-To": "incoming@patchwork.ozlabs.org", "Delivered-To": "patchwork-incoming@legolas.ozlabs.org", "Authentication-Results": [ "legolas.ozlabs.org;\n\tdkim=pass (1024-bit key;\n unprotected) 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IWw8GZ/qRxshqF5pi4qaFC0gTsH9VndNcDDNvPjjfnV1UZpT1LZ1ZK2aXunhhJvTlemWm3Ys9Gf\n g0beDFU6EBbpK2s/mcRwf7ZezvmSZsmWcsLcmLBfAUK8Z/ZvpEesXIhtSKJkmFW1lz4POJcE+6w\n Er7U7sbTCyUgs8mUAYAmwDzukiCAn9y0WnLT8=", "X-Received": [ "by 2002:ad4:5ae2:0:b0:8ac:a6c5:c7d1 with SMTP id\n 6a1803df08f44-8b3fe70f50emr59167976d6.8.1777569900136;\n Thu, 30 Apr 2026 10:25:00 -0700 (PDT)", "by 2002:ad4:5ae2:0:b0:8ac:a6c5:c7d1 with SMTP id\n 6a1803df08f44-8b3fe70f50emr59167296d6.8.1777569899548;\n Thu, 30 Apr 2026 10:24:59 -0700 (PDT)" ], "From": "Paolo Bonzini <pbonzini@redhat.com>", "To": "qemu-devel@nongnu.org", "Cc": "Mohamed Mediouni <mohamed@unpredictable.fr>", "Subject": "[PULL 56/58] whpx: i386: add feature to intercept #GP MSR accesses", "Date": "Thu, 30 Apr 2026 19:22:02 +0200", "Message-ID": "<20260430172204.1006673-57-pbonzini@redhat.com>", "X-Mailer": "git-send-email 2.54.0", "In-Reply-To": "<20260430172204.1006673-1-pbonzini@redhat.com>", "References": "<20260430172204.1006673-1-pbonzini@redhat.com>", "MIME-Version": "1.0", "Content-Transfer-Encoding": "8bit", "Received-SPF": "pass client-ip=170.10.133.124;\n envelope-from=pbonzini@redhat.com;\n helo=us-smtp-delivery-124.mimecast.com", "X-Spam_score_int": "-20", "X-Spam_score": "-2.1", "X-Spam_bar": "--", "X-Spam_report": "(-2.1 / 5.0 requ) BAYES_00=-1.9, DKIMWL_WL_HIGH=-0.001,\n DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1,\n RCVD_IN_DNSWL_NONE=-0.0001, RCVD_IN_MSPIKE_H5=0.001, RCVD_IN_MSPIKE_WL=0.001,\n SPF_HELO_PASS=-0.001, SPF_PASS=-0.001 autolearn=ham autolearn_force=no", "X-Spam_action": "no action", "X-BeenThere": "qemu-devel@nongnu.org", "X-Mailman-Version": "2.1.29", "Precedence": "list", "List-Id": "qemu development <qemu-devel.nongnu.org>", "List-Unsubscribe": "<https://lists.nongnu.org/mailman/options/qemu-devel>,\n <mailto:qemu-devel-request@nongnu.org?subject=unsubscribe>", "List-Archive": "<https://lists.nongnu.org/archive/html/qemu-devel>", "List-Post": "<mailto:qemu-devel@nongnu.org>", "List-Help": "<mailto:qemu-devel-request@nongnu.org?subject=help>", "List-Subscribe": "<https://lists.nongnu.org/mailman/listinfo/qemu-devel>,\n <mailto:qemu-devel-request@nongnu.org?subject=subscribe>", "Errors-To": "qemu-devel-bounces+incoming=patchwork.ozlabs.org@nongnu.org", "Sender": "qemu-devel-bounces+incoming=patchwork.ozlabs.org@nongnu.org" }, "content": "From: Mohamed Mediouni <mohamed@unpredictable.fr>\n\nIt turns out they're not that uncommon, so have\na feature around to log those.\n\nSigned-off-by: Mohamed Mediouni <mohamed@unpredictable.fr>\nLink: https://lore.kernel.org/r/20260422214225.2242-35-mohamed@unpredictable.fr\nSigned-off-by: Paolo Bonzini <pbonzini@redhat.com>\n---\n include/system/whpx-internal.h | 1 +\n accel/whpx/whpx-common.c | 1 +\n target/i386/whpx/whpx-all.c | 183 +++++++++++++++++++++++++++++----\n 3 files changed, 166 insertions(+), 19 deletions(-)", "diff": "diff --git a/include/system/whpx-internal.h b/include/system/whpx-internal.h\nindex 0aae83bd7c8..15027a7d524 100644\n--- a/include/system/whpx-internal.h\n+++ b/include/system/whpx-internal.h\n@@ -48,6 +48,7 @@ struct whpx_state {\n bool hyperv_enlightenments_enabled;\n \n bool ignore_unknown_msr;\n+ bool intercept_msr_gp;\n };\n \n extern struct whpx_state whpx_global;\ndiff --git a/accel/whpx/whpx-common.c b/accel/whpx/whpx-common.c\nindex 497c03138ec..d846e08714b 100644\n--- a/accel/whpx/whpx-common.c\n+++ b/accel/whpx/whpx-common.c\n@@ -555,6 +555,7 @@ static void whpx_accel_instance_init(Object *obj)\n /* Value determined at whpx_accel_init */\n whpx->hyperv_enlightenments_enabled = false;\n whpx->ignore_unknown_msr = true;\n+ whpx->intercept_msr_gp = false;\n }\n \n static const TypeInfo whpx_accel_type = {\ndiff --git a/target/i386/whpx/whpx-all.c b/target/i386/whpx/whpx-all.c\nindex 5750539ee49..d6bc36686c2 100644\n--- a/target/i386/whpx/whpx-all.c\n+++ b/target/i386/whpx/whpx-all.c\n@@ -1008,6 +1008,27 @@ static int emulate_instruction(CPUState *cpu, const uint8_t *insn_bytes, size_t\n return 0;\n }\n \n+static int emulate_msr_instruction(CPUState *cpu,\n+ const uint8_t *insn_bytes, size_t insn_len)\n+{\n+ X86CPU *x86_cpu = X86_CPU(cpu);\n+ CPUX86State *env = &x86_cpu->env;\n+ struct x86_decode decode = { 0 };\n+ x86_insn_stream stream = { .bytes = insn_bytes, .len = insn_len };\n+\n+ whpx_get_registers(cpu, WHPX_LEVEL_FAST_RUNTIME_STATE);\n+ decode_instruction_stream(env, &decode, &stream);\n+\n+ if (decode.cmd != X86_DECODE_CMD_RDMSR\n+ && decode.cmd != X86_DECODE_CMD_WRMSR) {\n+ return 1;\n+ }\n+\n+ exec_instruction(env, &decode);\n+ whpx_set_registers(cpu, WHPX_LEVEL_FAST_RUNTIME_STATE);\n+ return 0;\n+}\n+\n static int whpx_handle_mmio(CPUState *cpu, WHV_RUN_VP_EXIT_CONTEXT *exit_ctx)\n {\n WHV_MEMORY_ACCESS_CONTEXT *ctx = &exit_ctx->MemoryAccess;\n@@ -1022,6 +1043,45 @@ static int whpx_handle_mmio(CPUState *cpu, WHV_RUN_VP_EXIT_CONTEXT *exit_ctx)\n return 0;\n }\n \n+static int whpx_handle_msr_from_gpf(CPUState *cpu)\n+{\n+ WHV_VP_EXCEPTION_CONTEXT *ctx = &cpu->accel->exit_ctx.VpException;\n+ int ret;\n+\n+ ret = emulate_msr_instruction(cpu, ctx->InstructionBytes, ctx->InstructionByteCount);\n+ if (ret == 1) {\n+ /* Not an MSR instruction */\n+ return 1;\n+ }\n+\n+ return 0;\n+}\n+\n+static void whpx_inject_back_gpf(CPUState *cpu)\n+{\n+ WHV_VP_EXCEPTION_CONTEXT *ctx = &cpu->accel->exit_ctx.VpException;\n+ WHV_REGISTER_VALUE reg = {};\n+\n+ if (ctx->ExceptionInfo.SoftwareException) {\n+ /* TODO */\n+ warn_report(\"Was asked to inject software exception.\");\n+ return;\n+ }\n+\n+ if (ctx->ExceptionType != EXCP0D_GPF) {\n+ warn_report(\"Was asked to inject exception other than GPF.\");\n+ return;\n+ }\n+\n+ reg.ExceptionEvent.EventPending = 1;\n+ reg.ExceptionEvent.EventType = WHvX64PendingEventException;\n+ reg.ExceptionEvent.DeliverErrorCode = ctx->ExceptionInfo.ErrorCodeValid;\n+ reg.ExceptionEvent.Vector = ctx->ExceptionType;\n+ reg.ExceptionEvent.ErrorCode = ctx->ErrorCode;\n+ reg.ExceptionEvent.ExceptionParameter = ctx->ExceptionParameter;\n+ whpx_set_reg(cpu, WHvRegisterPendingEvent, reg);\n+}\n+\n static void handle_io(CPUState *env, uint16_t port, void *buffer,\n int direction, int size, int count)\n {\n@@ -1210,13 +1270,54 @@ static target_ulong read_cr(CPUState *cpu, int cr)\n return val.Reg64;\n }\n \n+static bool whpx_simulate_rdmsr(CPUState *cs)\n+{\n+ X86CPU *cpu = X86_CPU(cs);\n+ CPUX86State *env = &cpu->env;\n+ uint32_t msr = ECX(env);\n+ uint64_t val = 0;\n+\n+ switch (msr) {\n+ default:\n+ error_report(\"WHPX: unknown msr 0x%x\", msr);\n+ x86_emul_raise_exception(&X86_CPU(cpu)->env, EXCP0D_GPF, 0);\n+ return 1;\n+ break;\n+ }\n+\n+ RAX(env) = (uint32_t)val;\n+ RDX(env) = (uint32_t)(val >> 32);\n+\n+ return 0;\n+}\n+\n+static bool whpx_simulate_wrmsr(CPUState *cs)\n+{\n+ X86CPU *cpu = X86_CPU(cs);\n+ CPUX86State *env = &cpu->env;\n+ uint32_t msr = ECX(env);\n+ uint64_t data = ((uint64_t)EDX(env) << 32) | EAX(env);\n+\n+ switch (msr) {\n+ default:\n+ error_report(\"WHPX: unknown msr 0x%x val %llx\", msr, data);\n+ x86_emul_raise_exception(&X86_CPU(cpu)->env, EXCP0D_GPF, 0);\n+ return 1;\n+ break;\n+ }\n+\n+ return 0;\n+}\n+\n static const struct x86_emul_ops whpx_x86_emul_ops = {\n .read_segment_descriptor = read_segment_descriptor,\n .handle_io = handle_io,\n .is_protected_mode = is_protected_mode,\n .is_long_mode = is_long_mode,\n .is_user_mode = is_user_mode,\n- .read_cr = read_cr\n+ .read_cr = read_cr,\n+ .simulate_rdmsr = whpx_simulate_rdmsr,\n+ .simulate_wrmsr = whpx_simulate_wrmsr\n };\n \n static void whpx_init_emu(void)\n@@ -1356,6 +1457,18 @@ uint64_t whpx_get_supported_msr_feature(uint32_t index)\n return 0;\n }\n \n+static UINT64 whpx_get_default_exceptions(void)\n+{\n+ struct whpx_state *whpx = &whpx_global;\n+ UINT64 intercepts = 0;\n+\n+ if (whpx->intercept_msr_gp) {\n+ intercepts |= 1UL << WHvX64ExceptionTypeGeneralProtectionFault;\n+ }\n+\n+ return intercepts;\n+}\n+\n /*\n * Controls whether we should intercept various exceptions on the guest,\n * namely breakpoint/single-step events.\n@@ -1378,7 +1491,7 @@ HRESULT whpx_set_exception_exit_bitmap(UINT64 exceptions)\n prop.ExtendedVmExits.X64MsrExit = 1;\n prop.ExtendedVmExits.X64CpuidExit = 1;\n \n- if (exceptions != 0) {\n+ if (exceptions != 0 || whpx_get_default_exceptions() != 0) {\n prop.ExtendedVmExits.ExceptionExit = 1;\n }\n \n@@ -1393,7 +1506,7 @@ HRESULT whpx_set_exception_exit_bitmap(UINT64 exceptions)\n }\n \n memset(&prop, 0, sizeof(WHV_PARTITION_PROPERTY));\n- prop.ExceptionExitBitmap = exceptions;\n+ prop.ExceptionExitBitmap = exceptions | whpx_get_default_exceptions();\n \n hr = whp_dispatch.WHvSetPartitionProperty(\n whpx->partition,\n@@ -1403,6 +1516,8 @@ HRESULT whpx_set_exception_exit_bitmap(UINT64 exceptions)\n \n if (SUCCEEDED(hr)) {\n whpx->exception_exit_bitmap = exceptions;\n+ } else {\n+ error_report(\"WHPX: Failed to set exception exit bitmap, hr=%08lx\", hr);\n }\n \n return hr;\n@@ -2518,6 +2633,15 @@ int whpx_vcpu_run(CPUState *cpu)\n break;\n }\n case WHvRunVpExitReasonException:\n+ if (vcpu->exit_ctx.VpException.ExceptionType ==\n+ WHvX64ExceptionTypeGeneralProtectionFault) {\n+ if (whpx_handle_msr_from_gpf(cpu)) {\n+ whpx_inject_back_gpf(cpu);\n+ }\n+ ret = 0;\n+ break;\n+ }\n+\n whpx_get_registers(cpu, WHPX_LEVEL_FULL_STATE);\n \n if ((vcpu->exit_ctx.VpException.ExceptionType ==\n@@ -2806,6 +2930,38 @@ static void whpx_set_unknown_msr(Object *obj, Visitor *v,\n }\n }\n \n+static void whpx_set_intercept_msr_gp(Object *obj, Visitor *v,\n+ const char *name, void *opaque,\n+ Error **errp)\n+{\n+ struct whpx_state *whpx = &whpx_global;\n+ OnOffAuto mode;\n+\n+ if (!visit_type_OnOffAuto(v, name, &mode, errp)) {\n+ return;\n+ }\n+\n+ switch (mode) {\n+ case ON_OFF_AUTO_ON:\n+ whpx->intercept_msr_gp = true;\n+ break;\n+\n+ case ON_OFF_AUTO_OFF:\n+ whpx->intercept_msr_gp = false;\n+ break;\n+\n+ case ON_OFF_AUTO_AUTO:\n+ whpx->intercept_msr_gp = false;\n+ break;\n+ default:\n+ /*\n+ * The value was checked in visit_type_OnOffAuto() above. If\n+ * we get here, then something is wrong in QEMU.\n+ */\n+ abort();\n+ }\n+}\n+\n void whpx_arch_accel_class_init(ObjectClass *oc)\n {\n object_class_property_add(oc, \"ignore-unknown-msr\", \"OnOffAuto\",\n@@ -2813,6 +2969,11 @@ void whpx_arch_accel_class_init(ObjectClass *oc)\n NULL, NULL);\n object_class_property_set_description(oc, \"ignore-unknown-msr\",\n \"Configure unknown MSR behavior\");\n+ object_class_property_add(oc, \"intercept-msr-gp\", \"OnOffAuto\",\n+ NULL, whpx_set_intercept_msr_gp,\n+ NULL, NULL);\n+ object_class_property_set_description(oc, \"intercept-msr-gp\",\n+ \"Intercept #GP to log erroring MSR accesses.\");\n }\n \n int whpx_accel_init(AccelState *as, MachineState *ms)\n@@ -3067,22 +3228,6 @@ int whpx_accel_init(AccelState *as, MachineState *ms)\n goto error;\n }\n \n- /* Register for MSR and CPUID exits */\n- memset(&prop, 0, sizeof(WHV_PARTITION_PROPERTY));\n- prop.ExtendedVmExits.X64MsrExit = 1;\n- prop.ExtendedVmExits.X64CpuidExit = 1;\n-\n- hr = whp_dispatch.WHvSetPartitionProperty(\n- whpx->partition,\n- WHvPartitionPropertyCodeExtendedVmExits,\n- &prop,\n- sizeof(WHV_PARTITION_PROPERTY));\n- if (FAILED(hr)) {\n- error_report(\"WHPX: Failed to enable extended VM exits, hr=%08lx\", hr);\n- ret = -EINVAL;\n- goto error;\n- }\n-\n memset(&prop, 0, sizeof(WHV_PARTITION_PROPERTY));\n prop.X64MsrExitBitmap.UnhandledMsrs = 1;\n prop.X64MsrExitBitmap.ApicBaseMsrWrite = 1;\n", "prefixes": [ "PULL", "56/58" ] }