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GET /api/patches/2231341/?format=api
{ "id": 2231341, "url": "http://patchwork.ozlabs.org/api/patches/2231341/?format=api", "web_url": "http://patchwork.ozlabs.org/project/gcc/patch/20260430160314.1881750-1-alfie.richards@arm.com/", "project": { "id": 17, "url": "http://patchwork.ozlabs.org/api/projects/17/?format=api", "name": "GNU Compiler Collection", "link_name": "gcc", "list_id": "gcc-patches.gcc.gnu.org", "list_email": "gcc-patches@gcc.gnu.org", "web_url": null, "scm_url": null, "webscm_url": null, "list_archive_url": "", "list_archive_url_format": "", "commit_url_format": "" }, "msgid": "<20260430160314.1881750-1-alfie.richards@arm.com>", "list_archive_url": null, "date": "2026-04-30T16:03:14", "name": "aarch64: Update gating for svexpa intrinsic", "commit_ref": null, "pull_url": null, "state": "new", "archived": false, "hash": "622df6c9beadedf087bebf2f82a89a45c7c940cd", "submitter": { "id": 88864, "url": "http://patchwork.ozlabs.org/api/people/88864/?format=api", "name": "Alfie Richards", "email": "alfie.richards@arm.com" }, "delegate": null, "mbox": "http://patchwork.ozlabs.org/project/gcc/patch/20260430160314.1881750-1-alfie.richards@arm.com/mbox/", "series": [ { "id": 502336, "url": "http://patchwork.ozlabs.org/api/series/502336/?format=api", "web_url": "http://patchwork.ozlabs.org/project/gcc/list/?series=502336", "date": "2026-04-30T16:03:14", "name": "aarch64: Update gating for svexpa intrinsic", "version": 1, "mbox": "http://patchwork.ozlabs.org/series/502336/mbox/" } ], "comments": "http://patchwork.ozlabs.org/api/patches/2231341/comments/", "check": "pending", "checks": "http://patchwork.ozlabs.org/api/patches/2231341/checks/", "tags": {}, "related": [], "headers": { "Return-Path": "<gcc-patches-bounces~incoming=patchwork.ozlabs.org@gcc.gnu.org>", "X-Original-To": [ "incoming@patchwork.ozlabs.org", "gcc-patches@gcc.gnu.org" ], "Delivered-To": [ "patchwork-incoming@legolas.ozlabs.org", "gcc-patches@gcc.gnu.org" ], "Authentication-Results": [ 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<alfie.richards@arm.com>", "To": "<gcc-patches@gcc.gnu.org>", "CC": "<alex.coplan@arm.com>, <alice.carlotti@arm.com>,\n <andrew.pinski@oss.qualcomm.com>, <ktkachov@nvidia.com>,\n <richard.earnshaw@arm.com>, <tamar.christina@arm.com>,\n <wilco.dijkstra@arm.com>, Alfie Richards <alfie.richards@arm.com>", "Subject": "[PATCH] aarch64: Update gating for svexpa intrinsic", "Date": "Thu, 30 Apr 2026 16:03:14 +0000", "Message-ID": "<20260430160314.1881750-1-alfie.richards@arm.com>", "X-Mailer": "git-send-email 2.34.1", "MIME-Version": "1.0", "Content-Transfer-Encoding": "8bit", "Content-Type": "text/plain", "X-EOPAttributedMessage": "1", "X-MS-TrafficTypeDiagnostic": "\n DU6PEPF0000A7DE:EE_|PAVPR08MB9210:EE_|DB1PEPF0003922D:EE_|PAWPR08MB10974:EE_", "X-MS-Office365-Filtering-Correlation-Id": "68fc2513-d8c5-4666-5f34-08dea6d229d9", "x-checkrecipientrouted": "true", "NoDisclaimer": "true", "X-MS-Exchange-SenderADCheck": "1", "X-MS-Exchange-AntiSpam-Relay": "0", "X-Microsoft-Antispam-Untrusted": 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"X-MS-Exchange-CrossTenant-Id": "f34e5979-57d9-4aaa-ad4d-b122a662184d", "X-MS-Exchange-CrossTenant-OriginalAttributedTenantConnectingIp": "\n TenantId=f34e5979-57d9-4aaa-ad4d-b122a662184d; Ip=[4.158.2.129];\n Helo=[outbound-uk1.az.dlp.m.darktrace.com]", "X-MS-Exchange-CrossTenant-AuthSource": "\n DB1PEPF0003922D.eurprd03.prod.outlook.com", "X-MS-Exchange-CrossTenant-AuthAs": "Anonymous", "X-MS-Exchange-CrossTenant-FromEntityHeader": "HybridOnPrem", "X-BeenThere": "gcc-patches@gcc.gnu.org", "X-Mailman-Version": "2.1.30", "Precedence": "list", "List-Id": "Gcc-patches mailing list <gcc-patches.gcc.gnu.org>", "List-Unsubscribe": "<https://gcc.gnu.org/mailman/options/gcc-patches>,\n <mailto:gcc-patches-request@gcc.gnu.org?subject=unsubscribe>", "List-Archive": "<https://gcc.gnu.org/pipermail/gcc-patches/>", "List-Post": "<mailto:gcc-patches@gcc.gnu.org>", "List-Help": "<mailto:gcc-patches-request@gcc.gnu.org?subject=help>", "List-Subscribe": "<https://gcc.gnu.org/mailman/listinfo/gcc-patches>,\n <mailto:gcc-patches-request@gcc.gnu.org?subject=subscribe>", "Errors-To": "gcc-patches-bounces~incoming=patchwork.ozlabs.org@gcc.gnu.org" }, "content": "Hi All,\n\nBootstrapped and reg tested for aarch64-linux gnu\n\nOkay for master?\nAlfie\n\n-- >8 --\n\nUpdates the gating for the ssve-fexpa intrinsic to be supported in\nstreaming-mode if \"ssve-fexpa\" is supported.\n\nAdditionally, implements the \"__ARM_FEATURE_SSVE_FEXPA\" macro.\n\ngcc/ChangeLog:\n\n\t* config/aarch64/aarch64-c.cc (aarch64_update_cpp_builtins): Add\n\t__ARM_FEATURE_SSVE_FEXPA.\n\t* config/aarch64/aarch64-sve-builtins-base.def (svexpa): Change gating\n\tto streaming compatible if AARCH64_FL_SSVE_FEXPA is supported.\n\t* config/aarch64/aarch64-sve.md: Update gating to be enabled if\n\tTARGET_SSVE_FEXPA.\n\t* config/aarch64/aarch64.h (TARGET_SVE_FEXPA): New macro.\n\t* config/aarch64/iterators.md (SVE_FP_UNARY_INT): Update FEXPA gating.\n\ngcc/testsuite/ChangeLog:\n\n\t* gcc.target/aarch64/pragma_cpp_predefs_4.c: Add\n\t__ARM_FEATURE_SSVE_FEXPA test.\n\t* gcc.target/aarch64/sve/acle/asm/expa_f16.c: Add streaming mode test.\n\t* gcc.target/aarch64/sve/acle/asm/expa_f32.c: Likewise.\n\t* gcc.target/aarch64/sve/acle/asm/expa_f64.c: Likewise.\n\t* lib/target-supports.exp (sve_ext): Add ssve-fexpa support test.\n\t* g++.target/aarch64/sve/aarch64-ssve.exp (GCC target pragma): Add\n\tssve-fexpa.\n\t(streaming_ok): Add svexpa.\n\t(nonstreaming_only) Remove svexpa.\n---\n gcc/config/aarch64/aarch64-c.cc | 2 ++\n gcc/config/aarch64/aarch64-sve-builtins-base.def | 5 ++++-\n gcc/config/aarch64/aarch64-sve.md | 2 +-\n gcc/config/aarch64/aarch64.h | 6 ++++++\n gcc/config/aarch64/iterators.md | 2 +-\n gcc/testsuite/g++.target/aarch64/sve/aarch64-ssve.exp | 4 ++--\n gcc/testsuite/gcc.target/aarch64/pragma_cpp_predefs_4.c | 5 +++++\n gcc/testsuite/gcc.target/aarch64/sve/acle/asm/expa_f16.c | 8 +++++++-\n gcc/testsuite/gcc.target/aarch64/sve/acle/asm/expa_f32.c | 8 +++++++-\n gcc/testsuite/gcc.target/aarch64/sve/acle/asm/expa_f64.c | 8 +++++++-\n gcc/testsuite/lib/target-supports.exp | 2 +-\n 11 files changed, 43 insertions(+), 9 deletions(-)", "diff": "diff --git a/gcc/config/aarch64/aarch64-c.cc b/gcc/config/aarch64/aarch64-c.cc\nindex 8d3f4820dc9..a55028dcd0a 100644\n--- a/gcc/config/aarch64/aarch64-c.cc\n+++ b/gcc/config/aarch64/aarch64-c.cc\n@@ -318,6 +318,8 @@ aarch64_update_cpp_builtins (cpp_reader *pfile)\n \t\t\t\"__ARM_FEATURE_SME_TMOP\", pfile);\n aarch64_def_or_undef (AARCH64_HAVE_ISA (SSVE_BITPERM),\n \t\t\t\"__ARM_FEATURE_SSVE_BITPERM\", pfile);\n+ aarch64_def_or_undef (AARCH64_HAVE_ISA (SSVE_FEXPA),\n+\t\t\t\"__ARM_FEATURE_SSVE_FEXPA\", pfile);\n \n // Function multi-versioning defines\n aarch64_def_or_undef (targetm.has_ifunc_p (),\ndiff --git a/gcc/config/aarch64/aarch64-sve-builtins-base.def b/gcc/config/aarch64/aarch64-sve-builtins-base.def\nindex c1e00a51b7b..3b5e2433674 100644\n--- a/gcc/config/aarch64/aarch64-sve-builtins-base.def\n+++ b/gcc/config/aarch64/aarch64-sve-builtins-base.def\n@@ -274,7 +274,6 @@ DEF_SVE_FUNCTION (svadrb, adr_offset, none, none)\n DEF_SVE_FUNCTION (svadrd, adr_index, none, none)\n DEF_SVE_FUNCTION (svadrh, adr_index, none, none)\n DEF_SVE_FUNCTION (svadrw, adr_index, none, none)\n-DEF_SVE_FUNCTION (svexpa, unary_uint, all_float, none)\n DEF_SVE_FUNCTION (svld1_gather, load_gather_sv, sd_data, implicit)\n DEF_SVE_FUNCTION (svld1_gather, load_gather_vs, sd_data, implicit)\n DEF_SVE_FUNCTION (svld1sb_gather, load_ext_gather_offset, sd_integer, implicit)\n@@ -377,3 +376,7 @@ DEF_SVE_FUNCTION (svzip2q, binary, all_data, none)\n #define REQUIRED_EXTENSIONS sve_and_sme (0, AARCH64_FL_SME2p2)\n DEF_SVE_FUNCTION (svcompact, unary, sd_data, implicit)\n #undef REQUIRED_EXTENSIONS\n+\n+#define REQUIRED_EXTENSIONS streaming_compatible (0, AARCH64_FL_SSVE_FEXPA)\n+DEF_SVE_FUNCTION (svexpa, unary_uint, all_float, none)\n+#undef REQUIRED_EXTENSIONS\ndiff --git a/gcc/config/aarch64/aarch64-sve.md b/gcc/config/aarch64/aarch64-sve.md\nindex a910c5b3435..3494a4821fb 100644\n--- a/gcc/config/aarch64/aarch64-sve.md\n+++ b/gcc/config/aarch64/aarch64-sve.md\n@@ -3892,7 +3892,7 @@ (define_insn \"@aarch64_sve_<optab><mode>\"\n \t(unspec:SVE_FULL_F\n \t [(match_operand:<V_INT_EQUIV> 1 \"register_operand\" \"w\")]\n \t SVE_FP_UNARY_INT))]\n- \"TARGET_SVE\"\n+ \"TARGET_SVE_FEXPA\"\n \"<sve_fp_op>\\t%0.<Vetype>, %1.<Vetype>\"\n [(set_attr \"sve_type\" \"sve_fp_exp\")]\n )\ndiff --git a/gcc/config/aarch64/aarch64.h b/gcc/config/aarch64/aarch64.h\nindex c8b9b62e8f9..a0282ce285b 100644\n--- a/gcc/config/aarch64/aarch64.h\n+++ b/gcc/config/aarch64/aarch64.h\n@@ -585,6 +585,12 @@ through +ssve-fp8dot2. */\n \n #define TARGET_SSME2_FP8 (TARGET_FP8 && TARGET_STREAMING_SME2)\n \n+/* SVE FEXPA instructions, enabled through +sve for streaming and +ssve-fexpa\n+ for streaming. */\n+#define TARGET_SVE_FEXPA ((TARGET_SVE || TARGET_STREAMING) \\\n+\t\t\t && (AARCH64_HAVE_ISA (SSVE_FEXPA) \\\n+\t\t\t || TARGET_NON_STREAMING))\n+\n /* Standard register usage. */\n \n /* 31 64-bit general purpose registers R0-R30:\ndiff --git a/gcc/config/aarch64/iterators.md b/gcc/config/aarch64/iterators.md\nindex dbf9d6272a8..6b969258182 100644\n--- a/gcc/config/aarch64/iterators.md\n+++ b/gcc/config/aarch64/iterators.md\n@@ -3588,7 +3588,7 @@ (define_int_iterator SVE_INT_UNARY [UNSPEC_REVB\n ;; This might need to be revisited if new operations are added in future.\n (define_int_iterator SVE_FP_UNARY [UNSPEC_FRECPE UNSPEC_RSQRTE])\n \n-(define_int_iterator SVE_FP_UNARY_INT [(UNSPEC_FEXPA \"TARGET_NON_STREAMING\")])\n+(define_int_iterator SVE_FP_UNARY_INT [UNSPEC_FEXPA])\n \n (define_int_iterator SVE_INT_SHIFT_IMM [UNSPEC_ASRD\n \t\t\t\t\t(UNSPEC_SQSHLU \"TARGET_SVE2\")\ndiff --git a/gcc/testsuite/g++.target/aarch64/sve/aarch64-ssve.exp b/gcc/testsuite/g++.target/aarch64/sve/aarch64-ssve.exp\nindex 56a8931e3a5..1ba48591ef8 100644\n--- a/gcc/testsuite/g++.target/aarch64/sve/aarch64-ssve.exp\n+++ b/gcc/testsuite/g++.target/aarch64/sve/aarch64-ssve.exp\n@@ -37,7 +37,7 @@ gcc_parallel_test_enable 0\n set preamble {\n #include <arm_sve.h>\n \n-#pragma GCC target \"+i8mm+f32mm+f64mm+sve2+sve2-bitperm+sve2-sm4+sve2-aes+sve2-sha3+sme+ssve-bitperm+sme2p2\"\n+#pragma GCC target \"+i8mm+f32mm+f64mm+sve2+sve2-bitperm+sve2-sm4+sve2-aes+sve2-sha3+sme+ssve-bitperm+sme2p2+ssve-fexpa\"\n \n extern svbool_t &pred;\n \n@@ -149,6 +149,7 @@ set streaming_ok {\n u8 = svbext (u8, u8)\n u8 = svbgrp (u8, u8)\n u32 = svcompact (pred, u32)\n+ f32 = svexpa (u32)\n }\n \n # This order follows the list in the SME manual.\n@@ -167,7 +168,6 @@ set nonstreaming_only {\n u8 = svaesmc (u8)\n f32 = svbfmmla (f32, bf16, bf16)\n f32 = svadda (pred, 1.0f, f32)\n- f32 = svexpa (u32)\n f32 = svmmla (f32, f32, f32)\n f32 = svtmad (f32, f32, 0)\n f32 = svtsmul (f32, u32)\ndiff --git a/gcc/testsuite/gcc.target/aarch64/pragma_cpp_predefs_4.c b/gcc/testsuite/gcc.target/aarch64/pragma_cpp_predefs_4.c\nindex d7976e3f1b1..4d594804a40 100644\n--- a/gcc/testsuite/gcc.target/aarch64/pragma_cpp_predefs_4.c\n+++ b/gcc/testsuite/gcc.target/aarch64/pragma_cpp_predefs_4.c\n@@ -404,3 +404,8 @@\n #ifndef __ARM_FEATURE_SME2\n #error Foo\n #endif\n+\n+#pragma GCC target \"arch=armv8-a+sve2+ssve-fexpa\"\n+#ifndef __ARM_FEATURE_SSVE_FEXPA\n+#error Foo\n+#endif\ndiff --git a/gcc/testsuite/gcc.target/aarch64/sve/acle/asm/expa_f16.c b/gcc/testsuite/gcc.target/aarch64/sve/acle/asm/expa_f16.c\nindex 87c26e6ea6b..fe9cbe1d8f4 100644\n--- a/gcc/testsuite/gcc.target/aarch64/sve/acle/asm/expa_f16.c\n+++ b/gcc/testsuite/gcc.target/aarch64/sve/acle/asm/expa_f16.c\n@@ -1,8 +1,14 @@\n-/* { dg-skip-if \"\" { *-*-* } { \"-DSTREAMING_COMPATIBLE\" } { \"\" } } */\n+/* { dg-do assemble { target aarch64_asm_ssve-fexpa_ok } } */\n+/* { dg-do compile { target { ! aarch64_asm_ssve-fexpa_ok } } } */\n /* { dg-final { check-function-bodies \"**\" \"\" \"-DCHECK_ASM\" } } */\n \n #include \"test_sve_acle.h\"\n \n+#ifdef STREAMING_COMPATIBLE\n+/* We need to add sve2 here to work arount not supporting sme without sve2 */\n+#pragma GCC target \"+sve2+ssve-fexpa\"\n+#endif\n+\n /*\n ** expa_f16_tied1:\n **\tfexpa\tz0\\.h, z0\\.h\ndiff --git a/gcc/testsuite/gcc.target/aarch64/sve/acle/asm/expa_f32.c b/gcc/testsuite/gcc.target/aarch64/sve/acle/asm/expa_f32.c\nindex 5e9839537c7..fc179cb0c8b 100644\n--- a/gcc/testsuite/gcc.target/aarch64/sve/acle/asm/expa_f32.c\n+++ b/gcc/testsuite/gcc.target/aarch64/sve/acle/asm/expa_f32.c\n@@ -1,8 +1,14 @@\n-/* { dg-skip-if \"\" { *-*-* } { \"-DSTREAMING_COMPATIBLE\" } { \"\" } } */\n+/* { dg-do assemble { target aarch64_asm_ssve-fexpa_ok } } */\n+/* { dg-do compile { target { ! aarch64_asm_ssve-fexpa_ok } } } */\n /* { dg-final { check-function-bodies \"**\" \"\" \"-DCHECK_ASM\" } } */\n \n #include \"test_sve_acle.h\"\n \n+#ifdef STREAMING_COMPATIBLE\n+/* We need to add sve2 here to work arount not supporting sme without sve2 */\n+#pragma GCC target \"+sve2+ssve-fexpa\"\n+#endif\n+\n /*\n ** expa_f32_tied1:\n **\tfexpa\tz0\\.s, z0\\.s\ndiff --git a/gcc/testsuite/gcc.target/aarch64/sve/acle/asm/expa_f64.c b/gcc/testsuite/gcc.target/aarch64/sve/acle/asm/expa_f64.c\nindex b117df2a4b1..97ab56da263 100644\n--- a/gcc/testsuite/gcc.target/aarch64/sve/acle/asm/expa_f64.c\n+++ b/gcc/testsuite/gcc.target/aarch64/sve/acle/asm/expa_f64.c\n@@ -1,8 +1,14 @@\n-/* { dg-skip-if \"\" { *-*-* } { \"-DSTREAMING_COMPATIBLE\" } { \"\" } } */\n+/* { dg-do assemble { target aarch64_asm_ssve-fexpa_ok } } */\n+/* { dg-do compile { target { ! aarch64_asm_ssve-fexpa_ok } } } */\n /* { dg-final { check-function-bodies \"**\" \"\" \"-DCHECK_ASM\" } } */\n \n #include \"test_sve_acle.h\"\n \n+#ifdef STREAMING_COMPATIBLE\n+/* We need to add sve2 here to work arount not supporting sme without sve2 */\n+#pragma GCC target \"+sve2+ssve-fexpa\"\n+#endif\n+\n /*\n ** expa_f64_tied1:\n **\tfexpa\tz0\\.d, z0\\.d\ndiff --git a/gcc/testsuite/lib/target-supports.exp b/gcc/testsuite/lib/target-supports.exp\nindex f0def086a30..6ffa40fb1dd 100644\n--- a/gcc/testsuite/lib/target-supports.exp\n+++ b/gcc/testsuite/lib/target-supports.exp\n@@ -12750,7 +12750,7 @@ set exts_sve2 {\n \"sme-f8f16\" \"sme-f8f32\"\n \"sme-b16b16\" \"sme-f16f16\" \"sme-i16i64\" \"sme\" \"sme2\" \"sme2p1\" \"sme2p2\"\n \"ssve-fp8dot2\" \"ssve-fp8dot4\" \"ssve-fp8fma\" \"sve-bfscale\"\n- \"sme-tmop\" \"ssve-bitperm\"\n+ \"sme-tmop\" \"ssve-fexpa\" \"ssve-bitperm\"\n }\n \n foreach { aarch64_ext } $exts {\n", "prefixes": [] }