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GET /api/patches/2231275/?format=api
{ "id": 2231275, "url": "http://patchwork.ozlabs.org/api/patches/2231275/?format=api", "web_url": "http://patchwork.ozlabs.org/project/uboot/patch/20260430113937.1274693-3-sjg@chromium.org/", "project": { "id": 18, "url": "http://patchwork.ozlabs.org/api/projects/18/?format=api", "name": "U-Boot", "link_name": "uboot", "list_id": "u-boot.lists.denx.de", "list_email": "u-boot@lists.denx.de", "web_url": null, "scm_url": null, "webscm_url": null, "list_archive_url": "", "list_archive_url_format": "", "commit_url_format": "" }, "msgid": "<20260430113937.1274693-3-sjg@chromium.org>", "list_archive_url": null, "date": "2026-04-30T11:38:34", "name": "[2/2] cros_ec: Sync ec_commands.h from upstream Chrome OS EC", "commit_ref": null, "pull_url": null, "state": "new", "archived": false, "hash": "fd0b4985d055522c7a92d3620980dcf526523838", "submitter": { "id": 6170, "url": "http://patchwork.ozlabs.org/api/people/6170/?format=api", "name": "Simon Glass", "email": "sjg@chromium.org" }, "delegate": { "id": 3651, "url": "http://patchwork.ozlabs.org/api/users/3651/?format=api", "username": "trini", "first_name": "Tom", "last_name": "Rini", "email": "trini@ti.com" }, "mbox": "http://patchwork.ozlabs.org/project/uboot/patch/20260430113937.1274693-3-sjg@chromium.org/mbox/", "series": [ { "id": 502283, "url": "http://patchwork.ozlabs.org/api/series/502283/?format=api", "web_url": "http://patchwork.ozlabs.org/project/uboot/list/?series=502283", "date": "2026-04-30T11:38:32", "name": "cros_ec: Sync with upstream Chrome OS EC", "version": 1, "mbox": "http://patchwork.ozlabs.org/series/502283/mbox/" } ], "comments": "http://patchwork.ozlabs.org/api/patches/2231275/comments/", "check": "pending", "checks": "http://patchwork.ozlabs.org/api/patches/2231275/checks/", "tags": {}, "related": [], "headers": { "Return-Path": "<u-boot-bounces@lists.denx.de>", "X-Original-To": "incoming@patchwork.ozlabs.org", "Delivered-To": "patchwork-incoming@legolas.ozlabs.org", "Authentication-Results": [ "legolas.ozlabs.org;\n\tdkim=pass (1024-bit key;\n unprotected) header.d=chromium.org header.i=@chromium.org header.a=rsa-sha256\n header.s=google header.b=V4m+9IsV;\n\tdkim-atps=neutral", "legolas.ozlabs.org;\n spf=pass (sender SPF authorized) smtp.mailfrom=lists.denx.de\n (client-ip=85.214.62.61; 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The new file makes\ntwo build assumptions that do not hold for U-Boot.\n\nIt gates '<linux/limits.h>' on '#ifdef __KERNEL__' for the Linux\nkernel. U-Boot also defines __KERNEL__ but has no <linux/limits.h>,\nand the file references no limits.h symbol; widen the gate with\n'!defined(__UBOOT__)'\n\nIt also hides '<stdint.h>' from __KERNEL__ builds, leaving UINT16_MAX\n(used by EC_RES_MAX) undefined for U-Boot; tighten the gate to\n'!defined(__KERNEL__) || defined(__UBOOT__)'\n\nAdapt callers to two interface changes. The 'ec_current_image' enum\ntag is now 'ec_image' (EC_IMAGE_* constants unchanged); rename it in\naffected files to match. The VBNV-context interface was dropped\nupstream, but it still used in lab Chromebooks; keep those constants and\nstructs in cros_ec.h\n\nSigned-off-by: Simon Glass <sjg@chromium.org>\n---\n\n cmd/cros_ec.c | 4 +-\n drivers/misc/cros_ec.c | 2 +-\n drivers/misc/cros_ec_sandbox.c | 2 +-\n include/cros_ec.h | 28 +-\n include/ec_commands.h | 7738 +++++++++++++++++++++++++-------\n 5 files changed, 6264 insertions(+), 1510 deletions(-)", "diff": "diff --git a/cmd/cros_ec.c b/cmd/cros_ec.c\nindex 7b60e415b6c..66a5f6d5210 100644\n--- a/cmd/cros_ec.c\n+++ b/cmd/cros_ec.c\n@@ -13,7 +13,7 @@\n #include <dm/device-internal.h>\n #include <dm/uclass-internal.h>\n \n-/* Note: depends on enum ec_current_image */\n+/* Note: depends on enum ec_image */\n static const char * const ec_current_image_name[] = {\"unknown\", \"RO\", \"RW\"};\n \n /**\n@@ -312,7 +312,7 @@ static int do_cros_ec(struct cmd_tbl *cmdtp, int flag, int argc,\n \t\tif (ret)\n \t\t\tprintf(\"Error: %d\\n\", ret);\n \t} else if (0 == strcmp(\"curimage\", cmd)) {\n-\t\tenum ec_current_image image;\n+\t\tenum ec_image image;\n \n \t\tif (cros_ec_read_current_image(dev, &image)) {\n \t\t\tdebug(\"%s: Could not read KBC image\\n\", __func__);\ndiff --git a/drivers/misc/cros_ec.c b/drivers/misc/cros_ec.c\nindex fabe4964a33..c3e647edfac 100644\n--- a/drivers/misc/cros_ec.c\n+++ b/drivers/misc/cros_ec.c\n@@ -487,7 +487,7 @@ int cros_ec_read_build_info(struct udevice *dev, char **strp)\n }\n \n int cros_ec_read_current_image(struct udevice *dev,\n-\t\t\t enum ec_current_image *image)\n+\t\t\t enum ec_image *image)\n {\n \tstruct ec_response_get_version *r;\n \ndiff --git a/drivers/misc/cros_ec_sandbox.c b/drivers/misc/cros_ec_sandbox.c\nindex 432b1fbb0c4..b82101edd47 100644\n--- a/drivers/misc/cros_ec_sandbox.c\n+++ b/drivers/misc/cros_ec_sandbox.c\n@@ -100,7 +100,7 @@ struct ec_state {\n \tstruct fdt_cros_ec ec_config;\n \tuint8_t *flash_data;\n \tint flash_data_len;\n-\tenum ec_current_image current_image;\n+\tenum ec_image current_image;\n \tint matrix_count;\n \tstruct ec_keymatrix_entry *matrix;\t/* the key matrix info */\n \tuint8_t keyscan[KEYBOARD_COLS];\ndiff --git a/include/cros_ec.h b/include/cros_ec.h\nindex 94c988a7d65..ccf64b5c185 100644\n--- a/include/cros_ec.h\n+++ b/include/cros_ec.h\n@@ -14,6 +14,32 @@\n #include <asm/gpio.h>\n #include <dm/of_extra.h>\n \n+/*\n+ * Verified-boot NVRAM context interface the EC exposes via\n+ * EC_CMD_VBNV_CONTEXT. Upstream cros_ec_commands.h dropped the\n+ * whole vbnvcontext machinery, so keep the constants and request /\n+ * response structs here for U-Boot. Both 'cros_ec vbnvcontext' and\n+ * cros_ec_{read,write}_vbnvcontext() depend on these.\n+ */\n+#define EC_CMD_VBNV_CONTEXT\t0x0017\n+#define EC_VER_VBNV_CONTEXT\t1\n+#define EC_VBNV_BLOCK_SIZE\t16\n+#define EC_VBNV_BLOCK_SIZE_V2\t64\n+\n+enum ec_vbnvcontext_op {\n+\tEC_VBNV_CONTEXT_OP_READ,\n+\tEC_VBNV_CONTEXT_OP_WRITE,\n+};\n+\n+struct __ec_align4 ec_params_vbnvcontext {\n+\tuint32_t op;\n+\tuint8_t block[EC_VBNV_BLOCK_SIZE_V2];\n+};\n+\n+struct __ec_align4 ec_response_vbnvcontext {\n+\tuint8_t block[EC_VBNV_BLOCK_SIZE_V2];\n+};\n+\n /* Our configuration information */\n struct cros_ec_dev {\n \tstruct udevice *dev;\t\t/* Transport device */\n@@ -101,7 +127,7 @@ int cros_ec_get_next_event(struct udevice *dev,\n * Return: 0 if ok, <0 on error\n */\n int cros_ec_read_current_image(struct udevice *dev,\n-\t\t\t enum ec_current_image *image);\n+\t\t\t enum ec_image *image);\n \n /**\n * Read the hash of the CROS-EC device firmware.\ndiff --git a/include/ec_commands.h b/include/ec_commands.h\nindex 23597d28b2c..b131aa0a414 100644\n--- a/include/ec_commands.h\n+++ b/include/ec_commands.h\n@@ -1,31 +1,91 @@\n-/* Copyright (c) 2018 The Chromium OS Authors. All rights reserved.\n+/* Copyright 2014 The ChromiumOS Authors\n * Use of this source code is governed by a BSD-style license that can be\n * found in the LICENSE file.\n */\n \n /* Host communication command constants for Chrome EC */\n \n-#ifndef __CROS_EC_COMMANDS_H\n-#define __CROS_EC_COMMANDS_H\n+#ifndef __CROS_EC_EC_COMMANDS_H\n+#define __CROS_EC_EC_COMMANDS_H\n \n+#if !defined(__ACPI__) && (!defined(__KERNEL__) || defined(__UBOOT__))\n+#include <stdint.h>\n+#endif\n+\n+#ifdef CHROMIUM_EC\n /*\n- * Protocol overview\n- *\n- * request: CMD [ P0 P1 P2 ... Pn S ]\n- * response: ERR [ P0 P1 P2 ... Pn S ]\n- *\n- * where the bytes are defined as follow :\n- * - CMD is the command code. (defined by EC_CMD_ constants)\n- * - ERR is the error code. (defined by EC_RES_ constants)\n- * - Px is the optional payload.\n- * it is not sent if the error code is not success.\n- * (defined by ec_params_ and ec_response_ structures)\n- * - S is the checksum which is the sum of all payload bytes.\n- *\n- * On LPC, CMD and ERR are sent/received at EC_LPC_ADDR_KERNEL|USER_CMD\n- * and the payloads are sent/received at EC_LPC_ADDR_KERNEL|USER_PARAM.\n- * On I2C, all bytes are sent serially in the same message.\n+ * CHROMIUM_EC is defined by the Makefile system of Chromium EC repository.\n+ * It is used to not include macros that may cause conflicts in foreign\n+ * projects (refer to crbug.com/984623).\n+ */\n+\n+/*\n+ * Include common.h for CONFIG_HOSTCMD_ALIGNED, if it's defined. This\n+ * generates more efficient code for accessing request/response structures on\n+ * ARM Cortex-M if the structures are guaranteed 32-bit aligned.\n+ */\n+#include \"common.h\"\n+#include \"compile_time_macros.h\"\n+\n+#else\n+/* If BUILD_ASSERT isn't already defined, make it a no-op */\n+#ifndef BUILD_ASSERT\n+#define BUILD_ASSERT(_cond)\n+#endif /* !BUILD_ASSERT */\n+#endif /* CHROMIUM_EC */\n+\n+#if defined(__KERNEL__) && !defined(__UBOOT__)\n+#include <linux/limits.h>\n+#else\n+/*\n+ * Defines macros that may be needed but are for sure defined by the linux\n+ * kernel. This section is removed when cros_ec_commands.h is generated (by\n+ * util/make_linux_ec_commands_h.sh).\n+ * cros_ec_commands.h looks more integrated to the kernel.\n+ */\n+\n+#ifndef BIT\n+#define BIT(nr) (1UL << (nr))\n+#endif\n+\n+#ifndef BIT_ULL\n+#define BIT_ULL(nr) (1ULL << (nr))\n+#endif\n+\n+/*\n+ * When building Zephyr, this file ends up being included before Zephyr's\n+ * include/sys/util.h so causes a warning there. We don't want to add an #ifdef\n+ * in that file since it won't be accepted upstream. So work around it here.\n+ */\n+#ifndef CONFIG_ZEPHYR\n+#ifndef GENMASK\n+#define GENMASK(h, l) (((BIT(h) << 1) - 1) ^ (BIT(l) - 1))\n+#endif\n+\n+#ifndef GENMASK_ULL\n+#define GENMASK_ULL(h, l) (((BIT_ULL(h) << 1) - 1) ^ (BIT_ULL(l) - 1))\n+#endif\n+#endif\n+\n+#endif /* __KERNEL__ */\n+\n+#ifdef __cplusplus\n+extern \"C\" {\n+#endif\n+\n+/**\n+ * Constant for creation of flexible array members that work in both C and\n+ * C++. Flexible array members were added in C99 and are not part of the C++\n+ * standard. However, clang++ supports them for C++.\n+ * When compiling with gcc, flexible array members are not allowed to appear\n+ * in an otherwise empty struct, so we use the GCC zero-length array\n+ * extension that works with both clang/gcc/g++.\n */\n+#if defined(__cplusplus) && defined(__clang__)\n+#define FLEXIBLE_ARRAY_MEMBER_SIZE\n+#else\n+#define FLEXIBLE_ARRAY_MEMBER_SIZE 0\n+#endif\n \n /*\n * Current version of this protocol\n@@ -34,91 +94,111 @@\n * determined in other ways. Remove this once the kernel code no longer\n * depends on it.\n */\n-#define EC_PROTO_VERSION 0x00000002\n+#define EC_PROTO_VERSION 0x00000002\n \n /* Command version mask */\n-#define EC_VER_MASK(version) (1UL << (version))\n+#define EC_VER_MASK(version) BIT(version)\n \n /* I/O addresses for ACPI commands */\n-#define EC_LPC_ADDR_ACPI_DATA 0x62\n-#define EC_LPC_ADDR_ACPI_CMD 0x66\n+#define EC_LPC_ADDR_ACPI_DATA 0x62\n+#define EC_LPC_ADDR_ACPI_CMD 0x66\n \n /* I/O addresses for host command */\n-#define EC_LPC_ADDR_HOST_DATA 0x200\n-#define EC_LPC_ADDR_HOST_CMD 0x204\n+#define EC_LPC_ADDR_HOST_DATA 0x200\n+#define EC_LPC_ADDR_HOST_CMD 0x204\n \n /* I/O addresses for host command args and params */\n /* Protocol version 2 */\n-#define EC_LPC_ADDR_HOST_ARGS 0x800 /* And 0x801, 0x802, 0x803 */\n-#define EC_LPC_ADDR_HOST_PARAM 0x804 /* For version 2 params; size is\n-\t\t\t\t\t * EC_PROTO2_MAX_PARAM_SIZE */\n+#define EC_LPC_ADDR_HOST_ARGS 0x800 /* And 0x801, 0x802, 0x803 */\n+/* For version 2 params; size is EC_PROTO2_MAX_PARAM_SIZE */\n+#define EC_LPC_ADDR_HOST_PARAM 0x804\n+\n /* Protocol version 3 */\n-#define EC_LPC_ADDR_HOST_PACKET 0x800 /* Offset of version 3 packet */\n-#define EC_LPC_HOST_PACKET_SIZE 0x100 /* Max size of version 3 packet */\n+#define EC_LPC_ADDR_HOST_PACKET 0x800 /* Offset of version 3 packet */\n+#define EC_LPC_HOST_PACKET_SIZE 0x100 /* Max size of version 3 packet */\n \n-/* The actual block is 0x800-0x8ff, but some BIOSes think it's 0x880-0x8ff\n- * and they tell the kernel that so we have to think of it as two parts. */\n-#define EC_HOST_CMD_REGION0 0x800\n-#define EC_HOST_CMD_REGION1 0x880\n+/*\n+ * The actual block is 0x800-0x8ff, but some BIOSes think it's 0x880-0x8ff\n+ * and they tell the kernel that so we have to think of it as two parts.\n+ *\n+ * Other BIOSes report only the I/O port region spanned by the Microchip\n+ * MEC series EC; an attempt to address a larger region may fail.\n+ */\n+#define EC_HOST_CMD_REGION0 0x800\n+#define EC_HOST_CMD_REGION1 0x880\n #define EC_HOST_CMD_REGION_SIZE 0x80\n+#define EC_HOST_CMD_MEC_REGION_SIZE 0x8\n \n /* EC command register bit functions */\n-#define EC_LPC_CMDR_DATA\t(1 << 0) /* Data ready for host to read */\n-#define EC_LPC_CMDR_PENDING\t(1 << 1) /* Write pending to EC */\n-#define EC_LPC_CMDR_BUSY\t(1 << 2) /* EC is busy processing a command */\n-#define EC_LPC_CMDR_CMD\t\t(1 << 3) /* Last host write was a command */\n-#define EC_LPC_CMDR_ACPI_BRST\t(1 << 4) /* Burst mode (not used) */\n-#define EC_LPC_CMDR_SCI\t\t(1 << 5) /* SCI event is pending */\n-#define EC_LPC_CMDR_SMI\t\t(1 << 6) /* SMI event is pending */\n-\n-/* MEC uses 0x800/0x804 as register/index pair, thus an 8-byte resource */\n-#define MEC_EMI_BASE\t\t0x800\n-#define MEC_EMI_SIZE\t\t8\n-\n-#define EC_LPC_ADDR_MEMMAP 0x900\n-#define EC_MEMMAP_SIZE 255 /* ACPI IO buffer max is 255 bytes */\n-#define EC_MEMMAP_TEXT_MAX 8 /* Size of a string in the memory map */\n+#define EC_LPC_CMDR_DATA BIT(0) /* Data ready for host to read */\n+#define EC_LPC_CMDR_PENDING BIT(1) /* Write pending to EC */\n+#define EC_LPC_CMDR_BUSY BIT(2) /* EC is busy processing a command */\n+#define EC_LPC_CMDR_CMD BIT(3) /* Last host write was a command */\n+#define EC_LPC_CMDR_ACPI_BRST BIT(4) /* Burst mode (not used) */\n+#define EC_LPC_CMDR_SCI BIT(5) /* SCI event is pending */\n+#define EC_LPC_CMDR_SMI BIT(6) /* SMI event is pending */\n+\n+#define EC_LPC_ADDR_MEMMAP 0x900\n+#define EC_MEMMAP_SIZE 255 /* ACPI IO buffer max is 255 bytes */\n+#define EC_MEMMAP_TEXT_MAX 8 /* Size of a string in the memory map */\n+\n+#define EC_LPC_ADDR_MEMMAP_INDEXED_IO 0x380\n \n /* The offset address of each type of data in mapped memory. */\n-#define EC_MEMMAP_TEMP_SENSOR 0x00 /* Temp sensors 0x00 - 0x0f */\n-#define EC_MEMMAP_FAN 0x10 /* Fan speeds 0x10 - 0x17 */\n-#define EC_MEMMAP_TEMP_SENSOR_B 0x18 /* More temp sensors 0x18 - 0x1f */\n-#define EC_MEMMAP_ID 0x20 /* 0x20 == 'E', 0x21 == 'C' */\n-#define EC_MEMMAP_ID_VERSION 0x22 /* Version of data in 0x20 - 0x2f */\n-#define EC_MEMMAP_THERMAL_VERSION 0x23 /* Version of data in 0x00 - 0x1f */\n-#define EC_MEMMAP_BATTERY_VERSION 0x24 /* Version of data in 0x40 - 0x7f */\n+#define EC_MEMMAP_TEMP_SENSOR 0x00 /* Temp sensors 0x00 - 0x0f */\n+#define EC_MEMMAP_FAN 0x10 /* Fan speeds 0x10 - 0x17 */\n+#define EC_MEMMAP_TEMP_SENSOR_B 0x18 /* More temp sensors 0x18 - 0x1f */\n+#define EC_MEMMAP_ID 0x20 /* 0x20 == 'E', 0x21 == 'C' */\n+#define EC_MEMMAP_ID_VERSION 0x22 /* Version of data in 0x20 - 0x2f */\n+#define EC_MEMMAP_THERMAL_VERSION 0x23 /* Version of data in 0x00 - 0x1f */\n+#define EC_MEMMAP_BATTERY_VERSION 0x24 /* Version of data in 0x40 - 0x7f */\n #define EC_MEMMAP_SWITCHES_VERSION 0x25 /* Version of data in 0x30 - 0x33 */\n-#define EC_MEMMAP_EVENTS_VERSION 0x26 /* Version of data in 0x34 - 0x3f */\n-#define EC_MEMMAP_HOST_CMD_FLAGS 0x27 /* Host cmd interface flags (8 bits) */\n+#define EC_MEMMAP_EVENTS_VERSION 0x26 /* Version of data in 0x34 - 0x3f */\n+#define EC_MEMMAP_HOST_CMD_FLAGS 0x27 /* Host cmd interface flags (8 bits) */\n /* Unused 0x28 - 0x2f */\n-#define EC_MEMMAP_SWITCHES 0x30\t/* 8 bits */\n+#define EC_MEMMAP_SWITCHES 0x30 /* 8 bits */\n /* Unused 0x31 - 0x33 */\n-#define EC_MEMMAP_HOST_EVENTS 0x34 /* 32 bits */\n-/* Reserve 0x38 - 0x3f for additional host event-related stuff */\n-/* Battery values are all 32 bits */\n-#define EC_MEMMAP_BATT_VOLT 0x40 /* Battery Present Voltage */\n-#define EC_MEMMAP_BATT_RATE 0x44 /* Battery Present Rate */\n-#define EC_MEMMAP_BATT_CAP 0x48 /* Battery Remaining Capacity */\n-#define EC_MEMMAP_BATT_FLAG 0x4c /* Battery State, defined below */\n-#define EC_MEMMAP_BATT_DCAP 0x50 /* Battery Design Capacity */\n-#define EC_MEMMAP_BATT_DVLT 0x54 /* Battery Design Voltage */\n-#define EC_MEMMAP_BATT_LFCC 0x58 /* Battery Last Full Charge Capacity */\n-#define EC_MEMMAP_BATT_CCNT 0x5c /* Battery Cycle Count */\n+#define EC_MEMMAP_HOST_EVENTS 0x34 /* 64 bits */\n+/* Battery values are all 32 bits, unless otherwise noted. */\n+#define EC_MEMMAP_BATT_VOLT 0x40 /* Battery Present Voltage */\n+#define EC_MEMMAP_BATT_RATE 0x44 /* Battery Present Rate */\n+#define EC_MEMMAP_BATT_CAP 0x48 /* Battery Remaining Capacity */\n+#define EC_MEMMAP_BATT_FLAG 0x4c /* Battery State, see below (8-bit) */\n+#define EC_MEMMAP_BATT_COUNT 0x4d /* Battery Count (8-bit) */\n+#define EC_MEMMAP_BATT_INDEX 0x4e /* Current Battery Data Index (8-bit) */\n+/* Unused 0x4f */\n+#define EC_MEMMAP_BATT_DCAP 0x50 /* Battery Design Capacity */\n+#define EC_MEMMAP_BATT_DVLT 0x54 /* Battery Design Voltage */\n+#define EC_MEMMAP_BATT_LFCC 0x58 /* Battery Last Full Charge Capacity */\n+#define EC_MEMMAP_BATT_CCNT 0x5c /* Battery Cycle Count */\n /* Strings are all 8 bytes (EC_MEMMAP_TEXT_MAX) */\n-#define EC_MEMMAP_BATT_MFGR 0x60 /* Battery Manufacturer String */\n-#define EC_MEMMAP_BATT_MODEL 0x68 /* Battery Model Number String */\n-#define EC_MEMMAP_BATT_SERIAL 0x70 /* Battery Serial Number String */\n-#define EC_MEMMAP_BATT_TYPE 0x78 /* Battery Type String */\n-#define EC_MEMMAP_ALS 0x80 /* ALS readings in lux (2 X 16 bits) */\n+#define EC_MEMMAP_BATT_MFGR 0x60 /* Battery Manufacturer String */\n+#define EC_MEMMAP_BATT_MODEL 0x68 /* Battery Model Number String */\n+#define EC_MEMMAP_BATT_SERIAL 0x70 /* Battery Serial Number String */\n+#define EC_MEMMAP_BATT_TYPE 0x78 /* Battery Type String */\n+#define EC_MEMMAP_ALS 0x80 /* ALS readings in lux (2 X 16 bits) */\n /* Unused 0x84 - 0x8f */\n-#define EC_MEMMAP_ACC_STATUS 0x90 /* Accelerometer status (8 bits )*/\n+#define EC_MEMMAP_ACC_STATUS 0x90 /* Accelerometer status (8 bits )*/\n /* Unused 0x91 */\n-#define EC_MEMMAP_ACC_DATA 0x92 /* Accelerometers data 0x92 - 0x9f */\n+#define EC_MEMMAP_ACC_DATA 0x92 /* Accelerometers data 0x92 - 0x9f */\n /* 0x92: Lid Angle if available, LID_ANGLE_UNRELIABLE otherwise */\n /* 0x94 - 0x99: 1st Accelerometer */\n /* 0x9a - 0x9f: 2nd Accelerometer */\n-#define EC_MEMMAP_GYRO_DATA 0xa0 /* Gyroscope data 0xa0 - 0xa5 */\n-/* Unused 0xa6 - 0xdf */\n+\n+#define EC_MEMMAP_GYRO_DATA 0xa0 /* Gyroscope data 0xa0 - 0xa5 */\n+#define EC_MEMMAP_GPU 0xa6 /* GPU-specific, 8 bits */\n+\n+/*\n+ * Bit fields for EC_MEMMAP_GPU\n+ * 0:2: D-Notify level (0:D1, ... 4:D5)\n+ * 3: Over temperature\n+ */\n+#define EC_MEMMAP_GPU_D_NOTIFY_MASK GENMASK(2, 0)\n+#define EC_MEMMAP_GPU_OVERT_BIT BIT(3)\n+\n+/* Power Participant related components */\n+#define EC_MEMMAP_PWR_SRC 0xa7 /* Power source (8-bit) */\n+/* Unused 0xa8 - 0xdf */\n \n /*\n * ACPI is unable to access memory mapped data at or above this offset due to\n@@ -128,76 +208,101 @@\n #define EC_MEMMAP_NO_ACPI 0xe0\n \n /* Define the format of the accelerometer mapped memory status byte. */\n-#define EC_MEMMAP_ACC_STATUS_SAMPLE_ID_MASK 0x0f\n-#define EC_MEMMAP_ACC_STATUS_BUSY_BIT (1 << 4)\n-#define EC_MEMMAP_ACC_STATUS_PRESENCE_BIT (1 << 7)\n+#define EC_MEMMAP_ACC_STATUS_SAMPLE_ID_MASK 0x0f\n+#define EC_MEMMAP_ACC_STATUS_BUSY_BIT BIT(4)\n+#define EC_MEMMAP_ACC_STATUS_PRESENCE_BIT BIT(7)\n \n /* Number of temp sensors at EC_MEMMAP_TEMP_SENSOR */\n-#define EC_TEMP_SENSOR_ENTRIES 16\n+#define EC_TEMP_SENSOR_ENTRIES 16\n /*\n * Number of temp sensors at EC_MEMMAP_TEMP_SENSOR_B.\n *\n * Valid only if EC_MEMMAP_THERMAL_VERSION returns >= 2.\n */\n-#define EC_TEMP_SENSOR_B_ENTRIES 8\n+#define EC_TEMP_SENSOR_B_ENTRIES 8\n+\n+/* Max temp sensor entries for host commands */\n+#define EC_MAX_TEMP_SENSOR_ENTRIES \\\n+\t(EC_TEMP_SENSOR_ENTRIES + EC_TEMP_SENSOR_B_ENTRIES)\n \n /* Special values for mapped temperature sensors */\n-#define EC_TEMP_SENSOR_NOT_PRESENT 0xff\n-#define EC_TEMP_SENSOR_ERROR 0xfe\n-#define EC_TEMP_SENSOR_NOT_POWERED 0xfd\n+#define EC_TEMP_SENSOR_NOT_PRESENT 0xff\n+#define EC_TEMP_SENSOR_ERROR 0xfe\n+#define EC_TEMP_SENSOR_NOT_POWERED 0xfd\n #define EC_TEMP_SENSOR_NOT_CALIBRATED 0xfc\n /*\n * The offset of temperature value stored in mapped memory. This allows\n * reporting a temperature range of 200K to 454K = -73C to 181C.\n */\n-#define EC_TEMP_SENSOR_OFFSET 200\n+#define EC_TEMP_SENSOR_OFFSET 200\n \n /*\n * Number of ALS readings at EC_MEMMAP_ALS\n */\n-#define EC_ALS_ENTRIES 2\n+#define EC_ALS_ENTRIES 2\n \n /*\n * The default value a temperature sensor will return when it is present but\n * has not been read this boot. This is a reasonable number to avoid\n * triggering alarms on the host.\n */\n-#define EC_TEMP_SENSOR_DEFAULT (296 - EC_TEMP_SENSOR_OFFSET)\n+#define EC_TEMP_SENSOR_DEFAULT (296 - EC_TEMP_SENSOR_OFFSET)\n+\n+#define EC_FAN_SPEED_ENTRIES 4 /* Number of fans at EC_MEMMAP_FAN */\n+#define EC_FAN_SPEED_NOT_PRESENT 0xffff /* Entry not present */\n \n-#define EC_FAN_SPEED_ENTRIES 4 /* Number of fans at EC_MEMMAP_FAN */\n-#define EC_FAN_SPEED_NOT_PRESENT 0xffff /* Entry not present */\n-#define EC_FAN_SPEED_STALLED 0xfffe /* Fan stalled */\n+/* Report 0 for fan stalled so userspace applications can take\n+ * an appropriate action based on this value to control the fan.\n+ */\n+#define EC_FAN_SPEED_STALLED 0x0\n+/* This should be used only for ectool to support old ECs. */\n+#define EC_FAN_SPEED_STALLED_DEPRECATED 0xfffe\n \n /* Battery bit flags at EC_MEMMAP_BATT_FLAG. */\n-#define EC_BATT_FLAG_AC_PRESENT 0x01\n+#define EC_BATT_FLAG_AC_PRESENT 0x01\n #define EC_BATT_FLAG_BATT_PRESENT 0x02\n-#define EC_BATT_FLAG_DISCHARGING 0x04\n-#define EC_BATT_FLAG_CHARGING 0x08\n+#define EC_BATT_FLAG_DISCHARGING 0x04\n+#define EC_BATT_FLAG_CHARGING 0x08\n #define EC_BATT_FLAG_LEVEL_CRITICAL 0x10\n+/* Set if some of the static/dynamic data is invalid (or outdated). */\n+#define EC_BATT_FLAG_INVALID_DATA 0x20\n+#define EC_BATT_FLAG_CUT_OFF 0x40\n+\n+/*\n+ * Value written to EC_MEMMAP_BATT_DCAP, EC_MEMMAP_BATT_DVLT, EC_MEMMAP_CCNT,\n+ * EC_MEMMAP_BATT_VOLT, EC_MEMMAP_BATT_RATE, EC_MEMMAP_BATT_CAP, and\n+ * EC_MEMMAP_BATT_LFCC if the actual value is unknown.\n+ *\n+ * This corresponds with the unknown value specified by ACPI release 6.5\n+ * Section 10.2.2 (and earlier versions), to match expectations of ACPI\n+ * firmware.\n+ */\n+#define EC_MEMMAP_BATT_UNKNOWN_VALUE (-1)\n \n /* Switch flags at EC_MEMMAP_SWITCHES */\n-#define EC_SWITCH_LID_OPEN 0x01\n-#define EC_SWITCH_POWER_BUTTON_PRESSED 0x02\n-#define EC_SWITCH_WRITE_PROTECT_DISABLED 0x04\n+#define EC_SWITCH_LID_OPEN 0x01\n+#define EC_SWITCH_POWER_BUTTON_PRESSED 0x02\n+/* Was write protect disabled; now unused. */\n+#define EC_SWITCH_IGNORE2 0x04\n /* Was recovery requested via keyboard; now unused. */\n-#define EC_SWITCH_IGNORE1\t\t 0x08\n+#define EC_SWITCH_IGNORE1 0x08\n /* Recovery requested via dedicated signal (from servo board) */\n-#define EC_SWITCH_DEDICATED_RECOVERY 0x10\n+#define EC_SWITCH_DEDICATED_RECOVERY 0x10\n /* Was fake developer mode switch; now unused. Remove in next refactor. */\n-#define EC_SWITCH_IGNORE0 0x20\n+#define EC_SWITCH_IGNORE0 0x20\n \n /* Host command interface flags */\n /* Host command interface supports LPC args (LPC interface only) */\n-#define EC_HOST_CMD_FLAG_LPC_ARGS_SUPPORTED 0x01\n+#define EC_HOST_CMD_FLAG_LPC_ARGS_SUPPORTED 0x01\n /* Host command interface supports version 3 protocol */\n-#define EC_HOST_CMD_FLAG_VERSION_3 0x02\n+#define EC_HOST_CMD_FLAG_VERSION_3 0x02\n \n /* Wireless switch flags */\n-#define EC_WIRELESS_SWITCH_ALL ~0x00 /* All flags */\n-#define EC_WIRELESS_SWITCH_WLAN 0x01 /* WLAN radio */\n-#define EC_WIRELESS_SWITCH_BLUETOOTH 0x02 /* Bluetooth radio */\n-#define EC_WIRELESS_SWITCH_WWAN 0x04 /* WWAN power */\n-#define EC_WIRELESS_SWITCH_WLAN_POWER 0x08 /* WLAN power */\n+#define EC_WIRELESS_SWITCH_ALL ~0x00 /* All flags */\n+#define EC_WIRELESS_SWITCH_WLAN 0x01 /* WLAN radio */\n+#define EC_WIRELESS_SWITCH_BLUETOOTH 0x02 /* Bluetooth radio */\n+#define EC_WIRELESS_SWITCH_WWAN 0x04 /* WWAN power */\n+#define EC_WIRELESS_SWITCH_WLAN_POWER 0x08 /* WLAN power */\n \n /*****************************************************************************/\n /*\n@@ -265,19 +370,19 @@\n /* Valid addresses in ACPI memory space, for read/write commands */\n \n /* Memory space version; set to EC_ACPI_MEM_VERSION_CURRENT */\n-#define EC_ACPI_MEM_VERSION 0x00\n+#define EC_ACPI_MEM_VERSION 0x00\n /*\n * Test location; writing value here updates test compliment byte to (0xff -\n * value).\n */\n-#define EC_ACPI_MEM_TEST 0x01\n+#define EC_ACPI_MEM_TEST 0x01\n /* Test compliment; writes here are ignored. */\n-#define EC_ACPI_MEM_TEST_COMPLIMENT 0x02\n+#define EC_ACPI_MEM_TEST_COMPLIMENT 0x02\n \n /* Keyboard backlight brightness percent (0 - 100) */\n #define EC_ACPI_MEM_KEYBOARD_BACKLIGHT 0x03\n /* DPTF Target Fan Duty (0-100, 0xff for auto/none) */\n-#define EC_ACPI_MEM_FAN_DUTY 0x04\n+#define EC_ACPI_MEM_FAN_DUTY 0x04\n \n /*\n * DPTF temp thresholds. Any of the EC's temp sensors can have up to two\n@@ -294,17 +399,17 @@\n * have tripped\". Setting or enabling the thresholds for a sensor will clear\n * the unread event count for that sensor.\n */\n-#define EC_ACPI_MEM_TEMP_ID 0x05\n-#define EC_ACPI_MEM_TEMP_THRESHOLD 0x06\n-#define EC_ACPI_MEM_TEMP_COMMIT 0x07\n+#define EC_ACPI_MEM_TEMP_ID 0x05\n+#define EC_ACPI_MEM_TEMP_THRESHOLD 0x06\n+#define EC_ACPI_MEM_TEMP_COMMIT 0x07\n /*\n * Here are the bits for the COMMIT register:\n * bit 0 selects the threshold index for the chosen sensor (0/1)\n * bit 1 enables/disables the selected threshold (0 = off, 1 = on)\n * Each write to the commit register affects one threshold.\n */\n-#define EC_ACPI_MEM_TEMP_COMMIT_SELECT_MASK (1 << 0)\n-#define EC_ACPI_MEM_TEMP_COMMIT_ENABLE_MASK (1 << 1)\n+#define EC_ACPI_MEM_TEMP_COMMIT_SELECT_MASK BIT(0)\n+#define EC_ACPI_MEM_TEMP_COMMIT_ENABLE_MASK BIT(1)\n /*\n * Example:\n *\n@@ -321,26 +426,179 @@\n */\n \n /* DPTF battery charging current limit */\n-#define EC_ACPI_MEM_CHARGING_LIMIT 0x08\n+#define EC_ACPI_MEM_CHARGING_LIMIT 0x08\n \n /* Charging limit is specified in 64 mA steps */\n-#define EC_ACPI_MEM_CHARGING_LIMIT_STEP_MA 64\n+#define EC_ACPI_MEM_CHARGING_LIMIT_STEP_MA 64\n /* Value to disable DPTF battery charging limit */\n-#define EC_ACPI_MEM_CHARGING_LIMIT_DISABLED 0xff\n+#define EC_ACPI_MEM_CHARGING_LIMIT_DISABLED 0xff\n \n /*\n * Report device orientation\n- * bit 0 device is tablet mode\n+ * Bits Definition\n+ * 4 Off Body/On Body status: 0 = Off Body.\n+ * 3:1 Device DPTF Profile Number (DDPN)\n+ * 0 = Reserved for backward compatibility (indicates no valid\n+ * profile number. Host should fall back to using TBMD).\n+ * 1..7 = DPTF Profile number to indicate to host which table needs\n+ * to be loaded.\n+ * 0 Tablet Mode Device Indicator (TBMD)\n */\n #define EC_ACPI_MEM_DEVICE_ORIENTATION 0x09\n-#define EC_ACPI_MEM_DEVICE_TABLET_MODE 0x01\n+#define EC_ACPI_MEM_TBMD_SHIFT 0\n+#define EC_ACPI_MEM_TBMD_MASK 0x1\n+#define EC_ACPI_MEM_DDPN_SHIFT 1\n+#define EC_ACPI_MEM_DDPN_MASK 0x7\n+#define EC_ACPI_MEM_STTB_SHIFT 4\n+#define EC_ACPI_MEM_STTB_MASK 0x1\n+\n+/*\n+ * Report device features. Uses the same format as the host command, except:\n+ *\n+ * bit 0 (EC_FEATURE_LIMITED) changes meaning from \"EC code has a limited set\n+ * of features\", which is of limited interest when the system is already\n+ * interpreting ACPI bytecode, to \"EC_FEATURES[0-7] is not supported\". Since\n+ * these are supported, it defaults to 0.\n+ * This allows detecting the presence of this field since older versions of\n+ * the EC codebase would simply return 0xff to that unknown address. Check\n+ * FEATURES0 != 0xff (or FEATURES0[0] == 0) to make sure that the other bits\n+ * are valid.\n+ */\n+#define EC_ACPI_MEM_DEVICE_FEATURES0 0x0a\n+#define EC_ACPI_MEM_DEVICE_FEATURES1 0x0b\n+#define EC_ACPI_MEM_DEVICE_FEATURES2 0x0c\n+#define EC_ACPI_MEM_DEVICE_FEATURES3 0x0d\n+#define EC_ACPI_MEM_DEVICE_FEATURES4 0x0e\n+#define EC_ACPI_MEM_DEVICE_FEATURES5 0x0f\n+#define EC_ACPI_MEM_DEVICE_FEATURES6 0x10\n+#define EC_ACPI_MEM_DEVICE_FEATURES7 0x11\n+\n+#define EC_ACPI_MEM_BATTERY_INDEX 0x12\n+\n+/*\n+ * USB Port Power. Each bit indicates whether the corresponding USB ports' power\n+ * is enabled (1) or disabled (0).\n+ * bit 0 USB port ID 0\n+ * ...\n+ * bit 7 USB port ID 7\n+ */\n+#define EC_ACPI_MEM_USB_PORT_POWER 0x13\n+\n+/*\n+ * USB Retimer firmware update.\n+ * Read:\n+ * Result of last operation AP requested\n+ * Write:\n+ * bits[3:0]: USB-C port number\n+ * bits[7:4]: Operation requested by AP\n+ *\n+ * NDA (no device attached) case:\n+ * To update retimer firmware, AP needs set up TBT Alt mode.\n+ * AP requests operations in this sequence:\n+ * 1. Get port information about which ports support retimer firmware update.\n+ * In the query result, each bit represents one port.\n+ * 2. Get current MUX mode, it's NDA.\n+ * 3. Suspend specified PD port's task.\n+ * 4. AP requests EC to enter USB mode -> enter Safe mode -> enter TBT mode ->\n+ * update firmware -> disconnect MUX -> resume PD task.\n+ *\n+ * DA (device attached) cases:\n+ * Retimer firmware update is not supported in DA cases.\n+ * 1. Get port information about which ports support retimer firmware update\n+ * 2. Get current MUX mode, it's DA.\n+ * 3. AP continues. No more retimer firmware update activities.\n+ *\n+ */\n+#define EC_ACPI_MEM_USB_RETIMER_FW_UPDATE 0x14\n+\n+#define USB_RETIMER_FW_UPDATE_OP_SHIFT 4\n+#define USB_RETIMER_FW_UPDATE_ERR 0xfe\n+#define USB_RETIMER_FW_UPDATE_INVALID_MUX 0xff\n+/* Mask to clear unused MUX bits in retimer firmware update */\n+#define USB_RETIMER_FW_UPDATE_MUX_MASK \\\n+\t(USB_PD_MUX_USB_ENABLED | USB_PD_MUX_DP_ENABLED | \\\n+\t USB_PD_MUX_SAFE_MODE | USB_PD_MUX_TBT_COMPAT_ENABLED | \\\n+\t USB_PD_MUX_USB4_ENABLED)\n+\n+/* Retimer firmware update operations */\n+#define USB_RETIMER_FW_UPDATE_QUERY_PORT 0 /* Which ports has retimer */\n+#define USB_RETIMER_FW_UPDATE_SUSPEND_PD 1 /* Suspend PD port */\n+#define USB_RETIMER_FW_UPDATE_RESUME_PD 2 /* Resume PD port */\n+#define USB_RETIMER_FW_UPDATE_GET_MUX 3 /* Read current USB MUX */\n+#define USB_RETIMER_FW_UPDATE_SET_USB 4 /* Set MUX to USB mode */\n+#define USB_RETIMER_FW_UPDATE_SET_SAFE 5 /* Set MUX to Safe mode */\n+#define USB_RETIMER_FW_UPDATE_SET_TBT 6 /* Set MUX to TBT mode */\n+#define USB_RETIMER_FW_UPDATE_DISCONNECT 7 /* Set MUX to disconnect */\n+\n+#define EC_ACPI_MEM_USB_RETIMER_PORT(x) ((x) & 0x0f)\n+#define EC_ACPI_MEM_USB_RETIMER_OP(x) \\\n+\t(((x) & 0xf0) >> USB_RETIMER_FW_UPDATE_OP_SHIFT)\n+\n+/*\n+ * Offset 0x15 is reserved for PBOK, added to coreboot in\n+ * https://crrev.com/c/3840943 and proposed for inclusion here\n+ * in https://crrev.com/c/3547317.\n+ */\n+\n+/*\n+ * Get extended strings from the EC.\n+ * Write:\n+ * String index, or 0 to probe for EC support.\n+ * Read:\n+ * String bytes, following by repeating null bytes.\n+ *\n+ * Writing a byte (EC_ACPI_MEM_STRINGS_FIFO_ID_*) selects a string, and the\n+ * following reads return the non-null bytes of the string in sequence until\n+ * the end of the string is reached. After the end of the string, reads 0 until\n+ * another byte is written. This interface allows ACPI firmware to read longer\n+ * strings from the EC than can reasonably fit into the shared memory region.\n+ *\n+ * To probe for EC support, write FIFO_ID_VERSION and read will return at least\n+ * one nonzero (MEM_STRINGS_FIFO_V1 for example) if MEM_STRINGS_FIFO is\n+ * supported. Returned values will indicate which strings are supported. If the\n+ * first byte is 0xff, the strings FIFO is unsupported.\n+ */\n+#define EC_ACPI_MEM_STRINGS_FIFO 0x16\n+\n+/* String index to probe EC support. */\n+#define EC_ACPI_MEM_STRINGS_FIFO_ID_VERSION 0\n+#define EC_ACPI_MEM_STRINGS_FIFO_V1 1\n+/*\n+ * 0xff is the value the EC returns for unimplemented reads, indicating\n+ * the current EC firmware does not implement this command.\n+ */\n+#define EC_ACPI_MEM_STRINGS_FIFO_UNSUPPORTED 0xff\n+\n+/*\n+ * Battery model number for the selected battery. Supported since V1.\n+ * Presents the same data as EC_MEMMAP_BATT_MODEL, but can provide more\n+ * than 8 bytes.\n+ *\n+ * This and the other FIFO_ID_BATTERY strings can select one of multiple\n+ * batteries by changing the value at EC_MEMMAP_BATT_INDEX. Once that index\n+ * is changed, reads of these strings will return information for the\n+ * corresponding battery, if present.\n+ */\n+#define EC_ACPI_MEM_STRINGS_FIFO_ID_BATTERY_MODEL 1\n+/*\n+ * Battery serial number for the selected battery. Supported since V1.\n+ * Presents the same data as EC_MEMMAP_BATT_SERIAL, but can provide more\n+ * than 8 bytes.\n+ */\n+#define EC_ACPI_MEM_STRINGS_FIFO_ID_BATTERY_SERIAL 2\n+/*\n+ * Battery manufacturer for the selected battery. Supported since V1.\n+ * Presents the same data as EC_MEMMAP_BATT_MFGR, but can provide more\n+ * than 8 bytes.\n+ */\n+#define EC_ACPI_MEM_STRINGS_FIFO_ID_BATTERY_MANUFACTURER 3\n \n /*\n * ACPI addresses 0x20 - 0xff map to EC_MEMMAP offset 0x00 - 0xdf. This data\n * is read-only from the AP. Added in EC_ACPI_MEM_VERSION 2.\n */\n-#define EC_ACPI_MEM_MAPPED_BEGIN 0x20\n-#define EC_ACPI_MEM_MAPPED_SIZE 0xe0\n+#define EC_ACPI_MEM_MAPPED_BEGIN 0x20\n+#define EC_ACPI_MEM_MAPPED_SIZE 0xe0\n \n /* Current version of ACPI memory address space */\n #define EC_ACPI_MEM_VERSION_CURRENT 2\n@@ -352,6 +610,7 @@\n */\n #ifndef __ACPI__\n \n+#ifndef __KERNEL__\n /*\n * Define __packed if someone hasn't beat us to it. Linux kernel style\n * checking prefers __packed over __attribute__((packed)).\n@@ -363,6 +622,7 @@\n #ifndef __aligned\n #define __aligned(x) __attribute__((aligned(x)))\n #endif\n+#endif /* __KERNEL__ */\n \n /*\n * Attributes for EC request and response packets. Just defining __packed\n@@ -376,7 +636,7 @@\n * parent structure that the alignment will still be true given the packing of\n * the parent structure. This is particularly important if the sub-structure\n * will be passed as a pointer to another function, since that function will\n- * not know about the misaligment caused by the parent structure's packing.\n+ * not know about the misalignment caused by the parent structure's packing.\n *\n * Also be very careful using __packed - particularly when nesting non-packed\n * structures inside packed ones. In fact, DO NOT use __packed directly;\n@@ -429,7 +689,7 @@\n #define __ec_todo_packed __packed\n #define __ec_todo_unpacked\n \n-#else /* !CONFIG_HOSTCMD_ALIGNED */\n+#else /* !CONFIG_HOSTCMD_ALIGNED */\n \n /*\n * Packed structures make no assumption about alignment, so they do inefficient\n@@ -444,25 +704,25 @@\n #define __ec_todo_packed __packed\n #define __ec_todo_unpacked\n \n-#endif /* !CONFIG_HOSTCMD_ALIGNED */\n+#endif /* !CONFIG_HOSTCMD_ALIGNED */\n \n /* LPC command status byte masks */\n /* EC has written a byte in the data register and host hasn't read it yet */\n-#define EC_LPC_STATUS_TO_HOST 0x01\n+#define EC_LPC_STATUS_TO_HOST 0x01\n /* Host has written a command/data byte and the EC hasn't read it yet */\n-#define EC_LPC_STATUS_FROM_HOST 0x02\n+#define EC_LPC_STATUS_FROM_HOST 0x02\n /* EC is processing a command */\n-#define EC_LPC_STATUS_PROCESSING 0x04\n+#define EC_LPC_STATUS_PROCESSING 0x04\n /* Last write to EC was a command, not data */\n-#define EC_LPC_STATUS_LAST_CMD 0x08\n+#define EC_LPC_STATUS_LAST_CMD 0x08\n /* EC is in burst mode */\n-#define EC_LPC_STATUS_BURST_MODE 0x10\n+#define EC_LPC_STATUS_BURST_MODE 0x10\n /* SCI event is pending (requesting SCI query) */\n #define EC_LPC_STATUS_SCI_PENDING 0x20\n /* SMI event is pending (requesting SMI query) */\n #define EC_LPC_STATUS_SMI_PENDING 0x40\n /* (reserved) */\n-#define EC_LPC_STATUS_RESERVED 0x80\n+#define EC_LPC_STATUS_RESERVED 0x80\n \n /*\n * EC is busy. This covers both the EC processing a command, and the host has\n@@ -471,8 +731,8 @@\n #define EC_LPC_STATUS_BUSY_MASK \\\n \t(EC_LPC_STATUS_FROM_HOST | EC_LPC_STATUS_PROCESSING)\n \n-/* Host command response codes (16-bit). Note that response codes should be\n- * stored in a uint16_t rather than directly in a value of this type.\n+/*\n+ * Host command response codes (16-bit).\n */\n enum ec_status {\n \tEC_RES_SUCCESS = 0,\n@@ -483,25 +743,112 @@ enum ec_status {\n \tEC_RES_INVALID_RESPONSE = 5,\n \tEC_RES_INVALID_VERSION = 6,\n \tEC_RES_INVALID_CHECKSUM = 7,\n-\tEC_RES_IN_PROGRESS = 8,\t\t/* Accepted, command in progress */\n-\tEC_RES_UNAVAILABLE = 9,\t\t/* No response available */\n-\tEC_RES_TIMEOUT = 10,\t\t/* We got a timeout */\n-\tEC_RES_OVERFLOW = 11,\t\t/* Table / data overflow */\n-\tEC_RES_INVALID_HEADER = 12, /* Header contains invalid data */\n-\tEC_RES_REQUEST_TRUNCATED = 13, /* Didn't get the entire request */\n-\tEC_RES_RESPONSE_TOO_BIG = 14, /* Response was too big to handle */\n-\tEC_RES_BUS_ERROR = 15,\t\t/* Communications bus error */\n-\tEC_RES_BUSY = 16\t\t/* Up but too busy. Should retry */\n-};\n+\tEC_RES_IN_PROGRESS = 8, /* Accepted, command in progress */\n+\tEC_RES_UNAVAILABLE = 9, /* No response available */\n+\tEC_RES_TIMEOUT = 10, /* We got a timeout */\n+\tEC_RES_OVERFLOW = 11, /* Table / data overflow */\n+\tEC_RES_INVALID_HEADER = 12, /* Header contains invalid data */\n+\tEC_RES_REQUEST_TRUNCATED = 13, /* Didn't get the entire request */\n+\tEC_RES_RESPONSE_TOO_BIG = 14, /* Response was too big to handle */\n+\tEC_RES_BUS_ERROR = 15, /* Communications bus error */\n+\tEC_RES_BUSY = 16, /* Up but too busy. Should retry */\n+\tEC_RES_INVALID_HEADER_VERSION = 17, /* Header version invalid */\n+\tEC_RES_INVALID_HEADER_CRC = 18, /* Header CRC invalid */\n+\tEC_RES_INVALID_DATA_CRC = 19, /* Data CRC invalid */\n+\tEC_RES_DUP_UNAVAILABLE = 20, /* Can't resend response */\n+\n+\tEC_RES_COUNT,\n+\n+\tEC_RES_MAX = UINT16_MAX, /**< Force enum to be 16 bits */\n+} __packed;\n+BUILD_ASSERT(sizeof(enum ec_status) == sizeof(uint16_t));\n+#ifdef CONFIG_EC_HOST_CMD\n+#ifdef CONFIG_ZEPHYR\n+/*\n+ * Make sure Zephyre uses the same status codes.\n+ */\n+#include <zephyr/mgmt/ec_host_cmd/ec_host_cmd.h>\n+#endif\n+\n+BUILD_ASSERT((uint16_t)EC_RES_SUCCESS == (uint16_t)EC_HOST_CMD_SUCCESS);\n+BUILD_ASSERT((uint16_t)EC_RES_INVALID_COMMAND ==\n+\t (uint16_t)EC_HOST_CMD_INVALID_COMMAND);\n+BUILD_ASSERT((uint16_t)EC_RES_ERROR == (uint16_t)EC_HOST_CMD_ERROR);\n+BUILD_ASSERT((uint16_t)EC_RES_INVALID_PARAM ==\n+\t (uint16_t)EC_HOST_CMD_INVALID_PARAM);\n+BUILD_ASSERT((uint16_t)EC_RES_ACCESS_DENIED ==\n+\t (uint16_t)EC_HOST_CMD_ACCESS_DENIED);\n+BUILD_ASSERT((uint16_t)EC_RES_INVALID_RESPONSE ==\n+\t (uint16_t)EC_HOST_CMD_INVALID_RESPONSE);\n+BUILD_ASSERT((uint16_t)EC_RES_INVALID_VERSION ==\n+\t (uint16_t)EC_HOST_CMD_INVALID_VERSION);\n+BUILD_ASSERT((uint16_t)EC_RES_INVALID_CHECKSUM ==\n+\t (uint16_t)EC_HOST_CMD_INVALID_CHECKSUM);\n+BUILD_ASSERT((uint16_t)EC_RES_IN_PROGRESS == (uint16_t)EC_HOST_CMD_IN_PROGRESS);\n+BUILD_ASSERT((uint16_t)EC_RES_UNAVAILABLE == (uint16_t)EC_HOST_CMD_UNAVAILABLE);\n+BUILD_ASSERT((uint16_t)EC_RES_TIMEOUT == (uint16_t)EC_HOST_CMD_TIMEOUT);\n+BUILD_ASSERT((uint16_t)EC_RES_OVERFLOW == (uint16_t)EC_HOST_CMD_OVERFLOW);\n+BUILD_ASSERT((uint16_t)EC_RES_INVALID_HEADER ==\n+\t (uint16_t)EC_HOST_CMD_INVALID_HEADER);\n+BUILD_ASSERT((uint16_t)EC_RES_REQUEST_TRUNCATED ==\n+\t (uint16_t)EC_HOST_CMD_REQUEST_TRUNCATED);\n+BUILD_ASSERT((uint16_t)EC_RES_RESPONSE_TOO_BIG ==\n+\t (uint16_t)EC_HOST_CMD_RESPONSE_TOO_BIG);\n+BUILD_ASSERT((uint16_t)EC_RES_BUS_ERROR == (uint16_t)EC_HOST_CMD_BUS_ERROR);\n+BUILD_ASSERT((uint16_t)EC_RES_BUSY == (uint16_t)EC_HOST_CMD_BUSY);\n+BUILD_ASSERT((uint16_t)EC_RES_INVALID_HEADER_VERSION ==\n+\t (uint16_t)EC_HOST_CMD_INVALID_HEADER_VERSION);\n+BUILD_ASSERT((uint16_t)EC_RES_INVALID_HEADER_CRC ==\n+\t (uint16_t)EC_HOST_CMD_INVALID_HEADER_CRC);\n+BUILD_ASSERT((uint16_t)EC_RES_INVALID_DATA_CRC ==\n+\t (uint16_t)EC_HOST_CMD_INVALID_DATA_CRC);\n+BUILD_ASSERT((uint16_t)EC_RES_DUP_UNAVAILABLE ==\n+\t (uint16_t)EC_HOST_CMD_DUP_UNAVAILABLE);\n+BUILD_ASSERT((uint16_t)EC_RES_MAX == (uint16_t)EC_HOST_CMD_MAX);\n+\n+#endif\n+\n+/* clang-format off */\n+#define EC_STATUS_TEXT \\\n+\t{ \\\n+\tEC_MAP_ITEM(EC_RES_SUCCESS, SUCCESS), \\\n+\tEC_MAP_ITEM(EC_RES_INVALID_COMMAND, INVALID_COMMAND), \\\n+\tEC_MAP_ITEM(EC_RES_ERROR, ERROR), \\\n+\tEC_MAP_ITEM(EC_RES_INVALID_PARAM, INVALID_PARAM), \\\n+\tEC_MAP_ITEM(EC_RES_ACCESS_DENIED, ACCESS_DENIED), \\\n+\tEC_MAP_ITEM(EC_RES_INVALID_RESPONSE, INVALID_RESPONSE), \\\n+\tEC_MAP_ITEM(EC_RES_INVALID_VERSION, INVALID_VERSION), \\\n+\tEC_MAP_ITEM(EC_RES_INVALID_CHECKSUM, INVALID_CHECKSUM), \\\n+\tEC_MAP_ITEM(EC_RES_IN_PROGRESS, IN_PROGRESS), \\\n+\tEC_MAP_ITEM(EC_RES_UNAVAILABLE, UNAVAILABLE), \\\n+\tEC_MAP_ITEM(EC_RES_TIMEOUT, TIMEOUT), \\\n+\tEC_MAP_ITEM(EC_RES_OVERFLOW, OVERFLOW), \\\n+\tEC_MAP_ITEM(EC_RES_INVALID_HEADER, INVALID_HEADER), \\\n+\tEC_MAP_ITEM(EC_RES_REQUEST_TRUNCATED, REQUEST_TRUNCATED), \\\n+\tEC_MAP_ITEM(EC_RES_RESPONSE_TOO_BIG, RESPONSE_TOO_BIG), \\\n+\tEC_MAP_ITEM(EC_RES_BUS_ERROR, BUS_ERROR), \\\n+\tEC_MAP_ITEM(EC_RES_BUSY, BUSY), \\\n+\tEC_MAP_ITEM(EC_RES_INVALID_HEADER_VERSION, INVALID_HEADER_VERSION), \\\n+\tEC_MAP_ITEM(EC_RES_INVALID_HEADER_CRC, INVALID_HEADER_CRC), \\\n+\tEC_MAP_ITEM(EC_RES_INVALID_DATA_CRC, INVALID_DATA_CRC), \\\n+\tEC_MAP_ITEM(EC_RES_DUP_UNAVAILABLE, DUP_UNAVAILABLE), \\\n+\t}\n+/* clang-format on */\n+\n+#ifndef __cplusplus\n+#define EC_MAP_ITEM(k, v) [k] = #v\n+BUILD_ASSERT(ARRAY_SIZE(((const char *[])EC_STATUS_TEXT)) == EC_RES_COUNT);\n+#undef EC_MAP_ITEM\n+#endif\n \n /*\n- * Host event codes. Note these are 1-based, not 0-based, because ACPI query\n- * EC command uses code 0 to mean \"no event pending\". We explicitly specify\n- * each value in the enum listing so they won't change if we delete/insert an\n- * item or rearrange the list (it needs to be stable across platforms, not\n- * just within a single compiled instance).\n+ * Host event codes. ACPI query EC command uses code 0 to mean \"no event\n+ * pending\". We explicitly specify each value in the enum listing so they won't\n+ * change if we delete/insert an item or rearrange the list (it needs to be\n+ * stable across platforms, not just within a single compiled instance).\n */\n enum host_event_code {\n+\tEC_HOST_EVENT_NONE = 0,\n \tEC_HOST_EVENT_LID_CLOSED = 1,\n \tEC_HOST_EVENT_LID_OPEN = 2,\n \tEC_HOST_EVENT_POWER_BUTTON = 3,\n@@ -514,7 +861,8 @@ enum host_event_code {\n \t/* Event generated by a device attached to the EC */\n \tEC_HOST_EVENT_DEVICE = 10,\n \tEC_HOST_EVENT_THERMAL = 11,\n-\tEC_HOST_EVENT_USB_CHARGER = 12,\n+\t/* GPU related event. Formerly named EC_HOST_EVENT_USB_CHARGER. */\n+\tEC_HOST_EVENT_GPU = 12,\n \tEC_HOST_EVENT_KEY_PRESSED = 13,\n \t/*\n \t * EC has finished initializing the host interface. The host can check\n@@ -561,17 +909,20 @@ enum host_event_code {\n \t/* EC desires to change state of host-controlled USB mux */\n \tEC_HOST_EVENT_USB_MUX = 28,\n \n-\t/* TABLET/LAPTOP mode event*/\n+\t/*\n+\t * The device has changed \"modes\". This can be one of the following:\n+\t *\n+\t * - TABLET/LAPTOP mode\n+\t * - detachable base attach/detach event\n+\t * - on body/off body transition event\n+\t */\n \tEC_HOST_EVENT_MODE_CHANGE = 29,\n \n \t/* Keyboard recovery combo with hardware reinitialization */\n \tEC_HOST_EVENT_KEYBOARD_RECOVERY_HW_REINIT = 30,\n \n-\t/*\n-\t * Reserve this last bit to indicate that at least one bit in a\n-\t * secondary host event word is set. See crbug.com/633646.\n-\t */\n-\tEC_HOST_EVENT_EXTENDED = 31,\n+\t/* WoV */\n+\tEC_HOST_EVENT_WOV = 31,\n \n \t/*\n \t * The high bit of the event mask is not used as a host event code. If\n@@ -580,22 +931,79 @@ enum host_event_code {\n \t * raw event status via EC_MEMMAP_HOST_EVENTS but the LPC interface is\n \t * not initialized on the EC, or improperly configured on the host.\n \t */\n-\tEC_HOST_EVENT_INVALID = 32\n+\tEC_HOST_EVENT_INVALID = 32,\n+\n+\t/* Body detect (lap/desk) change event */\n+\tEC_HOST_EVENT_BODY_DETECT_CHANGE = 33,\n+\n+\t/* New console logs since last snapshot */\n+\tEC_HOST_EVENT_CONSOLE_LOGS = 34,\n+\n+\t/*\n+\t * Only 64 host events are supported. This enum uses 1-based counting so\n+\t * it can skip 0 (NONE), so the last legal host event number is 64.\n+\t */\n };\n-/* Host event mask */\n-#define EC_HOST_EVENT_MASK(event_code) (1ULL << ((event_code) - 1))\n \n-/* Arguments at EC_LPC_ADDR_HOST_ARGS */\n-struct __ec_align4 ec_lpc_host_args {\n+/* Host event mask */\n+#define EC_HOST_EVENT_MASK(event_code) BIT_ULL((event_code) - 1)\n+\n+/* clang-format off */\n+#define HOST_EVENT_TEXT \\\n+\t{ \\\n+\t\t[EC_HOST_EVENT_NONE] = \"NONE\", \\\n+\t\t[EC_HOST_EVENT_LID_CLOSED] = \"LID_CLOSED\", \\\n+\t\t[EC_HOST_EVENT_LID_OPEN] = \"LID_OPEN\", \\\n+\t\t[EC_HOST_EVENT_POWER_BUTTON] = \"POWER_BUTTON\", \\\n+\t\t[EC_HOST_EVENT_AC_CONNECTED] = \"AC_CONNECTED\", \\\n+\t\t[EC_HOST_EVENT_AC_DISCONNECTED] = \"AC_DISCONNECTED\", \\\n+\t\t[EC_HOST_EVENT_BATTERY_LOW] = \"BATTERY_LOW\", \\\n+\t\t[EC_HOST_EVENT_BATTERY_CRITICAL] = \"BATTERY_CRITICAL\", \\\n+\t\t[EC_HOST_EVENT_BATTERY] = \"BATTERY\", \\\n+\t\t[EC_HOST_EVENT_THERMAL_THRESHOLD] = \"THERMAL_THRESHOLD\", \\\n+\t\t[EC_HOST_EVENT_DEVICE] = \"DEVICE\", \\\n+\t\t[EC_HOST_EVENT_THERMAL] = \"THERMAL\", \\\n+\t\t[EC_HOST_EVENT_GPU] = \"GPU\", \\\n+\t\t[EC_HOST_EVENT_KEY_PRESSED] = \"KEY_PRESSED\", \\\n+\t\t[EC_HOST_EVENT_INTERFACE_READY] = \"INTERFACE_READY\", \\\n+\t\t[EC_HOST_EVENT_KEYBOARD_RECOVERY] = \"KEYBOARD_RECOVERY\", \\\n+\t\t[EC_HOST_EVENT_THERMAL_SHUTDOWN] = \"THERMAL_SHUTDOWN\", \\\n+\t\t[EC_HOST_EVENT_BATTERY_SHUTDOWN] = \"BATTERY_SHUTDOWN\", \\\n+\t\t[EC_HOST_EVENT_THROTTLE_START] = \"THROTTLE_START\", \\\n+\t\t[EC_HOST_EVENT_THROTTLE_STOP] = \"THROTTLE_STOP\", \\\n+\t\t[EC_HOST_EVENT_HANG_DETECT] = \"HANG_DETECT\", \\\n+\t\t[EC_HOST_EVENT_HANG_REBOOT] = \"HANG_REBOOT\", \\\n+\t\t[EC_HOST_EVENT_PD_MCU] = \"PD_MCU\", \\\n+\t\t[EC_HOST_EVENT_BATTERY_STATUS] = \"BATTERY_STATUS\", \\\n+\t\t[EC_HOST_EVENT_PANIC] = \"PANIC\", \\\n+\t\t[EC_HOST_EVENT_KEYBOARD_FASTBOOT] = \"KEYBOARD_FASTBOOT\", \\\n+\t\t[EC_HOST_EVENT_RTC] = \"RTC\", \\\n+\t\t[EC_HOST_EVENT_MKBP] = \"MKBP\", \\\n+\t\t[EC_HOST_EVENT_USB_MUX] = \"USB_MUX\", \\\n+\t\t[EC_HOST_EVENT_MODE_CHANGE] = \"MODE_CHANGE\", \\\n+\t\t[EC_HOST_EVENT_KEYBOARD_RECOVERY_HW_REINIT] = \\\n+\t\t\t\"KEYBOARD_RECOVERY_HW_REINIT\", \\\n+\t\t[EC_HOST_EVENT_WOV] = \"WOV\", \\\n+\t\t[EC_HOST_EVENT_INVALID] = \"INVALID\", \\\n+\t\t[EC_HOST_EVENT_BODY_DETECT_CHANGE] = \"BODY_DETECT_CHANGE\", \\\n+\t\t[EC_HOST_EVENT_CONSOLE_LOGS] = \"CONSOLE_LOGS\", \\\n+\t}\n+/* clang-format on */\n+\n+/**\n+ * struct ec_lpc_host_args - Arguments at EC_LPC_ADDR_HOST_ARGS\n+ * @flags: The host argument flags.\n+ * @command_version: Command version.\n+ * @data_size: The length of data.\n+ * @checksum: Checksum; sum of command + flags + command_version + data_size +\n+ * all params/response data bytes.\n+ */\n+struct ec_lpc_host_args {\n \tuint8_t flags;\n \tuint8_t command_version;\n \tuint8_t data_size;\n-\t/*\n-\t * Checksum; sum of command + flags + command_version + data_size +\n-\t * all params/response data bytes.\n-\t */\n \tuint8_t checksum;\n-};\n+} __ec_align4;\n \n /* Flags for ec_lpc_host_args.flags */\n /*\n@@ -615,7 +1023,7 @@ struct __ec_align4 ec_lpc_host_args {\n * response. Command version is 0 and response data from EC is at\n * EC_LPC_ADDR_OLD_PARAM with unknown length.\n */\n-#define EC_HOST_ARGS_FLAG_TO_HOST 0x02\n+#define EC_HOST_ARGS_FLAG_TO_HOST 0x02\n \n /*****************************************************************************/\n /*\n@@ -657,48 +1065,52 @@ struct __ec_align4 ec_lpc_host_args {\n * request, the AP will clock in bytes until it sees the framing byte, then\n * clock in the response packet.\n */\n-#define EC_SPI_FRAME_START 0xec\n+#define EC_SPI_FRAME_START 0xec\n \n /*\n * Padding bytes which are clocked out after the end of a response packet.\n */\n-#define EC_SPI_PAST_END 0xed\n+#define EC_SPI_PAST_END 0xed\n \n /*\n- * EC is ready to receive, and has ignored the byte sent by the AP. EC expects\n+ * EC is ready to receive, and has ignored the byte sent by the AP. EC expects\n * that the AP will send a valid packet header (starting with\n * EC_COMMAND_PROTOCOL_3) in the next 32 bytes.\n+ *\n+ * NOTE: Some SPI configurations place the Most Significant Bit on SDO when\n+ *\t CS goes low. This macro has the Most Significant Bit set to zero,\n+ *\t so SDO will not be driven high when CS goes low.\n */\n-#define EC_SPI_RX_READY 0xf8\n+#define EC_SPI_RX_READY 0x78\n \n /*\n * EC has started receiving the request from the AP, but hasn't started\n * processing it yet.\n */\n-#define EC_SPI_RECEIVING 0xf9\n+#define EC_SPI_RECEIVING 0xf9\n \n /* EC has received the entire request from the AP and is processing it. */\n-#define EC_SPI_PROCESSING 0xfa\n+#define EC_SPI_PROCESSING 0xfa\n \n /*\n * EC received bad data from the AP, such as a packet header with an invalid\n * length. EC will ignore all data until chip select deasserts.\n */\n-#define EC_SPI_RX_BAD_DATA 0xfb\n+#define EC_SPI_RX_BAD_DATA 0xfb\n \n /*\n * EC received data from the AP before it was ready. That is, the AP asserted\n * chip select and started clocking data before the EC was ready to receive it.\n * EC will ignore all data until chip select deasserts.\n */\n-#define EC_SPI_NOT_READY 0xfc\n+#define EC_SPI_NOT_READY 0xfc\n \n /*\n * EC was ready to receive a request from the AP. EC has treated the byte sent\n * by the AP as part of a request packet, or (for old-style ECs) is processing\n * a fully received packet but is not ready to respond yet.\n */\n-#define EC_SPI_OLD_READY 0xfd\n+#define EC_SPI_OLD_READY 0xfd\n \n /*****************************************************************************/\n \n@@ -720,22 +1132,22 @@ struct __ec_align4 ec_lpc_host_args {\n */\n #define EC_PROTO2_REQUEST_HEADER_BYTES 3\n #define EC_PROTO2_REQUEST_TRAILER_BYTES 1\n-#define EC_PROTO2_REQUEST_OVERHEAD (EC_PROTO2_REQUEST_HEADER_BYTES +\t\\\n-\t\t\t\t EC_PROTO2_REQUEST_TRAILER_BYTES)\n+#define EC_PROTO2_REQUEST_OVERHEAD \\\n+\t(EC_PROTO2_REQUEST_HEADER_BYTES + EC_PROTO2_REQUEST_TRAILER_BYTES)\n \n #define EC_PROTO2_RESPONSE_HEADER_BYTES 2\n #define EC_PROTO2_RESPONSE_TRAILER_BYTES 1\n-#define EC_PROTO2_RESPONSE_OVERHEAD (EC_PROTO2_RESPONSE_HEADER_BYTES +\t\\\n-\t\t\t\t EC_PROTO2_RESPONSE_TRAILER_BYTES)\n+#define EC_PROTO2_RESPONSE_OVERHEAD \\\n+\t(EC_PROTO2_RESPONSE_HEADER_BYTES + EC_PROTO2_RESPONSE_TRAILER_BYTES)\n \n /* Parameter length was limited by the LPC interface */\n #define EC_PROTO2_MAX_PARAM_SIZE 0xfc\n \n /* Maximum request and response packet sizes for protocol version 2 */\n-#define EC_PROTO2_MAX_REQUEST_SIZE (EC_PROTO2_REQUEST_OVERHEAD +\t\\\n-\t\t\t\t EC_PROTO2_MAX_PARAM_SIZE)\n-#define EC_PROTO2_MAX_RESPONSE_SIZE (EC_PROTO2_RESPONSE_OVERHEAD +\t\\\n-\t\t\t\t EC_PROTO2_MAX_PARAM_SIZE)\n+#define EC_PROTO2_MAX_REQUEST_SIZE \\\n+\t(EC_PROTO2_REQUEST_OVERHEAD + EC_PROTO2_MAX_PARAM_SIZE)\n+#define EC_PROTO2_MAX_RESPONSE_SIZE \\\n+\t(EC_PROTO2_RESPONSE_OVERHEAD + EC_PROTO2_MAX_PARAM_SIZE)\n \n /*****************************************************************************/\n \n@@ -747,56 +1159,175 @@ struct __ec_align4 ec_lpc_host_args {\n \n #define EC_HOST_REQUEST_VERSION 3\n \n-/* Version 3 request from host */\n-struct __ec_align4 ec_host_request {\n-\t/* Structure version (=3)\n-\t *\n-\t * EC will return EC_RES_INVALID_HEADER if it receives a header with a\n-\t * version it doesn't know how to parse.\n-\t */\n+/**\n+ * struct ec_host_request - Version 3 request from host.\n+ * @struct_version: Should be 3. The EC will return EC_RES_INVALID_HEADER if it\n+ * receives a header with a version it doesn't know how to\n+ * parse.\n+ * @checksum: Checksum of request and data; sum of all bytes including checksum\n+ * should total to 0.\n+ * @command: Command to send (EC_CMD_...)\n+ * @command_version: Command version.\n+ * @reserved: Unused byte in current protocol version; set to 0.\n+ * @data_len: Length of data which follows this header.\n+ */\n+struct ec_host_request {\n+\tuint8_t struct_version;\n+\tuint8_t checksum;\n+\tuint16_t command;\n+\tuint8_t command_version;\n+\tuint8_t reserved;\n+\tuint16_t data_len;\n+} __ec_align4;\n+\n+#define EC_HOST_RESPONSE_VERSION 3\n+\n+/**\n+ * struct ec_host_response - Version 3 response from EC.\n+ * @struct_version: Struct version (=3).\n+ * @checksum: Checksum of response and data; sum of all bytes including\n+ * checksum should total to 0.\n+ * @result: EC's response to the command (separate from communication failure)\n+ * @data_len: Length of data which follows this header.\n+ * @reserved: Unused bytes in current protocol version; set to 0.\n+ */\n+struct ec_host_response {\n \tuint8_t struct_version;\n+\tuint8_t checksum;\n+\tuint16_t result;\n+\tuint16_t data_len;\n+\tuint16_t reserved;\n+} __ec_align4;\n+\n+/*****************************************************************************/\n+\n+/*\n+ * Host command protocol V4.\n+ *\n+ * Packets always start with a request or response header. They are followed\n+ * by data_len bytes of data. If the data_crc_present flag is set, the data\n+ * bytes are followed by a CRC-8 of that data, using x^8 + x^2 + x + 1\n+ * polynomial.\n+ *\n+ * Host algorithm when sending a request q:\n+ *\n+ * 101) tries_left=(some value, e.g. 3);\n+ * 102) q.seq_num++\n+ * 103) q.seq_dup=0\n+ * 104) Calculate q.header_crc.\n+ * 105) Send request q to EC.\n+ * 106) Wait for response r. Go to 201 if received or 301 if timeout.\n+ *\n+ * 201) If r.struct_version != 4, go to 301.\n+ * 202) If r.header_crc mismatches calculated CRC for r header, go to 301.\n+ * 203) If r.data_crc_present and r.data_crc mismatches, go to 301.\n+ * 204) If r.seq_num != q.seq_num, go to 301.\n+ * 205) If r.seq_dup == q.seq_dup, return success.\n+ * 207) If r.seq_dup == 1, go to 301.\n+ * 208) Return error.\n+ *\n+ * 301) If --tries_left <= 0, return error.\n+ * 302) If q.seq_dup == 1, go to 105.\n+ * 303) q.seq_dup = 1\n+ * 304) Go to 104.\n+ *\n+ * EC algorithm when receiving a request q.\n+ * EC has response buffer r, error buffer e.\n+ *\n+ * 101) If q.struct_version != 4, set e.result = EC_RES_INVALID_HEADER_VERSION\n+ * and go to 301\n+ * 102) If q.header_crc mismatches calculated CRC, set e.result =\n+ * EC_RES_INVALID_HEADER_CRC and go to 301\n+ * 103) If q.data_crc_present, calculate data CRC. If that mismatches the CRC\n+ * byte at the end of the packet, set e.result = EC_RES_INVALID_DATA_CRC\n+ * and go to 301.\n+ * 104) If q.seq_dup == 0, go to 201.\n+ * 105) If q.seq_num != r.seq_num, go to 201.\n+ * 106) If q.seq_dup == r.seq_dup, go to 205, else go to 203.\n+ *\n+ * 201) Process request q into response r.\n+ * 202) r.seq_num = q.seq_num\n+ * 203) r.seq_dup = q.seq_dup\n+ * 204) Calculate r.header_crc\n+ * 205) If r.data_len > 0 and data is no longer available, set e.result =\n+ * EC_RES_DUP_UNAVAILABLE and go to 301.\n+ * 206) Send response r.\n+ *\n+ * 301) e.seq_num = q.seq_num\n+ * 302) e.seq_dup = q.seq_dup\n+ * 303) Calculate e.header_crc.\n+ * 304) Send error response e.\n+ */\n \n+/* Version 4 request from host */\n+struct ec_host_request4 {\n \t/*\n-\t * Checksum of request and data; sum of all bytes including checksum\n-\t * should total to 0.\n+\t * bits 0-3: struct_version: Structure version (=4)\n+\t * bit 4: is_response: Is response (=0)\n+\t * bits 5-6: seq_num: Sequence number\n+\t * bit 7: seq_dup: Sequence duplicate flag\n \t */\n-\tuint8_t checksum;\n+\tuint8_t fields0;\n \n-\t/* Command code */\n+\t/*\n+\t * bits 0-4: command_version: Command version\n+\t * bits 5-6: Reserved (set 0, ignore on read)\n+\t * bit 7: data_crc_present: Is data CRC present after data\n+\t */\n+\tuint8_t fields1;\n+\n+\t/* Command code (EC_CMD_*) */\n \tuint16_t command;\n \n-\t/* Command version */\n-\tuint8_t command_version;\n+\t/* Length of data which follows this header (not including data CRC) */\n+\tuint16_t data_len;\n \n-\t/* Unused byte in current protocol version; set to 0 */\n+\t/* Reserved (set 0, ignore on read) */\n \tuint8_t reserved;\n \n-\t/* Length of data which follows this header */\n-\tuint16_t data_len;\n-};\n-\n-#define EC_HOST_RESPONSE_VERSION 3\n+\t/* CRC-8 of above fields, using x^8 + x^2 + x + 1 polynomial */\n+\tuint8_t header_crc;\n+} __ec_align4;\n \n-/* Version 3 response from EC */\n-struct __ec_align4 ec_host_response {\n-\t/* Structure version (=3) */\n-\tuint8_t struct_version;\n+/* Version 4 response from EC */\n+struct ec_host_response4 {\n+\t/*\n+\t * bits 0-3: struct_version: Structure version (=4)\n+\t * bit 4: is_response: Is response (=1)\n+\t * bits 5-6: seq_num: Sequence number\n+\t * bit 7: seq_dup: Sequence duplicate flag\n+\t */\n+\tuint8_t fields0;\n \n \t/*\n-\t * Checksum of response and data; sum of all bytes including checksum\n-\t * should total to 0.\n+\t * bits 0-6: Reserved (set 0, ignore on read)\n+\t * bit 7: data_crc_present: Is data CRC present after data\n \t */\n-\tuint8_t checksum;\n+\tuint8_t fields1;\n \n \t/* Result code (EC_RES_*) */\n \tuint16_t result;\n \n-\t/* Length of data which follows this header */\n+\t/* Length of data which follows this header (not including data CRC) */\n \tuint16_t data_len;\n \n-\t/* Unused bytes in current protocol version; set to 0 */\n-\tuint16_t reserved;\n-};\n+\t/* Reserved (set 0, ignore on read) */\n+\tuint8_t reserved;\n+\n+\t/* CRC-8 of above fields, using x^8 + x^2 + x + 1 polynomial */\n+\tuint8_t header_crc;\n+} __ec_align4;\n+\n+/* Fields in fields0 byte */\n+#define EC_PACKET4_0_STRUCT_VERSION_MASK 0x0f\n+#define EC_PACKET4_0_IS_RESPONSE_MASK 0x10\n+#define EC_PACKET4_0_SEQ_NUM_SHIFT 5\n+#define EC_PACKET4_0_SEQ_NUM_MASK 0x60\n+#define EC_PACKET4_0_SEQ_DUP_MASK 0x80\n+\n+/* Fields in fields1 byte */\n+#define EC_PACKET4_1_COMMAND_VERSION_MASK 0x1f /* (request only) */\n+#define EC_PACKET4_1_DATA_CRC_PRESENT_MASK 0x80\n \n /*****************************************************************************/\n /*\n@@ -822,9 +1353,13 @@ struct __ec_align4 ec_host_response {\n */\n #define EC_CMD_PROTO_VERSION 0x0000\n \n-struct __ec_align4 ec_response_proto_version {\n+/**\n+ * struct ec_response_proto_version - Response to the proto version command.\n+ * @version: The protocol version.\n+ */\n+struct ec_response_proto_version {\n \tuint32_t version;\n-};\n+} __ec_align4;\n \n /*\n * Hello. This is a simple command to test the EC is responsive to\n@@ -832,43 +1367,72 @@ struct __ec_align4 ec_response_proto_version {\n */\n #define EC_CMD_HELLO 0x0001\n \n-struct __ec_align4 ec_params_hello {\n-\tuint32_t in_data; /* Pass anything here */\n-};\n+/**\n+ * struct ec_params_hello - Parameters to the hello command.\n+ * @in_data: Pass anything here.\n+ */\n+struct ec_params_hello {\n+\tuint32_t in_data;\n+} __ec_align4;\n \n-struct __ec_align4 ec_response_hello {\n-\tuint32_t out_data; /* Output will be in_data + 0x01020304 */\n-};\n+/**\n+ * struct ec_response_hello - Response to the hello command.\n+ * @out_data: Output will be in_data + 0x01020304.\n+ */\n+struct ec_response_hello {\n+\tuint32_t out_data;\n+} __ec_align4;\n \n /* Get version number */\n #define EC_CMD_GET_VERSION 0x0002\n \n-enum ec_current_image {\n+enum ec_image {\n \tEC_IMAGE_UNKNOWN = 0,\n \tEC_IMAGE_RO,\n-\tEC_IMAGE_RW\n-};\n+\tEC_IMAGE_RW,\n+\tEC_IMAGE_RW_A = EC_IMAGE_RW,\n+\tEC_IMAGE_RO_B,\n+\tEC_IMAGE_RW_B,\n+};\n+\n+/**\n+ * struct ec_response_get_version - Response to the v0 get version command.\n+ * @version_string_ro: Null-terminated RO firmware version string.\n+ * @version_string_rw: Null-terminated RW firmware version string.\n+ * @reserved: Unused bytes; was previously RW-B firmware version string.\n+ * @current_image: One of ec_image.\n+ */\n+struct ec_response_get_version {\n+\tchar version_string_ro[32];\n+\tchar version_string_rw[32];\n+\tchar reserved[32]; /* Changed to cros_fwid_ro in version 1 */\n+\tuint32_t current_image;\n+} __ec_align4;\n \n-struct __ec_align4 ec_response_get_version {\n-\t/* Null-terminated version strings for RO, RW */\n+/**\n+ * struct ec_response_get_version_v1 - Response to the v1 get version command.\n+ *\n+ * ec_response_get_version_v1 is a strict superset of ec_response_get_version.\n+ * The v1 response changes the semantics of one field (reserved to cros_fwid_ro)\n+ * and adds one additional field (cros_fwid_rw).\n+ *\n+ * @version_string_ro: Null-terminated RO firmware version string.\n+ * @version_string_rw: Null-terminated RW firmware version string.\n+ * @cros_fwid_ro: Null-terminated RO CrOS FWID string.\n+ * @current_image: One of ec_image.\n+ * @cros_fwid_rw: Null-terminated RW CrOS FWID string.\n+ */\n+struct ec_response_get_version_v1 {\n \tchar version_string_ro[32];\n \tchar version_string_rw[32];\n-\tchar reserved[32]; /* Was previously RW-B string */\n-\tuint32_t current_image; /* One of ec_current_image */\n-};\n+\tchar cros_fwid_ro[32]; /* Added in version 1 (Used to be reserved) */\n+\tuint32_t current_image;\n+\tchar cros_fwid_rw[32]; /* Added in version 1 */\n+} __ec_align4;\n \n-/* Read test */\n+/* Read test - OBSOLETE */\n #define EC_CMD_READ_TEST 0x0003\n \n-struct __ec_align4 ec_params_read_test {\n-\tuint32_t offset; /* Starting value for read buffer */\n-\tuint32_t size; /* Size to read in bytes */\n-};\n-\n-struct __ec_align4 ec_response_read_test {\n-\tuint32_t data[32];\n-};\n-\n /*\n * Get build information\n *\n@@ -879,19 +1443,28 @@ struct __ec_align4 ec_response_read_test {\n /* Get chip info */\n #define EC_CMD_GET_CHIP_INFO 0x0005\n \n-struct __ec_align4 ec_response_get_chip_info {\n-\t/* Null-terminated strings */\n+/**\n+ * struct ec_response_get_chip_info - Response to the get chip info command.\n+ * @vendor: Null-terminated string for chip vendor.\n+ * @name: Null-terminated string for chip name.\n+ * @revision: Null-terminated string for chip mask version.\n+ */\n+struct ec_response_get_chip_info {\n \tchar vendor[32];\n \tchar name[32];\n-\tchar revision[32]; /* Mask version */\n-};\n+\tchar revision[32];\n+} __ec_align4;\n \n /* Get board HW version */\n #define EC_CMD_GET_BOARD_VERSION 0x0006\n \n-struct __ec_align2 ec_response_board_version {\n-\tuint16_t board_version; /* A monotonously incrementing number. */\n-};\n+/**\n+ * struct ec_response_board_version - Response to the board version command.\n+ * @board_version: A monotonously incrementing number.\n+ */\n+struct ec_response_board_version {\n+\tuint16_t board_version;\n+} __ec_align2;\n \n /*\n * Read memory-mapped data.\n@@ -903,29 +1476,44 @@ struct __ec_align2 ec_response_board_version {\n */\n #define EC_CMD_READ_MEMMAP 0x0007\n \n-struct __ec_align1 ec_params_read_memmap {\n-\tuint8_t offset; /* Offset in memmap (EC_MEMMAP_*) */\n-\tuint8_t size; /* Size to read in bytes */\n-};\n+/**\n+ * struct ec_params_read_memmap - Parameters for the read memory map command.\n+ * @offset: Offset in memmap (EC_MEMMAP_*).\n+ * @size: Size to read in bytes.\n+ */\n+struct ec_params_read_memmap {\n+\tuint8_t offset;\n+\tuint8_t size;\n+} __ec_align1;\n \n /* Read versions supported for a command */\n #define EC_CMD_GET_CMD_VERSIONS 0x0008\n \n-struct __ec_align1 ec_params_get_cmd_versions {\n-\tuint8_t cmd; /* Command to check */\n-};\n-\n-struct __ec_align2 ec_params_get_cmd_versions_v1 {\n-\tuint16_t cmd; /* Command to check */\n-};\n+/**\n+ * struct ec_params_get_cmd_versions - Parameters for the get command versions.\n+ * @cmd: Command to check.\n+ */\n+struct ec_params_get_cmd_versions {\n+\tuint8_t cmd;\n+} __ec_align1;\n \n-struct __ec_align4 ec_response_get_cmd_versions {\n-\t/*\n-\t * Mask of supported versions; use EC_VER_MASK() to compare with a\n-\t * desired version.\n-\t */\n+/**\n+ * struct ec_params_get_cmd_versions_v1 - Parameters for the get command\n+ * versions (v1)\n+ * @cmd: Command to check.\n+ */\n+struct ec_params_get_cmd_versions_v1 {\n+\tuint16_t cmd;\n+} __ec_align2;\n+\n+/**\n+ * struct ec_response_get_cmd_version - Response to the get command versions.\n+ * @version_mask: Mask of supported versions; use EC_VER_MASK() to compare with\n+ * a desired version.\n+ */\n+struct ec_response_get_cmd_versions {\n \tuint32_t version_mask;\n-};\n+} __ec_align4;\n \n /*\n * Check EC communications status (busy). This is needed on i2c/spi but not\n@@ -934,81 +1522,88 @@ struct __ec_align4 ec_response_get_cmd_versions {\n * lpc must read the status from the command register. Attempting this on\n * lpc will overwrite the args/parameter space and corrupt its data.\n */\n-#define EC_CMD_GET_COMMS_STATUS\t\t0x0009\n+#define EC_CMD_GET_COMMS_STATUS 0x0009\n \n /* Avoid using ec_status which is for return values */\n enum ec_comms_status {\n-\tEC_COMMS_STATUS_PROCESSING\t= 1 << 0,\t/* Processing cmd */\n+\tEC_COMMS_STATUS_PROCESSING = BIT(0), /* Processing cmd */\n };\n \n-struct __ec_align4 ec_response_get_comms_status {\n-\tuint32_t flags;\t\t/* Mask of enum ec_comms_status */\n-};\n+/**\n+ * struct ec_response_get_comms_status - Response to the get comms status\n+ * command.\n+ * @flags: Mask of enum ec_comms_status.\n+ */\n+struct ec_response_get_comms_status {\n+\tuint32_t flags; /* Mask of enum ec_comms_status */\n+} __ec_align4;\n \n /* Fake a variety of responses, purely for testing purposes. */\n-#define EC_CMD_TEST_PROTOCOL\t\t0x000A\n+#define EC_CMD_TEST_PROTOCOL 0x000A\n \n /* Tell the EC what to send back to us. */\n-struct __ec_align4 ec_params_test_protocol {\n+struct ec_params_test_protocol {\n \tuint32_t ec_result;\n \tuint32_t ret_len;\n \tuint8_t buf[32];\n-};\n+} __ec_align4;\n \n /* Here it comes... */\n-struct __ec_align4 ec_response_test_protocol {\n+struct ec_response_test_protocol {\n \tuint8_t buf[32];\n-};\n+} __ec_align4;\n \n /* Get protocol information */\n-#define EC_CMD_GET_PROTOCOL_INFO\t0x000B\n+#define EC_CMD_GET_PROTOCOL_INFO 0x000B\n \n /* Flags for ec_response_get_protocol_info.flags */\n /* EC_RES_IN_PROGRESS may be returned if a command is slow */\n-#define EC_PROTOCOL_INFO_IN_PROGRESS_SUPPORTED (1 << 0)\n-\n-struct __ec_align4 ec_response_get_protocol_info {\n+#define EC_PROTOCOL_INFO_IN_PROGRESS_SUPPORTED BIT(0)\n+\n+/**\n+ * struct ec_response_get_protocol_info - Response to the get protocol info.\n+ * @protocol_versions: Bitmask of protocol versions supported (1 << n means\n+ * version n).\n+ * @max_request_packet_size: Maximum request packet size in bytes.\n+ * @max_response_packet_size: Maximum response packet size in bytes.\n+ * @flags: see EC_PROTOCOL_INFO_*\n+ */\n+struct ec_response_get_protocol_info {\n \t/* Fields which exist if at least protocol version 3 supported */\n-\n-\t/* Bitmask of protocol versions supported (1 << n means version n)*/\n \tuint32_t protocol_versions;\n-\n-\t/* Maximum request packet size, in bytes */\n \tuint16_t max_request_packet_size;\n-\n-\t/* Maximum response packet size, in bytes */\n \tuint16_t max_response_packet_size;\n-\n-\t/* Flags; see EC_PROTOCOL_INFO_* */\n \tuint32_t flags;\n-};\n+} __ec_align4;\n \n /*****************************************************************************/\n /* Get/Set miscellaneous values */\n \n /* The upper byte of .flags tells what to do (nothing means \"get\") */\n-#define EC_GSV_SET 0x80000000\n+#define EC_GSV_SET 0x80000000\n \n-/* The lower three bytes of .flags identifies the parameter, if that has\n- meaning for an individual command. */\n+/*\n+ * The lower three bytes of .flags identifies the parameter, if that has\n+ * meaning for an individual command.\n+ */\n #define EC_GSV_PARAM_MASK 0x00ffffff\n \n-struct __ec_align4 ec_params_get_set_value {\n+struct ec_params_get_set_value {\n \tuint32_t flags;\n \tuint32_t value;\n-};\n+} __ec_align4;\n \n-struct __ec_align4 ec_response_get_set_value {\n+struct ec_response_get_set_value {\n \tuint32_t flags;\n \tuint32_t value;\n-};\n+} __ec_align4;\n \n /* More than one command can use these structs to get/set parameters. */\n-#define EC_CMD_GSV_PAUSE_IN_S5\t0x000C\n+#define EC_CMD_GSV_PAUSE_IN_S5 0x000C\n \n /*****************************************************************************/\n /* List the features supported by the firmware */\n-#define EC_CMD_GET_FEATURES 0x000D\n+#define EC_CMD_GET_FEATURES 0x000D\n \n /* Supported features */\n enum ec_feature_code {\n@@ -1135,6 +1730,66 @@ enum ec_feature_code {\n \t * mux.\n \t */\n \tEC_FEATURE_TYPEC_MUX_REQUIRE_AP_ACK = 43,\n+\t/*\n+\t * The EC supports entering and residing in S4.\n+\t */\n+\tEC_FEATURE_S4_RESIDENCY = 44,\n+\t/*\n+\t * The EC supports the AP directing mux sets for the board.\n+\t */\n+\tEC_FEATURE_TYPEC_AP_MUX_SET = 45,\n+\t/*\n+\t * The EC supports the AP composing VDMs for us to send.\n+\t */\n+\tEC_FEATURE_TYPEC_AP_VDM_SEND = 46,\n+\t/*\n+\t * The EC supports system safe mode panic recovery.\n+\t */\n+\tEC_FEATURE_SYSTEM_SAFE_MODE = 47,\n+\t/*\n+\t * The EC will reboot on runtime assertion failures.\n+\t */\n+\tEC_FEATURE_ASSERT_REBOOTS = 48,\n+\t/*\n+\t * The EC image is built with tokenized logging enabled.\n+\t */\n+\tEC_FEATURE_TOKENIZED_LOGGING = 49,\n+\t/*\n+\t * The EC supports triggering an STB dump.\n+\t */\n+\tEC_FEATURE_AMD_STB_DUMP = 50,\n+\t/*\n+\t * The EC supports memory dump commands.\n+\t */\n+\tEC_FEATURE_MEMORY_DUMP = 51,\n+\t/*\n+\t * The EC supports DP2.1 capability\n+\t */\n+\tEC_FEATURE_TYPEC_DP2_1 = 52,\n+\t/*\n+\t * The MCU is System Companion Processor Core 1\n+\t */\n+\tEC_FEATURE_SCP_C1 = 53,\n+\t/*\n+\t * The EC supports UCSI PPM.\n+\t */\n+\tEC_FEATURE_UCSI_PPM = 54,\n+\t/*\n+\t * The EC supports Strauss keyboard.\n+\t */\n+\tEC_FEATURE_STRAUSS = 55,\n+\t/*\n+\t * The EC supports PoE.\n+\t */\n+\tEC_FEATURE_POE = 56,\n+\t/*\n+\t * The EC supports a hybrid boost charger\n+\t */\n+\tEC_FEATURE_CHARGER_HYBRID_POWER_BOOST = 57,\n+\t/*\n+\t * Support signaling new console logs via host event\n+\t */\n+\tEC_FEATURE_CONSOLE_LOG_EVENT = 58,\n };\n \n #define EC_FEATURE_MASK_0(event_code) BIT(event_code % 32)\n@@ -1151,9 +1806,9 @@ struct ec_response_get_features {\n /* Set SKU ID from AP */\n #define EC_CMD_SET_SKU_ID 0x000F\n \n-struct __ec_align4 ec_sku_id_info {\n+struct ec_sku_id_info {\n \tuint32_t sku_id;\n-};\n+} __ec_align4;\n \n /*****************************************************************************/\n /* Flash commands */\n@@ -1162,39 +1817,56 @@ struct __ec_align4 ec_sku_id_info {\n #define EC_CMD_FLASH_INFO 0x0010\n #define EC_VER_FLASH_INFO 2\n \n-/* Version 0 returns these fields */\n-struct __ec_align4 ec_response_flash_info {\n-\t/* Usable flash size, in bytes */\n+/**\n+ * struct ec_response_flash_info - Response to the flash info command.\n+ * @flash_size: Usable flash size in bytes.\n+ * @write_block_size: Write block size. Write offset and size must be a\n+ * multiple of this.\n+ * @erase_block_size: Erase block size. Erase offset and size must be a\n+ * multiple of this.\n+ * @protect_block_size: Protection block size. Protection offset and size\n+ * must be a multiple of this.\n+ *\n+ * Version 0 returns these fields.\n+ */\n+struct ec_response_flash_info {\n \tuint32_t flash_size;\n-\t/*\n-\t * Write block size. Write offset and size must be a multiple\n-\t * of this.\n-\t */\n \tuint32_t write_block_size;\n-\t/*\n-\t * Erase block size. Erase offset and size must be a multiple\n-\t * of this.\n-\t */\n \tuint32_t erase_block_size;\n-\t/*\n-\t * Protection block size. Protection offset and size must be a\n-\t * multiple of this.\n-\t */\n \tuint32_t protect_block_size;\n-};\n+} __ec_align4;\n \n-/* Flags for version 1+ flash info command */\n-/* EC flash erases bits to 0 instead of 1 */\n-#define EC_FLASH_INFO_ERASE_TO_0 (1 << 0)\n+/*\n+ * Flags for version 1+ flash info command\n+ * EC flash erases bits to 0 instead of 1.\n+ */\n+#define EC_FLASH_INFO_ERASE_TO_0 BIT(0)\n \n-/* Flash must be selected for read/write/erase operations to succeed. This may\n+/*\n+ * Flash must be selected for read/write/erase operations to succeed. This may\n * be necessary on a chip where write/erase can be corrupted by other board\n * activity, or where the chip needs to enable some sort of programming voltage,\n * or where the read/write/erase operations require cleanly suspending other\n- * chip functionality. */\n-#define EC_FLASH_INFO_SELECT_REQUIRED (1 << 1)\n-\n-/*\n+ * chip functionality.\n+ */\n+#define EC_FLASH_INFO_SELECT_REQUIRED BIT(1)\n+\n+/**\n+ * struct ec_response_flash_info_1 - Response to the flash info v1 command.\n+ * @flash_size: Usable flash size in bytes.\n+ * @write_block_size: Write block size. Write offset and size must be a\n+ * multiple of this.\n+ * @erase_block_size: Erase block size. Erase offset and size must be a\n+ * multiple of this.\n+ * @protect_block_size: Protection block size. Protection offset and size\n+ * must be a multiple of this.\n+ * @write_ideal_size: Ideal write size in bytes. Writes will be fastest if\n+ * size is exactly this and offset is a multiple of this.\n+ * For example, an EC may have a write buffer which can do\n+ * half-page operations if data is aligned, and a slower\n+ * word-at-a-time write mode.\n+ * @flags: Flags; see EC_FLASH_INFO_*\n+ *\n * Version 1 returns the same initial fields as version 0, with additional\n * fields following.\n *\n@@ -1208,7 +1880,7 @@ struct __ec_align4 ec_response_flash_info {\n * The EC returns the number of banks describing the flash memory.\n * It adds banks descriptions up to num_banks_desc.\n */\n-struct __ec_align4 ec_response_flash_info_1 {\n+struct ec_response_flash_info_1 {\n \t/* Version 0 fields; see above for description */\n \tuint32_t flash_size;\n \tuint32_t write_block_size;\n@@ -1216,24 +1888,16 @@ struct __ec_align4 ec_response_flash_info_1 {\n \tuint32_t protect_block_size;\n \n \t/* Version 1 adds these fields: */\n-\t/*\n-\t * Ideal write size in bytes. Writes will be fastest if size is\n-\t * exactly this and offset is a multiple of this. For example, an EC\n-\t * may have a write buffer which can do half-page operations if data is\n-\t * aligned, and a slower word-at-a-time write mode.\n-\t */\n \tuint32_t write_ideal_size;\n-\n-\t/* Flags; see EC_FLASH_INFO_* */\n \tuint32_t flags;\n-};\n+} __ec_align4;\n \n-struct __ec_align4 ec_params_flash_info_2 {\n+struct ec_params_flash_info_2 {\n \t/* Number of banks to describe */\n \tuint16_t num_banks_desc;\n \t/* Reserved; set 0; ignore on read */\n \tuint8_t reserved[2];\n-};\n+} __ec_align4;\n \n struct ec_flash_bank {\n \t/* Number of sector is in this bank. */\n@@ -1250,7 +1914,7 @@ struct ec_flash_bank {\n \tuint8_t reserved[2];\n };\n \n-struct __ec_align4 ec_response_flash_info_2 {\n+struct ec_response_flash_info_2 {\n \t/* Total flash in the EC. */\n \tuint32_t flash_size;\n \t/* Flags; see EC_FLASH_INFO_* */\n@@ -1261,8 +1925,8 @@ struct __ec_align4 ec_response_flash_info_2 {\n \tuint16_t num_banks_total;\n \t/* Number of banks described in banks array. */\n \tuint16_t num_banks_desc;\n-\tstruct ec_flash_bank banks[0];\n-};\n+\tstruct ec_flash_bank banks[FLEXIBLE_ARRAY_MEMBER_SIZE];\n+} __ec_align4;\n \n /*\n * Read flash\n@@ -1271,10 +1935,15 @@ struct __ec_align4 ec_response_flash_info_2 {\n */\n #define EC_CMD_FLASH_READ 0x0011\n \n-struct __ec_align4 ec_params_flash_read {\n-\tuint32_t offset; /* Byte offset to read */\n-\tuint32_t size; /* Size to read in bytes */\n-};\n+/**\n+ * struct ec_params_flash_read - Parameters for the flash read command.\n+ * @offset: Byte offset to read.\n+ * @size: Size to read in bytes.\n+ */\n+struct ec_params_flash_read {\n+\tuint32_t offset;\n+\tuint32_t size;\n+} __ec_align4;\n \n /* Write flash */\n #define EC_CMD_FLASH_WRITE 0x0012\n@@ -1283,23 +1952,42 @@ struct __ec_align4 ec_params_flash_read {\n /* Version 0 of the flash command supported only 64 bytes of data */\n #define EC_FLASH_WRITE_VER0_SIZE 64\n \n-struct __ec_align4 ec_params_flash_write {\n-\tuint32_t offset; /* Byte offset to write */\n-\tuint32_t size; /* Size to write in bytes */\n-\t/* Followed by data to write */\n-};\n+/**\n+ * struct ec_params_flash_write - Parameters for the flash write command.\n+ * @offset: Byte offset to write.\n+ * @size: Size to write in bytes.\n+ * @data: Data to write.\n+ * @data.words32: uint32_t data to write.\n+ * @data.bytes: uint8_t data to write.\n+ */\n+struct ec_params_flash_write {\n+\tuint32_t offset;\n+\tuint32_t size;\n+\t/* Followed by data to write. This union allows accessing an\n+\t * underlying buffer as uint32s or uint8s for convenience.\n+\t */\n+\tunion {\n+\t\tuint32_t words32[FLEXIBLE_ARRAY_MEMBER_SIZE];\n+\t\tuint8_t bytes[FLEXIBLE_ARRAY_MEMBER_SIZE];\n+\t} data;\n+} __ec_align4;\n+BUILD_ASSERT(member_size(struct ec_params_flash_write, data) == 0);\n \n /* Erase flash */\n #define EC_CMD_FLASH_ERASE 0x0013\n \n-/* v0 */\n-struct __ec_align4 ec_params_flash_erase {\n-\tuint32_t offset; /* Byte offset to erase */\n-\tuint32_t size; /* Size to erase in bytes */\n-};\n+/**\n+ * struct ec_params_flash_erase - Parameters for the flash erase command, v0.\n+ * @offset: Byte offset to erase.\n+ * @size: Size to erase in bytes.\n+ */\n+struct ec_params_flash_erase {\n+\tuint32_t offset;\n+\tuint32_t size;\n+} __ec_align4;\n \n-#define EC_VER_FLASH_WRITE 1\n-/* v1 add async erase:\n+/*\n+ * v1 add async erase:\n * subcommands can returns:\n * EC_RES_SUCCESS : erased (see ERASE_SECTOR_ASYNC case below).\n * EC_RES_INVALID_PARAM : offset/size are not aligned on a erase boundary.\n@@ -1316,21 +2004,24 @@ struct __ec_align4 ec_params_flash_erase {\n * permitted while erasing. (For instance, STM32F4).\n */\n enum ec_flash_erase_cmd {\n-\tFLASH_ERASE_SECTOR, /* Erase and wait for result */\n-\tFLASH_ERASE_SECTOR_ASYNC, /* Erase and return immediately. */\n-\tFLASH_ERASE_GET_RESULT, /* Ask for last erase result */\n+\tFLASH_ERASE_SECTOR, /* Erase and wait for result */\n+\tFLASH_ERASE_SECTOR_ASYNC, /* Erase and return immediately. */\n+\tFLASH_ERASE_GET_RESULT, /* Ask for last erase result */\n };\n \n-struct __ec_align4 ec_params_flash_erase_v1 {\n-\t/* One of ec_flash_erase_cmd. */\n-\tuint8_t cmd;\n-\t/* Pad byte; currently always contains 0 */\n-\tuint8_t reserved;\n-\t/* No flags defined yet; set to 0 */\n+/**\n+ * struct ec_params_flash_erase_v1 - Parameters for the flash erase command, v1.\n+ * @cmd: One of ec_flash_erase_cmd.\n+ * @reserved: Pad byte; currently always contains 0.\n+ * @flag: No flags defined yet; set to 0.\n+ * @params: Same as v0 parameters.\n+ */\n+struct ec_params_flash_erase_v1 {\n+\tuint8_t cmd;\n+\tuint8_t reserved;\n \tuint16_t flag;\n-\t/* Same as v0 parameters. */\n \tstruct ec_params_flash_erase params;\n-};\n+} __ec_align4;\n \n /*\n * Get/set flash protection.\n@@ -1343,56 +2034,78 @@ struct __ec_align4 ec_params_flash_erase_v1 {\n * If mask=0, simply returns the current flags state.\n */\n #define EC_CMD_FLASH_PROTECT 0x0015\n-#define EC_VER_FLASH_PROTECT 1 /* Command version 1 */\n+#define EC_VER_FLASH_PROTECT 1 /* Command version 1 */\n \n /* Flags for flash protection */\n /* RO flash code protected when the EC boots */\n-#define EC_FLASH_PROTECT_RO_AT_BOOT (1 << 0)\n+#define EC_FLASH_PROTECT_RO_AT_BOOT BIT(0)\n /*\n * RO flash code protected now. If this bit is set, at-boot status cannot\n * be changed.\n */\n-#define EC_FLASH_PROTECT_RO_NOW (1 << 1)\n+#define EC_FLASH_PROTECT_RO_NOW BIT(1)\n /* Entire flash code protected now, until reboot. */\n-#define EC_FLASH_PROTECT_ALL_NOW (1 << 2)\n+#define EC_FLASH_PROTECT_ALL_NOW BIT(2)\n /* Flash write protect GPIO is asserted now */\n-#define EC_FLASH_PROTECT_GPIO_ASSERTED (1 << 3)\n+#define EC_FLASH_PROTECT_GPIO_ASSERTED BIT(3)\n /* Error - at least one bank of flash is stuck locked, and cannot be unlocked */\n-#define EC_FLASH_PROTECT_ERROR_STUCK (1 << 4)\n+#define EC_FLASH_PROTECT_ERROR_STUCK BIT(4)\n /*\n * Error - flash protection is in inconsistent state. At least one bank of\n * flash which should be protected is not protected. Usually fixed by\n * re-requesting the desired flags, or by a hard reset if that fails.\n */\n-#define EC_FLASH_PROTECT_ERROR_INCONSISTENT (1 << 5)\n+#define EC_FLASH_PROTECT_ERROR_INCONSISTENT BIT(5)\n /* Entire flash code protected when the EC boots */\n-#define EC_FLASH_PROTECT_ALL_AT_BOOT (1 << 6)\n+#define EC_FLASH_PROTECT_ALL_AT_BOOT BIT(6)\n /* RW flash code protected when the EC boots */\n-#define EC_FLASH_PROTECT_RW_AT_BOOT (1 << 7)\n+#define EC_FLASH_PROTECT_RW_AT_BOOT BIT(7)\n /* RW flash code protected now. */\n-#define EC_FLASH_PROTECT_RW_NOW (1 << 8)\n+#define EC_FLASH_PROTECT_RW_NOW BIT(8)\n /* Rollback information flash region protected when the EC boots */\n-#define EC_FLASH_PROTECT_ROLLBACK_AT_BOOT (1 << 9)\n+#define EC_FLASH_PROTECT_ROLLBACK_AT_BOOT BIT(9)\n /* Rollback information flash region protected now */\n-#define EC_FLASH_PROTECT_ROLLBACK_NOW (1 << 10)\n+#define EC_FLASH_PROTECT_ROLLBACK_NOW BIT(10)\n+/* Error - Unknown error */\n+#define EC_FLASH_PROTECT_ERROR_UNKNOWN BIT(11)\n+\n+/**\n+ * struct ec_params_flash_protect - Parameters for the flash protect command.\n+ * @mask: Bits in flags to apply.\n+ * @flags: New flags to apply.\n+ */\n+struct ec_params_flash_protect {\n+\tuint32_t mask;\n+\tuint32_t flags;\n+} __ec_align4;\n \n-struct __ec_align4 ec_params_flash_protect {\n-\tuint32_t mask; /* Bits in flags to apply */\n-\tuint32_t flags; /* New flags to apply */\n+enum flash_protect_action {\n+\tFLASH_PROTECT_ASYNC = 0,\n+\tFLASH_PROTECT_GET_RESULT = 1,\n };\n \n-struct __ec_align4 ec_response_flash_protect {\n-\t/* Current value of flash protect flags */\n+/* Version 2 of the command is \"asynchronous\". */\n+struct ec_params_flash_protect_v2 {\n+\tuint8_t action; /**< enum flash_protect_action */\n+\tuint8_t reserved[3]; /**< padding for alignment */\n+\tuint32_t mask;\n+\tuint32_t flags;\n+} __ec_align4;\n+\n+/**\n+ * struct ec_response_flash_protect - Response to the flash protect command.\n+ * @flags: Current value of flash protect flags.\n+ * @valid_flags: Flags which are valid on this platform. This allows the\n+ * caller to distinguish between flags which aren't set vs. flags\n+ * which can't be set on this platform.\n+ * @writable_flags: Flags which can be changed given the current protection\n+ * state.\n+ */\n+struct ec_response_flash_protect {\n \tuint32_t flags;\n-\t/*\n-\t * Flags which are valid on this platform. This allows the caller\n-\t * to distinguish between flags which aren't set vs. flags which can't\n-\t * be set on this platform.\n-\t */\n \tuint32_t valid_flags;\n-\t/* Flags which can be changed given the current protection state */\n \tuint32_t writable_flags;\n-};\n+} __ec_align4;\n \n /*\n * Note: commands 0x14 - 0x19 version 0 were old commands to get/set flash\n@@ -1406,52 +2119,50 @@ struct __ec_align4 ec_response_flash_protect {\n enum ec_flash_region {\n \t/* Region which holds read-only EC image */\n \tEC_FLASH_REGION_RO = 0,\n-\t/* Region which holds active rewritable EC image */\n+\t/*\n+\t * Region which holds active RW image. 'Active' is different from\n+\t * 'running'. Active means 'scheduled-to-run'. Since RO image always\n+\t * scheduled to run, active/non-active applies only to RW images (for\n+\t * the same reason 'update' applies only to RW images. It's a state of\n+\t * an image on a flash. Running image can be RO, RW_A, RW_B but active\n+\t * image can only be RW_A or RW_B. In recovery mode, an active RW image\n+\t * doesn't enter 'running' state but it's still active on a flash.\n+\t */\n \tEC_FLASH_REGION_ACTIVE,\n \t/*\n \t * Region which should be write-protected in the factory (a superset of\n \t * EC_FLASH_REGION_RO)\n \t */\n \tEC_FLASH_REGION_WP_RO,\n-\t/* Region which holds updatable image */\n+\t/* Region which holds updatable (non-active) RW image */\n \tEC_FLASH_REGION_UPDATE,\n \t/* Number of regions */\n \tEC_FLASH_REGION_COUNT,\n };\n+/*\n+ * 'RW' is vague if there are multiple RW images; we mean the active one,\n+ * so the old constant is deprecated.\n+ */\n+#define EC_FLASH_REGION_RW EC_FLASH_REGION_ACTIVE\n \n-struct __ec_align4 ec_params_flash_region_info {\n-\tuint32_t region; /* enum ec_flash_region */\n-};\n+/**\n+ * struct ec_params_flash_region_info - Parameters for the flash region info\n+ * command.\n+ * @region: Flash region; see EC_FLASH_REGION_*\n+ */\n+struct ec_params_flash_region_info {\n+\tuint32_t region;\n+} __ec_align4;\n \n-struct __ec_align4 ec_response_flash_region_info {\n+struct ec_response_flash_region_info {\n \tuint32_t offset;\n \tuint32_t size;\n-};\n-\n-/* Read/write VbNvContext */\n-#define EC_CMD_VBNV_CONTEXT 0x0017\n-#define EC_VER_VBNV_CONTEXT 1\n-#define EC_VBNV_BLOCK_SIZE 16\n-#define EC_VBNV_BLOCK_SIZE_V2 64\n-\n-enum ec_vbnvcontext_op {\n-\tEC_VBNV_CONTEXT_OP_READ,\n-\tEC_VBNV_CONTEXT_OP_WRITE,\n-};\n-\n-struct __ec_align4 ec_params_vbnvcontext {\n-\tuint32_t op;\n-\tuint8_t block[EC_VBNV_BLOCK_SIZE_V2];\n-};\n-\n-struct __ec_align4 ec_response_vbnvcontext {\n-\tuint8_t block[EC_VBNV_BLOCK_SIZE_V2];\n-};\n+} __ec_align4;\n \n /* Get SPI flash information */\n #define EC_CMD_FLASH_SPI_INFO 0x0018\n \n-struct __ec_align1 ec_response_flash_spi_info {\n+struct ec_response_flash_spi_info {\n \t/* JEDEC info from command 0x9F (manufacturer, memory type, size) */\n \tuint8_t jedec[3];\n \n@@ -1463,70 +2174,163 @@ struct __ec_align1 ec_response_flash_spi_info {\n \n \t/* Status registers from command 0x05 and 0x35 */\n \tuint8_t sr1, sr2;\n-};\n+} __ec_align1;\n \n /* Select flash during flash operations */\n #define EC_CMD_FLASH_SELECT 0x0019\n \n-struct __ec_align4 ec_params_flash_select {\n-\t/* 1 to select flash, 0 to deselect flash */\n+/**\n+ * struct ec_params_flash_select - Parameters for the flash select command.\n+ * @select: 1 to select flash, 0 to deselect flash\n+ */\n+struct ec_params_flash_select {\n \tuint8_t select;\n+} __ec_align4;\n+\n+/**\n+ * Request random numbers to be generated and returned.\n+ * Can be used to test the random number generator is truly random.\n+ * See https://csrc.nist.gov/publications/detail/sp/800-22/rev-1a/final and\n+ * https://webhome.phy.duke.edu/~rgb/General/dieharder.php.\n+ */\n+#define EC_CMD_RAND_NUM 0x001A\n+#define EC_VER_RAND_NUM 0\n+\n+struct ec_params_rand_num {\n+\tuint16_t num_rand_bytes; /**< num random bytes to generate */\n+} __ec_align4;\n+\n+struct ec_response_rand_num {\n+\t/**\n+\t * generated random numbers in the range of 1 to EC_MAX_INSIZE. The true\n+\t * size of rand is determined by ec_params_rand_num's num_rand_bytes.\n+\t */\n+\tuint8_t rand[FLEXIBLE_ARRAY_MEMBER_SIZE];\n+} __ec_align1;\n+BUILD_ASSERT(sizeof(struct ec_response_rand_num) == 0);\n+\n+/**\n+ * Get information about the key used to sign the RW firmware.\n+ * For more details on the fields, see \"struct vb21_packed_key\".\n+ */\n+#define EC_CMD_RWSIG_INFO 0x001B\n+#define EC_VER_RWSIG_INFO 0\n+\n+#define VBOOT2_KEY_ID_BYTES 20\n+\n+#ifdef CHROMIUM_EC\n+/* Don't force external projects to depend on the vboot headers. */\n+#include \"vb21_struct.h\"\n+BUILD_ASSERT(sizeof(struct vb2_id) == VBOOT2_KEY_ID_BYTES);\n+#endif\n+\n+struct ec_response_rwsig_info {\n+\t/**\n+\t * Signature algorithm used by the key\n+\t * (enum vb2_signature_algorithm).\n+\t */\n+\tuint16_t sig_alg;\n+\n+\t/**\n+\t * Hash digest algorithm used with the key\n+\t * (enum vb2_hash_algorithm).\n+\t */\n+\tuint16_t hash_alg;\n+\n+\t/** Key version. */\n+\tuint32_t key_version;\n+\n+\t/** Key ID (struct vb2_id). */\n+\tuint8_t key_id[VBOOT2_KEY_ID_BYTES];\n+\n+\tuint8_t key_is_valid;\n+\n+\t/** Alignment padding. */\n+\tuint8_t reserved[3];\n+} __ec_align4;\n+\n+BUILD_ASSERT(sizeof(struct ec_response_rwsig_info) == 32);\n+\n+/**\n+ * Get information about the system, such as reset flags, locked state, etc.\n+ */\n+#define EC_CMD_SYSINFO 0x001C\n+#define EC_VER_SYSINFO 0\n+\n+enum sysinfo_flags {\n+\tSYSTEM_IS_LOCKED = BIT(0),\n+\tSYSTEM_IS_FORCE_LOCKED = BIT(1),\n+\tSYSTEM_JUMP_ENABLED = BIT(2),\n+\tSYSTEM_JUMPED_TO_CURRENT_IMAGE = BIT(3),\n+\tSYSTEM_REBOOT_AT_SHUTDOWN = BIT(4),\n+\t/*\n+\t * Used internally. It's set when EC_HOST_EVENT_KEYBOARD_RECOVERY is\n+\t * set and cleared when the system shuts down (not when the host event\n+\t * flag is cleared).\n+\t */\n+\tSYSTEM_IN_MANUAL_RECOVERY = BIT(5),\n };\n \n+struct ec_response_sysinfo {\n+\tuint32_t reset_flags; /**< EC_RESET_FLAG_* flags */\n+\tuint32_t current_image; /**< enum ec_image */\n+\tuint32_t flags; /**< enum sysinfo_flags */\n+} __ec_align4;\n+\n /*****************************************************************************/\n /* PWM commands */\n \n /* Get fan target RPM */\n #define EC_CMD_PWM_GET_FAN_TARGET_RPM 0x0020\n \n-struct __ec_align4 ec_response_pwm_get_fan_rpm {\n+struct ec_response_pwm_get_fan_rpm {\n \tuint32_t rpm;\n-};\n+} __ec_align4;\n \n /* Set target fan RPM */\n #define EC_CMD_PWM_SET_FAN_TARGET_RPM 0x0021\n \n /* Version 0 of input params */\n-struct __ec_align4 ec_params_pwm_set_fan_target_rpm_v0 {\n+struct ec_params_pwm_set_fan_target_rpm_v0 {\n \tuint32_t rpm;\n-};\n+} __ec_align4;\n \n /* Version 1 of input params */\n-struct __ec_align_size1 ec_params_pwm_set_fan_target_rpm_v1 {\n+struct ec_params_pwm_set_fan_target_rpm_v1 {\n \tuint32_t rpm;\n \tuint8_t fan_idx;\n-};\n+} __ec_align_size1;\n \n /* Get keyboard backlight */\n /* OBSOLETE - Use EC_CMD_PWM_SET_DUTY */\n #define EC_CMD_PWM_GET_KEYBOARD_BACKLIGHT 0x0022\n \n-struct __ec_align1 ec_response_pwm_get_keyboard_backlight {\n+struct ec_response_pwm_get_keyboard_backlight {\n \tuint8_t percent;\n \tuint8_t enabled;\n-};\n+} __ec_align1;\n \n /* Set keyboard backlight */\n /* OBSOLETE - Use EC_CMD_PWM_SET_DUTY */\n #define EC_CMD_PWM_SET_KEYBOARD_BACKLIGHT 0x0023\n \n-struct __ec_align1 ec_params_pwm_set_keyboard_backlight {\n+struct ec_params_pwm_set_keyboard_backlight {\n \tuint8_t percent;\n-};\n+} __ec_align1;\n \n /* Set target fan PWM duty cycle */\n #define EC_CMD_PWM_SET_FAN_DUTY 0x0024\n \n /* Version 0 of input params */\n-struct __ec_align4 ec_params_pwm_set_fan_duty_v0 {\n+struct ec_params_pwm_set_fan_duty_v0 {\n \tuint32_t percent;\n-};\n+} __ec_align4;\n \n /* Version 1 of input params */\n-struct __ec_align_size1 ec_params_pwm_set_fan_duty_v1 {\n+struct ec_params_pwm_set_fan_duty_v1 {\n \tuint32_t percent;\n \tuint8_t fan_idx;\n-};\n+} __ec_align_size1;\n \n #define EC_CMD_PWM_SET_DUTY 0x0025\n /* 16 bit duty cycle, 0xffff = 100% */\n@@ -1542,22 +2346,32 @@ enum ec_pwm_type {\n \tEC_PWM_TYPE_COUNT,\n };\n \n-struct __ec_align4 ec_params_pwm_set_duty {\n-\tuint16_t duty; /* Duty cycle, EC_PWM_MAX_DUTY = 100% */\n-\tuint8_t pwm_type; /* ec_pwm_type */\n-\tuint8_t index; /* Type-specific index, or 0 if unique */\n-};\n+struct ec_params_pwm_set_duty {\n+\tuint16_t duty; /* Duty cycle, EC_PWM_MAX_DUTY = 100% */\n+\tuint8_t pwm_type; /* ec_pwm_type */\n+\tuint8_t index; /* Type-specific index, or 0 if unique */\n+} __ec_align4;\n \n #define EC_CMD_PWM_GET_DUTY 0x0026\n \n-struct __ec_align1 ec_params_pwm_get_duty {\n-\tuint8_t pwm_type; /* ec_pwm_type */\n-\tuint8_t index; /* Type-specific index, or 0 if unique */\n-};\n+struct ec_params_pwm_get_duty {\n+\tuint8_t pwm_type; /* ec_pwm_type */\n+\tuint8_t index; /* Type-specific index, or 0 if unique */\n+} __ec_align1;\n \n-struct __ec_align2 ec_response_pwm_get_duty {\n-\tuint16_t duty; /* Duty cycle, EC_PWM_MAX_DUTY = 100% */\n-};\n+struct ec_response_pwm_get_duty {\n+\tuint16_t duty; /* Duty cycle, EC_PWM_MAX_DUTY = 100% */\n+} __ec_align2;\n+\n+#define EC_CMD_PWM_GET_FAN_DUTY 0x0027\n+\n+struct ec_params_pwm_get_fan_duty {\n+\tuint8_t fan_idx;\n+} __ec_align1;\n+\n+struct ec_response_pwm_get_fan_duty {\n+\tuint32_t percent; /* Percentage of duty cycle, ranging from 0 ~ 100 */\n+} __ec_align4;\n \n /*****************************************************************************/\n /*\n@@ -1568,21 +2382,23 @@ struct __ec_align2 ec_response_pwm_get_duty {\n */\n #define EC_CMD_LIGHTBAR_CMD 0x0028\n \n-struct __ec_todo_unpacked rgb_s {\n+struct rgb_s {\n \tuint8_t r, g, b;\n-};\n+} __ec_todo_unpacked;\n \n #define LB_BATTERY_LEVELS 4\n-/* List of tweakable parameters. NOTE: It's __packed so it can be sent in a\n+\n+/*\n+ * List of tweakable parameters. NOTE: It's __packed so it can be sent in a\n * host command, but the alignment is the same regardless. Keep it that way.\n */\n-struct __ec_todo_packed lightbar_params_v0 {\n+struct lightbar_params_v0 {\n \t/* Timing */\n \tint32_t google_ramp_up;\n \tint32_t google_ramp_down;\n \tint32_t s3s0_ramp_up;\n-\tint32_t s0_tick_delay[2];\t\t/* AC=0/1 */\n-\tint32_t s0a_tick_delay[2];\t\t/* AC=0/1 */\n+\tint32_t s0_tick_delay[2]; /* AC=0/1 */\n+\tint32_t s0a_tick_delay[2]; /* AC=0/1 */\n \tint32_t s0s3_ramp_down;\n \tint32_t s3_sleep_for;\n \tint32_t s3_ramp_up;\n@@ -1590,33 +2406,33 @@ struct __ec_todo_packed lightbar_params_v0 {\n \n \t/* Oscillation */\n \tuint8_t new_s0;\n-\tuint8_t osc_min[2];\t\t\t/* AC=0/1 */\n-\tuint8_t osc_max[2];\t\t\t/* AC=0/1 */\n-\tuint8_t w_ofs[2];\t\t\t/* AC=0/1 */\n+\tuint8_t osc_min[2]; /* AC=0/1 */\n+\tuint8_t osc_max[2]; /* AC=0/1 */\n+\tuint8_t w_ofs[2]; /* AC=0/1 */\n \n \t/* Brightness limits based on the backlight and AC. */\n-\tuint8_t bright_bl_off_fixed[2];\t\t/* AC=0/1 */\n-\tuint8_t bright_bl_on_min[2];\t\t/* AC=0/1 */\n-\tuint8_t bright_bl_on_max[2];\t\t/* AC=0/1 */\n+\tuint8_t bright_bl_off_fixed[2]; /* AC=0/1 */\n+\tuint8_t bright_bl_on_min[2]; /* AC=0/1 */\n+\tuint8_t bright_bl_on_max[2]; /* AC=0/1 */\n \n \t/* Battery level thresholds */\n \tuint8_t battery_threshold[LB_BATTERY_LEVELS - 1];\n \n \t/* Map [AC][battery_level] to color index */\n-\tuint8_t s0_idx[2][LB_BATTERY_LEVELS];\t/* AP is running */\n-\tuint8_t s3_idx[2][LB_BATTERY_LEVELS];\t/* AP is sleeping */\n+\tuint8_t s0_idx[2][LB_BATTERY_LEVELS]; /* AP is running */\n+\tuint8_t s3_idx[2][LB_BATTERY_LEVELS]; /* AP is sleeping */\n \n \t/* Color palette */\n-\tstruct rgb_s color[8];\t\t\t/* 0-3 are Google colors */\n-};\n+\tstruct rgb_s color[8]; /* 0-3 are Google colors */\n+} __ec_todo_packed;\n \n-struct __ec_todo_packed lightbar_params_v1 {\n+struct lightbar_params_v1 {\n \t/* Timing */\n \tint32_t google_ramp_up;\n \tint32_t google_ramp_down;\n \tint32_t s3s0_ramp_up;\n-\tint32_t s0_tick_delay[2];\t\t/* AC=0/1 */\n-\tint32_t s0a_tick_delay[2];\t\t/* AC=0/1 */\n+\tint32_t s0_tick_delay[2]; /* AC=0/1 */\n+\tint32_t s0a_tick_delay[2]; /* AC=0/1 */\n \tint32_t s0s3_ramp_down;\n \tint32_t s3_sleep_for;\n \tint32_t s3_ramp_up;\n@@ -1636,28 +2452,28 @@ struct __ec_todo_packed lightbar_params_v1 {\n \tuint8_t tap_idx[3];\n \n \t/* Oscillation */\n-\tuint8_t osc_min[2];\t\t\t/* AC=0/1 */\n-\tuint8_t osc_max[2];\t\t\t/* AC=0/1 */\n-\tuint8_t w_ofs[2];\t\t\t/* AC=0/1 */\n+\tuint8_t osc_min[2]; /* AC=0/1 */\n+\tuint8_t osc_max[2]; /* AC=0/1 */\n+\tuint8_t w_ofs[2]; /* AC=0/1 */\n \n \t/* Brightness limits based on the backlight and AC. */\n-\tuint8_t bright_bl_off_fixed[2];\t\t/* AC=0/1 */\n-\tuint8_t bright_bl_on_min[2];\t\t/* AC=0/1 */\n-\tuint8_t bright_bl_on_max[2];\t\t/* AC=0/1 */\n+\tuint8_t bright_bl_off_fixed[2]; /* AC=0/1 */\n+\tuint8_t bright_bl_on_min[2]; /* AC=0/1 */\n+\tuint8_t bright_bl_on_max[2]; /* AC=0/1 */\n \n \t/* Battery level thresholds */\n \tuint8_t battery_threshold[LB_BATTERY_LEVELS - 1];\n \n \t/* Map [AC][battery_level] to color index */\n-\tuint8_t s0_idx[2][LB_BATTERY_LEVELS];\t/* AP is running */\n-\tuint8_t s3_idx[2][LB_BATTERY_LEVELS];\t/* AP is sleeping */\n+\tuint8_t s0_idx[2][LB_BATTERY_LEVELS]; /* AP is running */\n+\tuint8_t s3_idx[2][LB_BATTERY_LEVELS]; /* AP is sleeping */\n \n \t/* s5: single color pulse on inhibited power-up */\n \tuint8_t s5_idx;\n \n \t/* Color palette */\n-\tstruct rgb_s color[8];\t\t\t/* 0-3 are Google colors */\n-};\n+\tstruct rgb_s color[8]; /* 0-3 are Google colors */\n+} __ec_todo_packed;\n \n /* Lightbar command params v2\n * crbug.com/467716\n@@ -1668,13 +2484,13 @@ struct __ec_todo_packed lightbar_params_v1 {\n * NOTE: Each of these groups must be less than 120 bytes.\n */\n \n-struct __ec_todo_packed lightbar_params_v2_timing {\n+struct lightbar_params_v2_timing {\n \t/* Timing */\n \tint32_t google_ramp_up;\n \tint32_t google_ramp_down;\n \tint32_t s3s0_ramp_up;\n-\tint32_t s0_tick_delay[2];\t\t/* AC=0/1 */\n-\tint32_t s0a_tick_delay[2];\t\t/* AC=0/1 */\n+\tint32_t s0_tick_delay[2]; /* AC=0/1 */\n+\tint32_t s0a_tick_delay[2]; /* AC=0/1 */\n \tint32_t s0s3_ramp_down;\n \tint32_t s3_sleep_for;\n \tint32_t s3_ramp_up;\n@@ -1684,9 +2500,9 @@ struct __ec_todo_packed lightbar_params_v2_timing {\n \tint32_t tap_tick_delay;\n \tint32_t tap_gate_delay;\n \tint32_t tap_display_time;\n-};\n+} __ec_todo_packed;\n \n-struct __ec_todo_packed lightbar_params_v2_tap {\n+struct lightbar_params_v2_tap {\n \t/* Tap-for-battery params */\n \tuint8_t tap_pct_red;\n \tuint8_t tap_pct_green;\n@@ -1694,56 +2510,79 @@ struct __ec_todo_packed lightbar_params_v2_tap {\n \tuint8_t tap_seg_max_on;\n \tuint8_t tap_seg_osc;\n \tuint8_t tap_idx[3];\n-};\n+} __ec_todo_packed;\n \n-struct __ec_todo_packed lightbar_params_v2_oscillation {\n+struct lightbar_params_v2_oscillation {\n \t/* Oscillation */\n-\tuint8_t osc_min[2];\t\t\t/* AC=0/1 */\n-\tuint8_t osc_max[2];\t\t\t/* AC=0/1 */\n-\tuint8_t w_ofs[2];\t\t\t/* AC=0/1 */\n-};\n+\tuint8_t osc_min[2]; /* AC=0/1 */\n+\tuint8_t osc_max[2]; /* AC=0/1 */\n+\tuint8_t w_ofs[2]; /* AC=0/1 */\n+} __ec_todo_packed;\n \n-struct __ec_todo_packed lightbar_params_v2_brightness {\n+struct lightbar_params_v2_brightness {\n \t/* Brightness limits based on the backlight and AC. */\n-\tuint8_t bright_bl_off_fixed[2];\t\t/* AC=0/1 */\n-\tuint8_t bright_bl_on_min[2];\t\t/* AC=0/1 */\n-\tuint8_t bright_bl_on_max[2];\t\t/* AC=0/1 */\n-};\n+\tuint8_t bright_bl_off_fixed[2]; /* AC=0/1 */\n+\tuint8_t bright_bl_on_min[2]; /* AC=0/1 */\n+\tuint8_t bright_bl_on_max[2]; /* AC=0/1 */\n+} __ec_todo_packed;\n \n-struct __ec_todo_packed lightbar_params_v2_thresholds {\n+struct lightbar_params_v2_thresholds {\n \t/* Battery level thresholds */\n \tuint8_t battery_threshold[LB_BATTERY_LEVELS - 1];\n-};\n+} __ec_todo_packed;\n \n-struct __ec_todo_packed lightbar_params_v2_colors {\n+struct lightbar_params_v2_colors {\n \t/* Map [AC][battery_level] to color index */\n-\tuint8_t s0_idx[2][LB_BATTERY_LEVELS];\t/* AP is running */\n-\tuint8_t s3_idx[2][LB_BATTERY_LEVELS];\t/* AP is sleeping */\n+\tuint8_t s0_idx[2][LB_BATTERY_LEVELS]; /* AP is running */\n+\tuint8_t s3_idx[2][LB_BATTERY_LEVELS]; /* AP is sleeping */\n \n \t/* s5: single color pulse on inhibited power-up */\n \tuint8_t s5_idx;\n \n \t/* Color palette */\n-\tstruct rgb_s color[8];\t\t\t/* 0-3 are Google colors */\n-};\n+\tstruct rgb_s color[8]; /* 0-3 are Google colors */\n+} __ec_todo_packed;\n \n-/* Lightbyte program. */\n+struct lightbar_params_v3 {\n+\t/*\n+\t * Number of LEDs reported by the EC.\n+\t * May be less than the actual number of LEDs in the lightbar.\n+\t */\n+\tuint8_t reported_led_num;\n+} __ec_todo_packed;\n+\n+/* Lightbar program. */\n #define EC_LB_PROG_LEN 192\n-struct __ec_todo_unpacked lightbar_program {\n+struct lightbar_program {\n \tuint8_t size;\n \tuint8_t data[EC_LB_PROG_LEN];\n-};\n+} __ec_todo_unpacked;\n+\n+/*\n+ * Lightbar program for large sequences. Sequences are sent in pieces, with\n+ * increasing offset. The sequences are still limited by the amount reserved in\n+ * EC RAM.\n+ */\n+struct lightbar_program_ex {\n+\tuint8_t size;\n+\tuint16_t offset;\n+\tuint8_t data[0];\n+} __ec_todo_packed;\n \n-struct __ec_todo_packed ec_params_lightbar {\n-\tuint8_t cmd;\t\t /* Command (see enum lightbar_command) */\n+struct ec_params_lightbar {\n+\tuint8_t cmd; /* Command (see enum lightbar_command) */\n \tunion {\n-\t\tstruct __ec_todo_unpacked {\n-\t\t\t/* no args */\n-\t\t} dump, off, on, init, get_seq, get_params_v0, get_params_v1,\n-\t\t\tversion, get_brightness, get_demo, suspend, resume,\n-\t\t\tget_params_v2_timing, get_params_v2_tap,\n-\t\t\tget_params_v2_osc, get_params_v2_bright,\n-\t\t\tget_params_v2_thlds, get_params_v2_colors;\n+\t\t/*\n+\t\t * The following commands have no args:\n+\t\t *\n+\t\t * dump, off, on, init, get_seq, get_params_v0, get_params_v1,\n+\t\t * version, get_brightness, get_demo, suspend, resume,\n+\t\t * get_params_v2_timing, get_params_v2_tap, get_params_v2_osc,\n+\t\t * get_params_v2_bright, get_params_v2_thlds,\n+\t\t * get_params_v2_colors\n+\t\t *\n+\t\t * Don't use an empty struct, because C++ hates that.\n+\t\t */\n \n \t\tstruct __ec_todo_unpacked {\n \t\t\tuint8_t num;\n@@ -1776,10 +2615,11 @@ struct __ec_todo_packed ec_params_lightbar {\n \t\tstruct lightbar_params_v2_colors set_v2par_colors;\n \n \t\tstruct lightbar_program set_program;\n+\t\tstruct lightbar_program_ex set_program_ex;\n \t};\n-};\n+} __ec_todo_packed;\n \n-struct __ec_todo_packed ec_response_lightbar {\n+struct ec_response_lightbar {\n \tunion {\n \t\tstruct __ec_todo_unpacked {\n \t\t\tstruct __ec_todo_unpacked {\n@@ -1803,6 +2643,8 @@ struct __ec_todo_packed ec_response_lightbar {\n \t\tstruct lightbar_params_v2_thresholds get_params_v2_thlds;\n \t\tstruct lightbar_params_v2_colors get_params_v2_colors;\n \n+\t\tstruct lightbar_params_v3 get_params_v3;\n+\n \t\tstruct __ec_todo_unpacked {\n \t\t\tuint32_t num;\n \t\t\tuint32_t flags;\n@@ -1812,16 +2654,17 @@ struct __ec_todo_packed ec_response_lightbar {\n \t\t\tuint8_t red, green, blue;\n \t\t} get_rgb;\n \n-\t\tstruct __ec_todo_unpacked {\n-\t\t\t/* no return params */\n-\t\t} off, on, init, set_brightness, seq, reg, set_rgb,\n-\t\t\tdemo, set_params_v0, set_params_v1,\n-\t\t\tset_program, manual_suspend_ctrl, suspend, resume,\n-\t\t\tset_v2par_timing, set_v2par_tap,\n-\t\t\tset_v2par_osc, set_v2par_bright, set_v2par_thlds,\n-\t\t\tset_v2par_colors;\n+\t\t/*\n+\t\t * The following commands have no response:\n+\t\t *\n+\t\t * off, on, init, set_brightness, seq, reg, set_rgb, demo,\n+\t\t * set_params_v0, set_params_v1, set_program,\n+\t\t * manual_suspend_ctrl, suspend, resume, set_v2par_timing,\n+\t\t * set_v2par_tap, set_v2par_osc, set_v2par_bright,\n+\t\t * set_v2par_thlds, set_v2par_colors\n+\t\t */\n \t};\n-};\n+} __ec_todo_packed;\n \n /* Lightbar commands */\n enum lightbar_command {\n@@ -1859,7 +2702,9 @@ enum lightbar_command {\n \tLIGHTBAR_CMD_SET_PARAMS_V2_THRESHOLDS = 31,\n \tLIGHTBAR_CMD_GET_PARAMS_V2_COLORS = 32,\n \tLIGHTBAR_CMD_SET_PARAMS_V2_COLORS = 33,\n-\tLIGHTBAR_NUM_CMDS\n+\tLIGHTBAR_CMD_GET_PARAMS_V3 = 34,\n+\tLIGHTBAR_CMD_SET_PROGRAM_EX = 35,\n+\tLIGHTBAR_NUM_CMDS,\n };\n \n /*****************************************************************************/\n@@ -1885,33 +2730,37 @@ enum ec_led_id {\n \tEC_LED_ID_RECOVERY_HW_REINIT_LED,\n \t/* LED to indicate sysrq debug mode. */\n \tEC_LED_ID_SYSRQ_DEBUG_LED,\n+\t/* LED strip for advanced patterns. */\n+\tEC_LED_ID_LIGHTBAR_LED,\n \n-\tEC_LED_ID_COUNT\n+\tEC_LED_ID_COUNT,\n };\n \n /* LED control flags */\n-#define EC_LED_FLAGS_QUERY (1 << 0) /* Query LED capability only */\n-#define EC_LED_FLAGS_AUTO (1 << 1) /* Switch LED back to automatic control */\n+#define EC_LED_FLAGS_QUERY BIT(0) /* Query LED capability only */\n+#define EC_LED_FLAGS_AUTO BIT(1) /* Switch LED back to automatic control */\n \n enum ec_led_colors {\n+\tEC_LED_COLOR_INVALID = -1,\n \tEC_LED_COLOR_RED = 0,\n \tEC_LED_COLOR_GREEN,\n \tEC_LED_COLOR_BLUE,\n \tEC_LED_COLOR_YELLOW,\n \tEC_LED_COLOR_WHITE,\n \tEC_LED_COLOR_AMBER,\n+\tEC_LED_COLOR_MAGENTA,\n \n-\tEC_LED_COLOR_COUNT\n+\tEC_LED_COLOR_COUNT,\n };\n \n-struct __ec_align1 ec_params_led_control {\n-\tuint8_t led_id; /* Which LED to control */\n-\tuint8_t flags; /* Control flags */\n+struct ec_params_led_control {\n+\tuint8_t led_id; /* Which LED to control */\n+\tuint8_t flags; /* Control flags */\n \n \tuint8_t brightness[EC_LED_COLOR_COUNT];\n-};\n+} __ec_align1;\n \n-struct __ec_align1 ec_response_led_control {\n+struct ec_response_led_control {\n \t/*\n \t * Available brightness value range.\n \t *\n@@ -1920,7 +2769,7 @@ struct __ec_align1 ec_response_led_control {\n \t * Other values means the LED is control by PWM.\n \t */\n \tuint8_t brightness_range[EC_LED_COLOR_COUNT];\n-};\n+} __ec_align1;\n \n /*****************************************************************************/\n /* Verified boot commands */\n@@ -1933,31 +2782,31 @@ struct __ec_align1 ec_response_led_control {\n /* Verified boot hash command */\n #define EC_CMD_VBOOT_HASH 0x002A\n \n-struct __ec_align4 ec_params_vboot_hash {\n-\tuint8_t cmd; /* enum ec_vboot_hash_cmd */\n-\tuint8_t hash_type; /* enum ec_vboot_hash_type */\n-\tuint8_t nonce_size; /* Nonce size; may be 0 */\n-\tuint8_t reserved0; /* Reserved; set 0 */\n-\tuint32_t offset; /* Offset in flash to hash */\n-\tuint32_t size; /* Number of bytes to hash */\n-\tuint8_t nonce_data[64]; /* Nonce data; ignored if nonce_size=0 */\n-};\n-\n-struct __ec_align4 ec_response_vboot_hash {\n-\tuint8_t status; /* enum ec_vboot_hash_status */\n-\tuint8_t hash_type; /* enum ec_vboot_hash_type */\n-\tuint8_t digest_size; /* Size of hash digest in bytes */\n-\tuint8_t reserved0; /* Ignore; will be 0 */\n-\tuint32_t offset; /* Offset in flash which was hashed */\n-\tuint32_t size; /* Number of bytes hashed */\n+struct ec_params_vboot_hash {\n+\tuint8_t cmd; /* enum ec_vboot_hash_cmd */\n+\tuint8_t hash_type; /* enum ec_vboot_hash_type */\n+\tuint8_t nonce_size; /* Nonce size; may be 0 */\n+\tuint8_t reserved0; /* Reserved; set 0 */\n+\tuint32_t offset; /* Offset in flash to hash */\n+\tuint32_t size; /* Number of bytes to hash */\n+\tuint8_t nonce_data[64]; /* Nonce data; ignored if nonce_size=0 */\n+} __ec_align4;\n+\n+struct ec_response_vboot_hash {\n+\tuint8_t status; /* enum ec_vboot_hash_status */\n+\tuint8_t hash_type; /* enum ec_vboot_hash_type */\n+\tuint8_t digest_size; /* Size of hash digest in bytes */\n+\tuint8_t reserved0; /* Ignore; will be 0 */\n+\tuint32_t offset; /* Offset in flash which was hashed */\n+\tuint32_t size; /* Number of bytes hashed */\n \tuint8_t hash_digest[64]; /* Hash digest data */\n-};\n+} __ec_align4;\n \n enum ec_vboot_hash_cmd {\n-\tEC_VBOOT_HASH_GET = 0, /* Get current hash status */\n-\tEC_VBOOT_HASH_ABORT = 1, /* Abort calculating current hash */\n-\tEC_VBOOT_HASH_START = 2, /* Start computing a new hash */\n-\tEC_VBOOT_HASH_RECALC = 3, /* Synchronously compute a new hash */\n+\tEC_VBOOT_HASH_GET = 0, /* Get current hash status */\n+\tEC_VBOOT_HASH_ABORT = 1, /* Abort calculating current hash */\n+\tEC_VBOOT_HASH_START = 2, /* Start computing a new hash */\n+\tEC_VBOOT_HASH_RECALC = 3, /* Synchronously compute a new hash */\n };\n \n enum ec_vboot_hash_type {\n@@ -1975,9 +2824,15 @@ enum ec_vboot_hash_status {\n * If one of these is specified, the EC will automatically update offset and\n * size to the correct values for the specified image (RO or RW).\n */\n-#define EC_VBOOT_HASH_OFFSET_RO\t\t0xfffffffe\n-#define EC_VBOOT_HASH_OFFSET_ACTIVE\t0xfffffffd\n-#define EC_VBOOT_HASH_OFFSET_UPDATE\t0xfffffffc\n+#define EC_VBOOT_HASH_OFFSET_RO 0xfffffffe\n+#define EC_VBOOT_HASH_OFFSET_ACTIVE 0xfffffffd\n+#define EC_VBOOT_HASH_OFFSET_UPDATE 0xfffffffc\n+\n+/*\n+ * 'RW' is vague if there are multiple RW images; we mean the active one,\n+ * so the old constant is deprecated.\n+ */\n+#define EC_VBOOT_HASH_OFFSET_RW EC_VBOOT_HASH_OFFSET_ACTIVE\n \n /*****************************************************************************/\n /*\n@@ -2063,7 +2918,7 @@ enum motionsense_command {\n \n \t/*\n \t * Sensor Offset command is a setter/getter command for the offset\n-\t * used for calibration.\n+\t * used for factory calibration.\n \t * The offsets can be calculated by the host, or via\n \t * PERFORM_CALIB command.\n \t */\n@@ -2099,8 +2954,28 @@ enum motionsense_command {\n \t */\n \tMOTIONSENSE_CMD_SPOOF = 16,\n \n+\t/* Set lid angle for tablet mode detection. */\n+\tMOTIONSENSE_CMD_TABLET_MODE_LID_ANGLE = 17,\n+\n+\t/*\n+\t * Sensor Scale command is a setter/getter command for the calibration\n+\t * scale.\n+\t */\n+\tMOTIONSENSE_CMD_SENSOR_SCALE = 18,\n+\n+\t/*\n+\t * Read the current online calibration values (if available).\n+\t */\n+\tMOTIONSENSE_CMD_ONLINE_CALIB_READ = 19,\n+\n+\t/*\n+\t * Activity management\n+\t * Retrieve current status of given activity.\n+\t */\n+\tMOTIONSENSE_CMD_GET_ACTIVITY = 20,\n+\n \t/* Number of motionsense sub-commands. */\n-\tMOTIONSENSE_NUM_CMDS\n+\tMOTIONSENSE_NUM_CMDS,\n };\n \n /* List of motion sensor types. */\n@@ -2112,6 +2987,8 @@ enum motionsensor_type {\n \tMOTIONSENSE_TYPE_LIGHT = 4,\n \tMOTIONSENSE_TYPE_ACTIVITY = 5,\n \tMOTIONSENSE_TYPE_BARO = 6,\n+\tMOTIONSENSE_TYPE_SYNC = 7,\n+\tMOTIONSENSE_TYPE_LIGHT_RGB = 8,\n \tMOTIONSENSE_TYPE_MAX,\n };\n \n@@ -2119,6 +2996,7 @@ enum motionsensor_type {\n enum motionsensor_location {\n \tMOTIONSENSE_LOC_BASE = 0,\n \tMOTIONSENSE_LOC_LID = 1,\n+\tMOTIONSENSE_LOC_CAMERA = 2,\n \tMOTIONSENSE_LOC_MAX,\n };\n \n@@ -2135,76 +3013,127 @@ enum motionsensor_chip {\n \tMOTIONSENSE_CHIP_BMA255 = 8,\n \tMOTIONSENSE_CHIP_BMP280 = 9,\n \tMOTIONSENSE_CHIP_OPT3001 = 10,\n-};\n+\tMOTIONSENSE_CHIP_BH1730 = 11,\n+\tMOTIONSENSE_CHIP_GPIO = 12,\n+\tMOTIONSENSE_CHIP_LIS2DH = 13,\n+\tMOTIONSENSE_CHIP_LSM6DSM = 14,\n+\tMOTIONSENSE_CHIP_LIS2DE = 15,\n+\tMOTIONSENSE_CHIP_LIS2MDL = 16,\n+\tMOTIONSENSE_CHIP_LSM6DS3 = 17,\n+\tMOTIONSENSE_CHIP_LSM6DSO = 18,\n+\tMOTIONSENSE_CHIP_LNG2DM = 19,\n+\tMOTIONSENSE_CHIP_TCS3400 = 20,\n+\tMOTIONSENSE_CHIP_LIS2DW12 = 21,\n+\tMOTIONSENSE_CHIP_LIS2DWL = 22,\n+\tMOTIONSENSE_CHIP_LIS2DS = 23,\n+\tMOTIONSENSE_CHIP_BMI260 = 24,\n+\tMOTIONSENSE_CHIP_ICM426XX = 25,\n+\tMOTIONSENSE_CHIP_ICM42607 = 26,\n+\tMOTIONSENSE_CHIP_BMA422 = 27,\n+\tMOTIONSENSE_CHIP_BMI323 = 28,\n+\tMOTIONSENSE_CHIP_BMI220 = 29,\n+\tMOTIONSENSE_CHIP_CM32183 = 30,\n+\tMOTIONSENSE_CHIP_VEML3328 = 31,\n+\tMOTIONSENSE_CHIP_CM36781 = 32,\n+\tMOTIONSENSE_CHIP_MAX,\n+};\n+\n+/* List of orientation positions */\n+enum motionsensor_orientation {\n+\tMOTIONSENSE_ORIENTATION_LANDSCAPE = 0,\n+\tMOTIONSENSE_ORIENTATION_PORTRAIT = 1,\n+\tMOTIONSENSE_ORIENTATION_UPSIDE_DOWN_PORTRAIT = 2,\n+\tMOTIONSENSE_ORIENTATION_UPSIDE_DOWN_LANDSCAPE = 3,\n+\tMOTIONSENSE_ORIENTATION_UNKNOWN = 4,\n+};\n+\n+struct ec_response_activity_data {\n+\tuint8_t activity; /* motionsensor_activity */\n+\tuint8_t state;\n+} __ec_todo_packed;\n \n-struct __ec_todo_packed ec_response_motion_sensor_data {\n+struct ec_response_motion_sensor_data {\n \t/* Flags for each sensor. */\n \tuint8_t flags;\n-\t/* sensor number the data comes from */\n+\t/* Sensor number the data comes from. */\n \tuint8_t sensor_num;\n \t/* Each sensor is up to 3-axis. */\n \tunion {\n-\t\tint16_t data[3];\n+\t\tint16_t data[3];\n+\t\t/* for sensors using unsigned data */\n+\t\tuint16_t udata[3];\n \t\tstruct __ec_todo_packed {\n-\t\t\tuint16_t reserved;\n-\t\t\tuint32_t timestamp;\n+\t\t\tuint16_t reserved;\n+\t\t\tuint32_t timestamp;\n \t\t};\n \t\tstruct __ec_todo_unpacked {\n-\t\t\tuint8_t activity; /* motionsensor_activity */\n-\t\t\tuint8_t state;\n-\t\t\tint16_t add_info[2];\n+\t\t\tstruct ec_response_activity_data activity_data;\n+\t\t\tint16_t add_info[2];\n \t\t};\n \t};\n+} __ec_todo_packed;\n+\n+/* Response to AP reporting calibration data for a given sensor. */\n+struct ec_response_online_calibration_data {\n+\t/** The calibration values. */\n+\tint16_t data[3];\n };\n \n /* Note: used in ec_response_get_next_data */\n-struct __ec_todo_packed ec_response_motion_sense_fifo_info {\n+struct ec_response_motion_sense_fifo_info {\n \t/* Size of the fifo */\n \tuint16_t size;\n \t/* Amount of space used in the fifo */\n \tuint16_t count;\n-\t/* Timestamp recorded in us */\n+\t/* Timestamp recorded in us.\n+\t * aka accurate timestamp when host event was triggered.\n+\t */\n \tuint32_t timestamp;\n \t/* Total amount of vector lost */\n \tuint16_t total_lost;\n \t/* Lost events since the last fifo_info, per sensors */\n \tuint16_t lost[0];\n-};\n+} __ec_todo_packed;\n \n-struct __ec_todo_packed ec_response_motion_sense_fifo_data {\n+struct ec_response_motion_sense_fifo_data {\n \tuint32_t number_data;\n \tstruct ec_response_motion_sensor_data data[0];\n-};\n+} __ec_todo_packed;\n \n /* List supported activity recognition */\n enum motionsensor_activity {\n \tMOTIONSENSE_ACTIVITY_RESERVED = 0,\n \tMOTIONSENSE_ACTIVITY_SIG_MOTION = 1,\n \tMOTIONSENSE_ACTIVITY_DOUBLE_TAP = 2,\n+\tMOTIONSENSE_ACTIVITY_ORIENTATION = 3,\n+\tMOTIONSENSE_ACTIVITY_BODY_DETECTION = 4,\n };\n \n-struct __ec_todo_unpacked ec_motion_sense_activity {\n+struct ec_motion_sense_activity {\n \tuint8_t sensor_num;\n \tuint8_t activity; /* one of enum motionsensor_activity */\n-\tuint8_t enable; /* 1: enable, 0: disable */\n+\tuint8_t enable; /* 1: enable, 0: disable */\n \tuint8_t reserved;\n-\tuint16_t parameters[3]; /* activity dependent parameters */\n-};\n+\tuint16_t parameters[4]; /* activity dependent parameters */\n+} __ec_todo_packed;\n \n /* Module flag masks used for the dump sub-command. */\n-#define MOTIONSENSE_MODULE_FLAG_ACTIVE (1<<0)\n+#define MOTIONSENSE_MODULE_FLAG_ACTIVE BIT(0)\n \n /* Sensor flag masks used for the dump sub-command. */\n-#define MOTIONSENSE_SENSOR_FLAG_PRESENT (1<<0)\n+#define MOTIONSENSE_SENSOR_FLAG_PRESENT BIT(0)\n \n /*\n * Flush entry for synchronization.\n * data contains time stamp\n */\n-#define MOTIONSENSE_SENSOR_FLAG_FLUSH (1<<0)\n-#define MOTIONSENSE_SENSOR_FLAG_TIMESTAMP (1<<1)\n-#define MOTIONSENSE_SENSOR_FLAG_WAKEUP (1<<2)\n-#define MOTIONSENSE_SENSOR_FLAG_TABLET_MODE (1<<3)\n+#define MOTIONSENSE_SENSOR_FLAG_FLUSH BIT(0)\n+#define MOTIONSENSE_SENSOR_FLAG_TIMESTAMP BIT(1)\n+#define MOTIONSENSE_SENSOR_FLAG_WAKEUP BIT(2)\n+#define MOTIONSENSE_SENSOR_FLAG_TABLET_MODE BIT(3)\n+#define MOTIONSENSE_SENSOR_FLAG_ODR BIT(4)\n+\n+#define MOTIONSENSE_SENSOR_FLAG_BYPASS_FIFO BIT(7)\n \n /*\n * Send this value for the data element to only perform a read. If you\n@@ -2213,11 +3142,14 @@ struct __ec_todo_unpacked ec_motion_sense_activity {\n */\n #define EC_MOTION_SENSE_NO_VALUE -1\n \n-#define EC_MOTION_SENSE_INVALID_CALIB_TEMP 0x8000\n+#define EC_MOTION_SENSE_INVALID_CALIB_TEMP INT16_MIN\n \n /* MOTIONSENSE_CMD_SENSOR_OFFSET subcommand flag */\n /* Set Calibration information */\n-#define MOTION_SENSE_SET_OFFSET 1\n+#define MOTION_SENSE_SET_OFFSET BIT(0)\n+\n+/* Default Scale value, factor 1. */\n+#define MOTION_SENSE_DEFAULT_SCALE BIT(15)\n \n #define LID_ANGLE_UNRELIABLE 500\n \n@@ -2235,10 +3167,10 @@ enum motionsense_spoof_mode {\n \tMOTIONSENSE_SPOOF_MODE_QUERY,\n };\n \n-struct __ec_todo_packed ec_params_motion_sense {\n+struct ec_params_motion_sense {\n \tuint8_t cmd;\n \tunion {\n-\t\t/* Used for MOTIONSENSE_CMD_DUMP */\n+\t\t/* Used for MOTIONSENSE_CMD_DUMP. */\n \t\tstruct __ec_todo_unpacked {\n \t\t\t/*\n \t\t\t * Maximal number of sensor the host is expecting.\n@@ -2253,17 +3185,26 @@ struct __ec_todo_packed ec_params_motion_sense {\n \t\t */\n \t\tstruct __ec_todo_unpacked {\n \t\t\t/* Data to set or EC_MOTION_SENSE_NO_VALUE to read.\n-\t\t\t * kb_wake_angle: angle to wakup AP.\n+\t\t\t * kb_wake_angle: angle to wakeup AP.\n \t\t\t */\n \t\t\tint16_t data;\n \t\t} kb_wake_angle;\n \n-\t\t/* Used for MOTIONSENSE_CMD_INFO, MOTIONSENSE_CMD_DATA\n-\t\t * and MOTIONSENSE_CMD_PERFORM_CALIB. */\n+\t\t/*\n+\t\t * Used for MOTIONSENSE_CMD_INFO, MOTIONSENSE_CMD_DATA\n+\t\t */\n+\t\tstruct __ec_todo_unpacked {\n+\t\t\tuint8_t sensor_num;\n+\t\t} info, info_3, info_4, data, fifo_flush, list_activities;\n+\n+\t\t/*\n+\t\t * Used for MOTIONSENSE_CMD_PERFORM_CALIB:\n+\t\t * Allow entering/exiting the calibration mode.\n+\t\t */\n \t\tstruct __ec_todo_unpacked {\n \t\t\tuint8_t sensor_num;\n-\t\t} info, info_3, data, fifo_flush, perform_calib,\n-\t\t\t\tlist_activities;\n+\t\t\tuint8_t enable;\n+\t\t} perform_calib;\n \n \t\t/*\n \t\t * Used for MOTIONSENSE_CMD_EC_RATE, MOTIONSENSE_CMD_SENSOR_ODR\n@@ -2310,9 +3251,37 @@ struct __ec_todo_packed ec_params_motion_sense {\n \t\t\tint16_t offset[3];\n \t\t} sensor_offset;\n \n+\t\t/* Used for MOTIONSENSE_CMD_SENSOR_SCALE */\n+\t\tstruct __ec_todo_packed {\n+\t\t\tuint8_t sensor_num;\n+\n+\t\t\t/*\n+\t\t\t * bit 0: If set (MOTION_SENSE_SET_OFFSET), set\n+\t\t\t * the calibration information in the EC.\n+\t\t\t * If unset, just retrieve calibration information.\n+\t\t\t */\n+\t\t\tuint16_t flags;\n+\n+\t\t\t/*\n+\t\t\t * Temperature at calibration, in units of 0.01 C\n+\t\t\t * 0x8000: invalid / unknown.\n+\t\t\t * 0x0: 0C\n+\t\t\t * 0x7fff: +327.67C\n+\t\t\t */\n+\t\t\tint16_t temp;\n+\n+\t\t\t/*\n+\t\t\t * Scale for calibration:\n+\t\t\t * By default scale is 1, it is encoded on 16bits:\n+\t\t\t * 1 = BIT(15)\n+\t\t\t * ~2 = 0xFFFF\n+\t\t\t * ~0 = 0.\n+\t\t\t */\n+\t\t\tuint16_t scale[3];\n+\t\t} sensor_scale;\n+\n \t\t/* Used for MOTIONSENSE_CMD_FIFO_INFO */\n-\t\tstruct __ec_todo_unpacked {\n-\t\t} fifo_info;\n+\t\t/* (no params) */\n \n \t\t/* Used for MOTIONSENSE_CMD_FIFO_READ */\n \t\tstruct __ec_todo_unpacked {\n@@ -2323,11 +3292,11 @@ struct __ec_todo_packed ec_params_motion_sense {\n \t\t\tuint32_t max_data_vector;\n \t\t} fifo_read;\n \n+\t\t/* Used for MOTIONSENSE_CMD_SET_ACTIVITY */\n \t\tstruct ec_motion_sense_activity set_activity;\n \n \t\t/* Used for MOTIONSENSE_CMD_LID_ANGLE */\n-\t\tstruct __ec_todo_unpacked {\n-\t\t} lid_angle;\n+\t\t/* (no params) */\n \n \t\t/* Used for MOTIONSENSE_CMD_FIFO_INT_ENABLE */\n \t\tstruct __ec_todo_unpacked {\n@@ -2348,24 +3317,74 @@ struct __ec_todo_packed ec_params_motion_sense {\n \t\t\t/* Ignored, used for alignment. */\n \t\t\tuint8_t reserved;\n \n-\t\t\t/* Individual component values to spoof. */\n-\t\t\tint16_t components[3];\n+\t\t\tunion {\n+\t\t\t\t/* Individual component values to spoof. */\n+\t\t\t\tint16_t components[3];\n+\n+\t\t\t\t/* Used when spoofing an activity */\n+\t\t\t\tstruct {\n+\t\t\t\t\t/* enum motionsensor_activity */\n+\t\t\t\t\tuint8_t activity_num;\n+\n+\t\t\t\t\t/* spoof activity state */\n+\t\t\t\t\tuint8_t activity_state;\n+\t\t\t\t};\n+\t\t\t} __ec_todo_packed;\n \t\t} spoof;\n-\t};\n+\n+\t\t/* Used for MOTIONSENSE_CMD_TABLET_MODE_LID_ANGLE. */\n+\t\tstruct __ec_todo_unpacked {\n+\t\t\t/*\n+\t\t\t * Lid angle threshold for switching between tablet and\n+\t\t\t * clamshell mode.\n+\t\t\t */\n+\t\t\tint16_t lid_angle;\n+\n+\t\t\t/*\n+\t\t\t * Hysteresis degree to prevent fluctuations between\n+\t\t\t * clamshell and tablet mode if lid angle keeps\n+\t\t\t * changing around the threshold. Lid motion driver will\n+\t\t\t * use lid_angle + hys_degree to trigger tablet mode and\n+\t\t\t * lid_angle - hys_degree to trigger clamshell mode.\n+\t\t\t */\n+\t\t\tint16_t hys_degree;\n+\t\t} tablet_mode_threshold;\n+\n+\t\t/*\n+\t\t * Used for MOTIONSENSE_CMD_ONLINE_CALIB_READ:\n+\t\t * Allow reading a single sensor's online calibration value.\n+\t\t */\n+\t\tstruct __ec_todo_unpacked {\n+\t\t\tuint8_t sensor_num;\n+\t\t} online_calib_read;\n+\n+\t\t/*\n+\t\t * Used for MOTIONSENSE_CMD_GET_ACTIVITY.\n+\t\t */\n+\t\tstruct __ec_todo_unpacked {\n+\t\t\tuint8_t sensor_num;\n+\t\t\tuint8_t activity; /* enum motionsensor_activity */\n+\t\t} get_activity;\n+\t} __ec_todo_packed;\n+} __ec_todo_packed;\n+\n+enum motion_sense_cmd_info_flags {\n+\t/* The sensor supports online calibration */\n+\tMOTION_SENSE_CMD_INFO_FLAG_ONLINE_CALIB = BIT(0),\n };\n \n-struct __ec_todo_packed ec_response_motion_sense {\n+struct ec_response_motion_sense {\n \tunion {\n \t\t/* Used for MOTIONSENSE_CMD_DUMP */\n \t\tstruct __ec_todo_unpacked {\n \t\t\t/* Flags representing the motion sensor module. */\n \t\t\tuint8_t module_flags;\n \n-\t\t\t/* Number of sensors managed directly by the EC */\n+\t\t\t/* Number of sensors managed directly by the EC. */\n \t\t\tuint8_t sensor_count;\n \n \t\t\t/*\n-\t\t\t * sensor data is truncated if response_max is too small\n+\t\t\t * Sensor data is truncated if response_max is too small\n \t\t\t * for holding all the data.\n \t\t\t */\n \t\t\tstruct ec_response_motion_sensor_data sensor[0];\n@@ -2404,40 +3423,77 @@ struct __ec_todo_packed ec_response_motion_sense {\n \t\t\tuint32_t fifo_max_event_count;\n \t\t} info_3;\n \n-\t\t/* Used for MOTIONSENSE_CMD_DATA */\n-\t\tstruct ec_response_motion_sensor_data data;\n+\t\t/* Used for MOTIONSENSE_CMD_INFO version 4 */\n+\t\tstruct __ec_align4 {\n+\t\t\t/* Should be element of enum motionsensor_type. */\n+\t\t\tuint8_t type;\n \n-\t\t/*\n-\t\t * Used for MOTIONSENSE_CMD_EC_RATE, MOTIONSENSE_CMD_SENSOR_ODR,\n-\t\t * MOTIONSENSE_CMD_SENSOR_RANGE,\n-\t\t * MOTIONSENSE_CMD_KB_WAKE_ANGLE,\n-\t\t * MOTIONSENSE_CMD_FIFO_INT_ENABLE and\n-\t\t * MOTIONSENSE_CMD_SPOOF.\n+\t\t\t/* Should be element of enum motionsensor_location. */\n+\t\t\tuint8_t location;\n+\n+\t\t\t/* Should be element of enum motionsensor_chip. */\n+\t\t\tuint8_t chip;\n+\n+\t\t\t/* Minimum sensor sampling frequency */\n+\t\t\tuint32_t min_frequency;\n+\n+\t\t\t/* Maximum sensor sampling frequency */\n+\t\t\tuint32_t max_frequency;\n+\n+\t\t\t/* Max number of sensor events that could be in fifo */\n+\t\t\tuint32_t fifo_max_event_count;\n+\n+\t\t\t/*\n+\t\t\t * Should be elements of\n+\t\t\t * enum motion_sense_cmd_info_flags\n+\t\t\t */\n+\t\t\tuint32_t flags;\n+\t\t} info_4;\n+\n+\t\t/* Used for MOTIONSENSE_CMD_DATA */\n+\t\tstruct ec_response_motion_sensor_data data;\n+\n+\t\t/*\n+\t\t * Used for MOTIONSENSE_CMD_EC_RATE, MOTIONSENSE_CMD_SENSOR_ODR,\n+\t\t * MOTIONSENSE_CMD_SENSOR_RANGE,\n+\t\t * MOTIONSENSE_CMD_KB_WAKE_ANGLE,\n+\t\t * MOTIONSENSE_CMD_FIFO_INT_ENABLE and\n+\t\t * MOTIONSENSE_CMD_SPOOF.\n \t\t */\n \t\tstruct __ec_todo_unpacked {\n \t\t\t/* Current value of the parameter queried. */\n \t\t\tint32_t ret;\n \t\t} ec_rate, sensor_odr, sensor_range, kb_wake_angle,\n-\t\t fifo_int_enable, spoof;\n+\t\t\tfifo_int_enable, spoof;\n \n-\t\t/* Used for MOTIONSENSE_CMD_SENSOR_OFFSET */\n-\t\tstruct __ec_todo_unpacked {\n+\t\t/*\n+\t\t * Used for MOTIONSENSE_CMD_SENSOR_OFFSET,\n+\t\t * PERFORM_CALIB.\n+\t\t */\n+\t\tstruct __ec_todo_unpacked {\n \t\t\tint16_t temp;\n \t\t\tint16_t offset[3];\n \t\t} sensor_offset, perform_calib;\n \n+\t\t/* Used for MOTIONSENSE_CMD_SENSOR_SCALE */\n+\t\tstruct __ec_todo_unpacked {\n+\t\t\tint16_t temp;\n+\t\t\tuint16_t scale[3];\n+\t\t} sensor_scale;\n+\n \t\tstruct ec_response_motion_sense_fifo_info fifo_info, fifo_flush;\n \n \t\tstruct ec_response_motion_sense_fifo_data fifo_read;\n \n+\t\tstruct ec_response_online_calibration_data online_calib_read;\n+\n \t\tstruct __ec_todo_packed {\n \t\t\tuint16_t reserved;\n \t\t\tuint32_t enabled;\n \t\t\tuint32_t disabled;\n \t\t} list_activities;\n \n-\t\tstruct __ec_todo_unpacked {\n-\t\t} set_activity;\n+\t\t/* No params for set activity */\n \n \t\t/* Used for MOTIONSENSE_CMD_LID_ANGLE */\n \t\tstruct __ec_todo_unpacked {\n@@ -2447,8 +3503,25 @@ struct __ec_todo_packed ec_response_motion_sense {\n \t\t\t */\n \t\t\tuint16_t value;\n \t\t} lid_angle;\n+\n+\t\t/* Used for MOTIONSENSE_CMD_TABLET_MODE_LID_ANGLE. */\n+\t\tstruct __ec_todo_unpacked {\n+\t\t\t/*\n+\t\t\t * Lid angle threshold for switching between tablet and\n+\t\t\t * clamshell mode.\n+\t\t\t */\n+\t\t\tuint16_t lid_angle;\n+\n+\t\t\t/* Hysteresis degree. */\n+\t\t\tuint16_t hys_degree;\n+\t\t} tablet_mode_threshold;\n+\n+\t\t/* USED for MOTIONSENSE_CMD_GET_ACTIVITY. */\n+\t\tstruct __ec_todo_unpacked {\n+\t\t\tuint8_t state;\n+\t\t} get_activity;\n \t};\n-};\n+} __ec_todo_packed;\n \n /*****************************************************************************/\n /* Force lid open command */\n@@ -2456,9 +3529,9 @@ struct __ec_todo_packed ec_response_motion_sense {\n /* Make lid event always open */\n #define EC_CMD_FORCE_LID_OPEN 0x002C\n \n-struct __ec_align1 ec_params_force_lid_open {\n+struct ec_params_force_lid_open {\n \tuint8_t enabled;\n-};\n+} __ec_align1;\n \n /*****************************************************************************/\n /* Configure the behavior of the power button */\n@@ -2466,13 +3539,13 @@ struct __ec_align1 ec_params_force_lid_open {\n \n enum ec_config_power_button_flags {\n \t/* Enable/Disable power button pulses for x86 devices */\n-\tEC_POWER_BUTTON_ENABLE_PULSE = (1 << 0),\n+\tEC_POWER_BUTTON_ENABLE_PULSE = BIT(0),\n };\n \n-struct __ec_align1 ec_params_config_power_button {\n+struct ec_params_config_power_button {\n \t/* See enum ec_config_power_button_flags */\n \tuint8_t flags;\n-};\n+} __ec_align1;\n \n /*****************************************************************************/\n /* USB charging control commands */\n@@ -2480,11 +3553,52 @@ struct __ec_align1 ec_params_config_power_button {\n /* Set USB port charging mode */\n #define EC_CMD_USB_CHARGE_SET_MODE 0x0030\n \n-struct __ec_align1 ec_params_usb_charge_set_mode {\n+enum usb_charge_mode {\n+\t/* Disable USB port. */\n+\tUSB_CHARGE_MODE_DISABLED,\n+\t/* Set USB port to Standard Downstream Port, USB 2.0 mode. */\n+\tUSB_CHARGE_MODE_SDP2,\n+\t/* Set USB port to Charging Downstream Port, BC 1.2. */\n+\tUSB_CHARGE_MODE_CDP,\n+\t/* Set USB port to Dedicated Charging Port, BC 1.2. */\n+\tUSB_CHARGE_MODE_DCP_SHORT,\n+\t/* Enable USB port (for dumb ports). */\n+\tUSB_CHARGE_MODE_ENABLED,\n+\t/* Set USB port to CONFIG_USB_PORT_POWER_SMART_DEFAULT_MODE. */\n+\tUSB_CHARGE_MODE_DEFAULT,\n+\n+\tUSB_CHARGE_MODE_COUNT,\n+};\n+\n+enum usb_suspend_charge {\n+\t/* Enable charging in suspend */\n+\tUSB_ALLOW_SUSPEND_CHARGE,\n+\t/* Disable charging in suspend */\n+\tUSB_DISALLOW_SUSPEND_CHARGE,\n+};\n+\n+struct ec_params_usb_charge_set_mode {\n \tuint8_t usb_port_id;\n-\tuint8_t mode;\n+\tuint8_t mode : 7; /* enum usb_charge_mode */\n+\tuint8_t inhibit_charge : 1; /* enum usb_suspend_charge */\n+} __ec_align1;\n+\n+/*****************************************************************************/\n+/* Tablet mode commands */\n+\n+/* Set tablet mode */\n+#define EC_CMD_SET_TABLET_MODE 0x0031\n+\n+enum tablet_mode_override {\n+\tTABLET_MODE_DEFAULT,\n+\tTABLET_MODE_FORCE_TABLET,\n+\tTABLET_MODE_FORCE_CLAMSHELL,\n };\n \n+struct ec_params_set_tablet_mode {\n+\tuint8_t tablet_mode; /* enum tablet_mode_override */\n+} __ec_align1;\n+\n /*****************************************************************************/\n /* Persistent storage for host */\n \n@@ -2494,12 +3608,12 @@ struct __ec_align1 ec_params_usb_charge_set_mode {\n /* Get persistent storage info */\n #define EC_CMD_PSTORE_INFO 0x0040\n \n-struct __ec_align4 ec_response_pstore_info {\n+struct ec_response_pstore_info {\n \t/* Persistent storage size, in bytes */\n \tuint32_t pstore_size;\n \t/* Access size; read/write offset and size must be a multiple of this */\n \tuint32_t access_size;\n-};\n+} __ec_align4;\n \n /*\n * Read persistent storage\n@@ -2508,31 +3622,31 @@ struct __ec_align4 ec_response_pstore_info {\n */\n #define EC_CMD_PSTORE_READ 0x0041\n \n-struct __ec_align4 ec_params_pstore_read {\n-\tuint32_t offset; /* Byte offset to read */\n-\tuint32_t size; /* Size to read in bytes */\n-};\n+struct ec_params_pstore_read {\n+\tuint32_t offset; /* Byte offset to read */\n+\tuint32_t size; /* Size to read in bytes */\n+} __ec_align4;\n \n /* Write persistent storage */\n #define EC_CMD_PSTORE_WRITE 0x0042\n \n-struct __ec_align4 ec_params_pstore_write {\n-\tuint32_t offset; /* Byte offset to write */\n-\tuint32_t size; /* Size to write in bytes */\n+struct ec_params_pstore_write {\n+\tuint32_t offset; /* Byte offset to write */\n+\tuint32_t size; /* Size to write in bytes */\n \tuint8_t data[EC_PSTORE_SIZE_MAX];\n-};\n+} __ec_align4;\n \n /*****************************************************************************/\n /* Real-time clock */\n \n /* RTC params and response structures */\n-struct __ec_align4 ec_params_rtc {\n+struct ec_params_rtc {\n \tuint32_t time;\n-};\n+} __ec_align4;\n \n-struct __ec_align4 ec_response_rtc {\n+struct ec_response_rtc {\n \tuint32_t time;\n-};\n+} __ec_align4;\n \n /* These use ec_response_rtc */\n #define EC_CMD_RTC_GET_VALUE 0x0044\n@@ -2560,17 +3674,17 @@ enum ec_port80_subcmd {\n \tEC_PORT80_READ_BUFFER,\n };\n \n-struct __ec_todo_packed ec_params_port80_read {\n+struct ec_params_port80_read {\n \tuint16_t subcmd;\n \tunion {\n \t\tstruct __ec_todo_unpacked {\n \t\t\tuint32_t offset;\n \t\t\tuint32_t num_entries;\n \t\t} read_buffer;\n-\t};\n-};\n+\t} __ec_todo_packed;\n+} __ec_todo_packed;\n \n-struct __ec_todo_packed ec_response_port80_read {\n+struct ec_response_port80_read {\n \tunion {\n \t\tstruct __ec_todo_unpacked {\n \t\t\tuint32_t writes;\n@@ -2581,11 +3695,11 @@ struct __ec_todo_packed ec_response_port80_read {\n \t\t\tuint16_t codes[EC_PORT80_SIZE_MAX];\n \t\t} data;\n \t};\n-};\n+} __ec_todo_packed;\n \n-struct __ec_align2 ec_response_port80_last_boot {\n+struct ec_response_port80_last_boot {\n \tuint16_t code;\n-};\n+} __ec_align2;\n \n /*****************************************************************************/\n /* Temporary secure storage for host verified boot use */\n@@ -2598,12 +3712,12 @@ struct __ec_align2 ec_response_port80_last_boot {\n \n /* Get persistent storage info */\n #define EC_CMD_VSTORE_INFO 0x0049\n-struct __ec_align_size1 ec_response_vstore_info {\n+struct ec_response_vstore_info {\n \t/* Indicates which slots are locked */\n \tuint32_t slot_locked;\n \t/* Total number of slots available */\n \tuint8_t slot_count;\n-};\n+} __ec_align_size1;\n \n /*\n * Read temporary secure storage\n@@ -2612,23 +3726,23 @@ struct __ec_align_size1 ec_response_vstore_info {\n */\n #define EC_CMD_VSTORE_READ 0x004A\n \n-struct __ec_align1 ec_params_vstore_read {\n+struct ec_params_vstore_read {\n \tuint8_t slot; /* Slot to read from */\n-};\n+} __ec_align1;\n \n-struct __ec_align1 ec_response_vstore_read {\n+struct ec_response_vstore_read {\n \tuint8_t data[EC_VSTORE_SLOT_SIZE];\n-};\n+} __ec_align1;\n \n /*\n * Write temporary secure storage and lock it.\n */\n #define EC_CMD_VSTORE_WRITE 0x004B\n \n-struct __ec_align1 ec_params_vstore_write {\n+struct ec_params_vstore_write {\n \tuint8_t slot; /* Slot to write to */\n \tuint8_t data[EC_VSTORE_SLOT_SIZE];\n-};\n+} __ec_align1;\n \n /*****************************************************************************/\n /* Thermal engine commands. Note that there are two implementations. We'll\n@@ -2645,21 +3759,21 @@ struct __ec_align1 ec_params_vstore_write {\n */\n \n /* Version 0 - set */\n-struct __ec_align2 ec_params_thermal_set_threshold {\n+struct ec_params_thermal_set_threshold {\n \tuint8_t sensor_type;\n \tuint8_t threshold_id;\n \tuint16_t value;\n-};\n+} __ec_align2;\n \n /* Version 0 - get */\n-struct __ec_align1 ec_params_thermal_get_threshold {\n+struct ec_params_thermal_get_threshold {\n \tuint8_t sensor_type;\n \tuint8_t threshold_id;\n-};\n+} __ec_align1;\n \n-struct __ec_align2 ec_response_thermal_get_threshold {\n+struct ec_response_thermal_get_threshold {\n \tuint16_t value;\n-};\n+} __ec_align2;\n \n /* The version 1 structs are visible. */\n enum ec_temp_thresholds {\n@@ -2667,45 +3781,80 @@ enum ec_temp_thresholds {\n \tEC_TEMP_THRESH_HIGH,\n \tEC_TEMP_THRESH_HALT,\n \n-\tEC_TEMP_THRESH_COUNT\n+\tEC_TEMP_THRESH_COUNT,\n };\n \n /*\n * Thermal configuration for one temperature sensor. Temps are in degrees K.\n * Zero values will be silently ignored by the thermal task.\n *\n+ * Set 'temp_host' value allows thermal task to trigger some event with 1 degree\n+ * hysteresis.\n+ * For example,\n+ *\ttemp_host[EC_TEMP_THRESH_HIGH] = 300 K\n+ *\ttemp_host_release[EC_TEMP_THRESH_HIGH] = 0 K\n+ * EC will throttle ap when temperature >= 301 K, and release throttling when\n+ * temperature <= 299 K.\n+ *\n+ * Set 'temp_host_release' value allows thermal task has a custom hysteresis.\n+ * For example,\n+ *\ttemp_host[EC_TEMP_THRESH_HIGH] = 300 K\n+ *\ttemp_host_release[EC_TEMP_THRESH_HIGH] = 295 K\n+ * EC will throttle ap when temperature >= 301 K, and release throttling when\n+ * temperature <= 294 K.\n+ *\n * Note that this structure is a sub-structure of\n * ec_params_thermal_set_threshold_v1, but maintains its alignment there.\n */\n-struct __ec_align4 ec_thermal_config {\n+struct ec_thermal_config {\n \tuint32_t temp_host[EC_TEMP_THRESH_COUNT]; /* levels of hotness */\n-\tuint32_t temp_fan_off;\t\t/* no active cooling needed */\n-\tuint32_t temp_fan_max;\t\t/* max active cooling needed */\n-};\n+\tuint32_t temp_host_release[EC_TEMP_THRESH_COUNT]; /* release levels */\n+\tuint32_t temp_fan_off; /* no active cooling needed */\n+\tuint32_t temp_fan_max; /* max active cooling needed */\n+} __ec_align4;\n \n /* Version 1 - get config for one sensor. */\n-struct __ec_align4 ec_params_thermal_get_threshold_v1 {\n+struct ec_params_thermal_get_threshold_v1 {\n \tuint32_t sensor_num;\n-};\n+} __ec_align4;\n /* This returns a struct ec_thermal_config */\n \n-/* Version 1 - set config for one sensor.\n- * Use read-modify-write for best results! */\n-struct __ec_align4 ec_params_thermal_set_threshold_v1 {\n+/*\n+ * Version 1 - set config for one sensor.\n+ * Use read-modify-write for best results!\n+ */\n+struct ec_params_thermal_set_threshold_v1 {\n \tuint32_t sensor_num;\n \tstruct ec_thermal_config cfg;\n-};\n+} __ec_align4;\n /* This returns no data */\n \n /****************************************************************************/\n \n-/* Toggle automatic fan control */\n+/* Set or get fan control mode */\n #define EC_CMD_THERMAL_AUTO_FAN_CTRL 0x0052\n \n+enum ec_auto_fan_ctrl_cmd {\n+\tEC_AUTO_FAN_CONTROL_CMD_SET = 0,\n+\tEC_AUTO_FAN_CONTROL_CMD_GET,\n+};\n+\n /* Version 1 of input params */\n-struct __ec_align1 ec_params_auto_fan_ctrl_v1 {\n+struct ec_params_auto_fan_ctrl_v1 {\n \tuint8_t fan_idx;\n-};\n+} __ec_align1;\n+\n+/* Version 2 of input params */\n+struct ec_params_auto_fan_ctrl_v2 {\n+\tuint8_t fan_idx;\n+\tuint8_t cmd; /* enum ec_auto_fan_ctrl_cmd */\n+\tuint8_t set_auto; /* only used with EC_AUTO_FAN_CONTROL_CMD_SET - bool\n+\t\t\t */\n+} __ec_align4;\n+\n+struct ec_response_auto_fan_control {\n+\tuint8_t is_auto; /* bool */\n+} __ec_align1;\n \n /* Get/Set TMP006 calibration data */\n #define EC_CMD_TMP006_GET_CALIBRATION 0x0053\n@@ -2721,54 +3870,54 @@ struct __ec_align1 ec_params_auto_fan_ctrl_v1 {\n */\n \n /* This is the same struct for both v0 and v1. */\n-struct __ec_align1 ec_params_tmp006_get_calibration {\n+struct ec_params_tmp006_get_calibration {\n \tuint8_t index;\n-};\n+} __ec_align1;\n \n /* Version 0 */\n-struct __ec_align4 ec_response_tmp006_get_calibration_v0 {\n+struct ec_response_tmp006_get_calibration_v0 {\n \tfloat s0;\n \tfloat b0;\n \tfloat b1;\n \tfloat b2;\n-};\n+} __ec_align4;\n \n-struct __ec_align4 ec_params_tmp006_set_calibration_v0 {\n+struct ec_params_tmp006_set_calibration_v0 {\n \tuint8_t index;\n \tuint8_t reserved[3];\n \tfloat s0;\n \tfloat b0;\n \tfloat b1;\n \tfloat b2;\n-};\n+} __ec_align4;\n \n /* Version 1 */\n-struct __ec_align4 ec_response_tmp006_get_calibration_v1 {\n+struct ec_response_tmp006_get_calibration_v1 {\n \tuint8_t algorithm;\n \tuint8_t num_params;\n \tuint8_t reserved[2];\n-\tfloat val[0];\n-};\n+\tfloat val[FLEXIBLE_ARRAY_MEMBER_SIZE];\n+} __ec_align4;\n \n-struct __ec_align4 ec_params_tmp006_set_calibration_v1 {\n+struct ec_params_tmp006_set_calibration_v1 {\n \tuint8_t index;\n \tuint8_t algorithm;\n \tuint8_t num_params;\n \tuint8_t reserved;\n-\tfloat val[0];\n-};\n+\tfloat val[FLEXIBLE_ARRAY_MEMBER_SIZE];\n+} __ec_align4;\n \n /* Read raw TMP006 data */\n #define EC_CMD_TMP006_GET_RAW 0x0055\n \n-struct __ec_align1 ec_params_tmp006_get_raw {\n+struct ec_params_tmp006_get_raw {\n \tuint8_t index;\n-};\n+} __ec_align1;\n \n-struct __ec_align4 ec_response_tmp006_get_raw {\n-\tint32_t t; /* In 1/100 K */\n-\tint32_t v; /* In nV */\n-};\n+struct ec_response_tmp006_get_raw {\n+\tint32_t t; /* In 1/100 K */\n+\tint32_t v; /* In nV */\n+} __ec_align4;\n \n /*****************************************************************************/\n /* MKBP - Matrix KeyBoard Protocol */\n@@ -2790,17 +3939,17 @@ struct __ec_align4 ec_response_tmp006_get_raw {\n */\n #define EC_CMD_MKBP_INFO 0x0061\n \n-struct __ec_align_size1 ec_response_mkbp_info {\n+struct ec_response_mkbp_info {\n \tuint32_t rows;\n \tuint32_t cols;\n \t/* Formerly \"switches\", which was 0. */\n \tuint8_t reserved;\n-};\n+} __ec_align_size1;\n \n-struct __ec_align1 ec_params_mkbp_info {\n+struct ec_params_mkbp_info {\n \tuint8_t info_type;\n \tuint8_t event_type;\n-};\n+} __ec_align1;\n \n enum ec_mkbp_info_type {\n \t/*\n@@ -2844,11 +3993,11 @@ enum ec_mkbp_info_type {\n /* Simulate key press */\n #define EC_CMD_MKBP_SIMULATE_KEY 0x0062\n \n-struct __ec_align1 ec_params_mkbp_simulate_key {\n+struct ec_params_mkbp_simulate_key {\n \tuint8_t col;\n \tuint8_t row;\n \tuint8_t pressed;\n-};\n+} __ec_align1;\n \n /* Configure keyboard scanning */\n #define EC_CMD_MKBP_SET_CONFIG 0x0064\n@@ -2856,17 +4005,17 @@ struct __ec_align1 ec_params_mkbp_simulate_key {\n \n /* flags */\n enum mkbp_config_flags {\n-\tEC_MKBP_FLAGS_ENABLE = 1,\t/* Enable keyboard scanning */\n+\tEC_MKBP_FLAGS_ENABLE = 1, /* Enable keyboard scanning */\n };\n \n enum mkbp_config_valid {\n-\tEC_MKBP_VALID_SCAN_PERIOD\t\t= 1 << 0,\n-\tEC_MKBP_VALID_POLL_TIMEOUT\t\t= 1 << 1,\n-\tEC_MKBP_VALID_MIN_POST_SCAN_DELAY\t= 1 << 3,\n-\tEC_MKBP_VALID_OUTPUT_SETTLE\t\t= 1 << 4,\n-\tEC_MKBP_VALID_DEBOUNCE_DOWN\t\t= 1 << 5,\n-\tEC_MKBP_VALID_DEBOUNCE_UP\t\t= 1 << 6,\n-\tEC_MKBP_VALID_FIFO_MAX_DEPTH\t\t= 1 << 7,\n+\tEC_MKBP_VALID_SCAN_PERIOD = BIT(0),\n+\tEC_MKBP_VALID_POLL_TIMEOUT = BIT(1),\n+\tEC_MKBP_VALID_MIN_POST_SCAN_DELAY = BIT(3),\n+\tEC_MKBP_VALID_OUTPUT_SETTLE = BIT(4),\n+\tEC_MKBP_VALID_DEBOUNCE_DOWN = BIT(5),\n+\tEC_MKBP_VALID_DEBOUNCE_UP = BIT(6),\n+\tEC_MKBP_VALID_FIFO_MAX_DEPTH = BIT(7),\n };\n \n /*\n@@ -2875,11 +4024,11 @@ enum mkbp_config_valid {\n * Note that this is used as a sub-structure of\n * ec_{params/response}_mkbp_get_config.\n */\n-struct __ec_align_size1 ec_mkbp_config {\n-\tuint32_t valid_mask;\t\t/* valid fields */\n-\tuint8_t flags;\t\t/* some flags (enum mkbp_config_flags) */\n-\tuint8_t valid_flags;\t\t/* which flags are valid */\n-\tuint16_t scan_period_us;\t/* period between start of scans */\n+struct ec_mkbp_config {\n+\tuint32_t valid_mask; /* valid fields */\n+\tuint8_t flags; /* some flags (enum mkbp_config_flags) */\n+\tuint8_t valid_flags; /* which flags are valid */\n+\tuint16_t scan_period_us; /* period between start of scans */\n \t/* revert to interrupt mode after no activity for this long */\n \tuint32_t poll_timeout_us;\n \t/*\n@@ -2890,29 +4039,29 @@ struct __ec_align_size1 ec_mkbp_config {\n \tuint16_t min_post_scan_delay_us;\n \t/* delay between setting up output and waiting for it to settle */\n \tuint16_t output_settle_us;\n-\tuint16_t debounce_down_us;\t/* time for debounce on key down */\n-\tuint16_t debounce_up_us;\t/* time for debounce on key up */\n+\tuint16_t debounce_down_us; /* time for debounce on key down */\n+\tuint16_t debounce_up_us; /* time for debounce on key up */\n \t/* maximum depth to allow for fifo (0 = no keyscan output) */\n \tuint8_t fifo_max_depth;\n-};\n+} __ec_align_size1;\n \n-struct __ec_align_size1 ec_params_mkbp_set_config {\n+struct ec_params_mkbp_set_config {\n \tstruct ec_mkbp_config config;\n-};\n+} __ec_align_size1;\n \n-struct __ec_align_size1 ec_response_mkbp_get_config {\n+struct ec_response_mkbp_get_config {\n \tstruct ec_mkbp_config config;\n-};\n+} __ec_align_size1;\n \n /* Run the key scan emulation */\n #define EC_CMD_KEYSCAN_SEQ_CTRL 0x0066\n \n enum ec_keyscan_seq_cmd {\n-\tEC_KEYSCAN_SEQ_STATUS = 0,\t/* Get status information */\n-\tEC_KEYSCAN_SEQ_CLEAR = 1,\t/* Clear sequence */\n-\tEC_KEYSCAN_SEQ_ADD = 2,\t\t/* Add item to sequence */\n-\tEC_KEYSCAN_SEQ_START = 3,\t/* Start running sequence */\n-\tEC_KEYSCAN_SEQ_COLLECT = 4,\t/* Collect sequence summary data */\n+\tEC_KEYSCAN_SEQ_STATUS = 0, /* Get status information */\n+\tEC_KEYSCAN_SEQ_CLEAR = 1, /* Clear sequence */\n+\tEC_KEYSCAN_SEQ_ADD = 2, /* Add item to sequence */\n+\tEC_KEYSCAN_SEQ_START = 3, /* Start running sequence */\n+\tEC_KEYSCAN_SEQ_COLLECT = 4, /* Collect sequence summary data */\n };\n \n enum ec_collect_flags {\n@@ -2920,19 +4069,19 @@ enum ec_collect_flags {\n \t * Indicates this scan was processed by the EC. Due to timing, some\n \t * scans may be skipped.\n \t */\n-\tEC_KEYSCAN_SEQ_FLAG_DONE\t= 1 << 0,\n+\tEC_KEYSCAN_SEQ_FLAG_DONE = BIT(0),\n };\n \n-struct __ec_align1 ec_collect_item {\n-\tuint8_t flags;\t\t/* some flags (enum ec_collect_flags) */\n-};\n+struct ec_collect_item {\n+\tuint8_t flags; /* some flags (enum ec_collect_flags) */\n+} __ec_align1;\n \n-struct __ec_todo_packed ec_params_keyscan_seq_ctrl {\n-\tuint8_t cmd;\t/* Command to send (enum ec_keyscan_seq_cmd) */\n+struct ec_params_keyscan_seq_ctrl {\n+\tuint8_t cmd; /* Command to send (enum ec_keyscan_seq_cmd) */\n \tunion {\n \t\tstruct __ec_align1 {\n-\t\t\tuint8_t active;\t\t/* still active */\n-\t\t\tuint8_t num_items;\t/* number of items */\n+\t\t\tuint8_t active; /* still active */\n+\t\t\tuint8_t num_items; /* number of items */\n \t\t\t/* Current item being presented */\n \t\t\tuint8_t cur_item;\n \t\t} status;\n@@ -2942,32 +4091,49 @@ struct __ec_todo_packed ec_params_keyscan_seq_ctrl {\n \t\t\t * start of the sequence.\n \t\t\t */\n \t\t\tuint32_t time_us;\n-\t\t\tuint8_t scan[0];\t/* keyscan data */\n+\t\t\t/* keyscan data */\n+\t\t\tuint8_t scan[FLEXIBLE_ARRAY_MEMBER_SIZE];\n \t\t} add;\n \t\tstruct __ec_align1 {\n-\t\t\tuint8_t start_item;\t/* First item to return */\n-\t\t\tuint8_t num_items;\t/* Number of items to return */\n+\t\t\tuint8_t start_item; /* First item to return */\n+\t\t\tuint8_t num_items; /* Number of items to return */\n \t\t} collect;\n \t};\n-};\n+} __ec_todo_packed;\n \n-struct __ec_todo_packed ec_result_keyscan_seq_ctrl {\n+struct ec_result_keyscan_seq_ctrl {\n \tunion {\n \t\tstruct __ec_todo_unpacked {\n-\t\t\tuint8_t num_items;\t/* Number of items */\n+\t\t\tuint8_t num_items; /* Number of items */\n \t\t\t/* Data for each item */\n-\t\t\tstruct ec_collect_item item[0];\n+\t\t\tstruct ec_collect_item item[FLEXIBLE_ARRAY_MEMBER_SIZE];\n \t\t} collect;\n \t};\n-};\n+} __ec_todo_packed;\n \n /*\n * Get the next pending MKBP event.\n *\n * Returns EC_RES_UNAVAILABLE if there is no event pending.\n+ *\n+ * V0: ec_response_get_next_data\n+ * V1: ec_response_get_next_data_v1. Increased key_matrix size from 13 -> 16.\n+ * V2: Added EC_MKBP_HAS_MORE_EVENTS.\n+ * V3: ec_response_get_next_data_v3. Increased key_matrix size from 16 -> 18.\n */\n #define EC_CMD_GET_NEXT_EVENT 0x0067\n \n+#define EC_MKBP_HAS_MORE_EVENTS_SHIFT 7\n+\n+/*\n+ * We use the most significant bit of the event type to indicate to the host\n+ * that the EC has more MKBP events available to provide.\n+ */\n+#define EC_MKBP_HAS_MORE_EVENTS BIT(EC_MKBP_HAS_MORE_EVENTS_SHIFT)\n+\n+/* The mask to apply to get the raw event type */\n+#define EC_MKBP_EVENT_TYPE_MASK (BIT(EC_MKBP_HAS_MORE_EVENTS_SHIFT) - 1)\n+\n enum ec_mkbp_event {\n \t/* Keyboard matrix changed. The event data is the new matrix state. */\n \tEC_MKBP_EVENT_KEY_MATRIX = 0,\n@@ -2993,15 +4159,110 @@ enum ec_mkbp_event {\n \t */\n \tEC_MKBP_EVENT_SYSRQ = 6,\n \n+\t/*\n+\t * New 64-bit host event.\n+\t * The event data is 8 bytes of host event flags.\n+\t */\n+\tEC_MKBP_EVENT_HOST_EVENT64 = 7,\n+\n+\t/* Notify the AP that something happened on CEC */\n+\tEC_MKBP_EVENT_CEC_EVENT = 8,\n+\n+\t/* Send an incoming CEC message to the AP */\n+\tEC_MKBP_EVENT_CEC_MESSAGE = 9,\n+\n+\t/* We have entered DisplayPort Alternate Mode on a Type-C port. */\n+\tEC_MKBP_EVENT_DP_ALT_MODE_ENTERED = 10,\n+\n+\t/* New online calibration values are available. */\n+\tEC_MKBP_EVENT_ONLINE_CALIBRATION = 11,\n+\n+\t/* Peripheral device charger event */\n+\tEC_MKBP_EVENT_PCHG = 12,\n+\n \t/* Number of MKBP events */\n \tEC_MKBP_EVENT_COUNT,\n };\n+BUILD_ASSERT(EC_MKBP_EVENT_COUNT <= EC_MKBP_EVENT_TYPE_MASK);\n+\n+/* clang-format off */\n+#define EC_MKBP_EVENT_TEXT \\\n+\t{ \\\n+\t\t[EC_MKBP_EVENT_KEY_MATRIX] = \"KEY_MATRIX\", \\\n+\t\t[EC_MKBP_EVENT_HOST_EVENT] = \"HOST_EVENT\", \\\n+\t\t[EC_MKBP_EVENT_SENSOR_FIFO] = \"SENSOR_FIFO\", \\\n+\t\t[EC_MKBP_EVENT_BUTTON] = \"BUTTON\", \\\n+\t\t[EC_MKBP_EVENT_SWITCH] = \"SWITCH\", \\\n+\t\t[EC_MKBP_EVENT_FINGERPRINT] = \"FINGERPRINT\", \\\n+\t\t[EC_MKBP_EVENT_SYSRQ] = \"SYSRQ\", \\\n+\t\t[EC_MKBP_EVENT_HOST_EVENT64] = \"HOST_EVENT64\", \\\n+\t\t[EC_MKBP_EVENT_CEC_EVENT] = \"CEC_EVENT\", \\\n+\t\t[EC_MKBP_EVENT_CEC_MESSAGE] = \"CEC_MESSAGE\", \\\n+\t\t[EC_MKBP_EVENT_DP_ALT_MODE_ENTERED] = \"DP_ALT_MODE_ENTERED\", \\\n+\t\t[EC_MKBP_EVENT_ONLINE_CALIBRATION] = \"ONLINE_CALIBRATION\", \\\n+\t\t[EC_MKBP_EVENT_PCHG] = \"PCHG\", \\\n+\t}\n+/* clang-format on */\n \n union __ec_align_offset1 ec_response_get_next_data {\n \tuint8_t key_matrix[13];\n \n \t/* Unaligned */\n \tuint32_t host_event;\n+\tuint64_t host_event64;\n+\n+\tstruct __ec_todo_unpacked {\n+\t\t/* For aligning the fifo_info */\n+\t\tuint8_t reserved[3];\n+\t\tstruct ec_response_motion_sense_fifo_info info;\n+\t} sensor_fifo;\n+\n+\tuint32_t buttons;\n+\n+\tuint32_t switches;\n+\n+\tuint32_t fp_events;\n+\n+\tuint32_t sysrq;\n+\n+\t/* CEC events from enum mkbp_cec_event */\n+\tuint32_t cec_events;\n+};\n+\n+union __ec_align_offset1 ec_response_get_next_data_v1 {\n+\tuint8_t key_matrix[16];\n+\n+\t/* Unaligned */\n+\tuint32_t host_event;\n+\tuint64_t host_event64;\n+\n+\tstruct __ec_todo_unpacked {\n+\t\t/* For aligning the fifo_info */\n+\t\tuint8_t reserved[3];\n+\t\tstruct ec_response_motion_sense_fifo_info info;\n+\t} sensor_fifo;\n+\n+\tuint32_t buttons;\n+\n+\tuint32_t switches;\n+\n+\tuint32_t fp_events;\n+\n+\tuint32_t sysrq;\n+\n+\t/* CEC events from enum mkbp_cec_event */\n+\tuint32_t cec_events;\n+\n+\tuint8_t cec_message[16];\n+};\n+BUILD_ASSERT(sizeof(union ec_response_get_next_data_v1) == 16);\n+\n+union __ec_align_offset1 ec_response_get_next_data_v3 {\n+\tuint8_t key_matrix[18];\n+\n+\t/* Unaligned */\n+\tuint32_t host_event;\n+\tuint64_t host_event64;\n \n \tstruct __ec_todo_unpacked {\n \t\t/* For aligning the fifo_info */\n@@ -3016,37 +4277,136 @@ union __ec_align_offset1 ec_response_get_next_data {\n \tuint32_t fp_events;\n \n \tuint32_t sysrq;\n+\n+\t/* CEC events from enum mkbp_cec_event */\n+\tuint32_t cec_events;\n+\n+\tuint8_t cec_message[16];\n };\n+BUILD_ASSERT(sizeof(union ec_response_get_next_data_v3) == 18);\n \n-struct __ec_align1 ec_response_get_next_event {\n+struct ec_response_get_next_event {\n \tuint8_t event_type;\n \t/* Followed by event data if any */\n \tunion ec_response_get_next_data data;\n-};\n+} __ec_align1;\n+\n+struct ec_response_get_next_event_v1 {\n+\tuint8_t event_type;\n+\t/* Followed by event data if any */\n+\tunion ec_response_get_next_data_v1 data;\n+} __ec_align1;\n+\n+struct ec_response_get_next_event_v3 {\n+\tuint8_t event_type;\n+\t/* Followed by event data if any */\n+\tunion ec_response_get_next_data_v3 data;\n+} __ec_align1;\n \n /* Bit indices for buttons and switches.*/\n /* Buttons */\n-#define EC_MKBP_POWER_BUTTON\t0\n-#define EC_MKBP_VOL_UP\t\t1\n-#define EC_MKBP_VOL_DOWN\t2\n-#define EC_MKBP_RECOVERY\t3\n+#define EC_MKBP_POWER_BUTTON 0\n+#define EC_MKBP_VOL_UP 1\n+#define EC_MKBP_VOL_DOWN 2\n+#define EC_MKBP_RECOVERY 3\n \n /* Switches */\n-#define EC_MKBP_LID_OPEN\t0\n-#define EC_MKBP_TABLET_MODE\t1\n+#define EC_MKBP_LID_OPEN 0\n+#define EC_MKBP_TABLET_MODE 1\n+#define EC_MKBP_BASE_ATTACHED 2\n+#define EC_MKBP_FRONT_PROXIMITY 3\n \n /* Run keyboard factory test scanning */\n #define EC_CMD_KEYBOARD_FACTORY_TEST 0x0068\n \n-struct __ec_align2 ec_response_keyboard_factory_test {\n-\tuint16_t shorted;\t/* Keyboard pins are shorted */\n-};\n+struct ec_response_keyboard_factory_test {\n+\tuint16_t shorted; /* Keyboard pins are shorted */\n+} __ec_align2;\n \n /* Fingerprint events in 'fp_events' for EC_MKBP_EVENT_FINGERPRINT */\n #define EC_MKBP_FP_RAW_EVENT(fp_events) ((fp_events) & 0x00FFFFFF)\n-#define EC_MKBP_FP_FINGER_DOWN (1 << 29)\n-#define EC_MKBP_FP_FINGER_UP (1 << 30)\n-#define EC_MKBP_FP_IMAGE_READY (1 << 31)\n+#define EC_MKBP_FP_ERRCODE(fp_events) ((fp_events) & 0x0000000F)\n+#define EC_MKBP_FP_ENROLL_PROGRESS_OFFSET 4\n+#define EC_MKBP_FP_ENROLL_PROGRESS(fpe) \\\n+\t(((fpe) & 0x00000FF0) >> EC_MKBP_FP_ENROLL_PROGRESS_OFFSET)\n+#define EC_MKBP_FP_MATCH_IDX_OFFSET 12\n+#define EC_MKBP_FP_MATCH_IDX_MASK 0x0000F000\n+#define EC_MKBP_FP_MATCH_IDX(fpe) \\\n+\t(((fpe) & EC_MKBP_FP_MATCH_IDX_MASK) >> EC_MKBP_FP_MATCH_IDX_OFFSET)\n+#define EC_MKBP_FP_ENROLL BIT(27)\n+#define EC_MKBP_FP_MATCH BIT(28)\n+#define EC_MKBP_FP_FINGER_DOWN BIT(29)\n+#define EC_MKBP_FP_FINGER_UP BIT(30)\n+#define EC_MKBP_FP_IMAGE_READY BIT(31)\n+/* code given by EC_MKBP_FP_ERRCODE() when EC_MKBP_FP_ENROLL is set */\n+#define EC_MKBP_FP_ERR_ENROLL_OK 0\n+#define EC_MKBP_FP_ERR_ENROLL_LOW_QUALITY 1\n+#define EC_MKBP_FP_ERR_ENROLL_IMMOBILE 2\n+#define EC_MKBP_FP_ERR_ENROLL_LOW_COVERAGE 3\n+#define EC_MKBP_FP_ERR_ENROLL_INTERNAL 5\n+/* Can be used to detect if image was usable for enrollment or not. */\n+#define EC_MKBP_FP_ERR_ENROLL_PROBLEM_MASK 1\n+/* code given by EC_MKBP_FP_ERRCODE() when EC_MKBP_FP_MATCH is set */\n+#define EC_MKBP_FP_ERR_MATCH_NO 0\n+#define EC_MKBP_FP_ERR_MATCH_NO_INTERNAL 6\n+#define EC_MKBP_FP_ERR_MATCH_NO_TEMPLATES 7\n+#define EC_MKBP_FP_ERR_MATCH_NO_AUTH_FAIL 8\n+#define EC_MKBP_FP_ERR_MATCH_NO_LOW_QUALITY 2\n+#define EC_MKBP_FP_ERR_MATCH_NO_LOW_COVERAGE 4\n+#define EC_MKBP_FP_ERR_MATCH_YES 1\n+#define EC_MKBP_FP_ERR_MATCH_YES_UPDATED 3\n+#define EC_MKBP_FP_ERR_MATCH_YES_UPDATE_FAILED 5\n+\n+#define EC_CMD_MKBP_WAKE_MASK 0x0069\n+enum ec_mkbp_event_mask_action {\n+\t/* Retrieve the value of a wake mask. */\n+\tGET_WAKE_MASK = 0,\n+\n+\t/* Set the value of a wake mask. */\n+\tSET_WAKE_MASK,\n+};\n+\n+enum ec_mkbp_mask_type {\n+\t/*\n+\t * These are host events sent via MKBP.\n+\t *\n+\t * Some examples are:\n+\t * EC_HOST_EVENT_MASK(EC_HOST_EVENT_LID_OPEN)\n+\t * EC_HOST_EVENT_MASK(EC_HOST_EVENT_KEY_PRESSED)\n+\t *\n+\t * The only things that should be in this mask are:\n+\t * EC_HOST_EVENT_MASK(EC_HOST_EVENT_*)\n+\t */\n+\tEC_MKBP_HOST_EVENT_WAKE_MASK = 0,\n+\n+\t/*\n+\t * These are MKBP events. Some examples are:\n+\t *\n+\t * EC_MKBP_EVENT_KEY_MATRIX\n+\t * EC_MKBP_EVENT_SWITCH\n+\t *\n+\t * The only things that should be in this mask are EC_MKBP_EVENT_*.\n+\t */\n+\tEC_MKBP_EVENT_WAKE_MASK,\n+};\n+\n+struct ec_params_mkbp_event_wake_mask {\n+\t/* One of enum ec_mkbp_event_mask_action */\n+\tuint8_t action;\n+\n+\t/*\n+\t * Which MKBP mask are you interested in acting upon? This is one of\n+\t * ec_mkbp_mask_type.\n+\t */\n+\tuint8_t mask_type;\n+\n+\t/* If setting a new wake mask, this contains the mask to set. */\n+\tuint32_t new_wake_mask;\n+};\n+\n+struct ec_response_mkbp_event_wake_mask {\n+\tuint32_t wake_mask;\n+};\n \n /*****************************************************************************/\n /* Temperature sensor commands */\n@@ -3054,14 +4414,14 @@ struct __ec_align2 ec_response_keyboard_factory_test {\n /* Read temperature sensor info */\n #define EC_CMD_TEMP_SENSOR_GET_INFO 0x0070\n \n-struct __ec_align1 ec_params_temp_sensor_get_info {\n+struct ec_params_temp_sensor_get_info {\n \tuint8_t id;\n-};\n+} __ec_align1;\n \n-struct __ec_align1 ec_response_temp_sensor_get_info {\n+struct ec_response_temp_sensor_get_info {\n \tchar sensor_name[32];\n \tuint8_t sensor_type;\n-};\n+} __ec_align1;\n \n /*****************************************************************************/\n \n@@ -3074,39 +4434,42 @@ struct __ec_align1 ec_response_temp_sensor_get_info {\n /*****************************************************************************/\n /* Host event commands */\n \n-/* Obsolete. New implementation should use EC_CMD_PROGRAM_HOST_EVENT instead */\n+/* Obsolete. New implementation should use EC_CMD_HOST_EVENT instead */\n /*\n * Host event mask params and response structures, shared by all of the host\n * event commands below.\n */\n-struct __ec_align4 ec_params_host_event_mask {\n+struct ec_params_host_event_mask {\n \tuint32_t mask;\n-};\n+} __ec_align4;\n \n-struct __ec_align4 ec_response_host_event_mask {\n+struct ec_response_host_event_mask {\n \tuint32_t mask;\n-};\n+} __ec_align4;\n \n /* These all use ec_response_host_event_mask */\n-#define EC_CMD_HOST_EVENT_GET_B 0x0087\n-#define EC_CMD_HOST_EVENT_GET_SMI_MASK 0x0088\n-#define EC_CMD_HOST_EVENT_GET_SCI_MASK 0x0089\n+#define EC_CMD_HOST_EVENT_GET_B 0x0087\n+#define EC_CMD_HOST_EVENT_GET_SMI_MASK 0x0088\n+#define EC_CMD_HOST_EVENT_GET_SCI_MASK 0x0089\n #define EC_CMD_HOST_EVENT_GET_WAKE_MASK 0x008D\n \n /* These all use ec_params_host_event_mask */\n-#define EC_CMD_HOST_EVENT_SET_SMI_MASK 0x008A\n-#define EC_CMD_HOST_EVENT_SET_SCI_MASK 0x008B\n-#define EC_CMD_HOST_EVENT_CLEAR 0x008C\n+#define EC_CMD_HOST_EVENT_SET_SMI_MASK 0x008A\n+#define EC_CMD_HOST_EVENT_SET_SCI_MASK 0x008B\n+#define EC_CMD_HOST_EVENT_CLEAR 0x008C\n #define EC_CMD_HOST_EVENT_SET_WAKE_MASK 0x008E\n-#define EC_CMD_HOST_EVENT_CLEAR_B 0x008F\n+#define EC_CMD_HOST_EVENT_CLEAR_B 0x008F\n \n /*\n * Unified host event programming interface - Should be used by newer versions\n * of BIOS/OS to program host events and masks\n+ *\n+ * EC returns:\n+ * - EC_RES_INVALID_PARAM: Action or mask type is unknown.\n+ * - EC_RES_ACCESS_DENIED: Action is prohibited for specified mask type.\n */\n \n-struct __ec_align4 ec_params_host_event {\n-\n+struct ec_params_host_event {\n \t/* Action requested by host - one of enum ec_host_event_action. */\n \tuint8_t action;\n \n@@ -3121,18 +4484,17 @@ struct __ec_align4 ec_params_host_event {\n \n \t/* Value to be used in case of set operations. */\n \tuint64_t value;\n-};\n+} __ec_align4;\n \n /*\n * Response structure returned by EC_CMD_HOST_EVENT.\n * Update the value on a GET request. Set to 0 on GET/CLEAR\n */\n \n-struct __ec_align4 ec_response_host_event {\n-\n+struct ec_response_host_event {\n \t/* Mask value in case of get operation */\n \tuint64_t value;\n-};\n+} __ec_align4;\n \n enum ec_host_event_action {\n \t/*\n@@ -3178,7 +4540,7 @@ enum ec_host_event_mask_type {\n \tEC_HOST_EVENT_LAZY_WAKE_MASK_S5,\n };\n \n-#define EC_CMD_HOST_EVENT 0x00A4\n+#define EC_CMD_HOST_EVENT 0x00A4\n \n /*****************************************************************************/\n /* Switch commands */\n@@ -3186,21 +4548,21 @@ enum ec_host_event_mask_type {\n /* Enable/disable LCD backlight */\n #define EC_CMD_SWITCH_ENABLE_BKLIGHT 0x0090\n \n-struct __ec_align1 ec_params_switch_enable_backlight {\n+struct ec_params_switch_enable_backlight {\n \tuint8_t enabled;\n-};\n+} __ec_align1;\n \n /* Enable/disable WLAN/Bluetooth */\n #define EC_CMD_SWITCH_ENABLE_WIRELESS 0x0091\n #define EC_VER_SWITCH_ENABLE_WIRELESS 1\n \n /* Version 0 params; no response */\n-struct __ec_align1 ec_params_switch_enable_wireless_v0 {\n+struct ec_params_switch_enable_wireless_v0 {\n \tuint8_t enabled;\n-};\n+} __ec_align1;\n \n /* Version 1 params */\n-struct __ec_align1 ec_params_switch_enable_wireless_v1 {\n+struct ec_params_switch_enable_wireless_v1 {\n \t/* Flags to enable now */\n \tuint8_t now_flags;\n \n@@ -3216,16 +4578,16 @@ struct __ec_align1 ec_params_switch_enable_wireless_v1 {\n \n \t/* Which flags to copy from suspend_flags */\n \tuint8_t suspend_mask;\n-};\n+} __ec_align1;\n \n /* Version 1 response */\n-struct __ec_align1 ec_response_switch_enable_wireless_v1 {\n+struct ec_response_switch_enable_wireless_v1 {\n \t/* Flags to enable now */\n \tuint8_t now_flags;\n \n \t/* Flags to leave enabled in S3 */\n \tuint8_t suspend_flags;\n-};\n+} __ec_align1;\n \n /*****************************************************************************/\n /* GPIO commands. Only available on EC if write protect has been disabled. */\n@@ -3233,25 +4595,25 @@ struct __ec_align1 ec_response_switch_enable_wireless_v1 {\n /* Set GPIO output value */\n #define EC_CMD_GPIO_SET 0x0092\n \n-struct __ec_align1 ec_params_gpio_set {\n+struct ec_params_gpio_set {\n \tchar name[32];\n \tuint8_t val;\n-};\n+} __ec_align1;\n \n /* Get GPIO value */\n #define EC_CMD_GPIO_GET 0x0093\n \n /* Version 0 of input params and response */\n-struct __ec_align1 ec_params_gpio_get {\n+struct ec_params_gpio_get {\n \tchar name[32];\n-};\n+} __ec_align1;\n \n-struct __ec_align1 ec_response_gpio_get {\n+struct ec_response_gpio_get {\n \tuint8_t val;\n-};\n+} __ec_align1;\n \n /* Version 1 of input params and response */\n-struct __ec_align1 ec_params_gpio_get_v1 {\n+struct ec_params_gpio_get_v1 {\n \tuint8_t subcmd;\n \tunion {\n \t\tstruct __ec_align1 {\n@@ -3261,9 +4623,9 @@ struct __ec_align1 ec_params_gpio_get_v1 {\n \t\t\tuint8_t index;\n \t\t} get_info;\n \t};\n-};\n+} __ec_align1;\n \n-struct __ec_todo_packed ec_response_gpio_get_v1 {\n+struct ec_response_gpio_get_v1 {\n \tunion {\n \t\tstruct __ec_align1 {\n \t\t\tuint8_t val;\n@@ -3274,7 +4636,7 @@ struct __ec_todo_packed ec_response_gpio_get_v1 {\n \t\t\tuint32_t flags;\n \t\t} get_info;\n \t};\n-};\n+} __ec_todo_packed;\n \n enum gpio_get_subcmd {\n \tEC_GPIO_GET_BY_NAME = 0,\n@@ -3295,27 +4657,27 @@ enum gpio_get_subcmd {\n /* Read I2C bus */\n #define EC_CMD_I2C_READ 0x0094\n \n-struct __ec_align_size1 ec_params_i2c_read {\n+struct ec_params_i2c_read {\n \tuint16_t addr; /* 8-bit address (7-bit shifted << 1) */\n \tuint8_t read_size; /* Either 8 or 16. */\n \tuint8_t port;\n \tuint8_t offset;\n-};\n+} __ec_align_size1;\n \n-struct __ec_align2 ec_response_i2c_read {\n+struct ec_response_i2c_read {\n \tuint16_t data;\n-};\n+} __ec_align2;\n \n /* Write I2C bus */\n #define EC_CMD_I2C_WRITE 0x0095\n \n-struct __ec_align_size1 ec_params_i2c_write {\n+struct ec_params_i2c_write {\n \tuint16_t data;\n \tuint16_t addr; /* 8-bit address (7-bit shifted << 1) */\n \tuint8_t write_size; /* Either 8 or 16. */\n \tuint8_t port;\n \tuint8_t offset;\n-};\n+} __ec_align_size1;\n \n /*****************************************************************************/\n /* Charge state commands. Only available when flash write protect unlocked. */\n@@ -3324,20 +4686,64 @@ struct __ec_align_size1 ec_params_i2c_write {\n * discharge the battery.\n */\n #define EC_CMD_CHARGE_CONTROL 0x0096\n-#define EC_VER_CHARGE_CONTROL 1\n+#define EC_VER_CHARGE_CONTROL 3\n \n enum ec_charge_control_mode {\n \tCHARGE_CONTROL_NORMAL = 0,\n \tCHARGE_CONTROL_IDLE,\n \tCHARGE_CONTROL_DISCHARGE,\n+\t/* Add no more entry below. */\n+\tCHARGE_CONTROL_COUNT,\n+};\n+\n+#define EC_CHARGE_MODE_TEXT \\\n+\t{ \\\n+\t\t[CHARGE_CONTROL_NORMAL] = \"NORMAL\", \\\n+\t\t[CHARGE_CONTROL_IDLE] = \"IDLE\", \\\n+\t\t[CHARGE_CONTROL_DISCHARGE] = \"DISCHARGE\", \\\n+\t}\n+\n+enum ec_charge_control_cmd {\n+\tEC_CHARGE_CONTROL_CMD_SET = 0,\n+\tEC_CHARGE_CONTROL_CMD_GET,\n };\n \n-struct __ec_align4 ec_params_charge_control {\n-\tuint32_t mode; /* enum charge_control_mode */\n+enum ec_charge_control_flag {\n+\tEC_CHARGE_CONTROL_FLAG_NO_IDLE = BIT(0),\n };\n \n+struct ec_params_charge_control {\n+\tuint32_t mode; /* enum charge_control_mode */\n+\n+\t/* Below are the fields added in V2. */\n+\tuint8_t cmd; /* enum ec_charge_control_cmd. */\n+\tuint8_t flags; /* enum ec_charge_control_flag (v3+) */\n+\t/*\n+\t * Lower and upper thresholds for battery sustainer. This struct isn't\n+\t * named to avoid tainting foreign projects' name spaces.\n+\t *\n+\t * If charge mode is explicitly set (e.g. DISCHARGE), battery sustainer\n+\t * will be disabled. To disable battery sustainer, set mode=NORMAL,\n+\t * lower=-1, upper=-1.\n+\t */\n+\tstruct {\n+\t\tint8_t lower; /* Display SoC in percentage. */\n+\t\tint8_t upper; /* Display SoC in percentage. */\n+\t} sustain_soc;\n+} __ec_align4;\n+\n+/* Added in v2 */\n+struct ec_response_charge_control {\n+\tuint32_t mode; /* enum charge_control_mode */\n+\tstruct { /* Battery sustainer thresholds */\n+\t\tint8_t lower;\n+\t\tint8_t upper;\n+\t} sustain_soc;\n+\tuint8_t flags; /* enum ec_charge_control_flag (v3+) */\n+\tuint8_t reserved;\n+} __ec_align4;\n+\n /*****************************************************************************/\n-/* Console commands. Only available when flash write protect is unlocked. */\n \n /* Snapshot console output buffer for use by EC_CMD_CONSOLE_READ. */\n #define EC_CMD_CONSOLE_SNAPSHOT 0x0097\n@@ -3358,12 +4764,15 @@ struct __ec_align4 ec_params_charge_control {\n \n enum ec_console_read_subcmd {\n \tCONSOLE_READ_NEXT = 0,\n-\tCONSOLE_READ_RECENT\n+\tCONSOLE_READ_RECENT,\n };\n \n-struct __ec_align1 ec_params_console_read_v1 {\n+struct ec_params_console_read_v1 {\n \tuint8_t subcmd; /* enum ec_console_read_subcmd */\n-};\n+} __ec_align1;\n+\n+/* Print directly to EC console from host. */\n+#define EC_CMD_CONSOLE_PRINT 0x00AC\n \n /*****************************************************************************/\n \n@@ -3376,11 +4785,11 @@ struct __ec_align1 ec_params_console_read_v1 {\n */\n #define EC_CMD_BATTERY_CUT_OFF 0x0099\n \n-#define EC_BATTERY_CUTOFF_FLAG_AT_SHUTDOWN\t(1 << 0)\n+#define EC_BATTERY_CUTOFF_FLAG_AT_SHUTDOWN BIT(0)\n \n-struct __ec_align1 ec_params_battery_cutoff {\n+struct ec_params_battery_cutoff {\n \tuint8_t flags;\n-};\n+} __ec_align1;\n \n /*****************************************************************************/\n /* USB port mux control. */\n@@ -3390,16 +4799,16 @@ struct __ec_align1 ec_params_battery_cutoff {\n */\n #define EC_CMD_USB_MUX 0x009A\n \n-struct __ec_align1 ec_params_usb_mux {\n+struct ec_params_usb_mux {\n \tuint8_t mux;\n-};\n+} __ec_align1;\n \n /*****************************************************************************/\n /* LDOs / FETs control. */\n \n enum ec_ldo_state {\n-\tEC_LDO_STATE_OFF = 0,\t/* the LDO / FET is shut down */\n-\tEC_LDO_STATE_ON = 1,\t/* the LDO / FET is ON / providing power */\n+\tEC_LDO_STATE_OFF = 0, /* the LDO / FET is shut down */\n+\tEC_LDO_STATE_ON = 1, /* the LDO / FET is ON / providing power */\n };\n \n /*\n@@ -3407,39 +4816,92 @@ enum ec_ldo_state {\n */\n #define EC_CMD_LDO_SET 0x009B\n \n-struct __ec_align1 ec_params_ldo_set {\n+struct ec_params_ldo_set {\n \tuint8_t index;\n \tuint8_t state;\n-};\n+} __ec_align1;\n \n /*\n * Get LDO state.\n */\n #define EC_CMD_LDO_GET 0x009C\n \n-struct __ec_align1 ec_params_ldo_get {\n+struct ec_params_ldo_get {\n \tuint8_t index;\n-};\n+} __ec_align1;\n \n-struct __ec_align1 ec_response_ldo_get {\n+struct ec_response_ldo_get {\n \tuint8_t state;\n-};\n+} __ec_align1;\n \n /*****************************************************************************/\n /* Power info. */\n \n /*\n * Get power info.\n+ *\n+ * Note: v0 of this command is deprecated\n */\n #define EC_CMD_POWER_INFO 0x009D\n \n-struct __ec_align4 ec_response_power_info {\n-\tuint32_t usb_dev_type;\n-\tuint16_t voltage_ac;\n-\tuint16_t voltage_system;\n-\tuint16_t current_system;\n-\tuint16_t usb_current_limit;\n-};\n+/*\n+ * v1 of EC_CMD_POWER_INFO\n+ */\n+enum system_power_source {\n+\t/*\n+\t * Haven't established which power source is used yet,\n+\t * or no presence signals are available\n+\t */\n+\tPOWER_SOURCE_UNKNOWN = 0,\n+\t/* System is running on battery alone */\n+\tPOWER_SOURCE_BATTERY = 1,\n+\t/* System is running on A/C alone */\n+\tPOWER_SOURCE_AC = 2,\n+\t/* System is running on A/C and battery */\n+\tPOWER_SOURCE_AC_BATTERY = 3,\n+};\n+\n+struct ec_response_power_info_v1 {\n+\t/* enum system_power_source */\n+\tuint8_t system_power_source;\n+\t/* Battery state-of-charge, 0-100, 0 if not present */\n+\tuint8_t battery_soc;\n+\t/* AC Adapter 100% rating, Watts */\n+\tuint8_t ac_adapter_100pct;\n+\t/* AC Adapter 10ms rating, Watts */\n+\tuint8_t ac_adapter_10ms;\n+\t/* Battery 1C rating, derated */\n+\tuint8_t battery_1cd;\n+\t/* Rest of Platform average, Watts */\n+\tuint8_t rop_avg;\n+\t/* Rest of Platform peak, Watts */\n+\tuint8_t rop_peak;\n+\t/* Nominal charger efficiency, % */\n+\tuint8_t nominal_charger_eff;\n+\t/* Rest of Platform VR Average Efficiency, % */\n+\tuint8_t rop_avg_eff;\n+\t/* Rest of Platform VR Peak Efficiency, % */\n+\tuint8_t rop_peak_eff;\n+\t/* SoC VR Efficiency at Average level, % */\n+\tuint8_t soc_avg_eff;\n+\t/* SoC VR Efficiency at Peak level, % */\n+\tuint8_t soc_peak_eff;\n+\t/* Intel-specific items */\n+\tstruct {\n+\t\t/* Battery's level of DBPT support: 0, 2 */\n+\t\tuint8_t batt_dbpt_support_level;\n+\t\t/*\n+\t\t * Maximum peak power from battery (10ms), Watts\n+\t\t * If DBPT is not supported, this is 0\n+\t\t */\n+\t\tuint8_t batt_dbpt_max_peak_power;\n+\t\t/*\n+\t\t * Sustained peak power from battery, Watts\n+\t\t * If DBPT is not supported, this is 0\n+\t\t */\n+\t\tuint8_t batt_dbpt_sus_peak_power;\n+\t} intel;\n+} __ec_align1;\n \n /*****************************************************************************/\n /* I2C passthru command */\n@@ -3447,90 +4909,81 @@ struct __ec_align4 ec_response_power_info {\n #define EC_CMD_I2C_PASSTHRU 0x009E\n \n /* Read data; if not present, message is a write */\n-#define EC_I2C_FLAG_READ\t(1 << 15)\n+#define EC_I2C_FLAG_READ BIT(15)\n \n /* Mask for address */\n-#define EC_I2C_ADDR_MASK\t0x3ff\n+#define EC_I2C_ADDR_MASK 0x3ff\n \n-#define EC_I2C_STATUS_NAK\t(1 << 0) /* Transfer was not acknowledged */\n-#define EC_I2C_STATUS_TIMEOUT\t(1 << 1) /* Timeout during transfer */\n+#define EC_I2C_STATUS_NAK BIT(0) /* Transfer was not acknowledged */\n+#define EC_I2C_STATUS_TIMEOUT BIT(1) /* Timeout during transfer */\n \n /* Any error */\n-#define EC_I2C_STATUS_ERROR\t(EC_I2C_STATUS_NAK | EC_I2C_STATUS_TIMEOUT)\n+#define EC_I2C_STATUS_ERROR (EC_I2C_STATUS_NAK | EC_I2C_STATUS_TIMEOUT)\n \n-struct __ec_align2 ec_params_i2c_passthru_msg {\n-\tuint16_t addr_flags;\t/* I2C slave address (7 or 10 bits) and flags */\n-\tuint16_t len;\t\t/* Number of bytes to read or write */\n-};\n+struct ec_params_i2c_passthru_msg {\n+\tuint16_t addr_flags; /* I2C peripheral address and flags */\n+\tuint16_t len; /* Number of bytes to read or write */\n+} __ec_align2;\n \n-struct __ec_align2 ec_params_i2c_passthru {\n-\tuint8_t port;\t\t/* I2C port number */\n-\tuint8_t num_msgs;\t/* Number of messages */\n-\tstruct ec_params_i2c_passthru_msg msg[];\n+struct ec_params_i2c_passthru {\n+\tuint8_t port; /* I2C port number */\n+\tuint8_t num_msgs; /* Number of messages */\n+\tstruct ec_params_i2c_passthru_msg msg[FLEXIBLE_ARRAY_MEMBER_SIZE];\n \t/* Data to write for all messages is concatenated here */\n-};\n+} __ec_align2;\n \n-struct __ec_align1 ec_response_i2c_passthru {\n-\tuint8_t i2c_status;\t/* Status flags (EC_I2C_STATUS_...) */\n-\tuint8_t num_msgs;\t/* Number of messages processed */\n-\tuint8_t data[];\t\t/* Data read by messages concatenated here */\n-};\n+struct ec_response_i2c_passthru {\n+\tuint8_t i2c_status; /* Status flags (EC_I2C_STATUS_...) */\n+\tuint8_t num_msgs; /* Number of messages processed */\n+\t/* Data read by messages concatenated here */\n+\tuint8_t data[FLEXIBLE_ARRAY_MEMBER_SIZE];\n+} __ec_align1;\n \n /*****************************************************************************/\n-/* Power button hang detect */\n-\n+/* AP hang detect */\n #define EC_CMD_HANG_DETECT 0x009F\n \n-/* Reasons to start hang detection timer */\n-/* Power button pressed */\n-#define EC_HANG_START_ON_POWER_PRESS (1 << 0)\n+#define EC_HANG_DETECT_MIN_TIMEOUT 5\n \n-/* Lid closed */\n-#define EC_HANG_START_ON_LID_CLOSE (1 << 1)\n+/* EC hang detect commands */\n+enum ec_hang_detect_cmds {\n+\t/* Reload AP hang detect timer. */\n+\tEC_HANG_DETECT_CMD_RELOAD = 0x0,\n \n- /* Lid opened */\n-#define EC_HANG_START_ON_LID_OPEN (1 << 2)\n+\t/* Stop AP hang detect timer. */\n+\tEC_HANG_DETECT_CMD_CANCEL = 0x1,\n \n-/* Start of AP S3->S0 transition (booting or resuming from suspend) */\n-#define EC_HANG_START_ON_RESUME (1 << 3)\n-\n-/* Reasons to cancel hang detection */\n-\n-/* Power button released */\n-#define EC_HANG_STOP_ON_POWER_RELEASE (1 << 8)\n+\t/* Configure watchdog with given reboot timeout and\n+\t * cancel currently running AP hand detect timer.\n+\t */\n+\tEC_HANG_DETECT_CMD_SET_TIMEOUT = 0x2,\n \n-/* Any host command from AP received */\n-#define EC_HANG_STOP_ON_HOST_COMMAND (1 << 9)\n+\t/* Get last hang status - whether the AP boot was clear or not */\n+\tEC_HANG_DETECT_CMD_GET_STATUS = 0x3,\n \n-/* Stop on end of AP S0->S3 transition (suspending or shutting down) */\n-#define EC_HANG_STOP_ON_SUSPEND (1 << 10)\n+\t/* Clear last hang status. Called when AP is rebooting/shutting down\n+\t * gracefully.\n+\t */\n+\tEC_HANG_DETECT_CMD_CLEAR_STATUS = 0x4\n+};\n \n-/*\n- * If this flag is set, all the other fields are ignored, and the hang detect\n- * timer is started. This provides the AP a way to start the hang timer\n- * without reconfiguring any of the other hang detect settings. Note that\n- * you must previously have configured the timeouts.\n- */\n-#define EC_HANG_START_NOW (1 << 30)\n+struct ec_params_hang_detect {\n+\tuint16_t command; /* enum ec_hang_detect_cmds */\n+\t/* Timeout in seconds before generating reboot */\n+\tuint16_t reboot_timeout_sec;\n+} __ec_align2;\n \n-/*\n- * If this flag is set, all the other fields are ignored (including\n- * EC_HANG_START_NOW). This provides the AP a way to stop the hang timer\n- * without reconfiguring any of the other hang detect settings.\n+/* Status codes that describe whether AP has boot normally or the hang has been\n+ * detected and EC has reset AP\n */\n-#define EC_HANG_STOP_NOW (1 << 31)\n-\n-struct __ec_align4 ec_params_hang_detect {\n-\t/* Flags; see EC_HANG_* */\n-\tuint32_t flags;\n-\n-\t/* Timeout in msec before generating host event, if enabled */\n-\tuint16_t host_event_timeout_msec;\n-\n-\t/* Timeout in msec before generating warm reboot, if enabled */\n-\tuint16_t warm_reboot_timeout_msec;\n-};\n-\n+enum ec_hang_detect_status {\n+\tEC_HANG_DETECT_AP_BOOT_NORMAL = 0x0,\n+\tEC_HANG_DETECT_AP_BOOT_EC_WDT = 0x1,\n+\tEC_HANG_DETECT_AP_BOOT_COUNT,\n+};\n+struct ec_response_hang_detect {\n+\tuint8_t status; /* enum ec_hang_detect_status */\n+} __ec_align1;\n /*****************************************************************************/\n /* Commands for battery charging */\n \n@@ -3545,7 +4998,7 @@ enum charge_state_command {\n \tCHARGE_STATE_CMD_GET_STATE,\n \tCHARGE_STATE_CMD_GET_PARAM,\n \tCHARGE_STATE_CMD_SET_PARAM,\n-\tCHARGE_STATE_NUM_CMDS\n+\tCHARGE_STATE_NUM_CMDS,\n };\n \n /*\n@@ -3553,16 +5006,62 @@ enum charge_state_command {\n * params, which are handled by the particular implementations.\n */\n enum charge_state_params {\n-\tCS_PARAM_CHG_VOLTAGE,\t /* charger voltage limit */\n-\tCS_PARAM_CHG_CURRENT,\t /* charger current limit */\n-\tCS_PARAM_CHG_INPUT_CURRENT, /* charger input current limit */\n-\tCS_PARAM_CHG_STATUS,\t /* charger-specific status */\n-\tCS_PARAM_CHG_OPTION,\t /* charger-specific options */\n-\tCS_PARAM_LIMIT_POWER,\t /*\n-\t\t\t\t * Check if power is limited due to\n-\t\t\t\t * low battery and / or a weak external\n-\t\t\t\t * charger. READ ONLY.\n-\t\t\t\t */\n+\t/* charger voltage limit */\n+\tCS_PARAM_CHG_VOLTAGE,\n+\n+\t/* charger current limit */\n+\tCS_PARAM_CHG_CURRENT,\n+\n+\t/* charger input current limit */\n+\tCS_PARAM_CHG_INPUT_CURRENT,\n+\n+\t/* charger-specific status */\n+\tCS_PARAM_CHG_STATUS,\n+\n+\t/* charger-specific options */\n+\tCS_PARAM_CHG_OPTION,\n+\n+\t/*\n+\t * Check if power is limited due to low battery and / or a\n+\t * weak external charger. READ ONLY.\n+\t */\n+\tCS_PARAM_LIMIT_POWER,\n+\n+\t/* min value of charger voltage limit (READ ONLY) */\n+\tCS_PARAM_CHG_VOLTAGE_MIN,\n+\n+\t/* max value of charger voltage limit (READ ONLY) */\n+\tCS_PARAM_CHG_VOLTAGE_MAX,\n+\n+\t/* step value of charger voltage limit (READ ONLY) */\n+\tCS_PARAM_CHG_VOLTAGE_STEP,\n+\n+\t/* min value of charger current limit (READ ONLY) */\n+\tCS_PARAM_CHG_CURRENT_MIN,\n+\n+\t/* max value of charger current limit (READ ONLY) */\n+\tCS_PARAM_CHG_CURRENT_MAX,\n+\n+\t/* step value of charger current limit (READ ONLY) */\n+\tCS_PARAM_CHG_CURRENT_STEP,\n+\n+\t/* min value of charger input current limit (READ ONLY) */\n+\tCS_PARAM_CHG_INPUT_CURRENT_MIN,\n+\n+\t/* max value of charger input current limit (READ ONLY) */\n+\tCS_PARAM_CHG_INPUT_CURRENT_MAX,\n+\n+\t/* step value of charger input current limit (READ ONLY) */\n+\tCS_PARAM_CHG_INPUT_CURRENT_STEP,\n+\n+\t/* Minimum required voltage for hybrid boost chargers (READ ONLY) */\n+\tCS_PARAM_CHG_MIN_REQUIRED_MV,\n+\n+\t/* For hybrid boost chargers returns !=0 when attached charger is\n+\t * capable of charging the battery\n+\t */\n+\tCS_PARAM_CHG_IS_ADAPTER_SUFFICIENT,\n+\n \t/* How many so far? */\n \tCS_NUM_BASE_PARAMS,\n \n@@ -3570,28 +5069,38 @@ enum charge_state_params {\n \tCS_PARAM_CUSTOM_PROFILE_MIN = 0x10000,\n \tCS_PARAM_CUSTOM_PROFILE_MAX = 0x1ffff,\n \n+\t/* Range for CONFIG_CHARGE_STATE_DEBUG params */\n+\tCS_PARAM_DEBUG_MIN = 0x20000,\n+\tCS_PARAM_DEBUG_CTL_MODE = 0x20000,\n+\tCS_PARAM_DEBUG_MANUAL_MODE,\n+\tCS_PARAM_DEBUG_SEEMS_DEAD,\n+\tCS_PARAM_DEBUG_SEEMS_DISCONNECTED,\n+\tCS_PARAM_DEBUG_BATT_REMOVED, /* Deprecated */\n+\tCS_PARAM_DEBUG_MANUAL_CURRENT,\n+\tCS_PARAM_DEBUG_MANUAL_VOLTAGE,\n+\tCS_PARAM_DEBUG_MAX = 0x2ffff,\n+\n \t/* Other custom param ranges go here... */\n };\n \n-struct __ec_todo_packed ec_params_charge_state {\n-\tuint8_t cmd;\t\t\t\t/* enum charge_state_command */\n+struct ec_params_charge_state {\n+\tuint8_t cmd; /* enum charge_state_command */\n \tunion {\n-\t\tstruct __ec_align1 {\n-\t\t\t/* no args */\n-\t\t} get_state;\n+\t\t/* get_state has no args */\n \n \t\tstruct __ec_todo_unpacked {\n-\t\t\tuint32_t param;\t\t/* enum charge_state_param */\n+\t\t\tuint32_t param; /* enum charge_state_param */\n \t\t} get_param;\n \n \t\tstruct __ec_todo_unpacked {\n-\t\t\tuint32_t param;\t\t/* param to set */\n-\t\t\tuint32_t value;\t\t/* value to set */\n+\t\t\tuint32_t param; /* param to set */\n+\t\t\tuint32_t value; /* value to set */\n \t\t} set_param;\n-\t};\n-};\n+\t} __ec_todo_packed;\n+\tuint8_t chgnum; /* Version 1 supports chgnum */\n+} __ec_todo_packed;\n \n-struct __ec_align4 ec_response_charge_state {\n+struct ec_response_charge_state {\n \tunion {\n \t\tstruct __ec_align4 {\n \t\t\tint ac;\n@@ -3604,20 +5113,30 @@ struct __ec_align4 ec_response_charge_state {\n \t\tstruct __ec_align4 {\n \t\t\tuint32_t value;\n \t\t} get_param;\n-\t\tstruct __ec_align4 {\n-\t\t\t/* no return values */\n-\t\t} set_param;\n+\n+\t\t/* set_param returns no args */\n \t};\n-};\n+} __ec_align4;\n \n /*\n * Set maximum battery charging current.\n */\n #define EC_CMD_CHARGE_CURRENT_LIMIT 0x00A1\n+#define EC_VER_CHARGE_CURRENT_LIMIT 1\n \n-struct __ec_align4 ec_params_current_limit {\n+struct ec_params_current_limit {\n \tuint32_t limit; /* in mA */\n-};\n+} __ec_align4;\n+\n+struct ec_params_current_limit_v1 {\n+\tuint32_t limit; /* in mA */\n+\t/*\n+\t * Battery state of charge is the minimum charge percentage at which\n+\t * the battery charge current limit will apply.\n+\t * When not set, the limit will apply regardless of state of charge.\n+\t */\n+\tuint8_t battery_soc; /* battery state of charge, 0-100 */\n+} __ec_align4;\n \n /*\n * Set maximum external voltage / current.\n@@ -3625,10 +5144,10 @@ struct __ec_align4 ec_params_current_limit {\n #define EC_CMD_EXTERNAL_POWER_LIMIT 0x00A2\n \n /* Command v0 is used only on Spring and is obsolete + unsupported */\n-struct __ec_align2 ec_params_external_power_limit_v1 {\n+struct ec_params_external_power_limit_v1 {\n \tuint16_t current_lim; /* in mA, or EC_POWER_LIMIT_NONE to clear limit */\n \tuint16_t voltage_lim; /* in mV, or EC_POWER_LIMIT_NONE to clear limit */\n-};\n+} __ec_align2;\n \n #define EC_POWER_LIMIT_NONE 0xffff\n \n@@ -3637,9 +5156,42 @@ struct __ec_align2 ec_params_external_power_limit_v1 {\n */\n #define EC_CMD_OVERRIDE_DEDICATED_CHARGER_LIMIT 0x00A3\n \n-struct __ec_align2 ec_params_dedicated_charger_limit {\n+struct ec_params_dedicated_charger_limit {\n \tuint16_t current_lim; /* in mA */\n \tuint16_t voltage_lim; /* in mV */\n+} __ec_align2;\n+\n+/*\n+ * Get and set charging splashscreen variables\n+ */\n+#define EC_CMD_CHARGESPLASH 0x00A5\n+\n+enum ec_chargesplash_cmd {\n+\t/* Get the current state variables */\n+\tEC_CHARGESPLASH_GET_STATE = 0,\n+\n+\t/* Indicate initialization of the display loop */\n+\tEC_CHARGESPLASH_DISPLAY_READY,\n+\n+\t/* Manually put the EC into the requested state */\n+\tEC_CHARGESPLASH_REQUEST,\n+\n+\t/* Reset all state variables */\n+\tEC_CHARGESPLASH_RESET,\n+\n+\t/* Manually trigger a lockout */\n+\tEC_CHARGESPLASH_LOCKOUT,\n+};\n+\n+struct __ec_align1 ec_params_chargesplash {\n+\t/* enum ec_chargesplash_cmd */\n+\tuint8_t cmd;\n+};\n+\n+struct __ec_align1 ec_response_chargesplash {\n+\tuint8_t requested;\n+\tuint8_t display_initialized;\n+\tuint8_t locked_out;\n };\n \n /*****************************************************************************/\n@@ -3648,15 +5200,15 @@ struct __ec_align2 ec_params_dedicated_charger_limit {\n /* Set the delay before going into hibernation. */\n #define EC_CMD_HIBERNATION_DELAY 0x00A8\n \n-struct __ec_align4 ec_params_hibernation_delay {\n+struct ec_params_hibernation_delay {\n \t/*\n \t * Seconds to wait in G3 before hibernate. Pass in 0 to read the\n \t * current settings without changing them.\n \t */\n \tuint32_t seconds;\n-};\n+} __ec_align4;\n \n-struct __ec_align4 ec_response_hibernation_delay {\n+struct ec_response_hibernation_delay {\n \t/*\n \t * The current time in seconds in which the system has been in the G3\n \t * state. This value is reset if the EC transitions out of G3.\n@@ -3674,21 +5226,80 @@ struct __ec_align4 ec_response_hibernation_delay {\n \t * hibernating.\n \t */\n \tuint32_t hibernate_delay;\n-};\n+} __ec_align4;\n \n /* Inform the EC when entering a sleep state */\n #define EC_CMD_HOST_SLEEP_EVENT 0x00A9\n \n enum host_sleep_event {\n-\tHOST_SLEEP_EVENT_S3_SUSPEND = 1,\n-\tHOST_SLEEP_EVENT_S3_RESUME = 2,\n+\tHOST_SLEEP_EVENT_S3_SUSPEND = 1,\n+\tHOST_SLEEP_EVENT_S3_RESUME = 2,\n \tHOST_SLEEP_EVENT_S0IX_SUSPEND = 3,\n-\tHOST_SLEEP_EVENT_S0IX_RESUME = 4\n+\tHOST_SLEEP_EVENT_S0IX_RESUME = 4,\n+\t/* S3 suspend with additional enabled wake sources */\n+\tHOST_SLEEP_EVENT_S3_WAKEABLE_SUSPEND = 5,\n };\n \n-struct __ec_align1 ec_params_host_sleep_event {\n+struct ec_params_host_sleep_event {\n \tuint8_t sleep_event;\n-};\n+} __ec_align1;\n+\n+/*\n+ * Use a default timeout value (CONFIG_SLEEP_TIMEOUT_MS) for detecting sleep\n+ * transition failures\n+ */\n+#define EC_HOST_SLEEP_TIMEOUT_DEFAULT 0\n+\n+/* Disable timeout detection for this sleep transition */\n+#define EC_HOST_SLEEP_TIMEOUT_INFINITE 0xFFFF\n+\n+struct ec_params_host_sleep_event_v1 {\n+\t/* The type of sleep being entered or exited. */\n+\tuint8_t sleep_event;\n+\n+\t/* Padding */\n+\tuint8_t reserved;\n+\tunion {\n+\t\t/* Parameters that apply for suspend messages. */\n+\t\tstruct {\n+\t\t\t/*\n+\t\t\t * The timeout in milliseconds between when this message\n+\t\t\t * is received and when the EC will declare sleep\n+\t\t\t * transition failure if the sleep signal is not\n+\t\t\t * asserted.\n+\t\t\t */\n+\t\t\tuint16_t sleep_timeout_ms;\n+\t\t} suspend_params;\n+\n+\t\t/* No parameters for non-suspend messages. */\n+\t};\n+} __ec_align2;\n+\n+/* A timeout occurred when this bit is set */\n+#define EC_HOST_RESUME_SLEEP_TIMEOUT 0x80000000\n+\n+/*\n+ * The mask defining which bits correspond to the number of sleep transitions,\n+ * as well as the maximum number of suspend line transitions that will be\n+ * reported back to the host.\n+ */\n+#define EC_HOST_RESUME_SLEEP_TRANSITIONS_MASK 0x7FFFFFFF\n+\n+struct ec_response_host_sleep_event_v1 {\n+\tunion {\n+\t\t/* Response fields that apply for resume messages. */\n+\t\tstruct {\n+\t\t\t/*\n+\t\t\t * The number of sleep power signal transitions that\n+\t\t\t * occurred since the suspend message. The high bit\n+\t\t\t * indicates a timeout occurred.\n+\t\t\t */\n+\t\t\tuint32_t sleep_transitions;\n+\t\t} resume_response;\n+\n+\t\t/* No response fields for non-resume messages. */\n+\t};\n+} __ec_align4;\n \n /*****************************************************************************/\n /* Device events */\n@@ -3698,6 +5309,7 @@ enum ec_device_event {\n \tEC_DEVICE_EVENT_TRACKPAD,\n \tEC_DEVICE_EVENT_DSP,\n \tEC_DEVICE_EVENT_WIFI,\n+\tEC_DEVICE_EVENT_WLC,\n };\n \n enum ec_device_event_param {\n@@ -3709,51 +5321,57 @@ enum ec_device_event_param {\n \tEC_DEVICE_EVENT_PARAM_SET_ENABLED_EVENTS,\n };\n \n-#define EC_DEVICE_EVENT_MASK(event_code) (1UL << (event_code % 32))\n+#define EC_DEVICE_EVENT_MASK(event_code) BIT(event_code % 32)\n \n-struct __ec_align_size1 ec_params_device_event {\n+struct ec_params_device_event {\n \tuint32_t event_mask;\n \tuint8_t param;\n-};\n+} __ec_align_size1;\n \n-struct __ec_align4 ec_response_device_event {\n+struct ec_response_device_event {\n \tuint32_t event_mask;\n-};\n+} __ec_align4;\n \n /*****************************************************************************/\n-/* Smart battery pass-through */\n+/* Get s0ix counter */\n+#define EC_CMD_GET_S0IX_COUNTER 0x00AB\n \n-/* Get / Set 16-bit smart battery registers */\n-#define EC_CMD_SB_READ_WORD 0x00B0\n-#define EC_CMD_SB_WRITE_WORD 0x00B1\n+/* Flag use to reset the counter */\n+#define EC_S0IX_COUNTER_RESET 0x1\n \n-/* Get / Set string smart battery parameters\n- * formatted as SMBUS \"block\".\n- */\n-#define EC_CMD_SB_READ_BLOCK 0x00B2\n-#define EC_CMD_SB_WRITE_BLOCK 0x00B3\n+struct ec_params_s0ix_cnt {\n+\t/* If EC_S0IX_COUNTER_RESET then reset otherwise get the counter */\n+\tuint32_t flags;\n+} __ec_align4;\n \n-struct __ec_align1 ec_params_sb_rd {\n-\tuint8_t reg;\n-};\n+struct ec_response_s0ix_cnt {\n+\t/* Value of the s0ix_counter */\n+\tuint32_t s0ix_counter;\n+} __ec_align4;\n \n-struct __ec_align2 ec_response_sb_rd_word {\n-\tuint16_t value;\n-};\n+/*****************************************************************************/\n+/* Ask the EC for sleep_signal_transitions without needing to send a\n+ * HOST_SLEEP_EVENT command, which this command is related to.\n+ * Note: EC_CMD_CONSOLE_PRINT has value 0x00AC, so skip over it.\n+ */\n+#define EC_CMD_HOST_SLEEP_SIGNAL_TRANSITIONS 0x00AD\n \n-struct __ec_align1 ec_params_sb_wr_word {\n-\tuint8_t reg;\n-\tuint16_t value;\n-};\n+struct ec_response_host_sleep_signal_transitions {\n+\tuint32_t sleep_signal_transitions;\n+} __ec_align4;\n \n-struct __ec_align1 ec_response_sb_rd_block {\n-\tuint8_t data[32];\n-};\n+/*****************************************************************************/\n+/* Smart battery pass-through */\n \n-struct __ec_align1 ec_params_sb_wr_block {\n-\tuint8_t reg;\n-\tuint16_t data[32];\n-};\n+/* Get / Set 16-bit smart battery registers - OBSOLETE */\n+#define EC_CMD_SB_READ_WORD 0x00B0\n+#define EC_CMD_SB_WRITE_WORD 0x00B1\n+\n+/* Get / Set string smart battery parameters\n+ * formatted as SMBUS \"block\". - OBSOLETE\n+ */\n+#define EC_CMD_SB_READ_BLOCK 0x00B2\n+#define EC_CMD_SB_WRITE_BLOCK 0x00B3\n \n /*****************************************************************************/\n /* Battery vendor parameters\n@@ -3771,90 +5389,39 @@ enum ec_battery_vendor_param_mode {\n \tBATTERY_VENDOR_PARAM_MODE_SET,\n };\n \n-struct __ec_align_size1 ec_params_battery_vendor_param {\n+struct ec_params_battery_vendor_param {\n \tuint32_t param;\n \tuint32_t value;\n \tuint8_t mode;\n-};\n+} __ec_align_size1;\n \n-struct __ec_align4 ec_response_battery_vendor_param {\n+struct ec_response_battery_vendor_param {\n \tuint32_t value;\n-};\n+} __ec_align4;\n \n /*****************************************************************************/\n /*\n- * Smart Battery Firmware Update Commands\n+ * Smart Battery Firmware Update Command - OBSOLETE\n */\n #define EC_CMD_SB_FW_UPDATE 0x00B5\n \n-enum ec_sb_fw_update_subcmd {\n-\tEC_SB_FW_UPDATE_PREPARE = 0x0,\n-\tEC_SB_FW_UPDATE_INFO = 0x1, /*query sb info */\n-\tEC_SB_FW_UPDATE_BEGIN = 0x2, /*check if protected */\n-\tEC_SB_FW_UPDATE_WRITE = 0x3, /*check if protected */\n-\tEC_SB_FW_UPDATE_END = 0x4,\n-\tEC_SB_FW_UPDATE_STATUS = 0x5,\n-\tEC_SB_FW_UPDATE_PROTECT = 0x6,\n-\tEC_SB_FW_UPDATE_MAX = 0x7,\n-};\n-\n-#define SB_FW_UPDATE_CMD_WRITE_BLOCK_SIZE 32\n-#define SB_FW_UPDATE_CMD_STATUS_SIZE 2\n-#define SB_FW_UPDATE_CMD_INFO_SIZE 8\n-\n-struct __ec_align4 ec_sb_fw_update_header {\n-\tuint16_t subcmd; /* enum ec_sb_fw_update_subcmd */\n-\tuint16_t fw_id; /* firmware id */\n-};\n-\n-struct __ec_align4 ec_params_sb_fw_update {\n-\tstruct ec_sb_fw_update_header hdr;\n-\tunion {\n-\t\t/* EC_SB_FW_UPDATE_PREPARE = 0x0 */\n-\t\t/* EC_SB_FW_UPDATE_INFO = 0x1 */\n-\t\t/* EC_SB_FW_UPDATE_BEGIN = 0x2 */\n-\t\t/* EC_SB_FW_UPDATE_END = 0x4 */\n-\t\t/* EC_SB_FW_UPDATE_STATUS = 0x5 */\n-\t\t/* EC_SB_FW_UPDATE_PROTECT = 0x6 */\n-\t\tstruct __ec_align4 {\n-\t\t\t/* no args */\n-\t\t} dummy;\n-\n-\t\t/* EC_SB_FW_UPDATE_WRITE = 0x3 */\n-\t\tstruct __ec_align4 {\n-\t\t\tuint8_t data[SB_FW_UPDATE_CMD_WRITE_BLOCK_SIZE];\n-\t\t} write;\n-\t};\n-};\n-\n-struct __ec_align1 ec_response_sb_fw_update {\n-\tunion {\n-\t\t/* EC_SB_FW_UPDATE_INFO = 0x1 */\n-\t\tstruct __ec_align1 {\n-\t\t\tuint8_t data[SB_FW_UPDATE_CMD_INFO_SIZE];\n-\t\t} info;\n-\n-\t\t/* EC_SB_FW_UPDATE_STATUS = 0x5 */\n-\t\tstruct __ec_align1 {\n-\t\t\tuint8_t data[SB_FW_UPDATE_CMD_STATUS_SIZE];\n-\t\t} status;\n-\t};\n-};\n-\n /*\n * Entering Verified Boot Mode Command\n * Default mode is VBOOT_MODE_NORMAL if EC did not receive this command.\n * Valid Modes are: normal, developer, and recovery.\n+ *\n+ * EC no longer needs to know what mode vboot has entered,\n+ * so this command is deprecated. (See chromium:1014379.)\n */\n #define EC_CMD_ENTERING_MODE 0x00B6\n \n-struct __ec_align4 ec_params_entering_mode {\n+struct ec_params_entering_mode {\n \tint vboot_mode;\n-};\n+} __ec_align4;\n \n-#define VBOOT_MODE_NORMAL 0\n+#define VBOOT_MODE_NORMAL 0\n #define VBOOT_MODE_DEVELOPER 1\n-#define VBOOT_MODE_RECOVERY 2\n+#define VBOOT_MODE_RECOVERY 2\n \n /*****************************************************************************/\n /*\n@@ -3864,578 +5431,2978 @@ struct __ec_align4 ec_params_entering_mode {\n #define EC_CMD_I2C_PASSTHRU_PROTECT 0x00B7\n \n enum ec_i2c_passthru_protect_subcmd {\n-\tEC_CMD_I2C_PASSTHRU_PROTECT_STATUS = 0x0,\n-\tEC_CMD_I2C_PASSTHRU_PROTECT_ENABLE = 0x1,\n+\tEC_CMD_I2C_PASSTHRU_PROTECT_STATUS = 0,\n+\tEC_CMD_I2C_PASSTHRU_PROTECT_ENABLE = 1,\n+\tEC_CMD_I2C_PASSTHRU_PROTECT_ENABLE_TCPCS = 2,\n };\n \n-struct __ec_align1 ec_params_i2c_passthru_protect {\n+struct ec_params_i2c_passthru_protect {\n \tuint8_t subcmd;\n-\tuint8_t port;\t\t/* I2C port number */\n-};\n+\tuint8_t port; /* I2C port number */\n+} __ec_align1;\n \n-struct __ec_align1 ec_response_i2c_passthru_protect {\n-\tuint8_t status;\t\t/* Status flags (0: unlocked, 1: locked) */\n-};\n+struct ec_response_i2c_passthru_protect {\n+\tuint8_t status; /* Status flags (0: unlocked, 1: locked) */\n+} __ec_align1;\n \n /*****************************************************************************/\n-/* System commands */\n-\n /*\n- * TODO(crosbug.com/p/23747): This is a confusing name, since it doesn't\n- * necessarily reboot the EC. Rename to \"image\" or something similar?\n+ * HDMI CEC commands\n+ *\n+ * These commands are for sending and receiving message via HDMI CEC\n */\n-#define EC_CMD_REBOOT_EC 0x00D2\n-\n-/* Command */\n-enum ec_reboot_cmd {\n-\tEC_REBOOT_CANCEL = 0, /* Cancel a pending reboot */\n-\tEC_REBOOT_JUMP_RO = 1, /* Jump to RO without rebooting */\n-\tEC_REBOOT_JUMP_RW = 2, /* Jump to RW without rebooting */\n-\t/* (command 3 was jump to RW-B) */\n-\tEC_REBOOT_COLD = 4, /* Cold-reboot */\n-\tEC_REBOOT_DISABLE_JUMP = 5, /* Disable jump until next reboot */\n-\tEC_REBOOT_HIBERNATE = 6, /* Hibernate EC */\n-\tEC_REBOOT_HIBERNATE_CLEAR_AP_OFF = 7, /* and clears AP_OFF flag */\n-};\n \n-/* Flags for ec_params_reboot_ec.reboot_flags */\n-#define EC_REBOOT_FLAG_RESERVED0 (1 << 0) /* Was recovery request */\n-#define EC_REBOOT_FLAG_ON_AP_SHUTDOWN (1 << 1) /* Reboot after AP shutdown */\n-#define EC_REBOOT_FLAG_SWITCH_RW_SLOT (1 << 2) /* Switch RW slot */\n+#define EC_CEC_MAX_PORTS 16\n \n-struct __ec_align1 ec_params_reboot_ec {\n-\tuint8_t cmd; /* enum ec_reboot_cmd */\n-\tuint8_t flags; /* See EC_REBOOT_FLAG_* */\n-};\n+#define MAX_CEC_MSG_LEN 16\n \n /*\n- * Get information on last EC panic.\n- *\n- * Returns variable-length platform-dependent panic information. See panic.h\n- * for details.\n+ * Helper macros for packing/unpacking cec_events.\n+ * bits[27:0] : bitmask of events from enum mkbp_cec_event\n+ * bits[31:28]: port number\n */\n-#define EC_CMD_GET_PANIC_INFO 0x00D3\n+#define EC_MKBP_EVENT_CEC_PACK(events, port) \\\n+\t(((events) & GENMASK(27, 0)) | (((port) & 0xf) << 28))\n+#define EC_MKBP_EVENT_CEC_GET_EVENTS(event) ((event) & GENMASK(27, 0))\n+#define EC_MKBP_EVENT_CEC_GET_PORT(event) (((event) >> 28) & 0xf)\n \n-/*****************************************************************************/\n-/*\n- * Special commands\n- *\n- * These do not follow the normal rules for commands. See each command for\n- * details.\n- */\n+/* CEC message from the AP to be written on the CEC bus */\n+#define EC_CMD_CEC_WRITE_MSG 0x00B8\n \n-/*\n- * Reboot NOW\n- *\n- * This command will work even when the EC LPC interface is busy, because the\n- * reboot command is processed at interrupt level. Note that when the EC\n- * reboots, the host will reboot too, so there is no response to this command.\n- *\n- * Use EC_CMD_REBOOT_EC to reboot the EC more politely.\n+/**\n+ * struct ec_params_cec_write - Message to write to the CEC bus\n+ * @msg: message content to write to the CEC bus\n */\n-#define EC_CMD_REBOOT 0x00D1 /* Think \"die\" */\n-\n-/*\n- * Resend last response (not supported on LPC).\n- *\n- * Returns EC_RES_UNAVAILABLE if there is no response available - for example,\n- * there was no previous command, or the previous command's response was too\n- * big to save.\n+struct ec_params_cec_write {\n+\tuint8_t msg[MAX_CEC_MSG_LEN];\n+} __ec_align1;\n+\n+/**\n+ * struct ec_params_cec_write_v1 - Message to write to the CEC bus\n+ * @port: CEC port to write the message on\n+ * @msg_len: length of msg in bytes\n+ * @msg: message content to write to the CEC bus\n */\n-#define EC_CMD_RESEND_RESPONSE 0x00DB\n+struct ec_params_cec_write_v1 {\n+\tuint8_t port;\n+\tuint8_t msg_len;\n+\tuint8_t msg[MAX_CEC_MSG_LEN];\n+} __ec_align1;\n \n-/*\n- * This header byte on a command indicate version 0. Any header byte less\n- * than this means that we are talking to an old EC which doesn't support\n- * versioning. In that case, we assume version 0.\n- *\n- * Header bytes greater than this indicate a later version. For example,\n- * EC_CMD_VERSION0 + 1 means we are using version 1.\n- *\n- * The old EC interface must not use commands 0xdc or higher.\n+/* CEC message read from a CEC bus reported back to the AP */\n+#define EC_CMD_CEC_READ_MSG 0x00B9\n+\n+/**\n+ * struct ec_params_cec_read - Read a message from the CEC bus\n+ * @port: CEC port to read a message on\n */\n-#define EC_CMD_VERSION0 0x00DC\n+struct ec_params_cec_read {\n+\tuint8_t port;\n+} __ec_align1;\n \n-/*****************************************************************************/\n-/*\n- * PD commands\n- *\n- * These commands are for PD MCU communication.\n+/**\n+ * struct ec_response_cec_read - Message read from the CEC bus\n+ * @msg_len: length of msg in bytes\n+ * @msg: message content read from the CEC bus\n */\n+struct ec_response_cec_read {\n+\tuint8_t msg_len;\n+\tuint8_t msg[MAX_CEC_MSG_LEN];\n+} __ec_align1;\n+\n+/* Set various CEC parameters */\n+#define EC_CMD_CEC_SET 0x00BA\n+\n+/**\n+ * struct ec_params_cec_set - CEC parameters set\n+ * @cmd: parameter type, can be CEC_CMD_ENABLE or CEC_CMD_LOGICAL_ADDRESS\n+ * @port: CEC port to set the parameter on\n+ * @val: in case cmd is CEC_CMD_ENABLE, this field can be 0 to disable CEC\n+ *\tor 1 to enable CEC functionality, in case cmd is\n+ *\tCEC_CMD_LOGICAL_ADDRESS, this field encodes the requested logical\n+ *\taddress between 0 and 15 or 0xff to unregister\n+ */\n+struct ec_params_cec_set {\n+\tuint8_t cmd : 4; /* enum cec_command */\n+\tuint8_t port : 4;\n+\tuint8_t val;\n+} __ec_align1;\n \n-/* EC to PD MCU exchange status command */\n-#define EC_CMD_PD_EXCHANGE_STATUS 0x0100\n-#define EC_VER_PD_EXCHANGE_STATUS 2\n+/* Read various CEC parameters */\n+#define EC_CMD_CEC_GET 0x00BB\n \n-enum pd_charge_state {\n-\tPD_CHARGE_NO_CHANGE = 0, /* Don't change charge state */\n-\tPD_CHARGE_NONE, /* No charging allowed */\n-\tPD_CHARGE_5V, /* 5V charging only */\n-\tPD_CHARGE_MAX /* Charge at max voltage */\n-};\n+/**\n+ * struct ec_params_cec_get - CEC parameters get\n+ * @cmd: parameter type, can be CEC_CMD_ENABLE or CEC_CMD_LOGICAL_ADDRESS\n+ * @port: CEC port to get the parameter on\n+ */\n+struct ec_params_cec_get {\n+\tuint8_t cmd : 4; /* enum cec_command */\n+\tuint8_t port : 4;\n+} __ec_align1;\n+\n+/**\n+ * struct ec_response_cec_get - CEC parameters get response\n+ * @val: in case cmd was CEC_CMD_ENABLE, this field will 0 if CEC is\n+ *\tdisabled or 1 if CEC functionality is enabled,\n+ *\tin case cmd was CEC_CMD_LOGICAL_ADDRESS, this will encode the\n+ *\tconfigured logical address between 0 and 15 or 0xff if unregistered\n+ */\n+struct ec_response_cec_get {\n+\tuint8_t val;\n+} __ec_align1;\n \n-/* Status of EC being sent to PD */\n-#define EC_STATUS_HIBERNATING\t(1 << 0)\n+/* Get the number of CEC ports */\n+#define EC_CMD_CEC_PORT_COUNT 0x00C1\n+\n+/**\n+ * struct ec_response_cec_port_count - CEC port count response\n+ * @port_count: number of CEC ports\n+ */\n+struct ec_response_cec_port_count {\n+\tuint8_t port_count;\n+} __ec_align1;\n \n-struct __ec_align1 ec_params_pd_status {\n-\tuint8_t status; /* EC status */\n-\tint8_t batt_soc; /* battery state of charge */\n-\tuint8_t charge_state; /* charging state (from enum pd_charge_state) */\n+/* CEC parameters command */\n+enum cec_command {\n+\t/* CEC reading, writing and events enable */\n+\tCEC_CMD_ENABLE,\n+\t/* CEC logical address */\n+\tCEC_CMD_LOGICAL_ADDRESS,\n };\n \n-/* Status of PD being sent back to EC */\n-#define PD_STATUS_HOST_EVENT (1 << 0) /* Forward host event to AP */\n-#define PD_STATUS_IN_RW (1 << 1) /* Running RW image */\n-#define PD_STATUS_JUMPED_TO_IMAGE (1 << 2) /* Current image was jumped to */\n-#define PD_STATUS_TCPC_ALERT_0 (1 << 3) /* Alert active in port 0 TCPC */\n-#define PD_STATUS_TCPC_ALERT_1 (1 << 4) /* Alert active in port 1 TCPC */\n-#define PD_STATUS_TCPC_ALERT_2 (1 << 5) /* Alert active in port 2 TCPC */\n-#define PD_STATUS_TCPC_ALERT_3 (1 << 6) /* Alert active in port 3 TCPC */\n-#define PD_STATUS_EC_INT_ACTIVE (PD_STATUS_TCPC_ALERT_0 | \\\n-\t\t\t\t PD_STATUS_TCPC_ALERT_1 | \\\n-\t\t\t\t PD_STATUS_HOST_EVENT)\n-struct __ec_align_size1 ec_response_pd_status {\n-\tuint32_t curr_lim_ma; /* input current limit */\n-\tuint16_t status; /* PD MCU status */\n-\tint8_t active_charge_port; /* active charging port */\n+/* Events from CEC to AP */\n+enum mkbp_cec_event {\n+\t/* Outgoing message was acknowledged by a follower */\n+\tEC_MKBP_CEC_SEND_OK = BIT(0),\n+\t/* Outgoing message was not acknowledged */\n+\tEC_MKBP_CEC_SEND_FAILED = BIT(1),\n+\t/* Incoming message can be read out by AP */\n+\tEC_MKBP_CEC_HAVE_DATA = BIT(2),\n };\n \n-/* AP to PD MCU host event status command, cleared on read */\n-#define EC_CMD_PD_HOST_EVENT_STATUS 0x0104\n+/*****************************************************************************/\n \n-/* PD MCU host event status bits */\n-#define PD_EVENT_UPDATE_DEVICE (1 << 0)\n-#define PD_EVENT_POWER_CHANGE (1 << 1)\n-#define PD_EVENT_IDENTITY_RECEIVED (1 << 2)\n-#define PD_EVENT_DATA_SWAP (1 << 3)\n-struct __ec_align4 ec_response_host_event_status {\n-\tuint32_t status; /* PD MCU host event status */\n-};\n+/* Commands for audio codec. */\n+#define EC_CMD_EC_CODEC 0x00BC\n \n-/* Set USB type-C port role and muxes */\n-#define EC_CMD_USB_PD_CONTROL 0x0101\n+enum ec_codec_subcmd {\n+\tEC_CODEC_GET_CAPABILITIES = 0x0,\n+\tEC_CODEC_GET_SHM_ADDR = 0x1,\n+\tEC_CODEC_SET_SHM_ADDR = 0x2,\n+\tEC_CODEC_SUBCMD_COUNT,\n+};\n \n-enum usb_pd_control_role {\n-\tUSB_PD_CTRL_ROLE_NO_CHANGE = 0,\n-\tUSB_PD_CTRL_ROLE_TOGGLE_ON = 1, /* == AUTO */\n-\tUSB_PD_CTRL_ROLE_TOGGLE_OFF = 2,\n-\tUSB_PD_CTRL_ROLE_FORCE_SINK = 3,\n-\tUSB_PD_CTRL_ROLE_FORCE_SOURCE = 4,\n-\tUSB_PD_CTRL_ROLE_COUNT\n+enum ec_codec_cap {\n+\tEC_CODEC_CAP_WOV_AUDIO_SHM = 0,\n+\tEC_CODEC_CAP_WOV_LANG_SHM = 1,\n+\tEC_CODEC_CAP_LAST = 32,\n };\n \n-enum usb_pd_control_mux {\n-\tUSB_PD_CTRL_MUX_NO_CHANGE = 0,\n-\tUSB_PD_CTRL_MUX_NONE = 1,\n-\tUSB_PD_CTRL_MUX_USB = 2,\n-\tUSB_PD_CTRL_MUX_DP = 3,\n-\tUSB_PD_CTRL_MUX_DOCK = 4,\n-\tUSB_PD_CTRL_MUX_AUTO = 5,\n-\tUSB_PD_CTRL_MUX_COUNT\n+enum ec_codec_shm_id {\n+\tEC_CODEC_SHM_ID_WOV_AUDIO = 0x0,\n+\tEC_CODEC_SHM_ID_WOV_LANG = 0x1,\n+\tEC_CODEC_SHM_ID_LAST,\n };\n \n-enum usb_pd_control_swap {\n-\tUSB_PD_CTRL_SWAP_NONE = 0,\n-\tUSB_PD_CTRL_SWAP_DATA = 1,\n-\tUSB_PD_CTRL_SWAP_POWER = 2,\n-\tUSB_PD_CTRL_SWAP_VCONN = 3,\n-\tUSB_PD_CTRL_SWAP_COUNT\n+enum ec_codec_shm_type {\n+\tEC_CODEC_SHM_TYPE_EC_RAM = 0x0,\n+\tEC_CODEC_SHM_TYPE_SYSTEM_RAM = 0x1,\n };\n \n-struct __ec_align1 ec_params_usb_pd_control {\n-\tuint8_t port;\n-\tuint8_t role;\n-\tuint8_t mux;\n-\tuint8_t swap;\n+struct __ec_align1 ec_param_ec_codec_get_shm_addr {\n+\tuint8_t shm_id;\n+\tuint8_t reserved[3];\n };\n \n-#define PD_CTRL_RESP_ENABLED_COMMS (1 << 0) /* Communication enabled */\n-#define PD_CTRL_RESP_ENABLED_CONNECTED (1 << 1) /* Device connected */\n-#define PD_CTRL_RESP_ENABLED_PD_CAPABLE (1 << 2) /* Partner is PD capable */\n+struct __ec_align4 ec_param_ec_codec_set_shm_addr {\n+\tuint64_t phys_addr;\n+\tuint32_t len;\n+\tuint8_t shm_id;\n+\tuint8_t reserved[3];\n+};\n \n-#define PD_CTRL_RESP_ROLE_POWER (1 << 0) /* 0=SNK/1=SRC */\n-#define PD_CTRL_RESP_ROLE_DATA (1 << 1) /* 0=UFP/1=DFP */\n-#define PD_CTRL_RESP_ROLE_VCONN (1 << 2) /* Vconn status */\n-#define PD_CTRL_RESP_ROLE_DR_POWER (1 << 3) /* Partner is dualrole power */\n-#define PD_CTRL_RESP_ROLE_DR_DATA (1 << 4) /* Partner is dualrole data */\n-#define PD_CTRL_RESP_ROLE_USB_COMM (1 << 5) /* Partner USB comm capable */\n-#define PD_CTRL_RESP_ROLE_EXT_POWERED (1 << 6) /* Partner externally powerd */\n+struct __ec_align4 ec_param_ec_codec {\n+\tuint8_t cmd; /* enum ec_codec_subcmd */\n+\tuint8_t reserved[3];\n \n-struct __ec_align1 ec_response_usb_pd_control {\n-\tuint8_t enabled;\n-\tuint8_t role;\n-\tuint8_t polarity;\n-\tuint8_t state;\n+\tunion {\n+\t\tstruct ec_param_ec_codec_get_shm_addr get_shm_addr_param;\n+\t\tstruct ec_param_ec_codec_set_shm_addr set_shm_addr_param;\n+\t};\n };\n \n-struct __ec_align1 ec_response_usb_pd_control_v1 {\n-\tuint8_t enabled;\n-\tuint8_t role;\n-\tuint8_t polarity;\n-\tchar state[32];\n+struct __ec_align4 ec_response_ec_codec_get_capabilities {\n+\tuint32_t capabilities;\n };\n \n-#define EC_CMD_USB_PD_PORTS 0x0102\n-\n-/* Maximum number of PD ports on a device, num_ports will be <= this */\n-#define EC_USB_PD_MAX_PORTS 8\n-\n-struct __ec_align1 ec_response_usb_pd_ports {\n-\tuint8_t num_ports;\n+struct __ec_align4 ec_response_ec_codec_get_shm_addr {\n+\tuint64_t phys_addr;\n+\tuint32_t len;\n+\tuint8_t type;\n+\tuint8_t reserved[3];\n };\n \n-#define EC_CMD_USB_PD_POWER_INFO 0x0103\n+/*****************************************************************************/\n \n-#define PD_POWER_CHARGING_PORT 0xff\n-struct __ec_align1 ec_params_usb_pd_power_info {\n-\tuint8_t port;\n-};\n+/* Commands for DMIC on audio codec. */\n+#define EC_CMD_EC_CODEC_DMIC 0x00BD\n \n-enum usb_chg_type {\n-\tUSB_CHG_TYPE_NONE,\n-\tUSB_CHG_TYPE_PD,\n-\tUSB_CHG_TYPE_C,\n-\tUSB_CHG_TYPE_PROPRIETARY,\n-\tUSB_CHG_TYPE_BC12_DCP,\n-\tUSB_CHG_TYPE_BC12_CDP,\n-\tUSB_CHG_TYPE_BC12_SDP,\n-\tUSB_CHG_TYPE_OTHER,\n-\tUSB_CHG_TYPE_VBUS,\n-\tUSB_CHG_TYPE_UNKNOWN,\n+enum ec_codec_dmic_subcmd {\n+\tEC_CODEC_DMIC_GET_MAX_GAIN = 0x0,\n+\tEC_CODEC_DMIC_SET_GAIN_IDX = 0x1,\n+\tEC_CODEC_DMIC_GET_GAIN_IDX = 0x2,\n+\tEC_CODEC_DMIC_SUBCMD_COUNT,\n };\n-enum usb_power_roles {\n-\tUSB_PD_PORT_POWER_DISCONNECTED,\n-\tUSB_PD_PORT_POWER_SOURCE,\n-\tUSB_PD_PORT_POWER_SINK,\n-\tUSB_PD_PORT_POWER_SINK_NOT_CHARGING,\n+\n+enum ec_codec_dmic_channel {\n+\tEC_CODEC_DMIC_CHANNEL_0 = 0x0,\n+\tEC_CODEC_DMIC_CHANNEL_1 = 0x1,\n+\tEC_CODEC_DMIC_CHANNEL_2 = 0x2,\n+\tEC_CODEC_DMIC_CHANNEL_3 = 0x3,\n+\tEC_CODEC_DMIC_CHANNEL_4 = 0x4,\n+\tEC_CODEC_DMIC_CHANNEL_5 = 0x5,\n+\tEC_CODEC_DMIC_CHANNEL_6 = 0x6,\n+\tEC_CODEC_DMIC_CHANNEL_7 = 0x7,\n+\tEC_CODEC_DMIC_CHANNEL_COUNT,\n };\n \n-struct __ec_align2 usb_chg_measures {\n-\tuint16_t voltage_max;\n-\tuint16_t voltage_now;\n-\tuint16_t current_max;\n-\tuint16_t current_lim;\n+struct __ec_align1 ec_param_ec_codec_dmic_set_gain_idx {\n+\tuint8_t channel; /* enum ec_codec_dmic_channel */\n+\tuint8_t gain;\n+\tuint8_t reserved[2];\n };\n \n-struct __ec_align4 ec_response_usb_pd_power_info {\n-\tuint8_t role;\n-\tuint8_t type;\n-\tuint8_t dualrole;\n-\tuint8_t reserved1;\n-\tstruct usb_chg_measures meas;\n-\tuint32_t max_power;\n+struct __ec_align1 ec_param_ec_codec_dmic_get_gain_idx {\n+\tuint8_t channel; /* enum ec_codec_dmic_channel */\n+\tuint8_t reserved[3];\n };\n \n-/* Write USB-PD device FW */\n-#define EC_CMD_USB_PD_FW_UPDATE 0x0110\n+struct __ec_align4 ec_param_ec_codec_dmic {\n+\tuint8_t cmd; /* enum ec_codec_dmic_subcmd */\n+\tuint8_t reserved[3];\n \n-enum usb_pd_fw_update_cmds {\n-\tUSB_PD_FW_REBOOT,\n-\tUSB_PD_FW_FLASH_ERASE,\n-\tUSB_PD_FW_FLASH_WRITE,\n-\tUSB_PD_FW_ERASE_SIG,\n+\tunion {\n+\t\tstruct ec_param_ec_codec_dmic_set_gain_idx set_gain_idx_param;\n+\t\tstruct ec_param_ec_codec_dmic_get_gain_idx get_gain_idx_param;\n+\t};\n };\n \n-struct __ec_align4 ec_params_usb_pd_fw_update {\n-\tuint16_t dev_id;\n-\tuint8_t cmd;\n-\tuint8_t port;\n-\tuint32_t size; /* Size to write in bytes */\n-\t/* Followed by data to write */\n+struct __ec_align1 ec_response_ec_codec_dmic_get_max_gain {\n+\tuint8_t max_gain;\n };\n \n-/* Write USB-PD Accessory RW_HASH table entry */\n-#define EC_CMD_USB_PD_RW_HASH_ENTRY 0x0111\n-/* RW hash is first 20 bytes of SHA-256 of RW section */\n-#define PD_RW_HASH_SIZE 20\n-struct __ec_align1 ec_params_usb_pd_rw_hash_entry {\n-\tuint16_t dev_id;\n-\tuint8_t dev_rw_hash[PD_RW_HASH_SIZE];\n-\tuint8_t reserved; /* For alignment of current_image\n-\t\t\t\t * TODO(rspangler) but it's not aligned!\n-\t\t\t\t * Should have been reserved[2]. */\n-\tuint32_t current_image; /* One of ec_current_image */\n+struct __ec_align1 ec_response_ec_codec_dmic_get_gain_idx {\n+\tuint8_t gain;\n };\n \n-/* Read USB-PD Accessory info */\n-#define EC_CMD_USB_PD_DEV_INFO 0x0112\n+/*****************************************************************************/\n \n-struct __ec_align1 ec_params_usb_pd_info_request {\n-\tuint8_t port;\n+/* Commands for I2S RX on audio codec. */\n+\n+#define EC_CMD_EC_CODEC_I2S_RX 0x00BE\n+\n+enum ec_codec_i2s_rx_subcmd {\n+\tEC_CODEC_I2S_RX_ENABLE = 0x0,\n+\tEC_CODEC_I2S_RX_DISABLE = 0x1,\n+\tEC_CODEC_I2S_RX_SET_SAMPLE_DEPTH = 0x2,\n+\tEC_CODEC_I2S_RX_SET_DAIFMT = 0x3,\n+\tEC_CODEC_I2S_RX_SET_BCLK = 0x4,\n+\tEC_CODEC_I2S_RX_RESET = 0x5,\n+\tEC_CODEC_I2S_RX_SUBCMD_COUNT,\n };\n \n-/* Read USB-PD Device discovery info */\n-#define EC_CMD_USB_PD_DISCOVERY 0x0113\n-struct __ec_align_size1 ec_params_usb_pd_discovery_entry {\n-\tuint16_t vid; /* USB-IF VID */\n-\tuint16_t pid; /* USB-IF PID */\n-\tuint8_t ptype; /* product type (hub,periph,cable,ama) */\n+enum ec_codec_i2s_rx_sample_depth {\n+\tEC_CODEC_I2S_RX_SAMPLE_DEPTH_16 = 0x0,\n+\tEC_CODEC_I2S_RX_SAMPLE_DEPTH_24 = 0x1,\n+\tEC_CODEC_I2S_RX_SAMPLE_DEPTH_COUNT,\n };\n \n-/* Override default charge behavior */\n-#define EC_CMD_PD_CHARGE_PORT_OVERRIDE 0x0114\n+enum ec_codec_i2s_rx_daifmt {\n+\tEC_CODEC_I2S_RX_DAIFMT_I2S = 0x0,\n+\tEC_CODEC_I2S_RX_DAIFMT_RIGHT_J = 0x1,\n+\tEC_CODEC_I2S_RX_DAIFMT_LEFT_J = 0x2,\n+\tEC_CODEC_I2S_RX_DAIFMT_COUNT,\n+};\n \n-/* Negative port parameters have special meaning */\n-enum usb_pd_override_ports {\n-\tOVERRIDE_DONT_CHARGE = -2,\n-\tOVERRIDE_OFF = -1,\n-\t/* [0, CONFIG_USB_PD_PORT_COUNT): Port# */\n+struct __ec_align1 ec_param_ec_codec_i2s_rx_set_sample_depth {\n+\tuint8_t depth;\n+\tuint8_t reserved[3];\n };\n \n-struct __ec_align2 ec_params_charge_port_override {\n-\tint16_t override_port; /* Override port# */\n+struct __ec_align1 ec_param_ec_codec_i2s_rx_set_gain {\n+\tuint8_t left;\n+\tuint8_t right;\n+\tuint8_t reserved[2];\n };\n \n-/* Read (and delete) one entry of PD event log */\n-#define EC_CMD_PD_GET_LOG_ENTRY 0x0115\n+struct __ec_align1 ec_param_ec_codec_i2s_rx_set_daifmt {\n+\tuint8_t daifmt;\n+\tuint8_t reserved[3];\n+};\n \n-struct __ec_align4 ec_response_pd_log {\n-\tuint32_t timestamp; /* relative timestamp in milliseconds */\n-\tuint8_t type; /* event type : see PD_EVENT_xx below */\n-\tuint8_t size_port; /* [7:5] port number [4:0] payload size in bytes */\n-\tuint16_t data; /* type-defined data payload */\n-\tuint8_t payload[0]; /* optional additional data payload: 0..16 bytes */\n+struct __ec_align4 ec_param_ec_codec_i2s_rx_set_bclk {\n+\tuint32_t bclk;\n };\n \n-/* The timestamp is the microsecond counter shifted to get about a ms. */\n-#define PD_LOG_TIMESTAMP_SHIFT 10 /* 1 LSB = 1024us */\n+struct __ec_align4 ec_param_ec_codec_i2s_rx {\n+\tuint8_t cmd; /* enum ec_codec_i2s_rx_subcmd */\n+\tuint8_t reserved[3];\n \n-#define PD_LOG_SIZE_MASK 0x1f\n-#define PD_LOG_PORT_MASK 0xe0\n-#define PD_LOG_PORT_SHIFT 5\n-#define PD_LOG_PORT_SIZE(port, size) (((port) << PD_LOG_PORT_SHIFT) | \\\n-\t\t\t\t ((size) & PD_LOG_SIZE_MASK))\n-#define PD_LOG_PORT(size_port) ((size_port) >> PD_LOG_PORT_SHIFT)\n-#define PD_LOG_SIZE(size_port) ((size_port) & PD_LOG_SIZE_MASK)\n+\tunion {\n+\t\tstruct ec_param_ec_codec_i2s_rx_set_sample_depth\n+\t\t\tset_sample_depth_param;\n+\t\tstruct ec_param_ec_codec_i2s_rx_set_daifmt set_daifmt_param;\n+\t\tstruct ec_param_ec_codec_i2s_rx_set_bclk set_bclk_param;\n+\t};\n+};\n \n-/* PD event log : entry types */\n-/* PD MCU events */\n-#define PD_EVENT_MCU_BASE 0x00\n-#define PD_EVENT_MCU_CHARGE (PD_EVENT_MCU_BASE+0)\n-#define PD_EVENT_MCU_CONNECT (PD_EVENT_MCU_BASE+1)\n-/* Reserved for custom board event */\n-#define PD_EVENT_MCU_BOARD_CUSTOM (PD_EVENT_MCU_BASE+2)\n-/* PD generic accessory events */\n-#define PD_EVENT_ACC_BASE 0x20\n-#define PD_EVENT_ACC_RW_FAIL (PD_EVENT_ACC_BASE+0)\n-#define PD_EVENT_ACC_RW_ERASE (PD_EVENT_ACC_BASE+1)\n-/* PD power supply events */\n-#define PD_EVENT_PS_BASE 0x40\n-#define PD_EVENT_PS_FAULT (PD_EVENT_PS_BASE+0)\n-/* PD video dongles events */\n-#define PD_EVENT_VIDEO_BASE 0x60\n-#define PD_EVENT_VIDEO_DP_MODE (PD_EVENT_VIDEO_BASE+0)\n-#define PD_EVENT_VIDEO_CODEC (PD_EVENT_VIDEO_BASE+1)\n-/* Returned in the \"type\" field, when there is no entry available */\n-#define PD_EVENT_NO_ENTRY 0xff\n+/*****************************************************************************/\n+/* Commands for WoV on audio codec. */\n \n-/*\n- * PD_EVENT_MCU_CHARGE event definition :\n- * the payload is \"struct usb_chg_measures\"\n- * the data field contains the port state flags as defined below :\n- */\n-/* Port partner is a dual role device */\n-#define CHARGE_FLAGS_DUAL_ROLE (1 << 15)\n-/* Port is the pending override port */\n-#define CHARGE_FLAGS_DELAYED_OVERRIDE (1 << 14)\n-/* Port is the override port */\n-#define CHARGE_FLAGS_OVERRIDE (1 << 13)\n-/* Charger type */\n-#define CHARGE_FLAGS_TYPE_SHIFT 3\n-#define CHARGE_FLAGS_TYPE_MASK (0xf << CHARGE_FLAGS_TYPE_SHIFT)\n-/* Power delivery role */\n-#define CHARGE_FLAGS_ROLE_MASK (7 << 0)\n+#define EC_CMD_EC_CODEC_WOV 0x00BF\n \n-/*\n- * PD_EVENT_PS_FAULT data field flags definition :\n- */\n-#define PS_FAULT_OCP 1\n-#define PS_FAULT_FAST_OCP 2\n-#define PS_FAULT_OVP 3\n-#define PS_FAULT_DISCH 4\n+enum ec_codec_wov_subcmd {\n+\tEC_CODEC_WOV_SET_LANG = 0x0,\n+\tEC_CODEC_WOV_SET_LANG_SHM = 0x1,\n+\tEC_CODEC_WOV_GET_LANG = 0x2,\n+\tEC_CODEC_WOV_ENABLE = 0x3,\n+\tEC_CODEC_WOV_DISABLE = 0x4,\n+\tEC_CODEC_WOV_READ_AUDIO = 0x5,\n+\tEC_CODEC_WOV_READ_AUDIO_SHM = 0x6,\n+\tEC_CODEC_WOV_SUBCMD_COUNT,\n+};\n \n /*\n- * PD_EVENT_VIDEO_CODEC payload is \"struct mcdp_info\".\n+ * @hash is SHA256 of the whole language model.\n+ * @total_len indicates the length of whole language model.\n+ * @offset is the cursor from the beginning of the model.\n+ * @buf is the packet buffer.\n+ * @len denotes how many bytes in the buf.\n */\n-struct __ec_align4 mcdp_version {\n-\tuint8_t major;\n-\tuint8_t minor;\n-\tuint16_t build;\n+struct __ec_align4 ec_param_ec_codec_wov_set_lang {\n+\tuint8_t hash[32];\n+\tuint32_t total_len;\n+\tuint32_t offset;\n+\tuint8_t buf[128];\n+\tuint32_t len;\n };\n \n-struct __ec_align4 mcdp_info {\n-\tuint8_t family[2];\n-\tuint8_t chipid[2];\n-\tstruct mcdp_version irom;\n-\tstruct mcdp_version fw;\n+struct __ec_align4 ec_param_ec_codec_wov_set_lang_shm {\n+\tuint8_t hash[32];\n+\tuint32_t total_len;\n };\n \n-/* struct mcdp_info field decoding */\n-#define MCDP_CHIPID(chipid) ((chipid[0] << 8) | chipid[1])\n-#define MCDP_FAMILY(family) ((family[0] << 8) | family[1])\n+struct __ec_align4 ec_param_ec_codec_wov {\n+\tuint8_t cmd; /* enum ec_codec_wov_subcmd */\n+\tuint8_t reserved[3];\n \n-/* Get/Set USB-PD Alternate mode info */\n-#define EC_CMD_USB_PD_GET_AMODE 0x0116\n-struct __ec_align_size1 ec_params_usb_pd_get_mode_request {\n-\tuint16_t svid_idx; /* SVID index to get */\n-\tuint8_t port; /* port */\n+\tunion {\n+\t\tstruct ec_param_ec_codec_wov_set_lang set_lang_param;\n+\t\tstruct ec_param_ec_codec_wov_set_lang_shm set_lang_shm_param;\n+\t};\n };\n \n-struct __ec_align4 ec_params_usb_pd_get_mode_response {\n-\tuint16_t svid; /* SVID */\n-\tuint16_t opos; /* Object Position */\n-\tuint32_t vdo[6]; /* Mode VDOs */\n+struct __ec_align4 ec_response_ec_codec_wov_get_lang {\n+\tuint8_t hash[32];\n };\n \n-#define EC_CMD_USB_PD_SET_AMODE 0x0117\n-\n-enum pd_mode_cmd {\n-\tPD_EXIT_MODE = 0,\n-\tPD_ENTER_MODE = 1,\n-\t/* Not a command. Do NOT remove. */\n-\tPD_MODE_CMD_COUNT,\n+struct __ec_align4 ec_response_ec_codec_wov_read_audio {\n+\tuint8_t buf[128];\n+\tuint32_t len;\n };\n \n-struct __ec_align4 ec_params_usb_pd_set_mode_request {\n-\tuint32_t cmd; /* enum pd_mode_cmd */\n-\tuint16_t svid; /* SVID to set */\n-\tuint8_t opos; /* Object Position */\n-\tuint8_t port; /* port */\n+struct __ec_align4 ec_response_ec_codec_wov_read_audio_shm {\n+\tuint32_t offset;\n+\tuint32_t len;\n };\n \n-/* Ask the PD MCU to record a log of a requested type */\n-#define EC_CMD_PD_WRITE_LOG_ENTRY 0x0118\n-\n-struct __ec_align1 ec_params_pd_write_log_entry {\n-\tuint8_t type; /* event type : see PD_EVENT_xx above */\n-\tuint8_t port; /* port#, or 0 for events unrelated to a given port */\n-};\n+/*****************************************************************************/\n+/* Commands for PoE PSE controller */\n \n-/* Control USB-PD chip */\n-#define EC_CMD_PD_CONTROL 0x0119\n+#define EC_CMD_PSE 0x00C0\n \n-enum ec_pd_control_cmd {\n-\tPD_SUSPEND = 0, /* Suspend the PD chip (EC: stop talking to PD) */\n-\tPD_RESUME, /* Resume the PD chip (EC: start talking to PD) */\n-\tPD_RESET, /* Force reset the PD chip */\n-\tPD_CONTROL_DISABLE /* Disable further calls to this command */\n+enum ec_pse_subcmd {\n+\tEC_PSE_STATUS = 0x0,\n+\tEC_PSE_ENABLE = 0x1,\n+\tEC_PSE_DISABLE = 0x2,\n+\tEC_PSE_SUBCMD_COUNT,\n };\n \n-struct __ec_align1 ec_params_pd_control {\n-\tuint8_t chip; /* chip id (should be 0) */\n-\tuint8_t subcmd;\n+struct __ec_align1 ec_params_pse {\n+\tuint8_t cmd; /* enum ec_pse_subcmd */\n+\tuint8_t port; /* PSE port */\n };\n \n-/* Get info about USB-C SS muxes */\n-#define EC_CMD_USB_PD_MUX_INFO 0x011A\n-\n-struct __ec_align1 ec_params_usb_pd_mux_info {\n-\tuint8_t port; /* USB-C port number */\n+enum ec_pse_status {\n+\tEC_PSE_STATUS_DISABLED = 0x0,\n+\tEC_PSE_STATUS_ENABLED = 0x1,\n+\tEC_PSE_STATUS_POWERED = 0x2,\n };\n \n-/* Flags representing mux state */\n-#define USB_PD_MUX_USB_ENABLED (1 << 0)\n-#define USB_PD_MUX_DP_ENABLED (1 << 1)\n-#define USB_PD_MUX_POLARITY_INVERTED (1 << 2)\n-#define USB_PD_MUX_HPD_IRQ (1 << 3)\n-\n-struct __ec_align1 ec_response_usb_pd_mux_info {\n-\tuint8_t flags; /* USB_PD_MUX_*-encoded USB mux state */\n+struct __ec_align1 ec_response_pse_status {\n+\tuint8_t status; /* enum ec_pse_status */\n };\n \n-#define EC_CMD_PD_CHIP_INFO\t\t0x011B\n+/*****************************************************************************/\n+/* System commands */\n \n-struct __ec_align1 ec_params_pd_chip_info {\n-\tuint8_t port;\t/* USB-C port number */\n-\tuint8_t renew;\t/* Force renewal */\n-};\n+/*\n+ * TODO(crosbug.com/p/23747): This is a confusing name, since it doesn't\n+ * necessarily reboot the EC. Rename to \"image\" or something similar?\n+ */\n+#define EC_CMD_REBOOT_EC 0x00D2\n \n-struct __ec_align2 ec_response_pd_chip_info {\n-\tuint16_t vendor_id;\n-\tuint16_t product_id;\n-\tuint16_t device_id;\n-\tunion {\n-\t\tuint8_t fw_version_string[8];\n-\t\tuint64_t fw_version_number;\n-\t};\n+/* Command */\n+enum ec_reboot_cmd {\n+\tEC_REBOOT_CANCEL = 0, /* Cancel a pending reboot */\n+\tEC_REBOOT_JUMP_RO = 1, /* Jump to RO without rebooting */\n+\tEC_REBOOT_JUMP_RW = 2, /* Jump to active RW without rebooting */\n+\t/* (command 3 was jump to RW-B) */\n+\tEC_REBOOT_COLD = 4, /* Cold-reboot */\n+\tEC_REBOOT_DISABLE_JUMP = 5, /* Disable jump until next reboot */\n+\tEC_REBOOT_HIBERNATE = 6, /* Hibernate EC */\n+\t/*\n+\t * DEPRECATED: Hibernate EC and clears AP_IDLE flag.\n+\t * Use EC_REBOOT_HIBERNATE and EC_REBOOT_FLAG_CLEAR_AP_IDLE, instead.\n+\t */\n+\tEC_REBOOT_HIBERNATE_CLEAR_AP_OFF = 7,\n+\tEC_REBOOT_COLD_AP_OFF = 8, /* Cold-reboot and don't boot AP */\n+\tEC_REBOOT_NO_OP = 9, /* Do nothing but apply the flags. */\n };\n \n-/* Run RW signature verification and get status */\n-#define EC_CMD_RWSIG_CHECK_STATUS\t0x011C\n+/* Flags for ec_params_reboot_ec.reboot_flags */\n+#define EC_REBOOT_FLAG_IMMEDIATE 0 /* Trigger Cold Reset */\n+#define EC_REBOOT_FLAG_RESERVED0 BIT(0) /* Was recovery request */\n+#define EC_REBOOT_FLAG_ON_AP_SHUTDOWN BIT(1) /* Reboot after AP shutdown */\n+#define EC_REBOOT_FLAG_SWITCH_RW_SLOT BIT(2) /* Switch RW slot */\n+#define EC_REBOOT_FLAG_CLEAR_AP_IDLE BIT(3) /* Clear AP_IDLE flag */\n \n-struct __ec_align4 ec_response_rwsig_check_status {\n-\tuint32_t status;\n-};\n+struct ec_params_reboot_ec {\n+\tuint8_t cmd; /* enum ec_reboot_cmd */\n+\tuint8_t flags; /* See EC_REBOOT_FLAG_* */\n+} __ec_align1;\n \n-/* For controlling RWSIG task */\n-#define EC_CMD_RWSIG_ACTION\t0x011D\n+/*\n+ * Get information on last EC panic.\n+ *\n+ * Returns variable-length platform-dependent panic information. See panic.h\n+ * for details.\n+ */\n+#define EC_CMD_GET_PANIC_INFO 0x00D3\n \n-enum rwsig_action {\n-\tRWSIG_ACTION_ABORT = 0,\t\t/* Abort RWSIG and prevent jumping */\n-\tRWSIG_ACTION_CONTINUE = 1,\t/* Jump to RW immediately */\n-};\n+struct ec_params_get_panic_info_v1 {\n+\t/* Do not modify PANIC_DATA_FLAG_OLD_HOSTCMD when reading panic info */\n+\tuint8_t preserve_old_hostcmd_flag;\n+} __ec_align1;\n \n-struct __ec_align4 ec_params_rwsig_action {\n-\tuint32_t action;\n-};\n+struct ec_params_get_panic_info_v2 {\n+\t/* Do not modify PANIC_DATA_FLAG_OLD_HOSTCMD when reading panic info */\n+\tuint8_t preserve_old_hostcmd_flag;\n \n-/* Run verification on a slot */\n-#define EC_CMD_EFS_VERIFY\t0x011E\n+\t/* Read panic_data struct from this offset.\n+\t * Signal end of data with empty success.\n+\t */\n+\tuint16_t read_offset;\n+} __ec_align1;\n \n-struct __ec_align1 ec_params_efs_verify {\n-\tuint8_t region;\t\t/* enum ec_flash_region */\n-};\n+/*****************************************************************************/\n+/*\n+ * Special commands\n+ *\n+ * These do not follow the normal rules for commands. See each command for\n+ * details.\n+ */\n \n /*\n- * Retrieve info from Cros Board Info store. Response is based on the data\n- * type. Integers return a uint32. Strings return a string, using the response\n- * size to determine how big it is.\n+ * Reboot NOW\n+ *\n+ * This command will work even when the EC LPC interface is busy, because the\n+ * reboot command is processed at interrupt level. Note that when the EC\n+ * reboots, the host will reboot too, so there is no response to this command.\n+ *\n+ * Use EC_CMD_REBOOT_EC to reboot the EC more politely.\n */\n-#define EC_CMD_GET_CROS_BOARD_INFO\t0x011F\n+#define EC_CMD_REBOOT 0x00D1 /* Think \"die\" */\n+\n /*\n- * Write info into Cros Board Info on EEPROM. Write fails if the board has\n- * hardware write-protect enabled.\n+ * Resend last response (not supported on LPC).\n+ *\n+ * Returns EC_RES_UNAVAILABLE if there is no response available - for example,\n+ * there was no previous command, or the previous command's response was too\n+ * big to save.\n */\n-#define EC_CMD_SET_CROS_BOARD_INFO\t0x0120\n+#define EC_CMD_RESEND_RESPONSE 0x00DB\n \n-enum cbi_data_tag {\n-\tCBI_TAG_BOARD_VERSION = 0, /* uint16_t or uint8_t[] = {minor,major} */\n-\tCBI_TAG_OEM_ID = 1, /* uint8_t */\n-\tCBI_TAG_SKU_ID = 2, /* uint8_t */\n-\tCBI_TAG_COUNT,\n-};\n+/*\n+ * This header byte on a command indicate version 0. Any header byte less\n+ * than this means that we are talking to an old EC which doesn't support\n+ * versioning. In that case, we assume version 0.\n+ *\n+ * Header bytes greater than this indicate a later version. For example,\n+ * EC_CMD_VERSION0 + 1 means we are using version 1.\n+ *\n+ * The old EC interface must not use commands 0xdc or higher.\n+ */\n+#define EC_CMD_VERSION0 0x00DC\n \n /*\n- * Flags to control read operation\n+ * Memory Dump Commands\n *\n- * RELOAD: Invalidate cache and read data from EEPROM. Useful to verify\n- * write was successful without reboot.\n+ * Since the HOSTCMD response size is limited, depending on the\n+ * protocol, retrieving a memory dump is split into 3 commands.\n+ *\n+ * 1. EC_CMD_MEMORY_DUMP_GET_METADATA returns the number of memory dump entries,\n+ * and the total dump size.\n+ * 2. EC_CMD_MEMORY_DUMP_GET_ENTRY_INFO returns the address and size for a given\n+ * memory dump entry index.\n+ * 3. EC_CMD_MEMORY_DUMP_READ_MEMORY returns the actual memory at a given\n+ * address. The address and size must be within the bounds of the given\n+ * memory dump entry index. Each response is limited to the max response size\n+ * of the host protocol, so this may need to be called repeatedly to retrieve\n+ * the entire memory dump entry.\n+ *\n+ * Memory entries may overlap and may be out of order.\n+ * The host should check for overlaps to optimize transfer rate.\n+ */\n+#define EC_CMD_MEMORY_DUMP_GET_METADATA 0x00DD\n+struct ec_response_memory_dump_get_metadata {\n+\tuint16_t memory_dump_entry_count;\n+\tuint32_t memory_dump_total_size;\n+} __ec_align4;\n+\n+#define EC_CMD_MEMORY_DUMP_GET_ENTRY_INFO 0x00DE\n+struct ec_params_memory_dump_get_entry_info {\n+\tuint16_t memory_dump_entry_index;\n+} __ec_align4;\n+\n+struct ec_response_memory_dump_get_entry_info {\n+\tuint32_t address;\n+\tuint32_t size;\n+} __ec_align4;\n+\n+#define EC_CMD_MEMORY_DUMP_READ_MEMORY 0x00DF\n+\n+struct ec_params_memory_dump_read_memory {\n+\tuint16_t memory_dump_entry_index;\n+\tuint32_t address;\n+\tuint32_t size;\n+} __ec_align4;\n+\n+#define EC_CMD_PANIC_LOG_INFO 0x00E0\n+\n+/*\n+ * Parameters for configuring the panic log.\n+ * Freeze and unfreeze are mutually exclusive.\n+ */\n+struct ec_params_panic_log_info {\n+\t/* Reset panic log */\n+\tuint8_t reset;\n+\t/* Freeze panic log */\n+\tuint8_t freeze;\n+\t/* Unfreeze panic log */\n+\tuint8_t unfreeze;\n+} __ec_align1;\n+\n+/*\n+ * Returns the panic log info before applying the configuration\n+ * in ec_params_panic_log_info.\n+ */\n+struct ec_response_panic_log_info {\n+\tuint32_t version;\n+\tuint32_t capacity;\n+\tuint32_t length;\n+\tuint8_t valid;\n+\tuint8_t frozen;\n+} __ec_align4;\n+\n+#define EC_CMD_PANIC_LOG_READ 0x00E1\n+\n+/*\n+ * Read from panic log at given byte offset. Will read up to the end of the\n+ * panic log or response max. Use EC_CMD_PANIC_LOG_INFO command to freeze\n+ * the log and get the length before reading.\n+ */\n+struct ec_params_panic_log_read {\n+\tuint32_t offset;\n+} __ec_align4;\n+\n+/*\n+ * EC_CMD_MEMORY_DUMP_READ_MEMORY response buffer is written directly into\n+ * host_cmd_handler_args.response and host_cmd_handler_args.response_size.\n+ */\n+\n+/*\n+ * Enter bootloader mode\n+ *\n+ * This command requests EC to enter bootloader mode.\n+ */\n+#define EC_CMD_ENTER_BOOTLOADER 0x00E2\n+\n+struct ec_params_enter_bootloader {\n+\t/* Mode to enter bootloader. Chip specific value. Can be unused. */\n+\tuint8_t mode;\n+} __ec_align1;\n+\n+#define EC_CMD_HOSTCMD_WATCHDOG_INFO 0x00E3\n+\n+struct ec_params_hostcmd_watchdog_info {\n+\tuint8_t reset_stats;\n+} __ec_align1;\n+\n+struct ec_response_hostcmd_watchdog_info {\n+\t/* Static watchdog info */\n+\tint32_t watchdog_period_ms;\n+\tint32_t watchdog_warning_period_ms;\n+\tint32_t watchdog_reload_period_nominal_ms;\n+\t/* Dynamic watchdog stats */\n+\tint32_t watchdog_reload_period_max_ms;\n+\tint64_t watchdog_reload_period_max_ts_ms;\n+\tuint32_t watchdog_reload_count;\n+\tint64_t watchdog_stats_elapsed_ms;\n+} __ec_align4;\n+\n+/*****************************************************************************/\n+/*\n+ * PD commands\n+ *\n+ * These commands are for PD MCU communication.\n+ */\n+\n+/* EC to PD MCU exchange status command */\n+#define EC_CMD_PD_EXCHANGE_STATUS 0x0100\n+#define EC_VER_PD_EXCHANGE_STATUS 2\n+\n+enum pd_charge_state {\n+\t/* Don't change charge state */\n+\tPD_CHARGE_NO_CHANGE = 0,\n+\n+\t/* No charging allowed */\n+\tPD_CHARGE_NONE,\n+\n+\t/* 5V charging only */\n+\tPD_CHARGE_5V,\n+\n+\t/* Charge at max voltage */\n+\tPD_CHARGE_MAX,\n+};\n+\n+/* Status of EC being sent to PD */\n+#define EC_STATUS_HIBERNATING BIT(0)\n+\n+struct ec_params_pd_status {\n+\t/* EC status */\n+\tuint8_t status;\n+\n+\t/* battery state of charge */\n+\tint8_t batt_soc;\n+\n+\t/* charging state (from enum pd_charge_state) */\n+\tuint8_t charge_state;\n+} __ec_align1;\n+\n+/* Status of PD being sent back to EC */\n+#define PD_STATUS_HOST_EVENT BIT(0) /* Forward host event to AP */\n+#define PD_STATUS_IN_RW BIT(1) /* Running RW image */\n+#define PD_STATUS_JUMPED_TO_IMAGE BIT(2) /* Current image was jumped to */\n+#define PD_STATUS_TCPC_ALERT_0 BIT(3) /* Alert active in port 0 TCPC */\n+#define PD_STATUS_TCPC_ALERT_1 BIT(4) /* Alert active in port 1 TCPC */\n+#define PD_STATUS_TCPC_ALERT_2 BIT(5) /* Alert active in port 2 TCPC */\n+#define PD_STATUS_TCPC_ALERT_3 BIT(6) /* Alert active in port 3 TCPC */\n+#define PD_STATUS_EC_INT_ACTIVE \\\n+\t(PD_STATUS_TCPC_ALERT_0 | PD_STATUS_TCPC_ALERT_1 | PD_STATUS_HOST_EVENT)\n+struct ec_response_pd_status {\n+\t/* input current limit */\n+\tuint32_t curr_lim_ma;\n+\n+\t/* PD MCU status */\n+\tuint16_t status;\n+\n+\t/* active charging port */\n+\tint8_t active_charge_port;\n+} __ec_align_size1;\n+\n+/* AP to PD MCU host event status command, cleared on read */\n+#define EC_CMD_PD_HOST_EVENT_STATUS 0x0104\n+\n+/* PD MCU host event status bits */\n+#define PD_EVENT_UPDATE_DEVICE BIT(0)\n+#define PD_EVENT_POWER_CHANGE BIT(1)\n+#define PD_EVENT_IDENTITY_RECEIVED BIT(2)\n+#define PD_EVENT_DATA_SWAP BIT(3)\n+#define PD_EVENT_TYPEC BIT(4)\n+#define PD_EVENT_PPM BIT(5)\n+#define PD_EVENT_INIT BIT(6)\n+\n+struct ec_response_host_event_status {\n+\tuint32_t status; /* PD MCU host event status */\n+} __ec_align4;\n+\n+/*\n+ * Set USB type-C port role and muxes\n+ *\n+ * Deprecated in favor of TYPEC_STATUS and TYPEC_CONTROL commands.\n+ *\n+ * TODO(b/169771803): TCPMv2: Remove EC_CMD_USB_PD_CONTROL\n+ */\n+#define EC_CMD_USB_PD_CONTROL 0x0101\n+\n+enum usb_pd_control_role {\n+\tUSB_PD_CTRL_ROLE_NO_CHANGE = 0,\n+\tUSB_PD_CTRL_ROLE_TOGGLE_ON = 1, /* == AUTO */\n+\tUSB_PD_CTRL_ROLE_TOGGLE_OFF = 2,\n+\tUSB_PD_CTRL_ROLE_FORCE_SINK = 3,\n+\tUSB_PD_CTRL_ROLE_FORCE_SOURCE = 4,\n+\tUSB_PD_CTRL_ROLE_FREEZE = 5,\n+\tUSB_PD_CTRL_ROLE_COUNT,\n+};\n+\n+enum usb_pd_control_mux {\n+\tUSB_PD_CTRL_MUX_NO_CHANGE = 0,\n+\tUSB_PD_CTRL_MUX_NONE = 1,\n+\tUSB_PD_CTRL_MUX_USB = 2,\n+\tUSB_PD_CTRL_MUX_DP = 3,\n+\tUSB_PD_CTRL_MUX_DOCK = 4,\n+\tUSB_PD_CTRL_MUX_AUTO = 5,\n+\tUSB_PD_CTRL_MUX_COUNT,\n+};\n+\n+enum usb_pd_control_swap {\n+\tUSB_PD_CTRL_SWAP_NONE = 0,\n+\tUSB_PD_CTRL_SWAP_DATA = 1,\n+\tUSB_PD_CTRL_SWAP_POWER = 2,\n+\tUSB_PD_CTRL_SWAP_VCONN = 3,\n+\tUSB_PD_CTRL_SWAP_COUNT,\n+};\n+\n+struct ec_params_usb_pd_control {\n+\tuint8_t port;\n+\tuint8_t role;\n+\tuint8_t mux;\n+\tuint8_t swap;\n+} __ec_align1;\n+\n+#define PD_CTRL_RESP_ENABLED_COMMS BIT(0) /* Communication enabled */\n+#define PD_CTRL_RESP_ENABLED_CONNECTED BIT(1) /* Device connected */\n+#define PD_CTRL_RESP_ENABLED_PD_CAPABLE BIT(2) /* Partner is PD capable */\n+\n+#define PD_CTRL_RESP_ROLE_POWER BIT(0) /* 0=SNK/1=SRC */\n+#define PD_CTRL_RESP_ROLE_DATA BIT(1) /* 0=UFP/1=DFP */\n+#define PD_CTRL_RESP_ROLE_VCONN BIT(2) /* Vconn status */\n+#define PD_CTRL_RESP_ROLE_DR_POWER BIT(3) /* Partner is dualrole power */\n+#define PD_CTRL_RESP_ROLE_DR_DATA BIT(4) /* Partner is dualrole data */\n+#define PD_CTRL_RESP_ROLE_USB_COMM BIT(5) /* Partner USB comm capable */\n+/* Partner unconstrained power */\n+#define PD_CTRL_RESP_ROLE_UNCONSTRAINED BIT(6)\n+\n+struct ec_response_usb_pd_control {\n+\tuint8_t enabled;\n+\tuint8_t role;\n+\tuint8_t polarity;\n+\tuint8_t state;\n+} __ec_align1;\n+\n+struct ec_response_usb_pd_control_v1 {\n+\tuint8_t enabled;\n+\tuint8_t role;\n+\tuint8_t polarity;\n+\tchar state[32];\n+} __ec_align1;\n+\n+/* Possible port partner connections based on CC line states */\n+enum pd_cc_states {\n+\tPD_CC_NONE = 0, /* No port partner attached */\n+\n+\t/* From DFP perspective */\n+\tPD_CC_UFP_NONE = 1, /* No UFP accessory connected */\n+\tPD_CC_UFP_AUDIO_ACC = 2, /* UFP Audio accessory connected */\n+\tPD_CC_UFP_DEBUG_ACC = 3, /* UFP Debug accessory connected */\n+\tPD_CC_UFP_ATTACHED = 4, /* Plain UFP attached */\n+\n+\t/* From UFP perspective */\n+\tPD_CC_DFP_ATTACHED = 5, /* Plain DFP attached */\n+\tPD_CC_DFP_DEBUG_ACC = 6, /* DFP debug accessory connected */\n+};\n+\n+/* Active/Passive Cable */\n+#define USB_PD_CTRL_ACTIVE_CABLE BIT(0)\n+/* Optical/Non-optical cable */\n+#define USB_PD_CTRL_OPTICAL_CABLE BIT(1)\n+/* 3rd Gen TBT device (or AMA)/2nd gen tbt Adapter */\n+#define USB_PD_CTRL_TBT_LEGACY_ADAPTER BIT(2)\n+/* Active Link Uni-Direction */\n+#define USB_PD_CTRL_ACTIVE_LINK_UNIDIR BIT(3)\n+/* Retimer/Redriver cable */\n+#define USB_PD_CTRL_RETIMER_CABLE BIT(4)\n+\n+struct ec_response_usb_pd_control_v2 {\n+\tuint8_t enabled;\n+\tuint8_t role;\n+\tuint8_t polarity;\n+\tchar state[32];\n+\tuint8_t cc_state; /* enum pd_cc_states representing cc state */\n+\tuint8_t dp_mode; /* Current DP pin mode (MODE_DP_PIN_[A-E]) */\n+\tuint8_t reserved; /* Reserved for future use */\n+\tuint8_t control_flags; /* USB_PD_CTRL_*flags */\n+\tuint8_t cable_speed; /* TBT_SS_* cable speed */\n+\tuint8_t cable_gen; /* TBT_GEN3_* cable rounded support */\n+} __ec_align1;\n+\n+#define EC_CMD_USB_PD_PORTS 0x0102\n+\n+/* Maximum number of PD ports on a device, num_ports will be <= this */\n+#define EC_USB_PD_MAX_PORTS 8\n+\n+struct ec_response_usb_pd_ports {\n+\tuint8_t num_ports;\n+} __ec_align1;\n+\n+#define EC_CMD_USB_PD_POWER_INFO 0x0103\n+\n+#define PD_POWER_CHARGING_PORT 0xff\n+struct ec_params_usb_pd_power_info {\n+\tuint8_t port;\n+} __ec_align1;\n+\n+enum usb_chg_type {\n+\tUSB_CHG_TYPE_NONE,\n+\tUSB_CHG_TYPE_PD,\n+\tUSB_CHG_TYPE_C,\n+\tUSB_CHG_TYPE_PROPRIETARY,\n+\tUSB_CHG_TYPE_BC12_DCP,\n+\tUSB_CHG_TYPE_BC12_CDP,\n+\tUSB_CHG_TYPE_BC12_SDP,\n+\tUSB_CHG_TYPE_OTHER,\n+\tUSB_CHG_TYPE_VBUS,\n+\tUSB_CHG_TYPE_UNKNOWN,\n+\tUSB_CHG_TYPE_DEDICATED,\n+};\n+enum usb_power_roles {\n+\tUSB_PD_PORT_POWER_DISCONNECTED,\n+\tUSB_PD_PORT_POWER_SOURCE,\n+\tUSB_PD_PORT_POWER_SINK,\n+\tUSB_PD_PORT_POWER_SINK_NOT_CHARGING,\n+};\n+\n+struct usb_chg_measures {\n+\tuint16_t voltage_max;\n+\tuint16_t voltage_now;\n+\tuint16_t current_max;\n+\tuint16_t current_lim;\n+} __ec_align2;\n+\n+struct ec_response_usb_pd_power_info {\n+\tuint8_t role;\n+\tuint8_t type;\n+\tuint8_t dualrole;\n+\tuint8_t reserved1;\n+\tstruct usb_chg_measures meas;\n+\tuint32_t max_power;\n+} __ec_align4;\n+\n+/*\n+ * This command will return the number of USB PD charge port + the number\n+ * of dedicated port present.\n+ * EC_CMD_USB_PD_PORTS does NOT include the dedicated ports\n+ */\n+#define EC_CMD_CHARGE_PORT_COUNT 0x0105\n+struct ec_response_charge_port_count {\n+\tuint8_t port_count;\n+} __ec_align1;\n+\n+/*\n+ * This command enable/disable dynamic PDO selection.\n+ */\n+#define EC_CMD_USB_PD_DPS_CONTROL 0x0106\n+\n+struct ec_params_usb_pd_dps_control {\n+\tuint8_t enable;\n+} __ec_align1;\n+\n+/*\n+ * This command return the status of dynamic PDO selection.\n+ */\n+#define EC_CMD_USB_PD_DPS_STATUS 0x0107\n+\n+struct ec_response_usb_pd_dps_status {\n+\tint32_t is_enabled;\n+\tint32_t port;\n+\tint32_t requested_voltage;\n+\tint32_t requested_current;\n+\tint32_t input_power;\n+\tint32_t input_voltage;\n+\tint32_t input_current;\n+\tint32_t efficient_voltage;\n+\tint32_t battery_voltage;\n+\tint32_t max_voltage;\n+} __ec_align4;\n+\n+/* Write USB-PD device FW */\n+#define EC_CMD_USB_PD_FW_UPDATE 0x0110\n+\n+enum usb_pd_fw_update_cmds {\n+\tUSB_PD_FW_REBOOT,\n+\tUSB_PD_FW_FLASH_ERASE,\n+\tUSB_PD_FW_FLASH_WRITE,\n+\tUSB_PD_FW_ERASE_SIG,\n+};\n+\n+struct ec_params_usb_pd_fw_update {\n+\tuint16_t dev_id;\n+\tuint8_t cmd;\n+\tuint8_t port;\n+\n+\t/* Size to write in bytes */\n+\tuint32_t size;\n+\n+\t/* Followed by data to write */\n+} __ec_align4;\n+\n+/* Write USB-PD Accessory RW_HASH table entry */\n+#define EC_CMD_USB_PD_RW_HASH_ENTRY 0x0111\n+/* RW hash is first 20 bytes of SHA-256 of RW section */\n+#define PD_RW_HASH_SIZE 20\n+struct ec_params_usb_pd_rw_hash_entry {\n+\tuint16_t dev_id;\n+\tuint8_t dev_rw_hash[PD_RW_HASH_SIZE];\n+\n+\t/*\n+\t * Reserved for alignment of current_image\n+\t * TODO(rspangler) but it's not aligned!\n+\t * Should have been reserved[2].\n+\t */\n+\tuint8_t reserved;\n+\n+\t/* One of ec_image */\n+\tuint32_t current_image;\n+} __ec_align1;\n+\n+/* Read USB-PD Accessory info */\n+#define EC_CMD_USB_PD_DEV_INFO 0x0112\n+\n+struct ec_params_usb_pd_info_request {\n+\tuint8_t port;\n+} __ec_align1;\n+\n+/* Read USB-PD Device discovery info */\n+#define EC_CMD_USB_PD_DISCOVERY 0x0113\n+struct ec_params_usb_pd_discovery_entry {\n+\tuint16_t vid; /* USB-IF VID */\n+\tuint16_t pid; /* USB-IF PID */\n+\tuint8_t ptype; /* product type (hub,periph,cable,ama) */\n+} __ec_align_size1;\n+\n+/* Override default charge behavior */\n+#define EC_CMD_PD_CHARGE_PORT_OVERRIDE 0x0114\n+\n+/* Negative port parameters have special meaning */\n+enum usb_pd_override_ports {\n+\t/*\n+\t * DONT_CHARGE is for all ports. Thus it's persistent across plug-in\n+\t * or plug-out.\n+\t */\n+\tOVERRIDE_DONT_CHARGE = -2,\n+\tOVERRIDE_OFF = -1,\n+\t/* [0, CONFIG_USB_PD_PORT_MAX_COUNT): Port# */\n+};\n+\n+struct ec_params_charge_port_override {\n+\tint16_t override_port; /* Override port# */\n+} __ec_align2;\n+\n+/*\n+ * Read (and delete) one entry of PD event log.\n+ * TODO(crbug.com/751742): Make this host command more generic to accommodate\n+ * future non-PD logs that use the same internal EC event_log.\n+ */\n+#define EC_CMD_PD_GET_LOG_ENTRY 0x0115\n+\n+struct ec_response_pd_log {\n+\tuint32_t timestamp; /* relative timestamp in milliseconds */\n+\tuint8_t type; /* event type : see PD_EVENT_xx below */\n+\tuint8_t size_port; /* [7:5] port number [4:0] payload size in bytes */\n+\tuint16_t data; /* type-defined data payload */\n+\t/* optional additional data payload: 0..16 bytes */\n+\tuint8_t payload[FLEXIBLE_ARRAY_MEMBER_SIZE];\n+} __ec_align4;\n+\n+/* The timestamp is the microsecond counter shifted to get about a ms. */\n+#define PD_LOG_TIMESTAMP_SHIFT 10 /* 1 LSB = 1024us */\n+\n+#define PD_LOG_SIZE_MASK 0x1f\n+#define PD_LOG_PORT_MASK 0xe0\n+#define PD_LOG_PORT_SHIFT 5\n+#define PD_LOG_PORT_SIZE(port, size) \\\n+\t(((port) << PD_LOG_PORT_SHIFT) | ((size) & PD_LOG_SIZE_MASK))\n+#define PD_LOG_PORT(size_port) ((size_port) >> PD_LOG_PORT_SHIFT)\n+#define PD_LOG_SIZE(size_port) ((size_port) & PD_LOG_SIZE_MASK)\n+\n+/* PD event log : entry types */\n+/* PD MCU events */\n+#define PD_EVENT_MCU_BASE 0x00\n+#define PD_EVENT_MCU_CHARGE (PD_EVENT_MCU_BASE + 0)\n+#define PD_EVENT_MCU_CONNECT (PD_EVENT_MCU_BASE + 1)\n+/* Reserved for custom board event */\n+#define PD_EVENT_MCU_BOARD_CUSTOM (PD_EVENT_MCU_BASE + 2)\n+/* PD generic accessory events */\n+#define PD_EVENT_ACC_BASE 0x20\n+#define PD_EVENT_ACC_RW_FAIL (PD_EVENT_ACC_BASE + 0)\n+#define PD_EVENT_ACC_RW_ERASE (PD_EVENT_ACC_BASE + 1)\n+/* PD power supply events */\n+#define PD_EVENT_PS_BASE 0x40\n+#define PD_EVENT_PS_FAULT (PD_EVENT_PS_BASE + 0)\n+/* PD video dongles events */\n+#define PD_EVENT_VIDEO_BASE 0x60\n+#define PD_EVENT_VIDEO_DP_MODE (PD_EVENT_VIDEO_BASE + 0)\n+#define PD_EVENT_VIDEO_CODEC (PD_EVENT_VIDEO_BASE + 1)\n+/* Returned in the \"type\" field, when there is no entry available */\n+#define PD_EVENT_NO_ENTRY 0xff\n+\n+/*\n+ * PD_EVENT_MCU_CHARGE event definition :\n+ * the payload is \"struct usb_chg_measures\"\n+ * the data field contains the port state flags as defined below :\n+ */\n+/* Port partner is a dual role device */\n+#define CHARGE_FLAGS_DUAL_ROLE BIT(15)\n+/* Port is the pending override port */\n+#define CHARGE_FLAGS_DELAYED_OVERRIDE BIT(14)\n+/* Port is the override port */\n+#define CHARGE_FLAGS_OVERRIDE BIT(13)\n+/* Charger type */\n+#define CHARGE_FLAGS_TYPE_SHIFT 3\n+#define CHARGE_FLAGS_TYPE_MASK (0xf << CHARGE_FLAGS_TYPE_SHIFT)\n+/* Power delivery role */\n+#define CHARGE_FLAGS_ROLE_MASK (7 << 0)\n+\n+/*\n+ * PD_EVENT_PS_FAULT data field flags definition :\n+ */\n+#define PS_FAULT_OCP 1\n+#define PS_FAULT_FAST_OCP 2\n+#define PS_FAULT_OVP 3\n+#define PS_FAULT_DISCH 4\n+\n+/*\n+ * PD_EVENT_VIDEO_CODEC payload is \"struct mcdp_info\".\n+ */\n+struct mcdp_version {\n+\tuint8_t major;\n+\tuint8_t minor;\n+\tuint16_t build;\n+} __ec_align4;\n+\n+struct mcdp_info {\n+\tuint8_t family[2];\n+\tuint8_t chipid[2];\n+\tstruct mcdp_version irom;\n+\tstruct mcdp_version fw;\n+} __ec_align4;\n+\n+/* struct mcdp_info field decoding */\n+#define MCDP_CHIPID(chipid) ((chipid[0] << 8) | chipid[1])\n+#define MCDP_FAMILY(family) ((family[0] << 8) | family[1])\n+\n+/* Get/Set USB-PD Alternate mode info */\n+#define EC_CMD_USB_PD_GET_AMODE 0x0116\n+struct ec_params_usb_pd_get_mode_request {\n+\tuint16_t svid_idx; /* SVID index to get */\n+\tuint8_t port; /* port */\n+} __ec_align_size1;\n+\n+#define VDO_MAX_SIZE 7\n+/* Max number of VDM data objects without VDM header */\n+#define VDO_MAX_OBJECTS (VDO_MAX_SIZE - 1)\n+\n+struct ec_params_usb_pd_get_mode_response {\n+\tuint16_t svid; /* SVID */\n+\tuint16_t opos; /* Object Position */\n+\tuint32_t vdo[VDO_MAX_OBJECTS]; /* Mode VDOs */\n+} __ec_align4;\n+\n+#define EC_CMD_USB_PD_SET_AMODE 0x0117\n+\n+enum pd_mode_cmd {\n+\tPD_EXIT_MODE = 0,\n+\tPD_ENTER_MODE = 1,\n+\t/* Not a command. Do NOT remove. */\n+\tPD_MODE_CMD_COUNT,\n+};\n+\n+struct ec_params_usb_pd_set_mode_request {\n+\tuint32_t cmd; /* enum pd_mode_cmd */\n+\tuint16_t svid; /* SVID to set */\n+\tuint8_t opos; /* Object Position */\n+\tuint8_t port; /* port */\n+} __ec_align4;\n+\n+/* Ask the PD MCU to record a log of a requested type */\n+#define EC_CMD_PD_WRITE_LOG_ENTRY 0x0118\n+\n+struct ec_params_pd_write_log_entry {\n+\tuint8_t type; /* event type : see PD_EVENT_xx above */\n+\tuint8_t port; /* port#, or 0 for events unrelated to a given port */\n+} __ec_align1;\n+\n+/* Control USB-PD chip */\n+#define EC_CMD_PD_CONTROL 0x0119\n+\n+enum ec_pd_control_cmd {\n+\tPD_SUSPEND = 0, /* Suspend the PD chip (EC: stop talking to PD) */\n+\tPD_RESUME, /* Resume the PD chip (EC: start talking to PD) */\n+\tPD_RESET, /* Force reset the PD chip */\n+\tPD_CONTROL_DISABLE, /* Disable further calls to this command */\n+\tPD_CHIP_ON, /* Power on the PD chip */\n+};\n+\n+struct ec_params_pd_control {\n+\tuint8_t chip; /* chip id */\n+\tuint8_t subcmd;\n+} __ec_align1;\n+\n+/* Get info about USB-C SS muxes */\n+#define EC_CMD_USB_PD_MUX_INFO 0x011A\n+\n+struct ec_params_usb_pd_mux_info {\n+\tuint8_t port; /* USB-C port number */\n+} __ec_align1;\n+\n+/* Flags representing mux state */\n+#define USB_PD_MUX_NONE 0 /* Open switch */\n+#define USB_PD_MUX_USB_ENABLED BIT(0) /* USB connected */\n+#define USB_PD_MUX_DP_ENABLED BIT(1) /* DP connected */\n+#define USB_PD_MUX_POLARITY_INVERTED BIT(2) /* CC line Polarity inverted */\n+#define USB_PD_MUX_HPD_IRQ BIT(3) /* HPD IRQ is asserted */\n+#define USB_PD_MUX_HPD_IRQ_DEASSERTED 0 /* HPD IRQ is deasserted */\n+#define USB_PD_MUX_HPD_LVL BIT(4) /* HPD level is asserted */\n+#define USB_PD_MUX_HPD_LVL_DEASSERTED 0 /* HPD level is deasserted */\n+#define USB_PD_MUX_SAFE_MODE BIT(5) /* DP is in safe mode */\n+#define USB_PD_MUX_TBT_COMPAT_ENABLED BIT(6) /* TBT compat enabled */\n+#define USB_PD_MUX_USB4_ENABLED BIT(7) /* USB4 enabled */\n+\n+/* USB-C Dock connected */\n+#define USB_PD_MUX_DOCK (USB_PD_MUX_USB_ENABLED | USB_PD_MUX_DP_ENABLED)\n+\n+struct ec_response_usb_pd_mux_info {\n+\tuint8_t flags; /* USB_PD_MUX_*-encoded USB mux state */\n+} __ec_align1;\n+\n+#define EC_CMD_PD_CHIP_INFO 0x011B\n+\n+struct ec_params_pd_chip_info {\n+\tuint8_t port; /* USB-C port number */\n+\t/*\n+\t * Fetch the live chip info or hard-coded + cached chip info\n+\t * 0: hardcoded value for VID/PID, cached value for FW version\n+\t * 1: live chip value for VID/PID/FW Version\n+\t */\n+\tuint8_t live;\n+} __ec_align1;\n+\n+struct ec_response_pd_chip_info {\n+\tuint16_t vendor_id;\n+\tuint16_t product_id;\n+\tuint16_t device_id;\n+\tunion {\n+\t\tuint8_t fw_version_string[8];\n+\t\tuint64_t fw_version_number;\n+\t} __ec_align2;\n+} __ec_align2;\n+\n+struct ec_response_pd_chip_info_v1 {\n+\tuint16_t vendor_id;\n+\tuint16_t product_id;\n+\tuint16_t device_id;\n+\tunion {\n+\t\tuint8_t fw_version_string[8];\n+\t\tuint64_t fw_version_number;\n+\t} __ec_align2;\n+\tunion {\n+\t\tuint8_t min_req_fw_version_string[8];\n+\t\tuint64_t min_req_fw_version_number;\n+\t} __ec_align2;\n+} __ec_align2;\n+\n+/** Indicates the chip should NOT receive a firmware update, if set. This is\n+ * useful when multiple ports are serviced by a single chip, to avoid\n+ * performing redundant updates. The host command implementation shall ensure\n+ * only one port out of each physical chip has FW updates active.\n+ */\n+#define USB_PD_CHIP_INFO_FWUP_FLAG_NO_UPDATE BIT(0)\n+\n+/** Maximum length of a project name embedded in a PDC FW image. This length\n+ * does NOT include a NUL-terminator.\n+ */\n+#define USB_PD_CHIP_INFO_PROJECT_NAME_LEN 12\n+\n+struct ec_response_pd_chip_info_v2 {\n+\tuint16_t vendor_id;\n+\tuint16_t product_id;\n+\tuint16_t device_id;\n+\tunion {\n+\t\tuint8_t fw_version_string[8];\n+\t\tuint64_t fw_version_number;\n+\t} __ec_align2;\n+\tunion {\n+\t\tuint8_t min_req_fw_version_string[8];\n+\t\tuint64_t min_req_fw_version_number;\n+\t} __ec_align2;\n+\t/** Flag to control the FW update process for this chip. */\n+\tuint16_t fw_update_flags;\n+\t/** Project name string associated with the chip's FW. Add an extra\n+\t * byte for a NUL-terminator.\n+\t */\n+\tchar fw_name_str[USB_PD_CHIP_INFO_PROJECT_NAME_LEN + 1];\n+} __ec_align2;\n+\n+/** Maximum length of a driver/chip name reported in the pd_chip_info\n+ * response\n+ */\n+#define USB_PD_CHIP_INFO_DRIVER_NAME_LEN 24\n+\n+struct ec_response_pd_chip_info_v3 {\n+\tuint16_t vendor_id;\n+\tuint16_t product_id;\n+\tuint16_t device_id;\n+\tunion {\n+\t\tuint8_t fw_version_string[8];\n+\t\tuint64_t fw_version_number;\n+\t} __ec_align2;\n+\tunion {\n+\t\tuint8_t min_req_fw_version_string[8];\n+\t\tuint64_t min_req_fw_version_number;\n+\t} __ec_align2;\n+\t/** Flag to control the FW update process for this chip. */\n+\tuint16_t fw_update_flags;\n+\t/** Project name string associated with the chip's FW. Add an extra\n+\t * byte for a NUL-terminator.\n+\t */\n+\tchar fw_name_str[USB_PD_CHIP_INFO_PROJECT_NAME_LEN + 1];\n+\t/** Driver/chip string, plus room for a NUL-terminator */\n+\tchar driver_name[USB_PD_CHIP_INFO_DRIVER_NAME_LEN + 1];\n+} __ec_align2;\n+\n+/* Run RW signature verification and get status */\n+#define EC_CMD_RWSIG_CHECK_STATUS 0x011C\n+\n+struct ec_response_rwsig_check_status {\n+\tuint32_t status;\n+} __ec_align4;\n+\n+/* For controlling RWSIG task */\n+#define EC_CMD_RWSIG_ACTION 0x011D\n+\n+enum rwsig_action {\n+\tRWSIG_ACTION_ABORT = 0, /* Abort RWSIG and prevent jumping */\n+\tRWSIG_ACTION_CONTINUE = 1, /* Jump to RW immediately */\n+};\n+\n+struct ec_params_rwsig_action {\n+\tuint32_t action;\n+} __ec_align4;\n+\n+/* Run verification on a slot */\n+#define EC_CMD_EFS_VERIFY 0x011E\n+\n+struct ec_params_efs_verify {\n+\tuint8_t region; /* enum ec_flash_region */\n+} __ec_align1;\n+\n+/*\n+ * Retrieve info from Cros Board Info store. Response is based on the data\n+ * type. Integers return a uint32. Strings return a string, using the response\n+ * size to determine how big it is.\n+ */\n+#define EC_CMD_GET_CROS_BOARD_INFO 0x011F\n+/*\n+ * Write info into Cros Board Info on EEPROM. Write fails if the board has\n+ * hardware write-protect enabled.\n+ */\n+#define EC_CMD_SET_CROS_BOARD_INFO 0x0120\n+\n+enum cbi_data_tag {\n+\tCBI_TAG_BOARD_VERSION = 0, /* uint32_t or smaller */\n+\tCBI_TAG_OEM_ID = 1, /* uint32_t or smaller */\n+\tCBI_TAG_SKU_ID = 2, /* uint32_t or smaller */\n+\tCBI_TAG_DRAM_PART_NUM = 3, /* variable length ascii, nul terminated. */\n+\tCBI_TAG_OEM_NAME = 4, /* variable length ascii, nul terminated. */\n+\tCBI_TAG_MODEL_ID = 5, /* uint32_t or smaller */\n+\tCBI_TAG_FW_CONFIG = 6, /* uint32_t bit field */\n+\tCBI_TAG_PCB_SUPPLIER = 7, /* uint32_t or smaller */\n+\t/* Second Source Factory Cache */\n+\tCBI_TAG_SSFC = 8, /* uint32_t bit field */\n+\tCBI_TAG_REWORK_ID = 9, /* uint64_t or smaller */\n+\tCBI_TAG_FACTORY_CALIBRATION_DATA = 10, /* Deprecated */\n+\tCBI_TAG_COMMON_CONTROL = 11, /* Deprecated */\n+\t/* struct board_batt_params */\n+\tCBI_TAG_BATTERY_CONFIG = 12,\n+\t/* CBI_TAG_BATTERY_CONFIG_1 ~ 15 will use 13 ~ 27. */\n+\tCBI_TAG_BATTERY_CONFIG_15 = 27,\n+\n+\t/* CBI_TAG_PROVISION_MATRIX_VERSION\n+\t * Version of the current provision matrix\n+\t */\n+\tCBI_TAG_PROVISION_MATRIX_VERSION = 28, /* uint32_t bit field */\n+\n+\t/* Unified Firmware and Second-source Config:\n+\t * A fixed-size array of 4 uint32_t values.\n+\t */\n+\tCBI_TAG_UFSC = 29,\n+\n+\t/* Last entry */\n+\tCBI_TAG_COUNT,\n+};\n+\n+#define CBI_UFSC_DATA_COUNT 4\n+\n+/* Unified Firmware and Second-source Config (UFSC) data structure */\n+struct cbi_ufsc {\n+\tuint32_t data[CBI_UFSC_DATA_COUNT];\n+};\n+\n+/*\n+ * Flags to control read operation\n+ *\n+ * RELOAD: Invalidate cache and read data from EEPROM. Useful to verify\n+ * write was successful without reboot.\n+ */\n+#define CBI_GET_RELOAD BIT(0)\n+\n+struct ec_params_get_cbi {\n+\tuint32_t tag; /* enum cbi_data_tag */\n+\tuint32_t flag; /* CBI_GET_* */\n+} __ec_align4;\n+\n+/*\n+ * Flags to control write behavior.\n+ *\n+ * NO_SYNC: Makes EC update data in RAM but skip writing to EEPROM. It's\n+ * useful when writing multiple fields in a row.\n+ * INIT: Need to be set when creating a new CBI from scratch. All fields\n+ * will be initialized to zero first.\n+ */\n+#define CBI_SET_NO_SYNC BIT(0)\n+#define CBI_SET_INIT BIT(1)\n+\n+struct ec_params_set_cbi {\n+\tuint32_t tag; /* enum cbi_data_tag */\n+\tuint32_t flag; /* CBI_SET_* */\n+\tuint32_t size; /* Data size */\n+\tuint8_t data[FLEXIBLE_ARRAY_MEMBER_SIZE]; /* For string and raw data */\n+} __ec_align1;\n+\n+/*\n+ * Retrieve binary from CrOS Board Info primary memory source.\n+ */\n+#define EC_CMD_CBI_BIN_READ 0x0504\n+/*\n+ * Write binary into CrOS Board Info temporary buffer and then commit it to\n+ * permanent storage once complete. Write fails if the board has hardware\n+ * write-protect enabled.\n+ */\n+#define EC_CMD_CBI_BIN_WRITE 0x0505\n+\n+/*\n+ * CBI binary read/write flags\n+ * The default write behavior is to always append any data to the buffer.\n+ * If 'CLEAR' flag is set, buffer is cleared then data is appended.\n+ * If 'WRITE' flag is set, data is appended then buffer is written to memory.\n+ */\n+#define EC_CBI_BIN_BUFFER_CLEAR BIT(0)\n+#define EC_CBI_BIN_BUFFER_WRITE BIT(1)\n+\n+struct ec_params_get_cbi_bin {\n+\tuint32_t offset; /* Data offset */\n+\tuint32_t size; /* Data size */\n+} __ec_align4;\n+\n+struct ec_params_set_cbi_bin {\n+\tuint32_t offset; /* Data offset */\n+\tuint32_t size; /* Data size */\n+\tuint8_t flags; /* bit field for EC_CBI_BIN_COMMIT_FLAG_* */\n+\tuint8_t data[FLEXIBLE_ARRAY_MEMBER_SIZE]; /* For string and raw data */\n+} __ec_align1;\n+\n+/*\n+ * Information about resets of the AP by the EC and the EC's own uptime.\n+ */\n+#define EC_CMD_GET_UPTIME_INFO 0x0121\n+\n+/* EC reset causes */\n+#define EC_RESET_FLAG_OTHER BIT(0) /* Other known reason */\n+#define EC_RESET_FLAG_RESET_PIN BIT(1) /* Reset pin asserted */\n+#define EC_RESET_FLAG_BROWNOUT BIT(2) /* Brownout */\n+#define EC_RESET_FLAG_POWER_ON BIT(3) /* Power-on reset */\n+#define EC_RESET_FLAG_WATCHDOG BIT(4) /* Watchdog timer reset */\n+#define EC_RESET_FLAG_SOFT BIT(5) /* Soft reset trigger by core */\n+#define EC_RESET_FLAG_HIBERNATE BIT(6) /* Wake from hibernate */\n+#define EC_RESET_FLAG_RTC_ALARM BIT(7) /* RTC alarm wake */\n+#define EC_RESET_FLAG_WAKE_PIN BIT(8) /* Wake pin triggered wake */\n+#define EC_RESET_FLAG_LOW_BATTERY BIT(9) /* Low battery triggered wake */\n+#define EC_RESET_FLAG_SYSJUMP BIT(10) /* Jumped directly to this image */\n+#define EC_RESET_FLAG_HARD BIT(11) /* Hard reset from software */\n+#define EC_RESET_FLAG_AP_OFF BIT(12) /* Do not power on AP */\n+/* Some reset flags preserved from previous boot */\n+#define EC_RESET_FLAG_PRESERVED BIT(13)\n+#define EC_RESET_FLAG_USB_RESUME BIT(14) /* USB resume triggered wake */\n+#define EC_RESET_FLAG_RDD BIT(15) /* USB Type-C debug cable */\n+#define EC_RESET_FLAG_RBOX BIT(16) /* Fixed Reset Functionality */\n+#define EC_RESET_FLAG_SECURITY BIT(17) /* Security threat */\n+/* AP experienced a watchdog reset */\n+#define EC_RESET_FLAG_AP_WATCHDOG BIT(18)\n+/* Do not select RW in EFS. This enables PD in RO for Chromebox. */\n+#define EC_RESET_FLAG_STAY_IN_RO BIT(19)\n+#define EC_RESET_FLAG_EFS BIT(20) /* Jumped to this image by EFS */\n+#define EC_RESET_FLAG_AP_IDLE BIT(21) /* Leave alone AP */\n+#define EC_RESET_FLAG_INITIAL_PWR BIT(22) /* EC had power, then was reset */\n+\n+/*\n+ * Reason codes used by the AP after a shutdown to figure out why it was reset\n+ * by the EC. These are sent in EC commands. Therefore, to maintain protocol\n+ * compatibility:\n+ * - New entries must be inserted prior to the _COUNT field\n+ * - If an existing entry is no longer in service, it must be replaced with a\n+ * RESERVED entry instead.\n+ * - The semantic meaning of an entry should not change.\n+ * - Do not exceed 2^15 - 1 for reset reasons or 2^16 - 1 for shutdown reasons.\n+ */\n+enum chipset_shutdown_reason {\n+\t/*\n+\t * Beginning of reset reasons.\n+\t */\n+\tCHIPSET_RESET_BEGIN = 0,\n+\tCHIPSET_RESET_UNKNOWN = CHIPSET_RESET_BEGIN,\n+\t/* Custom reason defined by a board.c or baseboard.c file */\n+\tCHIPSET_RESET_BOARD_CUSTOM,\n+\t/* Believe that the AP has hung */\n+\tCHIPSET_RESET_HANG_REBOOT,\n+\t/* Reset by EC console command */\n+\tCHIPSET_RESET_CONSOLE_CMD,\n+\t/* Reset by EC host command */\n+\tCHIPSET_RESET_HOST_CMD,\n+\t/* Keyboard module reset key combination */\n+\tCHIPSET_RESET_KB_SYSRESET,\n+\t/* Keyboard module warm reboot */\n+\tCHIPSET_RESET_KB_WARM_REBOOT,\n+\t/* Debug module warm reboot */\n+\tCHIPSET_RESET_DBG_WARM_REBOOT,\n+\t/* I cannot self-terminate. You must lower me into the steel. */\n+\tCHIPSET_RESET_AP_REQ,\n+\t/* Reset as side-effect of startup sequence */\n+\tCHIPSET_RESET_INIT,\n+\t/* EC detected an AP watchdog event. */\n+\tCHIPSET_RESET_AP_WATCHDOG,\n+\n+\tCHIPSET_RESET_COUNT, /* End of reset reasons. */\n+\n+\t/*\n+\t * Beginning of shutdown reasons.\n+\t */\n+\tCHIPSET_SHUTDOWN_BEGIN = BIT(15),\n+\tCHIPSET_SHUTDOWN_POWERFAIL = CHIPSET_SHUTDOWN_BEGIN,\n+\t/* Forcing a shutdown as part of EC initialization */\n+\tCHIPSET_SHUTDOWN_INIT,\n+\t/* Custom reason on a per-board basis. */\n+\tCHIPSET_SHUTDOWN_BOARD_CUSTOM,\n+\t/* This is a reason to inhibit startup, not cause shut down. */\n+\tCHIPSET_SHUTDOWN_BATTERY_INHIBIT,\n+\t/* A power_wait_signal is being asserted */\n+\tCHIPSET_SHUTDOWN_WAIT,\n+\t/* Critical battery level. */\n+\tCHIPSET_SHUTDOWN_BATTERY_CRIT,\n+\t/* Because you told me to. */\n+\tCHIPSET_SHUTDOWN_CONSOLE_CMD,\n+\t/* Forcing a shutdown to effect entry to G3. */\n+\tCHIPSET_SHUTDOWN_G3,\n+\t/* Force shutdown due to over-temperature. */\n+\tCHIPSET_SHUTDOWN_THERMAL,\n+\t/* Force a chipset shutdown from the power button through EC */\n+\tCHIPSET_SHUTDOWN_BUTTON,\n+\t/* Force a chipset shutdown, because the AP wants to. */\n+\tCHIPSET_SHUTDOWN_HOST_CMD,\n+\n+\tCHIPSET_SHUTDOWN_COUNT, /* End of shutdown reasons. */\n+};\n+\n+struct ec_response_uptime_info {\n+\t/*\n+\t * Number of milliseconds since the last EC boot. Sysjump resets\n+\t * typically do not restart the EC's time_since_boot epoch.\n+\t *\n+\t * WARNING: The EC's sense of time is much less accurate than the AP's\n+\t * sense of time, in both phase and frequency. This timebase is similar\n+\t * to CLOCK_MONOTONIC_RAW, but with 1% or more frequency error.\n+\t */\n+\tuint32_t time_since_ec_boot_ms;\n+\n+\t/*\n+\t * Number of times the AP was reset by the EC since the last EC boot.\n+\t * Note that the AP may be held in reset by the EC during the initial\n+\t * boot sequence, such that the very first AP boot may count as more\n+\t * than one here.\n+\t */\n+\tuint32_t ap_resets_since_ec_boot;\n+\n+\t/*\n+\t * The set of flags which describe the EC's most recent reset.\n+\t * See EC_RESET_FLAG_* for details.\n+\t */\n+\tuint32_t ec_reset_flags;\n+\n+\t/* Empty log entries have both the cause and timestamp set to zero. */\n+\tstruct ap_reset_log_entry {\n+\t\t/* See enum chipset_{reset,shutdown}_reason for details. */\n+\t\tuint16_t reset_cause;\n+\n+\t\t/* Reserved for protocol growth. */\n+\t\tuint16_t reserved;\n+\n+\t\t/*\n+\t\t * The time of the reset's assertion, in milliseconds since the\n+\t\t * last EC boot, in the same epoch as time_since_ec_boot_ms.\n+\t\t * Set to zero if the log entry is empty.\n+\t\t */\n+\t\tuint32_t reset_time_ms;\n+\t} recent_ap_reset[4];\n+} __ec_align4;\n+\n+/*\n+ * Add entropy to the device secret (stored in the rollback region).\n+ *\n+ * Depending on the chip, the operation may take a long time (e.g. to erase\n+ * flash), so the commands are asynchronous.\n+ */\n+#define EC_CMD_ADD_ENTROPY 0x0122\n+\n+enum add_entropy_action {\n+\t/* Add entropy to the current secret. */\n+\tADD_ENTROPY_ASYNC = 0,\n+\t/*\n+\t * Add entropy, and also make sure that the previous secret is erased.\n+\t * (this can be implemented by adding entropy multiple times until\n+\t * all rolback blocks have been overwritten).\n+\t */\n+\tADD_ENTROPY_RESET_ASYNC = 1,\n+\t/* Read back result from the previous operation. */\n+\tADD_ENTROPY_GET_RESULT = 2,\n+};\n+\n+struct ec_params_rollback_add_entropy {\n+\tuint8_t action;\n+} __ec_align1;\n+\n+/*\n+ * Perform a single read of a given ADC channel.\n+ */\n+#define EC_CMD_ADC_READ 0x0123\n+\n+struct ec_params_adc_read {\n+\tuint8_t adc_channel;\n+} __ec_align1;\n+\n+struct ec_response_adc_read {\n+\tint32_t adc_value;\n+} __ec_align4;\n+\n+/*\n+ * Read back rollback info\n+ */\n+#define EC_CMD_ROLLBACK_INFO 0x0124\n+\n+struct ec_response_rollback_info {\n+\tint32_t id; /* Incrementing number to indicate which region to use. */\n+\tint32_t rollback_min_version;\n+\tint32_t rw_rollback_version;\n+} __ec_align4;\n+\n+struct ec_response_rollback_info_v1 {\n+\tint32_t id; /* Incrementing number to indicate which region to use. */\n+\tint32_t rollback_min_version;\n+\tint32_t rw_rollback_version;\n+\tuint8_t is_secret_inited;\n+\tuint8_t reserved[3];\n+} __ec_align4;\n+\n+/* Issue AP reset */\n+#define EC_CMD_AP_RESET 0x0125\n+\n+/*****************************************************************************/\n+/* Locate peripheral chips\n+ *\n+ * Return values:\n+ * EC_RES_UNAVAILABLE: The chip type is supported but not found on system.\n+ * EC_RES_INVALID_PARAM: The chip type was unrecognized.\n+ * EC_RES_OVERFLOW: The index number exceeded the number of chip instances.\n+ */\n+#define EC_CMD_LOCATE_CHIP 0x0126\n+\n+enum ec_chip_type {\n+\tEC_CHIP_TYPE_CBI_EEPROM = 0,\n+\tEC_CHIP_TYPE_TCPC = 1,\n+\tEC_CHIP_TYPE_PDC = 2,\n+\tEC_CHIP_TYPE_COUNT,\n+\tEC_CHIP_TYPE_MAX = 0xFF,\n+};\n+\n+enum ec_bus_type {\n+\tEC_BUS_TYPE_I2C = 0,\n+\tEC_BUS_TYPE_EMBEDDED = 1,\n+\tEC_BUS_TYPE_COUNT,\n+\tEC_BUS_TYPE_MAX = 0xFF,\n+};\n+\n+struct ec_i2c_info {\n+\tuint16_t port; /* Physical port for device */\n+\tuint16_t addr_flags; /* 7-bit (or 10-bit) address */\n+};\n+\n+struct ec_params_locate_chip {\n+\tuint8_t type; /* enum ec_chip_type */\n+\tuint8_t index; /* Specifies one instance of chip type */\n+\t/* Used for type specific parameters in future */\n+\tunion {\n+\t\tuint16_t reserved;\n+\t};\n+} __ec_align2;\n+\n+struct ec_response_locate_chip {\n+\tuint8_t bus_type; /* enum ec_bus_type */\n+\tuint8_t reserved; /* Aligning the following union to 2 bytes */\n+\tunion {\n+\t\tstruct ec_i2c_info i2c_info;\n+\t};\n+} __ec_align2;\n+\n+/*\n+ * Reboot AP on G3\n+ *\n+ * This command is used for validation purpose, where the AP needs to be\n+ * returned back to S0 state from G3 state without using the servo to trigger\n+ * wake events.\n+ * - With command version 0:\n+ * AP reboots immediately from G3\n+ * command usage: ectool reboot_ap_on_g3 && shutdown -h now\n+ * - With command version 1:\n+ * AP reboots after the user specified delay\n+ * command usage: ectool reboot_ap_on_g3 [<delay>] && shutdown -h now\n+ */\n+#define EC_CMD_REBOOT_AP_ON_G3 0x0127\n+\n+struct ec_params_reboot_ap_on_g3_v1 {\n+\t/* configurable delay in seconds in G3 state */\n+\tuint32_t reboot_ap_at_g3_delay;\n+} __ec_align4;\n+\n+/*****************************************************************************/\n+/* Get PD port capabilities\n+ *\n+ * Returns the following static *capabilities* of the given port:\n+ * 1) Power role: source, sink, or dual. It is not anticipated that\n+ * future CrOS devices would ever be only a source, so the options are\n+ * sink or dual.\n+ * 2) Try-power role: source, sink, or none (practically speaking, I don't\n+ * believe any CrOS device would support Try.SNK, so this would be source\n+ * or none).\n+ * 3) Data role: dfp, ufp, or dual. This will probably only be DFP or dual\n+ * for CrOS devices.\n+ */\n+#define EC_CMD_GET_PD_PORT_CAPS 0x0128\n+\n+enum ec_pd_power_role_caps {\n+\tEC_PD_POWER_ROLE_SOURCE = 0,\n+\tEC_PD_POWER_ROLE_SINK = 1,\n+\tEC_PD_POWER_ROLE_DUAL = 2,\n+};\n+\n+enum ec_pd_try_power_role_caps {\n+\tEC_PD_TRY_POWER_ROLE_NONE = 0,\n+\tEC_PD_TRY_POWER_ROLE_SINK = 1,\n+\tEC_PD_TRY_POWER_ROLE_SOURCE = 2,\n+};\n+\n+enum ec_pd_data_role_caps {\n+\tEC_PD_DATA_ROLE_DFP = 0,\n+\tEC_PD_DATA_ROLE_UFP = 1,\n+\tEC_PD_DATA_ROLE_DUAL = 2,\n+};\n+\n+/* From: power_manager/power_supply_properties.proto */\n+enum ec_pd_port_location {\n+\t/* The location of the port is unknown, or there's only one port. */\n+\tEC_PD_PORT_LOCATION_UNKNOWN = 0,\n+\n+\t/*\n+\t * Various positions on the device. The first word describes the side of\n+\t * the device where the port is located while the second clarifies the\n+\t * position. For example, LEFT_BACK means the farthest-back port on the\n+\t * left side, while BACK_LEFT means the leftmost port on the back of the\n+\t * device.\n+\t */\n+\tEC_PD_PORT_LOCATION_LEFT = 1,\n+\tEC_PD_PORT_LOCATION_RIGHT = 2,\n+\tEC_PD_PORT_LOCATION_BACK = 3,\n+\tEC_PD_PORT_LOCATION_FRONT = 4,\n+\tEC_PD_PORT_LOCATION_LEFT_FRONT = 5,\n+\tEC_PD_PORT_LOCATION_LEFT_BACK = 6,\n+\tEC_PD_PORT_LOCATION_RIGHT_FRONT = 7,\n+\tEC_PD_PORT_LOCATION_RIGHT_BACK = 8,\n+\tEC_PD_PORT_LOCATION_BACK_LEFT = 9,\n+\tEC_PD_PORT_LOCATION_BACK_RIGHT = 10,\n+};\n+\n+struct ec_params_get_pd_port_caps {\n+\tuint8_t port; /* Which port to interrogate */\n+} __ec_align1;\n+\n+struct ec_response_get_pd_port_caps {\n+\tuint8_t pd_power_role_cap; /* enum ec_pd_power_role_caps */\n+\tuint8_t pd_try_power_role_cap; /* enum ec_pd_try_power_role_caps */\n+\tuint8_t pd_data_role_cap; /* enum ec_pd_data_role_caps */\n+\tuint8_t pd_port_location; /* enum ec_pd_port_location */\n+} __ec_align1;\n+\n+/*****************************************************************************/\n+/*\n+ * Button press simulation\n+ *\n+ * This command is used to simulate a button press.\n+ * Supported commands are vup(volume up) vdown(volume down) & rec(recovery)\n+ * Time duration for which button needs to be pressed is an optional parameter.\n+ *\n+ * NOTE: This is only available on unlocked devices for testing purposes only.\n+ */\n+#define EC_CMD_BUTTON 0x0129\n+\n+struct ec_params_button {\n+\t/* Button mask aligned to enum keyboard_button_type */\n+\tuint32_t btn_mask;\n+\n+\t/* Duration in milliseconds button needs to be pressed */\n+\tuint32_t press_ms;\n+} __ec_align1;\n+\n+enum keyboard_button_type {\n+\tKEYBOARD_BUTTON_POWER = 0,\n+\tKEYBOARD_BUTTON_VOLUME_DOWN = 1,\n+\tKEYBOARD_BUTTON_VOLUME_UP = 2,\n+\tKEYBOARD_BUTTON_RECOVERY = 3,\n+\tKEYBOARD_BUTTON_CAPSENSE_1 = 4,\n+\tKEYBOARD_BUTTON_CAPSENSE_2 = 5,\n+\tKEYBOARD_BUTTON_CAPSENSE_3 = 6,\n+\tKEYBOARD_BUTTON_CAPSENSE_4 = 7,\n+\tKEYBOARD_BUTTON_CAPSENSE_5 = 8,\n+\tKEYBOARD_BUTTON_CAPSENSE_6 = 9,\n+\tKEYBOARD_BUTTON_CAPSENSE_7 = 10,\n+\tKEYBOARD_BUTTON_CAPSENSE_8 = 11,\n+\n+\tKEYBOARD_BUTTON_COUNT,\n+};\n+\n+/*****************************************************************************/\n+/*\n+ * \"Get the Keyboard Config\". An EC implementing this command is expected to be\n+ * vivaldi capable, i.e. can send action codes for the top row keys.\n+ * Additionally, capability to send function codes for the same keys is\n+ * optional and acceptable.\n+ *\n+ * Note: If the top row can generate both function and action codes by\n+ * using a dedicated Fn key, it does not matter whether the key sends\n+ * \"function\" or \"action\" codes by default. In both cases, the response\n+ * for this command will look the same.\n+ */\n+#define EC_CMD_GET_KEYBD_CONFIG 0x012A\n+\n+/* Possible values for the top row keys */\n+enum action_key {\n+\tTK_ABSENT = 0,\n+\tTK_BACK = 1,\n+\tTK_FORWARD = 2,\n+\tTK_REFRESH = 3,\n+\tTK_FULLSCREEN = 4,\n+\tTK_OVERVIEW = 5,\n+\tTK_BRIGHTNESS_DOWN = 6,\n+\tTK_BRIGHTNESS_UP = 7,\n+\tTK_VOL_MUTE = 8,\n+\tTK_VOL_DOWN = 9,\n+\tTK_VOL_UP = 10,\n+\tTK_SNAPSHOT = 11,\n+\tTK_PRIVACY_SCRN_TOGGLE = 12,\n+\tTK_KBD_BKLIGHT_DOWN = 13,\n+\tTK_KBD_BKLIGHT_UP = 14,\n+\tTK_PLAY_PAUSE = 15,\n+\tTK_NEXT_TRACK = 16,\n+\tTK_PREV_TRACK = 17,\n+\tTK_KBD_BKLIGHT_TOGGLE = 18,\n+\tTK_MICMUTE = 19,\n+\tTK_MENU = 20,\n+\tTK_DICTATE = 21,\n+\tTK_ACCESSIBILITY = 22,\n+\tTK_DONOTDISTURB = 23,\n+\tTK_HOME = 24,\n+\n+\tTK_COUNT\n+};\n+\n+/*\n+ * Max & Min number of top row keys, excluding Esc and Screenlock keys.\n+ * If this needs to change, please create a new version of the command.\n+ */\n+#define MAX_TOP_ROW_KEYS 15\n+#define MIN_TOP_ROW_KEYS 10\n+\n+/*\n+ * Is the keyboard capable of sending function keys *in addition to*\n+ * action keys. This is possible for e.g. if the keyboard has a\n+ * dedicated Fn key.\n+ */\n+#define KEYBD_CAP_FUNCTION_KEYS BIT(0)\n+/*\n+ * Whether the keyboard has a dedicated numeric keyboard.\n+ */\n+#define KEYBD_CAP_NUMERIC_KEYPAD BIT(1)\n+/*\n+ * Whether the keyboard has a screenlock key.\n+ */\n+#define KEYBD_CAP_SCRNLOCK_KEY BIT(2)\n+\n+/*\n+ * Whether the keyboard has an assistant key.\n+ */\n+#define KEYBD_CAP_ASSISTANT_KEY BIT(3)\n+\n+struct ec_response_keybd_config {\n+\t/*\n+\t * Number of top row keys, excluding Esc and Screenlock.\n+\t * If this is 0, all Vivaldi keyboard code is disabled.\n+\t * (i.e. does not expose any tables to the kernel).\n+\t */\n+\tuint8_t num_top_row_keys;\n+\n+\t/*\n+\t * The action keys in the top row, in order from left to right.\n+\t * The values are filled from enum action_key. Esc and Screenlock\n+\t * keys are not considered part of top row keys.\n+\t */\n+\tuint8_t action_keys[MAX_TOP_ROW_KEYS];\n+\n+\t/* Capability flags */\n+\tuint8_t capabilities;\n+\n+} __ec_align1;\n+\n+/*\n+ * Configure smart discharge\n+ */\n+#define EC_CMD_SMART_DISCHARGE 0x012B\n+\n+#define EC_SMART_DISCHARGE_FLAGS_SET BIT(0)\n+\n+/* Discharge rates when the system is in cutoff or hibernation. */\n+struct discharge_rate {\n+\tuint16_t cutoff; /* Discharge rate (uA) in cutoff */\n+\tuint16_t hibern; /* Discharge rate (uA) in hibernation */\n+};\n+\n+struct smart_discharge_zone {\n+\t/* When the capacity (mAh) goes below this, EC cuts off the battery. */\n+\tint cutoff;\n+\t/* When the capacity (mAh) is below this, EC stays up. */\n+\tint stayup;\n+};\n+\n+struct ec_params_smart_discharge {\n+\tuint8_t flags; /* EC_SMART_DISCHARGE_FLAGS_* */\n+\t/*\n+\t * Desired hours for the battery to survive before reaching 0%. Set to\n+\t * zero to disable smart discharging. That is, the system hibernates as\n+\t * soon as the G3 idle timer expires.\n+\t */\n+\tuint16_t hours_to_zero;\n+\t/* Set both to zero to keep the current rates. */\n+\tstruct discharge_rate drate;\n+};\n+\n+struct ec_response_smart_discharge {\n+\tuint16_t hours_to_zero;\n+\tstruct discharge_rate drate;\n+\tstruct smart_discharge_zone dzone;\n+};\n+\n+/*****************************************************************************/\n+/* Voltage regulator controls */\n+\n+/*\n+ * Get basic info of voltage regulator for given index.\n+ *\n+ * Returns the regulator name and supported voltage list in mV.\n+ */\n+#define EC_CMD_REGULATOR_GET_INFO 0x012C\n+\n+/* Maximum length of regulator name */\n+#define EC_REGULATOR_NAME_MAX_LEN 16\n+\n+/* Maximum length of the supported voltage list. */\n+#define EC_REGULATOR_VOLTAGE_MAX_COUNT 16\n+\n+struct ec_params_regulator_get_info {\n+\tuint32_t index;\n+} __ec_align4;\n+\n+struct ec_response_regulator_get_info {\n+\tchar name[EC_REGULATOR_NAME_MAX_LEN];\n+\tuint16_t num_voltages;\n+\tuint16_t voltages_mv[EC_REGULATOR_VOLTAGE_MAX_COUNT];\n+} __ec_align2;\n+\n+/*\n+ * Configure the regulator as enabled / disabled.\n+ */\n+#define EC_CMD_REGULATOR_ENABLE 0x012D\n+\n+struct ec_params_regulator_enable {\n+\tuint32_t index;\n+\tuint8_t enable;\n+} __ec_align4;\n+\n+/*\n+ * Query if the regulator is enabled.\n+ *\n+ * Returns 1 if the regulator is enabled, 0 if not.\n+ */\n+#define EC_CMD_REGULATOR_IS_ENABLED 0x012E\n+\n+struct ec_params_regulator_is_enabled {\n+\tuint32_t index;\n+} __ec_align4;\n+\n+struct ec_response_regulator_is_enabled {\n+\tuint8_t enabled;\n+} __ec_align1;\n+\n+/*\n+ * Set voltage for the voltage regulator within the range specified.\n+ *\n+ * The driver should select the voltage in range closest to min_mv.\n+ *\n+ * Also note that this might be called before the regulator is enabled, and the\n+ * setting should be in effect after the regulator is enabled.\n+ */\n+#define EC_CMD_REGULATOR_SET_VOLTAGE 0x012F\n+\n+struct ec_params_regulator_set_voltage {\n+\tuint32_t index;\n+\tuint32_t min_mv;\n+\tuint32_t max_mv;\n+} __ec_align4;\n+\n+/*\n+ * Get the currently configured voltage for the voltage regulator.\n+ *\n+ * Note that this might be called before the regulator is enabled, and this\n+ * should return the configured output voltage if the regulator is enabled.\n+ */\n+#define EC_CMD_REGULATOR_GET_VOLTAGE 0x0130\n+\n+struct ec_params_regulator_get_voltage {\n+\tuint32_t index;\n+} __ec_align4;\n+\n+struct ec_response_regulator_get_voltage {\n+\tuint32_t voltage_mv;\n+} __ec_align4;\n+\n+/*\n+ * Gather all discovery information for the given port and partner type.\n+ *\n+ * Note that if discovery has not yet completed, only the currently completed\n+ * responses will be filled in. If the discovery data structures are changed\n+ * in the process of the command running, BUSY will be returned.\n+ *\n+ * VDO field sizes are set to the maximum possible number of VDOs a VDM may\n+ * contain, while the number of SVIDs here is selected to fit within the PROTO2\n+ * maximum parameter size.\n+ */\n+#define EC_CMD_TYPEC_DISCOVERY 0x0131\n+\n+enum typec_partner_type {\n+\tTYPEC_PARTNER_SOP = 0,\n+\tTYPEC_PARTNER_SOP_PRIME = 1,\n+\tTYPEC_PARTNER_SOP_PRIME_PRIME = 2,\n+};\n+\n+struct ec_params_typec_discovery {\n+\tuint8_t port;\n+\tuint8_t partner_type; /* enum typec_partner_type */\n+} __ec_align1;\n+\n+struct svid_mode_info {\n+\tuint16_t svid;\n+\tuint16_t mode_count; /* Number of modes partner sent */\n+\tuint32_t mode_vdo[VDO_MAX_OBJECTS];\n+};\n+\n+struct ec_response_typec_discovery {\n+\tuint8_t identity_count; /* Number of identity VDOs partner sent */\n+\tuint8_t svid_count; /* Number of SVIDs partner sent */\n+\tuint16_t reserved;\n+\tuint32_t discovery_vdo[VDO_MAX_OBJECTS];\n+\tstruct svid_mode_info svids[FLEXIBLE_ARRAY_MEMBER_SIZE];\n+} __ec_align1;\n+\n+/* USB Type-C commands for AP-controlled device policy. */\n+#define EC_CMD_TYPEC_CONTROL 0x0132\n+\n+enum typec_control_command {\n+\tTYPEC_CONTROL_COMMAND_EXIT_MODES,\n+\tTYPEC_CONTROL_COMMAND_CLEAR_EVENTS,\n+\tTYPEC_CONTROL_COMMAND_ENTER_MODE,\n+\tTYPEC_CONTROL_COMMAND_TBT_UFP_REPLY,\n+\tTYPEC_CONTROL_COMMAND_USB_MUX_SET,\n+\tTYPEC_CONTROL_COMMAND_BIST_SHARE_MODE,\n+\tTYPEC_CONTROL_COMMAND_SEND_VDM_REQ,\n+};\n+\n+/* Modes (USB or alternate) that a type-C port may enter. */\n+enum typec_mode {\n+\tTYPEC_MODE_DP,\n+\tTYPEC_MODE_TBT,\n+\tTYPEC_MODE_USB4,\n+};\n+\n+/* Replies the AP may specify to the TBT EnterMode command as a UFP */\n+enum typec_tbt_ufp_reply {\n+\tTYPEC_TBT_UFP_REPLY_NAK,\n+\tTYPEC_TBT_UFP_REPLY_ACK,\n+};\n+\n+#define TYPEC_USB_MUX_SET_ALL_CHIPS 0xFF\n+\n+struct typec_usb_mux_set {\n+\t/* Index of the mux to set in the chain */\n+\tuint8_t mux_index;\n+\n+\t/* USB_PD_MUX_*-encoded USB mux state to set */\n+\tuint8_t mux_flags;\n+} __ec_align1;\n+\n+struct typec_vdm_req {\n+\t/* VDM data, including VDM header */\n+\tuint32_t vdm_data[VDO_MAX_SIZE];\n+\t/* Number of 32-bit fields filled in */\n+\tuint8_t vdm_data_objects;\n+\t/* Partner to address - see enum typec_partner_type */\n+\tuint8_t partner_type;\n+} __ec_align1;\n+\n+struct ec_params_typec_control {\n+\tuint8_t port;\n+\tuint8_t command; /* enum typec_control_command */\n+\tuint16_t reserved;\n+\n+\t/*\n+\t * This section will be interpreted based on |command|. Define a\n+\t * placeholder structure to avoid having to increase the size and bump\n+\t * the command version when adding new sub-commands.\n+\t */\n+\tunion {\n+\t\t/* Used for CLEAR_EVENTS */\n+\t\tuint32_t clear_events_mask;\n+\t\t/* Used for ENTER_MODE - enum typec_mode */\n+\t\tuint8_t mode_to_enter;\n+\t\t/* Used for TBT_UFP_REPLY - enum typec_tbt_ufp_reply */\n+\t\tuint8_t tbt_ufp_reply;\n+\t\t/* Used for USB_MUX_SET */\n+\t\tstruct typec_usb_mux_set mux_params;\n+\t\t/* Used for BIST_SHARE_MODE */\n+\t\tuint8_t bist_share_mode;\n+\t\t/* Used for VMD_REQ */\n+\t\tstruct typec_vdm_req vdm_req_params;\n+\t\tuint8_t placeholder[128];\n+\t};\n+} __ec_align1;\n+\n+/*\n+ * Gather all status information for a port.\n+ *\n+ * Note: this covers many of the return fields from the deprecated\n+ * EC_CMD_USB_PD_CONTROL command, except those that are redundant with the\n+ * discovery data. The \"enum pd_cc_states\" is defined with the deprecated\n+ * EC_CMD_USB_PD_CONTROL command.\n+ *\n+ * This also combines in the EC_CMD_USB_PD_MUX_INFO flags.\n+ */\n+#define EC_CMD_TYPEC_STATUS 0x0133\n+\n+/*\n+ * Power role.\n+ *\n+ * Note this is also used for PD header creation, and values align to those in\n+ * the Power Delivery Specification Revision 3.0 (See\n+ * 6.2.1.1.4 Port Power Role).\n+ */\n+enum pd_power_role {\n+\tPD_ROLE_SINK = 0,\n+\tPD_ROLE_SOURCE = 1,\n+};\n+\n+/*\n+ * Data role.\n+ *\n+ * Note this is also used for PD header creation, and the first two values\n+ * align to those in the Power Delivery Specification Revision 3.0 (See\n+ * 6.2.1.1.6 Port Data Role).\n+ */\n+enum pd_data_role {\n+\tPD_ROLE_UFP = 0,\n+\tPD_ROLE_DFP = 1,\n+\tPD_ROLE_DISCONNECTED = 2,\n+};\n+\n+enum pd_vconn_role {\n+\tPD_ROLE_VCONN_OFF = 0,\n+\tPD_ROLE_VCONN_SRC = 1,\n+};\n+\n+/*\n+ * Note: BIT(0) may be used to determine whether the polarity is CC1 or CC2,\n+ * regardless of whether a debug accessory is connected.\n+ */\n+enum tcpc_cc_polarity {\n+\t/*\n+\t * _CCx: is used to indicate the polarity while not connected to\n+\t * a Debug Accessory. Only one CC line will assert a resistor and\n+\t * the other will be open.\n+\t */\n+\tPOLARITY_CC1 = 0,\n+\tPOLARITY_CC2 = 1,\n+\n+\t/*\n+\t * _CCx_DTS is used to indicate the polarity while connected to a\n+\t * SRC Debug Accessory. Assert resistors on both lines.\n+\t */\n+\tPOLARITY_CC1_DTS = 2,\n+\tPOLARITY_CC2_DTS = 3,\n+\n+\t/*\n+\t * The current TCPC code relies on these specific POLARITY values.\n+\t * Adding in a check to verify if the list grows for any reason\n+\t * that this will give a hint that other places need to be\n+\t * adjusted.\n+\t */\n+\tPOLARITY_COUNT,\n+};\n+\n+#define MODE_DP_PIN_A BIT(0)\n+#define MODE_DP_PIN_B BIT(1)\n+#define MODE_DP_PIN_C BIT(2)\n+#define MODE_DP_PIN_D BIT(3)\n+#define MODE_DP_PIN_E BIT(4)\n+#define MODE_DP_PIN_F BIT(5)\n+#define MODE_DP_PIN_ALL GENMASK(5, 0)\n+\n+#define PD_STATUS_EVENT_SOP_DISC_DONE BIT(0)\n+#define PD_STATUS_EVENT_SOP_PRIME_DISC_DONE BIT(1)\n+#define PD_STATUS_EVENT_HARD_RESET BIT(2)\n+#define PD_STATUS_EVENT_DISCONNECTED BIT(3)\n+#define PD_STATUS_EVENT_MUX_0_SET_DONE BIT(4)\n+#define PD_STATUS_EVENT_MUX_1_SET_DONE BIT(5)\n+#define PD_STATUS_EVENT_VDM_REQ_REPLY BIT(6)\n+#define PD_STATUS_EVENT_VDM_REQ_FAILED BIT(7)\n+#define PD_STATUS_EVENT_VDM_ATTENTION BIT(8)\n+#define PD_STATUS_EVENT_COUNT 9\n+\n+/*\n+ * Encode and decode for BCD revision response\n+ *\n+ * Note: the major revision set is written assuming that the value given is the\n+ * Specification Revision from the PD header, which currently only maps to PD\n+ * 1.0-3.0 with the major revision being one greater than the binary value.\n+ */\n+#define PD_STATUS_REV_SET_MAJOR(r) ((r + 1) << 12)\n+#define PD_STATUS_REV_GET_MAJOR(r) ((r >> 12) & 0xF)\n+#define PD_STATUS_REV_GET_MINOR(r) ((r >> 8) & 0xF)\n+\n+/*\n+ * Encode revision from partner RMDO\n+ *\n+ * Unlike the specification revision given in the PD header, specification and\n+ * version information returned in the revision message data object (RMDO) is\n+ * not offset.\n+ */\n+#define PD_STATUS_RMDO_REV_SET_MAJOR(r) (r << 12)\n+#define PD_STATUS_RMDO_REV_SET_MINOR(r) (r << 8)\n+#define PD_STATUS_RMDO_VER_SET_MAJOR(r) (r << 4)\n+#define PD_STATUS_RMDO_VER_SET_MINOR(r) (r)\n+\n+/*\n+ * Decode helpers for Source and Sink Capability PDOs\n+ *\n+ * Note: The Power Delivery Specification should be considered the ultimate\n+ * source of truth on the decoding of these PDOs\n+ */\n+#define PDO_TYPE_FIXED (0 << 30)\n+#define PDO_TYPE_BATTERY (1 << 30)\n+#define PDO_TYPE_VARIABLE (2 << 30)\n+#define PDO_TYPE_AUGMENTED (3 << 30)\n+#define PDO_TYPE_MASK (3 << 30)\n+\n+/*\n+ * From Table 6-9 and Table 6-14 PD Rev 3.0 Ver 2.0\n+ *\n+ * <31:30> : Fixed Supply\n+ * <29> : Dual-Role Power\n+ * <28> : SNK/SRC dependent\n+ * <27> : Unconstrained Power\n+ * <26> : USB Communications Capable\n+ * <25> : Dual-Role Data\n+ * <24:20> : SNK/SRC dependent\n+ * <19:10> : Voltage in 50mV Units\n+ * <9:0> : Maximum Current in 10mA units\n+ */\n+#define PDO_FIXED_DUAL_ROLE BIT(29)\n+#define PDO_FIXED_UNCONSTRAINED BIT(27)\n+#define PDO_FIXED_COMM_CAP BIT(26)\n+#define PDO_FIXED_DATA_SWAP BIT(25)\n+#define PDO_FIXED_FRS_CURR_MASK GENMASK(24, 23) /* Sink Cap only */\n+#define PDO_FIXED_VOLTAGE(p) ((p >> 10 & 0x3FF) * 50)\n+#define PDO_FIXED_CURRENT(p) ((p & 0x3FF) * 10)\n+\n+/*\n+ * From Table 6-12 and Table 6-16 PD Rev 3.0 Ver 2.0\n+ *\n+ * <31:30> : Battery\n+ * <29:20> : Maximum Voltage in 50mV units\n+ * <19:10> : Minimum Voltage in 50mV units\n+ * <9:0> : Maximum Allowable Power in 250mW units\n+ */\n+#define PDO_BATT_MAX_VOLTAGE(p) ((p >> 20 & 0x3FF) * 50)\n+#define PDO_BATT_MIN_VOLTAGE(p) ((p >> 10 & 0x3FF) * 50)\n+#define PDO_BATT_MAX_POWER(p) ((p & 0x3FF) * 250)\n+\n+/*\n+ * From Table 6-11 and Table 6-15 PD Rev 3.0 Ver 2.0\n+ *\n+ * <31:30> : Variable Supply (non-Battery)\n+ * <29:20> : Maximum Voltage in 50mV units\n+ * <19:10> : Minimum Voltage in 50mV units\n+ * <9:0> : Operational Current in 10mA units\n+ */\n+#define PDO_VAR_MAX_VOLTAGE(p) ((p >> 20 & 0x3FF) * 50)\n+#define PDO_VAR_MIN_VOLTAGE(p) ((p >> 10 & 0x3FF) * 50)\n+#define PDO_VAR_MAX_CURRENT(p) ((p & 0x3FF) * 10)\n+\n+/*\n+ * From Table 6-13 and Table 6-17 PD Rev 3.0 Ver 2.0\n+ *\n+ * Note this type is reserved in PD 2.0, and only one type of APDO is\n+ * supported as of the cited version.\n+ *\n+ * <31:30> : Augmented Power Data Object\n+ * <29:28> : Programmable Power Supply\n+ * <27> : PPS Power Limited\n+ * <26:25> : Reserved\n+ * <24:17> : Maximum Voltage in 100mV increments\n+ * <16> : Reserved\n+ * <15:8> : Minimum Voltage in 100mV increments\n+ * <7> : Reserved\n+ * <6:0> : Maximum Current in 50mA increments\n+ */\n+#define PDO_AUG_MAX_VOLTAGE(p) ((p >> 17 & 0xFF) * 100)\n+#define PDO_AUG_MIN_VOLTAGE(p) ((p >> 8 & 0xFF) * 100)\n+#define PDO_AUG_MAX_CURRENT(p) ((p & 0x7F) * 50)\n+\n+struct ec_params_typec_status {\n+\tuint8_t port;\n+} __ec_align1;\n+\n+/*\n+ * ec_response_typec_status is deprecated. Use ec_response_typec_status_v1.\n+ * If you need to support old ECs who speak only v0, use\n+ * ec_response_typec_status_v0 instead. They're binary-compatible.\n+ */\n+struct ec_response_typec_status /* DEPRECATED */ {\n+\tuint8_t pd_enabled; /* PD communication enabled - bool */\n+\tuint8_t dev_connected; /* Device connected - bool */\n+\tuint8_t sop_connected; /* Device is SOP PD capable - bool */\n+\tuint8_t source_cap_count; /* Number of Source Cap PDOs */\n+\n+\tuint8_t power_role; /* enum pd_power_role */\n+\tuint8_t data_role; /* enum pd_data_role */\n+\tuint8_t vconn_role; /* enum pd_vconn_role */\n+\tuint8_t sink_cap_count; /* Number of Sink Cap PDOs */\n+\n+\tuint8_t polarity; /* enum tcpc_cc_polarity */\n+\tuint8_t cc_state; /* enum pd_cc_states */\n+\tuint8_t dp_pin; /* DP pin mode (MODE_DP_IN_[A-E]) */\n+\tuint8_t mux_state; /* USB_PD_MUX* - encoded mux state */\n+\n+\tchar tc_state[32]; /* TC state name */\n+\n+\tuint32_t events; /* PD_STATUS_EVENT bitmask */\n+\n+\t/*\n+\t * BCD PD revisions for partners\n+\t *\n+\t * The format has the PD major revision in the upper nibble, and the PD\n+\t * minor revision in the next nibble. The following two nibbles hold the\n+\t * major and minor specification version. If a partner does not support\n+\t * the Revision message, only the major revision will be given.\n+\t * ex. PD Revision 3.2 Version 1.9 would map to 0x3219\n+\t *\n+\t * PD revision/version will be 0 if no PD device is connected.\n+\t */\n+\tuint16_t sop_revision;\n+\tuint16_t sop_prime_revision;\n+\n+\tuint32_t source_cap_pdos[7]; /* Max 7 PDOs can be present */\n+\n+\tuint32_t sink_cap_pdos[7]; /* Max 7 PDOs can be present */\n+} __ec_align1;\n+\n+struct cros_ec_typec_status {\n+\tuint8_t pd_enabled; /* PD communication enabled - bool */\n+\tuint8_t dev_connected; /* Device connected - bool */\n+\tuint8_t sop_connected; /* Device is SOP PD capable - bool */\n+\tuint8_t source_cap_count; /* Number of Source Cap PDOs */\n+\n+\tuint8_t power_role; /* enum pd_power_role */\n+\tuint8_t data_role; /* enum pd_data_role */\n+\tuint8_t vconn_role; /* enum pd_vconn_role */\n+\tuint8_t sink_cap_count; /* Number of Sink Cap PDOs */\n+\n+\tuint8_t polarity; /* enum tcpc_cc_polarity */\n+\tuint8_t cc_state; /* enum pd_cc_states */\n+\tuint8_t dp_pin; /* DP pin mode (MODE_DP_IN_[A-E]) */\n+\tuint8_t mux_state; /* USB_PD_MUX* - encoded mux state */\n+\n+\tchar tc_state[32]; /* TC state name */\n+\n+\tuint32_t events; /* PD_STATUS_EVENT bitmask */\n+\n+\t/*\n+\t * BCD PD revisions for partners\n+\t *\n+\t * The format has the PD major revision in the upper nibble, and the PD\n+\t * minor revision in the next nibble. The following two nibbles hold the\n+\t * major and minor specification version. If a partner does not support\n+\t * the Revision message, only the major revision will be given.\n+\t * ex. PD Revision 3.2 Version 1.9 would map to 0x3219\n+\t *\n+\t * PD revision/version will be 0 if no PD device is connected.\n+\t */\n+\tuint16_t sop_revision;\n+\tuint16_t sop_prime_revision;\n+} __ec_align1;\n+\n+struct ec_response_typec_status_v0 {\n+\tstruct cros_ec_typec_status typec_status;\n+\tuint32_t source_cap_pdos[7]; /* Max 7 PDOs can be present */\n+\tuint32_t sink_cap_pdos[7]; /* Max 7 PDOs can be present */\n+} __ec_align1;\n+\n+struct ec_response_typec_status_v1 {\n+\tstruct cros_ec_typec_status typec_status;\n+\tuint32_t source_cap_pdos[11]; /* Max 11 PDOs can be present */\n+\tuint32_t sink_cap_pdos[11]; /* Max 11 PDOs can be present */\n+} __ec_align1;\n+\n+/**\n+ * Get the number of peripheral charge ports\n+ */\n+#define EC_CMD_PCHG_COUNT 0x0134\n+\n+#define EC_PCHG_MAX_PORTS 8\n+\n+struct ec_response_pchg_count {\n+\tuint8_t port_count;\n+} __ec_align1;\n+\n+/**\n+ * Get the status of a peripheral charge port\n+ */\n+#define EC_CMD_PCHG 0x0135\n+\n+/* For v1 and v2 */\n+struct ec_params_pchg {\n+\tuint8_t port;\n+} __ec_align1;\n+\n+struct ec_params_pchg_v3 {\n+\tuint8_t port;\n+\t/* Below are new in v3. */\n+\tuint8_t reserved1;\n+\tuint8_t reserved2;\n+\tuint8_t reserved3;\n+\t/* Errors acked by the host (thus to be cleared) */\n+\tuint32_t error;\n+} __ec_align1;\n+\n+/* For v1 */\n+struct ec_response_pchg {\n+\tuint32_t error; /* enum pchg_error */\n+\tuint8_t state; /* enum pchg_state state */\n+\tuint8_t battery_percentage;\n+\tuint8_t unused0;\n+\tuint8_t unused1;\n+\t/* Fields added in version 1 */\n+\tuint32_t fw_version;\n+\tuint32_t dropped_event_count;\n+} __ec_align4;\n+\n+/* For v2 and v3 */\n+struct ec_response_pchg_v2 {\n+\tuint32_t error; /* enum pchg_error */\n+\tuint8_t state; /* enum pchg_state state */\n+\tuint8_t battery_percentage;\n+\tuint8_t unused0;\n+\tuint8_t unused1;\n+\t/* Fields added in version 1 */\n+\tuint32_t fw_version;\n+\tuint32_t dropped_event_count;\n+\t/* Fields added in version 2 */\n+\tuint32_t dropped_host_event_count;\n+} __ec_align4;\n+\n+enum pchg_state {\n+\t/* Charger is reset and not initialized. */\n+\tPCHG_STATE_RESET = 0,\n+\t/* Charger is initialized or disabled. */\n+\tPCHG_STATE_INITIALIZED,\n+\t/* Charger is enabled and ready to detect a device. */\n+\tPCHG_STATE_ENABLED,\n+\t/* Device is in proximity. */\n+\tPCHG_STATE_DETECTED,\n+\t/* Device is being charged. */\n+\tPCHG_STATE_CHARGING,\n+\t/* Device is fully charged. It implies DETECTED (& not charging). */\n+\tPCHG_STATE_FULL,\n+\t/* In download (a.k.a. firmware update) mode */\n+\tPCHG_STATE_DOWNLOAD,\n+\t/* In download mode. Ready for receiving data. */\n+\tPCHG_STATE_DOWNLOADING,\n+\t/* Device is ready for data communication. */\n+\tPCHG_STATE_CONNECTED,\n+\t/* Charger is in Built-In Self Test mode. */\n+\tPCHG_STATE_BIST,\n+\t/* Put no more entry below */\n+\tPCHG_STATE_COUNT,\n+};\n+\n+/* clang-format off */\n+#define EC_PCHG_STATE_TEXT \\\n+\t{ \\\n+\t\t[PCHG_STATE_RESET] = \"RESET\", \\\n+\t\t[PCHG_STATE_INITIALIZED] = \"INITIALIZED\", \\\n+\t\t[PCHG_STATE_ENABLED] = \"ENABLED\", \\\n+\t\t[PCHG_STATE_DETECTED] = \"DETECTED\", \\\n+\t\t[PCHG_STATE_CHARGING] = \"CHARGING\", \\\n+\t\t[PCHG_STATE_FULL] = \"FULL\", \\\n+\t\t[PCHG_STATE_DOWNLOAD] = \"DOWNLOAD\", \\\n+\t\t[PCHG_STATE_DOWNLOADING] = \"DOWNLOADING\", \\\n+\t\t[PCHG_STATE_CONNECTED] = \"CONNECTED\", \\\n+\t\t[PCHG_STATE_BIST] = \"BIST\", \\\n+\t}\n+/* clang-format on */\n+\n+/**\n+ * Update firmware of peripheral chip\n+ */\n+#define EC_CMD_PCHG_UPDATE 0x0136\n+\n+/* Port number is encoded in bit[28:31]. */\n+#define EC_MKBP_PCHG_PORT_SHIFT 28\n+/* Utility macros for converting MKBP event <-> port number. */\n+#define EC_MKBP_PCHG_EVENT_TO_PORT(e) (((e) >> EC_MKBP_PCHG_PORT_SHIFT) & 0xf)\n+#define EC_MKBP_PCHG_PORT_TO_EVENT(p) ((p) << EC_MKBP_PCHG_PORT_SHIFT)\n+/* Utility macro for extracting event bits. */\n+#define EC_MKBP_PCHG_EVENT_MASK(e) \\\n+\t((e) & GENMASK(EC_MKBP_PCHG_PORT_SHIFT - 1, 0))\n+\n+#define EC_MKBP_PCHG_UPDATE_OPENED BIT(0)\n+#define EC_MKBP_PCHG_WRITE_COMPLETE BIT(1)\n+#define EC_MKBP_PCHG_UPDATE_CLOSED BIT(2)\n+#define EC_MKBP_PCHG_UPDATE_ERROR BIT(3)\n+#define EC_MKBP_PCHG_DEVICE_EVENT BIT(4)\n+\n+enum ec_pchg_update_cmd {\n+\t/* Reset chip to normal mode. */\n+\tEC_PCHG_UPDATE_CMD_RESET_TO_NORMAL = 0,\n+\t/* Reset and put a chip in update (a.k.a. download) mode. */\n+\tEC_PCHG_UPDATE_CMD_OPEN,\n+\t/* Write a block of data containing FW image. */\n+\tEC_PCHG_UPDATE_CMD_WRITE,\n+\t/* Close update session. */\n+\tEC_PCHG_UPDATE_CMD_CLOSE,\n+\t/* Reset chip (without mode change). */\n+\tEC_PCHG_UPDATE_CMD_RESET,\n+\t/* Enable pass-through mode. */\n+\tEC_PCHG_UPDATE_CMD_ENABLE_PASSTHRU,\n+\t/* End of commands */\n+\tEC_PCHG_UPDATE_CMD_COUNT,\n+};\n+\n+struct ec_params_pchg_update {\n+\t/* PCHG port number */\n+\tuint8_t port;\n+\t/* enum ec_pchg_update_cmd */\n+\tuint8_t cmd;\n+\t/* Padding */\n+\tuint8_t reserved0;\n+\tuint8_t reserved1;\n+\t/* Version of new firmware */\n+\tuint32_t version;\n+\t/* CRC32 of new firmware */\n+\tuint32_t crc32;\n+\t/* Address in chip memory where <data> is written to */\n+\tuint32_t addr;\n+\t/* Size of <data> */\n+\tuint32_t size;\n+\t/* Partial data of new firmware */\n+\tuint8_t data[FLEXIBLE_ARRAY_MEMBER_SIZE];\n+} __ec_align4;\n+\n+BUILD_ASSERT(EC_PCHG_UPDATE_CMD_COUNT <\n+\t BIT(sizeof(((struct ec_params_pchg_update *)0)->cmd) * 8));\n+\n+struct ec_response_pchg_update {\n+\t/* Block size */\n+\tuint32_t block_size;\n+} __ec_align4;\n+\n+#define EC_CMD_DISPLAY_SOC 0x0137\n+\n+struct ec_response_display_soc {\n+\t/* Display charge in 10ths of a % (1000=100.0%) */\n+\tint16_t display_soc;\n+\t/* Full factor in 10ths of a % (1000=100.0%) */\n+\tint16_t full_factor;\n+\t/* Shutdown SoC in 10ths of a % (1000=100.0%) */\n+\tint16_t shutdown_soc;\n+} __ec_align2;\n+\n+#define EC_CMD_SET_BASE_STATE 0x0138\n+\n+struct ec_params_set_base_state {\n+\tuint8_t cmd; /* enum ec_set_base_state_cmd */\n+} __ec_align1;\n+\n+enum ec_set_base_state_cmd {\n+\tEC_SET_BASE_STATE_DETACH = 0,\n+\tEC_SET_BASE_STATE_ATTACH,\n+\tEC_SET_BASE_STATE_RESET,\n+};\n+\n+#define EC_CMD_I2C_CONTROL 0x0139\n+\n+/* Subcommands for I2C control */\n+\n+enum ec_i2c_control_command {\n+\tEC_I2C_CONTROL_GET_SPEED,\n+\tEC_I2C_CONTROL_SET_SPEED,\n+};\n+\n+#define EC_I2C_CONTROL_SPEED_UNKNOWN 0\n+\n+struct ec_params_i2c_control {\n+\tuint8_t port; /* I2C port number */\n+\tuint8_t cmd; /* enum ec_i2c_control_command */\n+\tunion {\n+\t\tuint16_t speed_khz;\n+\t} cmd_params;\n+} __ec_align_size1;\n+\n+struct ec_response_i2c_control {\n+\tunion {\n+\t\tuint16_t speed_khz;\n+\t} cmd_response;\n+} __ec_align_size1;\n+\n+#define EC_CMD_RGBKBD_SET_COLOR 0x013A\n+#define EC_CMD_RGBKBD 0x013B\n+\n+#define EC_RGBKBD_MAX_KEY_COUNT 128\n+#define EC_RGBKBD_MAX_RGB_COLOR 0xFFFFFF\n+#define EC_RGBKBD_MAX_SCALE 0xFF\n+\n+enum rgbkbd_state {\n+\t/* RGB keyboard is reset and not initialized. */\n+\tRGBKBD_STATE_RESET = 0,\n+\t/* RGB keyboard is initialized but not enabled. */\n+\tRGBKBD_STATE_INITIALIZED,\n+\t/* RGB keyboard is disabled. */\n+\tRGBKBD_STATE_DISABLED,\n+\t/* RGB keyboard is enabled and ready to receive a command. */\n+\tRGBKBD_STATE_ENABLED,\n+\n+\t/* Put no more entry below */\n+\tRGBKBD_STATE_COUNT,\n+};\n+\n+enum ec_rgbkbd_subcmd {\n+\tEC_RGBKBD_SUBCMD_CLEAR = 1,\n+\tEC_RGBKBD_SUBCMD_DEMO = 2,\n+\tEC_RGBKBD_SUBCMD_SET_SCALE = 3,\n+\tEC_RGBKBD_SUBCMD_GET_CONFIG = 4,\n+\tEC_RGBKBD_SUBCMD_COUNT\n+};\n+\n+enum ec_rgbkbd_demo {\n+\tEC_RGBKBD_DEMO_OFF = 0,\n+\tEC_RGBKBD_DEMO_FLOW = 1,\n+\tEC_RGBKBD_DEMO_DOT = 2,\n+\tEC_RGBKBD_DEMO_COUNT,\n+};\n+\n+BUILD_ASSERT(EC_RGBKBD_DEMO_COUNT <= 255);\n+\n+enum ec_rgbkbd_type {\n+\tEC_RGBKBD_TYPE_UNKNOWN = 0,\n+\tEC_RGBKBD_TYPE_PER_KEY = 1, /* e.g. Vell */\n+\tEC_RGBKBD_TYPE_FOUR_ZONES_40_LEDS = 2, /* e.g. Taniks */\n+\tEC_RGBKBD_TYPE_FOUR_ZONES_12_LEDS = 3, /* e.g. Osiris */\n+\tEC_RGBKBD_TYPE_FOUR_ZONES_4_LEDS = 4, /* e.g. Mithrax */\n+\tEC_RGBKBD_TYPE_COUNT,\n+};\n+\n+struct ec_rgbkbd_set_scale {\n+\tuint8_t key;\n+\tstruct rgb_s scale;\n+};\n+\n+struct ec_params_rgbkbd {\n+\tuint8_t subcmd; /* Sub-command (enum ec_rgbkbd_subcmd) */\n+\tunion {\n+\t\tstruct rgb_s color; /* EC_RGBKBD_SUBCMD_CLEAR */\n+\t\tuint8_t demo; /* EC_RGBKBD_SUBCMD_DEMO */\n+\t\tstruct ec_rgbkbd_set_scale set_scale;\n+\t};\n+} __ec_align1;\n+\n+struct ec_response_rgbkbd {\n+\t/*\n+\t * RGBKBD type supported by the device.\n+\t */\n+\n+\tuint8_t rgbkbd_type; /* enum ec_rgbkbd_type */\n+} __ec_align1;\n+\n+struct ec_params_rgbkbd_set_color {\n+\t/* Specifies the starting key ID whose color is being changed. */\n+\tuint8_t start_key;\n+\t/* Specifies # of elements in <color>. */\n+\tuint8_t length;\n+\t/* RGB color data array of length up to MAX_KEY_COUNT. */\n+\tstruct rgb_s color[FLEXIBLE_ARRAY_MEMBER_SIZE];\n+} __ec_align1;\n+\n+/*\n+ * Gather the response to the most recent VDM REQ from the AP, as well\n+ * as popping the oldest VDM:Attention from the DPM queue\n+ */\n+#define EC_CMD_TYPEC_VDM_RESPONSE 0x013C\n+\n+struct ec_params_typec_vdm_response {\n+\tuint8_t port;\n+} __ec_align1;\n+\n+struct ec_response_typec_vdm_response {\n+\t/* Number of 32-bit fields filled in */\n+\tuint8_t vdm_data_objects;\n+\t/* Partner to address - see enum typec_partner_type */\n+\tuint8_t partner_type;\n+\t/* enum ec_status describing VDM response */\n+\tuint16_t vdm_response_err;\n+\t/* VDM data, including VDM header */\n+\tuint32_t vdm_response[VDO_MAX_SIZE];\n+\t/* Number of 32-bit Attention fields filled in */\n+\tuint8_t vdm_attention_objects;\n+\t/* Number of remaining messages to consume */\n+\tuint8_t vdm_attention_left;\n+\t/* Reserved */\n+\tuint16_t reserved1;\n+\t/* VDM:Attention contents */\n+\tuint32_t vdm_attention[2];\n+} __ec_align1;\n+\n+/*\n+ * Get an active battery config from the EC.\n+ */\n+#define EC_CMD_BATTERY_CONFIG 0x013D\n+\n+/* Version of struct batt_conf_header and its internals. */\n+#define EC_BATTERY_CONFIG_STRUCT_VERSION 0x00\n+\n+/* Number of writes needed to invoke battery cutoff command */\n+#define SHIP_MODE_WRITES 2\n+\n+struct ship_mode_info {\n+\tuint8_t reg_addr;\n+\tuint8_t reserved;\n+\tuint16_t reg_data[SHIP_MODE_WRITES];\n+} __packed __aligned(2);\n+\n+struct sleep_mode_info {\n+\tuint8_t reg_addr;\n+\tuint8_t reserved;\n+\tuint16_t reg_data;\n+} __packed __aligned(2);\n+\n+struct fet_info {\n+\tuint8_t reg_addr;\n+\tuint8_t reserved;\n+\tuint16_t reg_mask;\n+\tuint16_t disconnect_val;\n+\tuint16_t cfet_mask; /* CHG FET status mask */\n+\tuint16_t cfet_off_val;\n+} __packed __aligned(2);\n+\n+enum fuel_gauge_flags {\n+\t/*\n+\t * Write Block Support. If enabled, we use a i2c write block command\n+\t * instead of a 16-bit write. The effective difference is the i2c\n+\t * transaction will prefix the length (2).\n+\t */\n+\tFUEL_GAUGE_FLAG_WRITE_BLOCK = BIT(0),\n+\t/* Sleep command support. fuel_gauge_info.sleep_mode must be defined. */\n+\tFUEL_GAUGE_FLAG_SLEEP_MODE = BIT(1),\n+\t/*\n+\t * Manufacturer access command support. If enabled, FET status is read\n+\t * from the OperationStatus (0x54) register using the\n+\t * ManufacturerBlockAccess (0x44).\n+\t */\n+\tFUEL_GAUGE_FLAG_MFGACC = BIT(2),\n+\t/*\n+\t * SMB block protocol support in manufacturer access command. If\n+\t * enabled, FET status is read from the OperationStatus (0x54) register\n+\t * using the ManufacturerBlockAccess (0x44).\n+\t */\n+\tFUEL_GAUGE_FLAG_MFGACC_SMB_BLOCK = BIT(3),\n+};\n+\n+struct fuel_gauge_info {\n+\tuint32_t flags;\n+\tuint32_t board_flags;\n+\tstruct ship_mode_info ship_mode;\n+\tstruct sleep_mode_info sleep_mode;\n+\tstruct fet_info fet;\n+} __packed __aligned(4);\n+\n+/* Battery constants */\n+struct battery_info {\n+\t/* Operation voltage in mV */\n+\tuint16_t voltage_max;\n+\tuint16_t voltage_normal;\n+\tuint16_t voltage_min;\n+\t/* (TODO(chromium:756700): add desired_charging_current */\n+\t/**\n+\t * Pre-charge to fast charge threshold in mV,\n+\t * default to voltage_min if not specified.\n+\t * This option is only available on isl923x and rt946x.\n+\t */\n+\tuint16_t precharge_voltage;\n+\t/* Pre-charge current in mA */\n+\tuint16_t precharge_current;\n+\t/* Working temperature ranges in degrees C */\n+\tint8_t start_charging_min_c;\n+\tint8_t start_charging_max_c;\n+\tint8_t charging_min_c;\n+\tint8_t charging_max_c;\n+\tint8_t discharging_min_c;\n+\tint8_t discharging_max_c;\n+\t/* Used only if CONFIG_BATTERY_VENDOR_PARAM is defined. */\n+\tuint8_t vendor_param_start;\n+\tuint8_t reserved;\n+} __packed __aligned(2);\n+\n+/*\n+ * The 'config' of a battery.\n+ */\n+struct board_batt_params {\n+\tstruct fuel_gauge_info fuel_gauge;\n+\tstruct battery_info batt_info;\n+} __packed __aligned(4);\n+\n+/*\n+ * The SBS defines a string object as a block of chars, 32 byte maximum, where\n+ * the first byte indicates the number of chars in the block (excluding the\n+ * first byte).\n+ *\n+ * Thus, the actual string length (i.e. the value strlen returns) is limited to\n+ * 31 (=SBS_MAX_STR_SIZE).\n+ *\n+ * SBS_MAX_STR_OBJ_SIZE can be used as the size of a buffer for an SBS string\n+ * object but also as a buffer for a c-lang string because the null terminating\n+ * char also takes one byte.\n+ */\n+#define SBS_MAX_STR_SIZE 31\n+#define SBS_MAX_STR_OBJ_SIZE (SBS_MAX_STR_SIZE + 1)\n+\n+/*\n+ * Header describing a battery config stored in CBI. Only struct_version has\n+ * size and position independent of struct_version. The rest varies as\n+ * struct_version changes.\n+ *\n+ * Version 0\n+ * Layout:\n+ * +-------------+\n+ * | header |\n+ * +-------------+\n+ * | | ^\n+ * | manuf_name | | manuf_name_size\n+ * | | v\n+ * +-------------+\n+ * | device_name | ^\n+ * | | | device_name_size\n+ * | | v\n+ * +-------------+\n+ * | config | ^\n+ * | | |\n+ * | | | cbi data size\n+ * | | | - (header_size+manuf_name_size+device_name_size)\n+ * | | |\n+ * | | v\n+ * +-------------+\n+ * Note:\n+ * - manuf_name and device_name are not null-terminated.\n+ * - The config isn't aligned. It should be copied to struct board_batt_params\n+ * before its contents are accessed.\n+ */\n+struct batt_conf_header {\n+\t/* Version independent field. It's always here as a uint8_t. */\n+\tuint8_t struct_version;\n+\t/* Version 0 members */\n+\tuint8_t manuf_name_size;\n+\tuint8_t device_name_size;\n+\tuint8_t reserved;\n+\t/* manuf_name, device_name, board_batt_params follow after this. */\n+} __packed;\n+\n+#define BATT_CONF_MAX_SIZE \\\n+\t(sizeof(struct batt_conf_header) + SBS_MAX_STR_OBJ_SIZE * 2 + \\\n+\t sizeof(struct board_batt_params))\n+\n+/*\n+ * Record the current AP firmware state. This is used to help testing, such as\n+ * with FAFT (Fully-Automated Firmware Test), which likes to know which firmware\n+ * screen is currently displayed.\n+ */\n+\n+#define EC_CMD_AP_FW_STATE 0x013E\n+\n+struct ec_params_ap_fw_state {\n+\t/*\n+\t * Value which indicates the state. This is not decoded by the EC, so\n+\t * its meaning is entirely outside this code base.\n+\t */\n+\tuint32_t state;\n+} __ec_align1;\n+\n+/*\n+ * UCSI OPM-PPM commands\n+ *\n+ * These commands are used for communication between OPM and PPM.\n+ * Only UCSI3.0 is tested.\n+ */\n+\n+#define EC_CMD_UCSI_PPM_SET 0x0140\n+\n+/* The data size is stored in the host command protocol header. */\n+struct ec_params_ucsi_ppm_set {\n+\tuint16_t offset;\n+\tuint8_t data[FLEXIBLE_ARRAY_MEMBER_SIZE];\n+} __ec_align2;\n+\n+#define EC_CMD_UCSI_PPM_GET 0x0141\n+\n+/* For 'GET' sub-commands, data will be returned as a raw payload. */\n+struct ec_params_ucsi_ppm_get {\n+\tuint16_t offset;\n+\tuint8_t size;\n+} __ec_align2;\n+\n+#define EC_CMD_SET_ALARM_SLP_S0_DBG 0x0142\n+\n+/* RTC params and response structures */\n+struct ec_params_set_alarm_slp_s0_dbg {\n+\tuint32_t time;\n+} __ec_align2;\n+\n+/*\n+ * Control PDC tracing.\n+ * EC_PDC_TRACE_MSG_PORT_NONE disable tracing\n+ * EC_PDC_TRACE_MSG_PORT_ALL enable tracing on all ports\n+ * else, enable tracing on a specific port.\n */\n-#define CBI_GET_RELOAD\t\t(1 << 0)\n \n-struct __ec_align4 ec_params_get_cbi {\n-\tuint32_t type;\t\t/* enum cbi_data_tag */\n-\tuint32_t flag;\t\t/* CBI_GET_* */\n+#define EC_CMD_PDC_TRACE_MSG_ENABLE 0x0143\n+\n+#define EC_PDC_TRACE_MSG_PORT_NONE 0xff\n+#define EC_PDC_TRACE_MSG_PORT_ALL 0xfe\n+\n+struct ec_params_pdc_trace_msg_enable {\n+\tuint8_t port;\n };\n \n+struct ec_response_pdc_trace_msg_enable {\n+\t/* Previous port value. */\n+\tuint8_t port;\n+\tuint8_t reserved;\n+\t/* Number of free bytes in FIFO. */\n+\tuint16_t fifo_free;\n+\t/* Running total of dropped messages (may wrap). */\n+\tuint32_t dropped_count;\n+} __ec_align4;\n+\n /*\n- * Flags to control write behavior.\n+ * Fetch multiple PDC trace entries.\n *\n- * NO_SYNC: Makes EC update data in RAM but skip writing to EEPROM. It's\n- * useful when writing multiple fields in a row.\n- * INIT: Needs to be set when creating a new CBI from scratch. All fields\n- * will be initialized to zero first.\n+ * If no entries are available, pl_size is 0.\n+ * At most MAX_HC_PDC_TRACE_MSG_GET_PAYLOAD bytes worth of entries\n+ * are returned. Only whole entries are returned.\n */\n-#define CBI_SET_NO_SYNC\t\t(1 << 0)\n-#define CBI_SET_INIT\t\t(1 << 1)\n \n-struct __ec_align1 ec_params_set_cbi {\n-\tuint32_t tag;\t\t/* enum cbi_data_tag */\n-\tuint32_t flag;\t\t/* CBI_SET_* */\n-\tuint32_t size;\t\t/* Data size */\n-\tuint8_t data[];\t\t/* For string and raw data */\n+#define EC_CMD_PDC_TRACE_MSG_GET_ENTRIES 0x0144\n+#define MAX_HC_PDC_TRACE_MSG_GET_PAYLOAD 240\n+\n+struct ec_response_pdc_trace_msg_get_entries {\n+\t/* Total bytes of payload. */\n+\tuint16_t pl_size;\n+\t/* Packed array of pdc_trace_msg_entry structs. */\n+\tuint8_t payload[FLEXIBLE_ARRAY_MEMBER_SIZE];\n+};\n+\n+enum pdc_trace_msg_direction {\n+\tPDC_TRACE_MSG_DIR_IN = 0,\n+\tPDC_TRACE_MSG_DIR_OUT = 1,\n };\n \n+struct pdc_trace_msg_entry {\n+\t/*\n+\t * Timestamp - least significant 32 bits of EC epoch time\n+\t * (microseconds, will wrap around).\n+\t */\n+\tuint32_t time32_us;\n+\t/* Entry sequence number (wraps around). */\n+\tuint16_t seq_num;\n+\t/* Port number associated with this entry. */\n+\tuint8_t port_num;\n+\t/* Direction of message (enum pdc_trace_msg_direction) */\n+\tuint8_t direction;\n+\t/* Format of pdc_data (PDC chip identifier). */\n+\tuint8_t msg_type;\n+\t/* Bytes in pdc_data. */\n+\tuint8_t pdc_data_size;\n+\t/* Captured PDC message. */\n+\tuint8_t pdc_data[FLEXIBLE_ARRAY_MEMBER_SIZE];\n+} __ec_align1;\n+\n+/* Enable/disable Ethernet POE power */\n+#define EC_CMD_SWITCH_ENABLE_POE 0x0145\n+\n+struct ec_params_switch_enable_poe {\n+\tuint8_t enabled;\n+} __ec_align1;\n+\n /*****************************************************************************/\n /* The command range 0x200-0x2FF is reserved for Rotor. */\n \n@@ -4449,61 +8416,151 @@ struct __ec_align1 ec_params_set_cbi {\n /*****************************************************************************/\n /* Fingerprint MCU commands: range 0x0400-0x040x */\n \n-/* Fingerprint SPI sensor passthru command: prototyping ONLY */\n+/*\n+ * Fingerprint SPI sensor passthru command\n+ *\n+ * This command was used for prototyping and it's now deprecated.\n+ */\n #define EC_CMD_FP_PASSTHRU 0x0400\n \n #define EC_FP_FLAG_NOT_COMPLETE 0x1\n \n-struct __ec_align2 ec_params_fp_passthru {\n-\tuint16_t len;\t\t/* Number of bytes to write then read */\n-\tuint16_t flags;\t\t/* EC_FP_FLAG_xxx */\n-\tuint8_t data[];\t\t/* Data to send */\n-};\n-\n-/* Fingerprint sensor configuration command: prototyping ONLY */\n-#define EC_CMD_FP_SENSOR_CONFIG 0x0401\n-\n-#define EC_FP_SENSOR_CONFIG_MAX_REGS 16\n-\n-struct __ec_align2 ec_params_fp_sensor_config {\n-\tuint8_t count;\t\t/* Number of setup registers */\n-\t/*\n-\t * the value to send to each of the 'count' setup registers\n-\t * is stored in the 'data' array for 'len' bytes just after\n-\t * the previous one.\n-\t */\n-\tuint8_t len[EC_FP_SENSOR_CONFIG_MAX_REGS];\n-\tuint8_t data[];\n-};\n+struct ec_params_fp_passthru {\n+\tuint16_t len; /* Number of bytes to write then read */\n+\tuint16_t flags; /* EC_FP_FLAG_xxx */\n+\tuint8_t data[FLEXIBLE_ARRAY_MEMBER_SIZE]; /* Data to send */\n+} __ec_align2;\n \n /* Configure the Fingerprint MCU behavior */\n #define EC_CMD_FP_MODE 0x0402\n \n /* Put the sensor in its lowest power mode */\n-#define FP_MODE_DEEPSLEEP (1<<0)\n+#define FP_MODE_DEEPSLEEP BIT(0)\n /* Wait to see a finger on the sensor */\n-#define FP_MODE_FINGER_DOWN (1<<1)\n+#define FP_MODE_FINGER_DOWN BIT(1)\n /* Poll until the finger has left the sensor */\n-#define FP_MODE_FINGER_UP (1<<2)\n+#define FP_MODE_FINGER_UP BIT(2)\n /* Capture the current finger image */\n-#define FP_MODE_CAPTURE (1<<3)\n+#define FP_MODE_CAPTURE BIT(3)\n+/* Finger enrollment session on-going */\n+#define FP_MODE_ENROLL_SESSION BIT(4)\n+/* Enroll the current finger image */\n+#define FP_MODE_ENROLL_IMAGE BIT(5)\n+/* Try to match the current finger image */\n+#define FP_MODE_MATCH BIT(6)\n+/* Reset and re-initialize the sensor. */\n+#define FP_MODE_RESET_SENSOR BIT(7)\n+/* Sensor maintenance for dead pixels. */\n+#define FP_MODE_SENSOR_MAINTENANCE BIT(8)\n+/* Encrypt template. */\n+#define FP_MODE_ENCRYPT_TEMPLATE BIT(9)\n+/* Decrypt template. */\n+#define FP_MODE_DECRYPT_TEMPLATE BIT(10)\n+/* Disable template update. */\n+#define FP_MODE_MATCH_NO_TEMPLATE_UPDATE BIT(11)\n /* special value: don't change anything just read back current mode */\n-#define FP_MODE_DONT_CHANGE (1<<31)\n+#define FP_MODE_DONT_CHANGE BIT(31)\n+\n+#define FP_VALID_MODES \\\n+\t(FP_MODE_DEEPSLEEP | FP_MODE_FINGER_DOWN | FP_MODE_FINGER_UP | \\\n+\t FP_MODE_CAPTURE | FP_MODE_ENROLL_SESSION | FP_MODE_ENROLL_IMAGE | \\\n+\t FP_MODE_MATCH | FP_MODE_RESET_SENSOR | FP_MODE_SENSOR_MAINTENANCE | \\\n+\t FP_MODE_ENCRYPT_TEMPLATE | FP_MODE_DECRYPT_TEMPLATE | \\\n+\t FP_MODE_MATCH_NO_TEMPLATE_UPDATE | FP_MODE_DONT_CHANGE)\n+\n+#define FP_MODES_WITH_AUTHENTICATION (FP_MODE_ENROLL_SESSION | FP_MODE_MATCH)\n+#define FP_MODES_CRYPTO_IN_PROGRESS \\\n+\t(FP_MODE_ENCRYPT_TEMPLATE | FP_MODE_DECRYPT_TEMPLATE)\n+#define FP_MODES_TEMPLATE_OPERATION \\\n+\t(FP_MODE_ENROLL_SESSION | FP_MODE_ENROLL_IMAGE | FP_MODE_MATCH | \\\n+\t FP_MODE_RESET_SENSOR | FP_MODE_ENCRYPT_TEMPLATE | \\\n+\t FP_MODE_DECRYPT_TEMPLATE)\n+\n+/* Capture types defined in bits [30..26] */\n+#define FP_MODE_CAPTURE_TYPE_SHIFT 26\n+#define FP_MODE_CAPTURE_TYPE_MASK (0x1F << FP_MODE_CAPTURE_TYPE_SHIFT)\n+/**\n+ * enum fp_capture_type - Specifies the \"mode\" when capturing images.\n+ *\n+ * @FP_CAPTURE_TYPE_INVALID: an invalid capture type\n+ * @FP_CAPTURE_VENDOR_FORMAT: Capture 1-3 images and choose the best quality\n+ * image (produces 'frame_size' bytes)\n+ * @FP_CAPTURE_SIMPLE_IMAGE: Simple raw image capture (produces width x height x\n+ * bpp bits)\n+ * @FP_CAPTURE_DEFECT_PXL_TEST: Capture for check defect pixel test\n+ * @FP_CAPTURE_ABNORMAL_TEST: Capture for check abnormal pixel test\n+ * @FP_CAPTURE_NOISE_TEST: Capture for check noise test\n+ * @FP_CAPTURE_PATTERN0: Self test pattern (e.g. checkerboard)\n+ * @FP_CAPTURE_PATTERN1: Self test pattern (e.g. inverted checkerboard)\n+ * @FP_CAPTURE_QUALITY_TEST: Capture for Quality test with fixed contrast\n+ * @FP_CAPTURE_RESET_TEST: Capture for pixel reset value test\n+ * @FP_CAPTURE_TYPE_MAX: End of enum\n+ *\n+ * @note This enum must remain ordered, if you add new values you must ensure\n+ * that FP_CAPTURE_TYPE_MAX is still the last one.\n+ */\n+/* LINT.IfChange */\n+enum fp_capture_type {\n+\tFP_CAPTURE_TYPE_INVALID = -1,\n+\tFP_CAPTURE_VENDOR_FORMAT = 0,\n+\tFP_CAPTURE_DEFECT_PXL_TEST = 1,\n+\tFP_CAPTURE_ABNORMAL_TEST = 2,\n+\tFP_CAPTURE_NOISE_TEST = 3,\n+\tFP_CAPTURE_SIMPLE_IMAGE = 4,\n+\tFP_CAPTURE_PATTERN0 = 8,\n+\tFP_CAPTURE_PATTERN1 = 12,\n+\tFP_CAPTURE_QUALITY_TEST = 16,\n+\tFP_CAPTURE_RESET_TEST = 20,\n+\tFP_CAPTURE_TYPE_MAX,\n+};\n+/* LINT.ThenChange(/test/fpsensor_utils.cc,\n+ * /zephyr/test/fingerprint/task/src/fpsensor_debug.cc)\n+ */\n+\n+/* The maximum number of capture types in enum fp_capture_type */\n+#define FP_MAX_CAPTURE_TYPES 9\n \n-struct __ec_align4 ec_params_fp_mode {\n+/* Extracts the capture type from the sensor 'mode' word */\n+#define FP_CAPTURE_TYPE(mode) \\\n+\t(enum fp_capture_type)(((mode) & FP_MODE_CAPTURE_TYPE_MASK) >> \\\n+\t\t\t FP_MODE_CAPTURE_TYPE_SHIFT)\n+\n+#define FP_MAC_LENGTH 32\n+\n+struct ec_params_fp_mode {\n \tuint32_t mode; /* as defined by FP_MODE_ constants */\n-\t/* TBD */\n-};\n+} __ec_align4;\n \n-struct __ec_align4 ec_response_fp_mode {\n+struct ec_params_fp_mode_v1 {\n \tuint32_t mode; /* as defined by FP_MODE_ constants */\n-\t/* TBD */\n-};\n+\tuint8_t mac[FP_MAC_LENGTH];\n+} __ec_align4;\n+\n+struct ec_response_fp_mode {\n+\tuint32_t mode; /* as defined by FP_MODE_ constants */\n+} __ec_align4;\n \n /* Retrieve Fingerprint sensor information */\n #define EC_CMD_FP_INFO 0x0403\n \n-struct __ec_align2 ec_response_fp_info {\n+/* Mask for dead pixels */\n+#define FP_ERROR_DEAD_PIXELS_MASK 0x3FF\n+/* Maximum number of dead pixels */\n+#define FP_ERROR_DEAD_PIXELS_MAX (FP_ERROR_DEAD_PIXELS_MASK - 1)\n+/* Number of dead pixels detected on the last maintenance */\n+#define FP_ERROR_DEAD_PIXELS(errors) ((errors) & FP_ERROR_DEAD_PIXELS_MASK)\n+/* Unknown number of dead pixels detected on the last maintenance */\n+#define FP_ERROR_DEAD_PIXELS_UNKNOWN (FP_ERROR_DEAD_PIXELS_MASK)\n+/* No interrupt from the sensor */\n+#define FP_ERROR_NO_IRQ BIT(12)\n+/* SPI communication error */\n+#define FP_ERROR_SPI_COMM BIT(13)\n+/* Invalid sensor Hardware ID */\n+#define FP_ERROR_BAD_HWID BIT(14)\n+/* Sensor initialization failed */\n+#define FP_ERROR_INIT_FAIL BIT(15)\n+\n+struct ec_response_fp_info_v0 {\n \t/* Sensor identification */\n \tuint32_t vendor_id;\n \tuint32_t product_id;\n@@ -4515,16 +8572,449 @@ struct __ec_align2 ec_response_fp_info {\n \tuint16_t width;\n \tuint16_t height;\n \tuint16_t bpp;\n-};\n+\tuint16_t errors; /* see FP_ERROR_ flags above */\n+} __ec_align4;\n+\n+struct ec_response_fp_info {\n+\t/* Sensor identification */\n+\tuint32_t vendor_id;\n+\tuint32_t product_id;\n+\tuint32_t model_id;\n+\tuint32_t version;\n+\t/* Image frame characteristics */\n+\tuint32_t frame_size;\n+\tuint32_t pixel_format; /* using V4L2_PIX_FMT_ */\n+\tuint16_t width;\n+\tuint16_t height;\n+\tuint16_t bpp;\n+\tuint16_t errors; /* see FP_ERROR_ flags above */\n+\t/* Template/finger current information */\n+\tuint32_t template_size; /* max template size in bytes */\n+\tuint16_t template_max; /* maximum number of fingers/templates */\n+\tuint16_t template_valid; /* number of valid fingers/templates */\n+\tuint32_t template_dirty; /* bitmap of templates with MCU side changes */\n+\tuint32_t template_version; /* version of the template format */\n+} __ec_align4;\n+\n+struct fp_sensor_info {\n+\t/* Sensor identification */\n+\tuint32_t vendor_id;\n+\tuint32_t product_id;\n+\tuint32_t model_id;\n+\tuint32_t version;\n+\tuint16_t num_capture_types; /* number of image capture types */\n+\tuint16_t errors; /* see FP_ERROR_ flags above */\n+} __ec_align4;\n+BUILD_ASSERT(sizeof(struct fp_sensor_info) == 20);\n+\n+struct fp_template_info {\n+\t/* Template/finger current information */\n+\tuint32_t template_size; /* max template size in bytes */\n+\tuint16_t template_max; /* maximum number of fingers/templates */\n+\tuint16_t template_valid; /* number of valid fingers/templates */\n+\tuint32_t template_dirty; /* bitmap of templates with MCU side changes */\n+\tuint32_t template_version; /* version of the template format */\n+} __ec_align4;\n+BUILD_ASSERT(sizeof(struct fp_template_info) == 16);\n+\n+struct fp_image_frame_params {\n+\t/* Image frame characteristics */\n+\tuint32_t frame_size;\n+\tuint32_t pixel_format; /* using V4L2_PIX_FMT_ */\n+\tuint16_t width;\n+\tuint16_t height;\n+\tuint16_t bpp;\n+\t/** Type of image capture from enum fp_capture_type. */\n+\tuint8_t fp_capture_type;\n+\tuint8_t reserved; /**< padding for alignment */\n+} __ec_align4;\n+BUILD_ASSERT(sizeof(struct fp_image_frame_params) == 16);\n+\n+struct ec_response_fp_info_v2 {\n+\t/* Sensor identification */\n+\tstruct fp_sensor_info sensor_info;\n+\t/* Template/finger current information */\n+\tstruct fp_template_info template_info;\n+\t/* fingerprint image frame parameters */\n+\tstruct fp_image_frame_params\n+\t\timage_frame_params[FLEXIBLE_ARRAY_MEMBER_SIZE];\n+} __ec_align4;\n+BUILD_ASSERT(sizeof(struct ec_response_fp_info_v2) == 36);\n+\n+struct fp_image_frame_params_v2 {\n+\t/* Image frame characteristics */\n+\tuint32_t frame_size;\n+\tuint32_t image_data_offset_bytes; /**< Byte offset of image buffer */\n+\tuint32_t pixel_format; /* using V4L2_PIX_FMT_ */\n+\tuint16_t width;\n+\tuint16_t height;\n+\tuint16_t bpp;\n+\t/** Type of image capture from enum fp_capture_type. */\n+\tuint8_t fp_capture_type;\n+\tuint8_t reserved; /**< padding for alignment */\n+} __ec_align4;\n+BUILD_ASSERT(sizeof(struct fp_image_frame_params_v2) == 20);\n+\n+struct ec_response_fp_info_v3 {\n+\t/* Sensor identification */\n+\tstruct fp_sensor_info sensor_info;\n+\t/* Template/finger current information */\n+\tstruct fp_template_info template_info;\n+\t/* fingerprint image frame parameters */\n+\tstruct fp_image_frame_params_v2\n+\t\timage_frame_params[FLEXIBLE_ARRAY_MEMBER_SIZE];\n+} __ec_align4;\n+BUILD_ASSERT(sizeof(struct ec_response_fp_info_v3) == 36);\n \n-/* Get the last captured finger frame: TODO: will be AES-encrypted */\n+/* Get the last captured finger frame or a template content */\n #define EC_CMD_FP_FRAME 0x0404\n \n-struct __ec_align4 ec_params_fp_frame {\n+/* constants defining the 'offset' field which also contains the frame index */\n+#define FP_FRAME_INDEX_SHIFT 28\n+/* Frame buffer where the captured image is stored */\n+#define FP_FRAME_INDEX_RAW_IMAGE 0\n+/* First frame buffer holding a template */\n+#define FP_FRAME_INDEX_TEMPLATE 1\n+#define FP_FRAME_GET_BUFFER_INDEX(offset) ((offset) >> FP_FRAME_INDEX_SHIFT)\n+#define FP_FRAME_OFFSET_MASK 0x0FFFFFFF\n+\n+/* Version of the format of the encrypted templates. */\n+#define FP_TEMPLATE_FORMAT_VERSION 4\n+\n+/* Constants for encryption parameters */\n+#define FP_CONTEXT_NONCE_BYTES 12\n+#define FP_CONTEXT_USERID_BYTES 32\n+#define FP_CONTEXT_USERID_WORDS (FP_CONTEXT_USERID_BYTES / sizeof(uint32_t))\n+#define FP_CONTEXT_TAG_BYTES 16\n+#define FP_CONTEXT_ENCRYPTION_SALT_BYTES 16\n+#define FP_CONTEXT_TPM_BYTES 32\n+\n+/* Constants for positive match parameters. */\n+#define FP_POSITIVE_MATCH_SALT_BYTES 16\n+\n+struct ec_fp_template_encryption_metadata {\n+\t/*\n+\t * Version of the structure format (N=3).\n+\t */\n+\tuint16_t struct_version;\n+\t/* Reserved bytes, set to 0. */\n+\tuint16_t reserved;\n+\t/*\n+\t * The salt is *only* ever used for key derivation. The nonce is unique,\n+\t * a different one is used for every message.\n+\t */\n+\tuint8_t nonce[FP_CONTEXT_NONCE_BYTES];\n+\tuint8_t encryption_salt[FP_CONTEXT_ENCRYPTION_SALT_BYTES];\n+\tuint8_t tag[FP_CONTEXT_TAG_BYTES];\n+};\n+\n+struct ec_params_fp_frame {\n+\t/*\n+\t * The offset contains the template index or FP_FRAME_INDEX_RAW_IMAGE\n+\t * in the high nibble, and the real offset within the frame in\n+\t * FP_FRAME_OFFSET_MASK.\n+\t */\n+\tuint32_t offset;\n+\tuint32_t size;\n+} __ec_align4;\n+\n+/*\n+ * FP_FRAME commands:\n+ *\n+ * - FP_FRAME_GET_RAW_IMAGE command can be used to get raw image from sensor.\n+ * This command works only when the system is not locked. The template index\n+ * is ignored.\n+ * - FP_FRAME_ENCRYPT_TEMPLATE command is used to request encryption of the\n+ * template with provided template index. Offset and size are ignored.\n+ * The encryption process is considered as started only after EC_SUCCESS\n+ * was returned.\n+ * - FP_FRAME_GET_ENCRYPTED_TEMPLATE command is used to obtain the encrypted\n+ * template.\n+ */\n+enum fp_frame_cmd {\n+\tFP_FRAME_GET_RAW_IMAGE = 0,\n+\tFP_FRAME_ENCRYPT_TEMPLATE = 1,\n+\tFP_FRAME_GET_ENCRYPTED_TEMPLATE = 2,\n+};\n+\n+struct ec_params_fp_frame_v1 {\n+\tuint8_t cmd;\n+\tuint8_t reserved;\n+\tuint16_t index;\n+\tuint32_t offset;\n+\tuint32_t size;\n+} __ec_align4;\n+\n+/* Load a template into the MCU */\n+#define EC_CMD_FP_TEMPLATE 0x0405\n+\n+/* Flag in the 'size' field indicating that the full template has been sent */\n+#define FP_TEMPLATE_COMMIT 0x80000000\n+\n+struct ec_params_fp_template {\n+\tuint32_t offset;\n+\tuint32_t size;\n+\tuint8_t data[FLEXIBLE_ARRAY_MEMBER_SIZE];\n+} __ec_align4;\n+\n+/*\n+ * FP_TEMPLATE commands:\n+ *\n+ * - FP_TEMPLATE_LOAD command is used to copy part of the template to FPMCU\n+ * buffer.\n+ * - FP_TEMPLATE_DECRYPT command starts template decryption.\n+ * - FP_TEMPLATE_GET_RESULT command is used to check decryption result.\n+ */\n+enum fp_template_cmd {\n+\tFP_TEMPLATE_LOAD = 0,\n+\tFP_TEMPLATE_DECRYPT = 1,\n+\tFP_TEMPLATE_GET_RESULT = 2,\n+};\n+\n+struct ec_params_fp_template_v1 {\n \tuint32_t offset;\n \tuint32_t size;\n+\tuint8_t cmd;\n+\tuint8_t data[FLEXIBLE_ARRAY_MEMBER_SIZE];\n+} __ec_align4;\n+\n+/* Clear the current fingerprint user context and set a new one */\n+#define EC_CMD_FP_CONTEXT 0x0406\n+\n+struct ec_params_fp_context {\n+\tuint32_t userid[FP_CONTEXT_USERID_WORDS];\n+} __ec_align4;\n+\n+enum fp_context_action {\n+\tFP_CONTEXT_ASYNC = 0,\n+\tFP_CONTEXT_GET_RESULT = 1,\n };\n \n+/* Version 1 of the command is \"asynchronous\". */\n+struct ec_params_fp_context_v1 {\n+\tuint8_t action; /**< enum fp_context_action */\n+\tuint8_t reserved[3]; /**< padding for alignment */\n+\tuint32_t userid[FP_CONTEXT_USERID_WORDS];\n+} __ec_align4;\n+\n+#define EC_CMD_FP_STATS 0x0407\n+\n+#define FPSTATS_CAPTURE_INV BIT(0)\n+#define FPSTATS_MATCHING_INV BIT(1)\n+\n+struct ec_response_fp_stats {\n+\tuint32_t capture_time_us;\n+\tuint32_t matching_time_us;\n+\tuint32_t overall_time_us;\n+\tstruct {\n+\t\tuint32_t lo;\n+\t\tuint32_t hi;\n+\t} overall_t0;\n+\tuint8_t timestamps_invalid;\n+\tint8_t template_matched;\n+} __ec_align2;\n+\n+#define EC_CMD_FP_SEED 0x0408\n+struct ec_params_fp_seed {\n+\t/*\n+\t * Version of the structure format (N=3).\n+\t */\n+\tuint16_t struct_version;\n+\t/* Reserved bytes, set to 0. */\n+\tuint16_t reserved;\n+\t/* Seed from the TPM. */\n+\tuint8_t seed[FP_CONTEXT_TPM_BYTES];\n+} __ec_align4;\n+\n+#define EC_CMD_FP_ENC_STATUS 0x0409\n+\n+/* FP TPM seed has been set or not */\n+#define FP_ENC_STATUS_SEED_SET BIT(0)\n+/* Session was established or not */\n+#define FP_CONTEXT_STATUS_SESSION_ESTABLISHED BIT(1)\n+/* FP session_nonce had been set or not*/\n+#define FP_CONTEXT_SESSION_NONCE_SET BIT(2)\n+/* FP user_id had been set or not*/\n+#define FP_CONTEXT_USER_ID_SET BIT(3)\n+/* The operation authentication challenge was generated */\n+#define FP_AUTH_CHALLENGE_SET BIT(4)\n+/* Encrypted template is available */\n+#define FP_ENCRYPTED_TEMPLATE_READY BIT(5)\n+\n+struct ec_response_fp_encryption_status {\n+\t/* Used bits in encryption engine status */\n+\tuint32_t valid_flags;\n+\t/* Encryption engine status */\n+\tuint32_t status;\n+} __ec_align4;\n+\n+#define EC_CMD_FP_READ_MATCH_SECRET 0x040A\n+struct ec_params_fp_read_match_secret {\n+\tuint16_t fgr;\n+} __ec_align4;\n+\n+/*\n+ * Fingerprint vendor defined command.\n+ *\n+ * A custom per fingerprint vendor host command. It can be used to fetch some\n+ * custom data during testing, manufacturing etc.\n+ *\n+ * This command should be handled only if the system is unlocked.\n+ */\n+#define EC_CMD_FP_VENDOR 0x040B\n+struct ec_params_fp_vendor {\n+\t/* Parameter to be used by FP vendors. */\n+\tuint32_t param1;\n+} __ec_align4;\n+\n+/* The positive match secret has the length of the SHA256 digest. */\n+#define FP_POSITIVE_MATCH_SECRET_BYTES 32\n+struct ec_response_fp_read_match_secret {\n+\tuint8_t positive_match_secret[FP_POSITIVE_MATCH_SECRET_BYTES];\n+} __ec_align4;\n+\n+#define FP_ELLIPTIC_CURVE_PUBLIC_KEY_POINT_LEN 32\n+\n+struct fp_elliptic_curve_public_key {\n+\tuint8_t x[FP_ELLIPTIC_CURVE_PUBLIC_KEY_POINT_LEN];\n+\tuint8_t y[FP_ELLIPTIC_CURVE_PUBLIC_KEY_POINT_LEN];\n+} __ec_align4;\n+\n+#define FP_AES_KEY_ENC_METADATA_VERSION 1\n+#define FP_AES_KEY_NONCE_BYTES 12\n+#define FP_AES_KEY_ENCRYPTION_SALT_BYTES 16\n+#define FP_AES_KEY_TAG_BYTES 16\n+\n+struct fp_auth_command_encryption_metadata {\n+\t/* Version of the structure format */\n+\tuint16_t struct_version;\n+\t/* Reserved bytes, set to 0. */\n+\tuint16_t reserved;\n+\t/*\n+\t * The salt is *only* ever used for key derivation. The nonce is unique,\n+\t * a different one is used for every message.\n+\t */\n+\tuint8_t nonce[FP_AES_KEY_NONCE_BYTES];\n+\tuint8_t encryption_salt[FP_AES_KEY_ENCRYPTION_SALT_BYTES];\n+\tuint8_t tag[FP_AES_KEY_TAG_BYTES];\n+} __ec_align4;\n+\n+#define FP_ELLIPTIC_CURVE_PRIVATE_KEY_LEN 32\n+#define FP_ELLIPTIC_CURVE_PUBLIC_KEY_IV_LEN 16\n+\n+struct fp_encrypted_private_key {\n+\tstruct fp_auth_command_encryption_metadata info;\n+\tuint8_t data[FP_ELLIPTIC_CURVE_PRIVATE_KEY_LEN];\n+} __ec_align4;\n+\n+#define EC_CMD_FP_ESTABLISH_PAIRING_KEY_KEYGEN 0x0410\n+\n+struct ec_response_fp_establish_pairing_key_keygen {\n+\tstruct fp_elliptic_curve_public_key pubkey;\n+} __ec_align4;\n+\n+#define FP_PAIRING_KEY_LEN 32\n+\n+struct ec_fp_encrypted_pairing_key {\n+\tstruct fp_auth_command_encryption_metadata info;\n+\tuint8_t data[FP_PAIRING_KEY_LEN];\n+} __ec_align4;\n+\n+#define EC_CMD_FP_ESTABLISH_PAIRING_KEY_WRAP 0x0411\n+\n+struct ec_params_fp_establish_pairing_key_wrap {\n+\tstruct fp_elliptic_curve_public_key peers_pubkey;\n+} __ec_align4;\n+\n+struct ec_response_fp_establish_pairing_key_wrap {\n+\tstruct ec_fp_encrypted_pairing_key encrypted_pairing_key;\n+} __ec_align4;\n+\n+#define EC_CMD_FP_LOAD_PAIRING_KEY 0x0412\n+\n+typedef struct ec_response_fp_establish_pairing_key_wrap\n+\tec_params_fp_load_pairing_key;\n+\n+#define FP_CK_SESSION_NONCE_LEN 32\n+\n+#define EC_CMD_FP_GENERATE_NONCE 0x0413\n+struct ec_response_fp_generate_nonce {\n+\tuint8_t nonce[FP_CK_SESSION_NONCE_LEN];\n+} __ec_align4;\n+\n+#define EC_CMD_FP_ESTABLISH_SESSION 0x0414\n+struct ec_params_fp_establish_session {\n+\tuint8_t peer_nonce[FP_CK_SESSION_NONCE_LEN];\n+\tuint8_t enc_tpm_seed[FP_CONTEXT_TPM_BYTES];\n+\tuint8_t nonce[FP_AES_KEY_NONCE_BYTES];\n+\tuint8_t tag[FP_AES_KEY_TAG_BYTES];\n+} __ec_align4;\n+\n+#define FP_CHALLENGE_SIZE 32\n+\n+#define EC_CMD_FP_GENERATE_CHALLENGE 0x0415\n+struct ec_response_fp_generate_challenge {\n+\tuint8_t challenge[FP_CHALLENGE_SIZE];\n+} __ec_align4;\n+\n+#define EC_CMD_FP_CONFIRM_TEMPLATE 0x0416\n+struct ec_params_fp_confirm_template {\n+\tuint8_t mac[FP_MAC_LENGTH];\n+} __ec_align4;\n+\n+#define EC_CMD_FP_SIGN_MATCH 0x0417\n+struct ec_params_fp_sign_match {\n+\tuint8_t challenge[FP_CHALLENGE_SIZE];\n+} __ec_align4;\n+\n+struct ec_response_fp_sign_match {\n+\tuint8_t signature[FP_MAC_LENGTH];\n+} __ec_align4;\n+\n+/*\n+ * Fingerprint ASCP claim command.\n+ *\n+ */\n+#define EC_CMD_FP_ASCP_CLAIM 0x0420\n+\n+/*\n+ * ECC public key with no point compression as defined in\n+ * ANSI X9.62 section 4.3.6 (0x04||x||y), P256v1 curve.\n+ */\n+#define FP_ASCP_KEY_SIZE 65\n+/* ECC signature, P256v1 curve, P1363 encoding (r||s) */\n+#define FP_ASCP_SIGNATURE_SIZE 64\n+/* SHA256 */\n+#define FP_ASCP_HASH_SIZE 32\n+\n+struct ec_response_fp_ascp_claim {\n+\t/* Model public key. */\n+\tuint8_t pk_m[FP_ASCP_KEY_SIZE];\n+\t/* Model public key signature. */\n+\tuint8_t s_goog[FP_ASCP_SIGNATURE_SIZE];\n+\t/* Device public key. */\n+\tuint8_t pk_d[FP_ASCP_KEY_SIZE];\n+\t/* Device public key signature (signed using model key). */\n+\tuint8_t s_m[FP_ASCP_SIGNATURE_SIZE];\n+\t/* Ephemeral public key used in ECDH procedure. */\n+\tuint8_t pk_f[FP_ASCP_KEY_SIZE];\n+\t/* SHA256 hash of the firmware. */\n+\tuint8_t h_f[FP_ASCP_HASH_SIZE];\n+\t/* Signature of the SHA256( 0xC001 || h_f || pk_f) using device key. */\n+\tuint8_t s_d[FP_ASCP_SIGNATURE_SIZE];\n+} __ec_align4;\n+\n+/*\n+ * Fingerprint ASCP establish command.\n+ *\n+ */\n+#define EC_CMD_FP_ASCP_ESTABLISH 0x0421\n+\n+struct ec_params_fp_ascp_establish {\n+\t/* TA's ephemeral public key. */\n+\tuint8_t pk_g[FP_ASCP_KEY_SIZE];\n+} __ec_align4;\n+\n /*****************************************************************************/\n /* Touchpad MCU commands: range 0x0500-0x05FF */\n \n@@ -4534,10 +9024,10 @@ struct __ec_align4 ec_params_fp_frame {\n /* Get number of frame types, and the size of each type */\n #define EC_CMD_TP_FRAME_INFO 0x0501\n \n-struct __ec_align4 ec_response_tp_frame_info {\n+struct ec_response_tp_frame_info {\n \tuint32_t n_frames;\n-\tuint32_t frame_sizes[0];\n-};\n+\tuint32_t frame_sizes[FLEXIBLE_ARRAY_MEMBER_SIZE];\n+} __ec_align4;\n \n /* Create a snapshot of current frame readings */\n #define EC_CMD_TP_FRAME_SNAPSHOT 0x0502\n@@ -4545,12 +9035,246 @@ struct __ec_align4 ec_response_tp_frame_info {\n /* Read the frame */\n #define EC_CMD_TP_FRAME_GET 0x0503\n \n-struct __ec_align4 ec_params_tp_frame_get {\n+struct ec_params_tp_frame_get {\n \tuint32_t frame_index;\n \tuint32_t offset;\n \tuint32_t size;\n+} __ec_align4;\n+\n+/*****************************************************************************/\n+/* EC-EC communication commands: range 0x0600-0x06FF */\n+\n+#define EC_COMM_TEXT_MAX 8\n+\n+/*\n+ * Get battery static information, i.e. information that never changes, or\n+ * very infrequently.\n+ */\n+#define EC_CMD_BATTERY_GET_STATIC 0x0600\n+\n+/**\n+ * struct ec_params_battery_static_info - Battery static info parameters\n+ * @index: Battery index.\n+ */\n+struct ec_params_battery_static_info {\n+\tuint8_t index;\n+} __ec_align_size1;\n+\n+/**\n+ * struct ec_response_battery_static_info - Battery static info response\n+ * @design_capacity: Battery Design Capacity (mAh)\n+ * @design_voltage: Battery Design Voltage (mV)\n+ * @manufacturer: Battery Manufacturer String\n+ * @model: Battery Model Number String\n+ * @serial: Battery Serial Number String\n+ * @type: Battery Type String\n+ * @cycle_count: Battery Cycle Count\n+ */\n+struct ec_response_battery_static_info {\n+\tuint16_t design_capacity;\n+\tuint16_t design_voltage;\n+\tchar manufacturer[EC_COMM_TEXT_MAX];\n+\tchar model[EC_COMM_TEXT_MAX];\n+\tchar serial[EC_COMM_TEXT_MAX];\n+\tchar type[EC_COMM_TEXT_MAX];\n+\t/* TODO(crbug.com/795991): Consider moving to dynamic structure. */\n+\tuint32_t cycle_count;\n+} __ec_align4;\n+\n+/**\n+ * struct ec_response_battery_static_info_v1 - hostcmd v1 battery static info\n+ * Equivalent to struct ec_response_battery_static_info, but with longer\n+ * strings.\n+ * @design_capacity: battery design capacity (in mAh)\n+ * @design_voltage: battery design voltage (in mV)\n+ * @cycle_count: battery cycle count\n+ * @manufacturer_ext: battery manufacturer string\n+ * @model_ext: battery model string\n+ * @serial_ext: battery serial number string\n+ * @type_ext: battery type string\n+ */\n+struct ec_response_battery_static_info_v1 {\n+\tuint16_t design_capacity;\n+\tuint16_t design_voltage;\n+\tuint32_t cycle_count;\n+\tchar manufacturer_ext[12];\n+\tchar model_ext[12];\n+\tchar serial_ext[12];\n+\tchar type_ext[12];\n+} __ec_align4;\n+\n+/**\n+ * struct ec_response_battery_static_info_v2 - hostcmd v2 battery static info\n+ *\n+ * Equivalent to struct ec_response_battery_static_info, but with strings\n+ * further lengthened (relative to v1) to accommodate the maximum string length\n+ * permitted by the Smart Battery Data Specification revision 1.1 and fields\n+ * renamed to better match that specification.\n+ *\n+ * @design_capacity: battery design capacity (in mAh)\n+ * @design_voltage: battery design voltage (in mV)\n+ * @cycle_count: battery cycle count\n+ * @manufacturer: battery manufacturer string\n+ * @device_name: battery model string\n+ * @serial: battery serial number string\n+ * @chemistry: battery type string\n+ */\n+struct ec_response_battery_static_info_v2 {\n+\tuint16_t design_capacity;\n+\tuint16_t design_voltage;\n+\tuint32_t cycle_count;\n+\tchar manufacturer[SBS_MAX_STR_OBJ_SIZE];\n+\tchar device_name[SBS_MAX_STR_OBJ_SIZE];\n+\tchar serial[SBS_MAX_STR_OBJ_SIZE];\n+\tchar chemistry[SBS_MAX_STR_OBJ_SIZE];\n+} __ec_align4;\n+\n+/**\n+ * struct ec_response_battery_static_info_v3 - hostcmd v3 battery static info\n+ *\n+ * Extends struct ec_response_battery_static_info_v2 with\n+ * manuf_info.\n+ *\n+ * @design_capacity: battery design capacity (in mAh)\n+ * @design_voltage: battery design voltage (in mV)\n+ * @cycle_count: battery cycle count\n+ * @manufacturer: battery manufacturer string\n+ * @device_name: battery model string\n+ * @serial: battery serial number string\n+ * @chemistry: battery type string\n+ * @manuf_info: battery manufacture info string (vendor specific)\n+ * @manuf_year: battery manufacture year\n+ * @manuf_month: battery manufacture month\n+ * @manuf_day: battery manufacture day\n+ */\n+struct ec_response_battery_static_info_v3 {\n+\tuint16_t design_capacity;\n+\tuint16_t design_voltage;\n+\tuint32_t cycle_count;\n+\tchar manufacturer[SBS_MAX_STR_OBJ_SIZE];\n+\tchar device_name[SBS_MAX_STR_OBJ_SIZE];\n+\tchar serial[SBS_MAX_STR_OBJ_SIZE];\n+\tchar chemistry[SBS_MAX_STR_OBJ_SIZE];\n+\tchar manuf_info[SBS_MAX_STR_OBJ_SIZE];\n+\tuint16_t manuf_year;\n+\tuint8_t manuf_month;\n+\tuint8_t manuf_day;\n+} __ec_align4;\n+\n+/*\n+ * Get battery dynamic information, i.e. information that is likely to change\n+ * every time it is read.\n+ */\n+#define EC_CMD_BATTERY_GET_DYNAMIC 0x0601\n+\n+/**\n+ * struct ec_params_battery_dynamic_info - Battery dynamic info parameters\n+ * @index: Battery index.\n+ */\n+struct ec_params_battery_dynamic_info {\n+\tuint8_t index;\n+} __ec_align_size1;\n+\n+/**\n+ * struct ec_response_battery_dynamic_info - Battery dynamic info response\n+ * @actual_voltage: Battery voltage (mV)\n+ * @actual_current: Battery current (mA); negative=discharging\n+ * @remaining_capacity: Remaining capacity (mAh)\n+ * @full_capacity: Capacity (mAh, might change occasionally)\n+ * @flags: Flags, see EC_BATT_FLAG_*\n+ * @desired_voltage: Charging voltage desired by battery (mV)\n+ * @desired_current: Charging current desired by battery (mA)\n+ */\n+struct ec_response_battery_dynamic_info {\n+\tint16_t actual_voltage;\n+\tint16_t actual_current;\n+\tint16_t remaining_capacity;\n+\tint16_t full_capacity;\n+\tint16_t flags;\n+\tint16_t desired_voltage;\n+\tint16_t desired_current;\n+} __ec_align2;\n+\n+/**\n+ * struct ec_response_battery_dynamic_info_v1 - Battery dynamic info response\n+ * (v1)\n+ * @actual_voltage: Battery voltage (mV)\n+ * @actual_current: Battery current (mA); negative=discharging\n+ * @remaining_capacity: Remaining capacity (mAh)\n+ * @full_capacity: Capacity (mAh, might change occasionally)\n+ * @flags: Flags, see EC_BATT_FLAG_*\n+ * @desired_voltage: Charging voltage desired by battery (mV)\n+ * @desired_current: Charging current desired by battery (mA)\n+ * @temperature: Battery temperature (dK)\n+ */\n+struct ec_response_battery_dynamic_info_v1 {\n+\tint16_t actual_voltage;\n+\tint16_t actual_current;\n+\tint16_t remaining_capacity;\n+\tint16_t full_capacity;\n+\tint16_t flags;\n+\tint16_t desired_voltage;\n+\tint16_t desired_current;\n+\tuint16_t temperature;\n+} __ec_align2;\n+\n+/*\n+ * Control charger chip. Used to control charger chip on the peripheral.\n+ */\n+#define EC_CMD_CHARGER_CONTROL 0x0602\n+\n+/**\n+ * struct ec_params_charger_control - Charger control parameters\n+ * @max_current: Charger current (mA). Positive to allow base to draw up to\n+ * max_current and (possibly) charge battery, negative to request current\n+ * from base (OTG).\n+ * @otg_voltage: Voltage (mV) to use in OTG mode, ignored if max_current is\n+ * >= 0.\n+ * @allow_charging: Allow base battery charging (only makes sense if\n+ * max_current > 0).\n+ */\n+struct ec_params_charger_control {\n+\tint16_t max_current;\n+\tuint16_t otg_voltage;\n+\tuint8_t allow_charging;\n+} __ec_align_size1;\n+\n+/* Get ACK from the USB-C SS muxes */\n+#define EC_CMD_USB_PD_MUX_ACK 0x0603\n+\n+struct ec_params_usb_pd_mux_ack {\n+\tuint8_t port; /* USB-C port number */\n+} __ec_align1;\n+\n+/* Get boot time */\n+#define EC_CMD_GET_BOOT_TIME 0x0604\n+\n+enum boot_time_param {\n+\tARAIL = 0,\n+\tRSMRST,\n+\tESPIRST,\n+\tPLTRST_LOW,\n+\tPLTRST_HIGH,\n+\tEC_CUR_TIME,\n+\tRESET_CNT,\n };\n \n+struct ec_response_get_boot_time {\n+\tuint64_t timestamp[RESET_CNT];\n+\tuint16_t cnt;\n+} __ec_align4;\n+\n+/* Issue AP shutdown */\n+#define EC_CMD_AP_SHUTDOWN 0x0605\n+\n+/**\n+ * Issue AP shutdown using heartbeat wake.\n+ * The AP calls this to enter the low-power G3 state for off-mode charging.\n+ * The EC then monitors battery SoC and wakes the AP when discharged by a\n+ * configured threshold.\n+ */\n+#define EC_CMD_ENABLE_OFFMODE_HEARTBEAT 0x0606\n+\n /*****************************************************************************/\n /*\n * Reserve a range of host commands for board-specific, experimental, or\n@@ -4621,10 +9345,14 @@ struct __ec_align4 ec_params_tp_frame_get {\n * switch to the new names soon, as the old names may not be carried forward\n * forever.\n */\n-#define EC_HOST_PARAM_SIZE EC_PROTO2_MAX_PARAM_SIZE\n-#define EC_LPC_ADDR_OLD_PARAM EC_HOST_CMD_REGION1\n-#define EC_OLD_PARAM_SIZE EC_HOST_CMD_REGION_SIZE\n+#define EC_HOST_PARAM_SIZE EC_PROTO2_MAX_PARAM_SIZE\n+#define EC_LPC_ADDR_OLD_PARAM EC_HOST_CMD_REGION1\n+#define EC_OLD_PARAM_SIZE EC_HOST_CMD_REGION_SIZE\n \n-#endif /* !__ACPI__ && !__KERNEL__ */\n+#endif /* !__ACPI__ */\n+\n+#ifdef __cplusplus\n+}\n+#endif\n \n-#endif /* __CROS_EC_COMMANDS_H */\n+#endif /* __CROS_EC_EC_COMMANDS_H */\n", "prefixes": [ "2/2" ] }