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{
    "id": 2231246,
    "url": "http://patchwork.ozlabs.org/api/patches/2231246/?format=api",
    "web_url": "http://patchwork.ozlabs.org/project/gcc/patch/CAMe9rOrG=Pk9YsEVyFHCi302Y1pi8VOSxZGesruDqmO8ngOasw@mail.gmail.com/",
    "project": {
        "id": 17,
        "url": "http://patchwork.ozlabs.org/api/projects/17/?format=api",
        "name": "GNU Compiler Collection",
        "link_name": "gcc",
        "list_id": "gcc-patches.gcc.gnu.org",
        "list_email": "gcc-patches@gcc.gnu.org",
        "web_url": null,
        "scm_url": null,
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        "list_archive_url": "",
        "list_archive_url_format": "",
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    "msgid": "<CAMe9rOrG=Pk9YsEVyFHCi302Y1pi8VOSxZGesruDqmO8ngOasw@mail.gmail.com>",
    "list_archive_url": null,
    "date": "2026-04-30T12:28:53",
    "name": "x86: Implement TARGET_FNTYPE_ABI",
    "commit_ref": null,
    "pull_url": null,
    "state": "new",
    "archived": false,
    "hash": "e93cfbfffe041393bbdfee9421f6544628367fe2",
    "submitter": {
        "id": 4387,
        "url": "http://patchwork.ozlabs.org/api/people/4387/?format=api",
        "name": "H.J. Lu",
        "email": "hjl.tools@gmail.com"
    },
    "delegate": null,
    "mbox": "http://patchwork.ozlabs.org/project/gcc/patch/CAMe9rOrG=Pk9YsEVyFHCi302Y1pi8VOSxZGesruDqmO8ngOasw@mail.gmail.com/mbox/",
    "series": [
        {
            "id": 502296,
            "url": "http://patchwork.ozlabs.org/api/series/502296/?format=api",
            "web_url": "http://patchwork.ozlabs.org/project/gcc/list/?series=502296",
            "date": "2026-04-30T12:28:53",
            "name": "x86: Implement TARGET_FNTYPE_ABI",
            "version": 1,
            "mbox": "http://patchwork.ozlabs.org/series/502296/mbox/"
        }
    ],
    "comments": "http://patchwork.ozlabs.org/api/patches/2231246/comments/",
    "check": "pending",
    "checks": "http://patchwork.ozlabs.org/api/patches/2231246/checks/",
    "tags": {},
    "related": [],
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        "From": "\"H.J. Lu\" <hjl.tools@gmail.com>",
        "Date": "Thu, 30 Apr 2026 20:28:53 +0800",
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        "Message-ID": "\n <CAMe9rOrG=Pk9YsEVyFHCi302Y1pi8VOSxZGesruDqmO8ngOasw@mail.gmail.com>",
        "Subject": "[PATCH] x86: Implement TARGET_FNTYPE_ABI",
        "To": "GCC Patches <gcc-patches@gcc.gnu.org>, Uros Bizjak <ubizjak@gmail.com>,\n Hongtao Liu <hongtao.liu@intel.com>",
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    },
    "content": "Implement TARGET_FNTYPE_ABI to avoid spills of callee-saved registers\nwhen calling functions with no_caller_saved_registers attribute.\n\n1. For functions with no_callee_saved_registers attribute, frame register\nis preserved to mitigate PR target/114116.  MMX and x87 registers are\npreserved if MMX and x87 aren't enabled.\n2. For functions with no_caller_saved_registers attribute, MMX and x87\nregisters aren't preserved since saving and restoring registers doesn't\ninclude MMX nor x87 registers.\n3. Don't mark disabled registers as call used.\n\ngcc/\n\nPR target/124798\n* config/i386/i386.cc (ix86_conditional_register_usage): Don't\nmark disabled registers as call used.\n(ix86_no_callee_saved_abi): New function.\n(ix86_no_caller_saved_abi_void): Likewise.\n(ix86_no_caller_saved_abi_ax): Likewise.\n(ix86_no_caller_saved_abi_ax_dx): Likewise.\n(ix86_no_caller_saved_abi_xmm0): Likewise.\n(ix86_no_caller_saved_abi_xmm0_xmm1): Likewise.\n(ix86_fntype_abi): Likewise.\n(ix86_hard_regno_call_part_clobbered): Handle newly added ABIs.\n(TARGET_FNTYPE_ABI): New.\n* config/i386/i386.md: Add ABI_NO_CALLEE_SAVED,\nABI_NO_CALLER_SAVED_RETURN_VOID, ABI_NO_CALLER_SAVED_RETURN_AX,\nABI_NO_CALLER_SAVED_RETURN_AX_DX, ABI_NO_CALLER_SAVED_RETURN_XMM0\nand ABI_NO_CALLER_SAVED_RETURN_XMM0_XMM1.\n\ngcc/testsuite/\n\nPR target/124798\n* gcc.target/i386/no-callee-saved-2.c: Check frame register isn't\nsaved or restored in 64-bit mode.\n* gcc.target/i386/preserve-none-7.c: Likewise.\n* gcc.target/i386/no-caller-saved-1.c: New test.\n* gcc.target/i386/no-caller-saved-2.c: Likewise.\n* gcc.target/i386/no-caller-saved-3.c: Likewise.\n* gcc.target/i386/no-caller-saved-4.c: Likewise.\n* gcc.target/i386/no-caller-saved-5.c: Likewise.\n* gcc.target/i386/no-caller-saved-6.c: Likewise.\n* gcc.target/i386/no-caller-saved-7.c: Likewise.",
    "diff": "From f0d2b28e80fc35f100a25d4da51982c1b8a733d6 Mon Sep 17 00:00:00 2001\nFrom: \"H.J. Lu\" <hjl.tools@gmail.com>\nDate: Tue, 14 Apr 2026 18:37:20 +0800\nSubject: [PATCH] x86: Implement TARGET_FNTYPE_ABI\n\nImplement TARGET_FNTYPE_ABI to avoid spills of callee-saved registers\nwhen calling functions with no_caller_saved_registers attribute.\n\n1. For functions with no_callee_saved_registers attribute, frame register\nis preserved to mitigate PR target/114116.  MMX and x87 registers are\npreserved if MMX and x87 aren't enabled.\n2. For functions with no_caller_saved_registers attribute, MMX and x87\nregisters aren't preserved since saving and restoring registers doesn't\ninclude MMX nor x87 registers.\n3. Don't mark disabled registers as call used.\n\ngcc/\n\n\tPR target/124798\n\t* config/i386/i386.cc (ix86_conditional_register_usage): Don't\n\tmark disabled registers as call used.\n\t(ix86_no_callee_saved_abi): New function.\n\t(ix86_no_caller_saved_abi_void): Likewise.\n\t(ix86_no_caller_saved_abi_ax): Likewise.\n\t(ix86_no_caller_saved_abi_ax_dx): Likewise.\n\t(ix86_no_caller_saved_abi_xmm0): Likewise.\n\t(ix86_no_caller_saved_abi_xmm0_xmm1): Likewise.\n\t(ix86_fntype_abi): Likewise.\n\t(ix86_hard_regno_call_part_clobbered): Handle newly added ABIs.\n\t(TARGET_FNTYPE_ABI): New.\n\t* config/i386/i386.md: Add ABI_NO_CALLEE_SAVED,\n\tABI_NO_CALLER_SAVED_RETURN_VOID, ABI_NO_CALLER_SAVED_RETURN_AX,\n\tABI_NO_CALLER_SAVED_RETURN_AX_DX, ABI_NO_CALLER_SAVED_RETURN_XMM0\n\tand ABI_NO_CALLER_SAVED_RETURN_XMM0_XMM1.\n\ngcc/testsuite/\n\n\tPR target/124798\n\t* gcc.target/i386/no-callee-saved-2.c: Check frame register isn't\n\tsaved or restored in 64-bit mode.\n\t* gcc.target/i386/preserve-none-7.c: Likewise.\n\t* gcc.target/i386/no-caller-saved-1.c: New test.\n\t* gcc.target/i386/no-caller-saved-2.c: Likewise.\n\t* gcc.target/i386/no-caller-saved-3.c: Likewise.\n\t* gcc.target/i386/no-caller-saved-4.c: Likewise.\n\t* gcc.target/i386/no-caller-saved-5.c: Likewise.\n\t* gcc.target/i386/no-caller-saved-6.c: Likewise.\n\t* gcc.target/i386/no-caller-saved-7.c: Likewise.\n\nSigned-off-by: H.J. Lu <hjl.tools@gmail.com>\n---\n gcc/config/i386/i386.cc                       | 249 +++++++++++++++++-\n gcc/config/i386/i386.md                       |  18 +-\n .../gcc.target/i386/no-callee-saved-2.c       |  10 +-\n .../gcc.target/i386/no-caller-saved-1.c       |  46 ++++\n .../gcc.target/i386/no-caller-saved-2.c       |  45 ++++\n .../gcc.target/i386/no-caller-saved-3.c       |  44 ++++\n .../gcc.target/i386/no-caller-saved-4.c       |  44 ++++\n .../gcc.target/i386/no-caller-saved-5.c       |  34 +++\n .../gcc.target/i386/no-caller-saved-6.c       |  34 +++\n .../gcc.target/i386/no-caller-saved-7.c       |  49 ++++\n .../gcc.target/i386/preserve-none-7.c         |  10 +-\n 11 files changed, 572 insertions(+), 11 deletions(-)\n create mode 100644 gcc/testsuite/gcc.target/i386/no-caller-saved-1.c\n create mode 100644 gcc/testsuite/gcc.target/i386/no-caller-saved-2.c\n create mode 100644 gcc/testsuite/gcc.target/i386/no-caller-saved-3.c\n create mode 100644 gcc/testsuite/gcc.target/i386/no-caller-saved-4.c\n create mode 100644 gcc/testsuite/gcc.target/i386/no-caller-saved-5.c\n create mode 100644 gcc/testsuite/gcc.target/i386/no-caller-saved-6.c\n create mode 100644 gcc/testsuite/gcc.target/i386/no-caller-saved-7.c\n\ndiff --git a/gcc/config/i386/i386.cc b/gcc/config/i386/i386.cc\nindex 01715f84e8a..428394985a1 100644\n--- a/gcc/config/i386/i386.cc\n+++ b/gcc/config/i386/i386.cc\n@@ -571,6 +571,11 @@ ix86_conditional_register_usage (void)\n       for (i = FIRST_REX2_INT_REG; i <= LAST_REX2_INT_REG; i++)\n \tCLEAR_HARD_REG_BIT (accessible_reg_set, i);\n     }\n+\n+  /* If a register is disabled, it can't be used for call.  */\n+  for (i = 0; i < FIRST_PSEUDO_REGISTER; i++)\n+    if (!TEST_HARD_REG_BIT (accessible_reg_set, i))\n+      call_used_regs[i] = 0;\n }\n \n /* Canonicalize a comparison from one we don't have to one we do have.  */\n@@ -21719,6 +21724,214 @@ ix86_hard_regno_mode_ok (unsigned int regno, machine_mode mode)\n   return false;\n }\n \n+/* Return the descriptor of no_callee_saved_registers function type.\n+   None of registers are preserved, except for frame register to\n+   mitigate PR target/114116.  MMX and x87 registers are preserved\n+   if MMX and x87 aren't enabled.  */\n+\n+static const predefined_function_abi &\n+ix86_no_callee_saved_abi (void)\n+{\n+  auto &no_callee_saved_abi = function_abis[ABI_NO_CALLEE_SAVED];\n+  if (!no_callee_saved_abi.initialized_p ())\n+    {\n+      HARD_REG_SET full_reg_clobbers = reg_class_contents[ALL_REGS];\n+      CLEAR_HARD_REG_BIT (full_reg_clobbers, HARD_FRAME_POINTER_REGNUM);\n+      for (int i = 0; i < FIRST_PSEUDO_REGISTER; i++)\n+\tif ((!TARGET_80387 && STACK_REGNO_P (i))\n+\t    || (!TARGET_MMX && MMX_REGNO_P (i)))\n+\t  CLEAR_HARD_REG_BIT (full_reg_clobbers, i);\n+      no_callee_saved_abi.initialize (ABI_NO_CALLEE_SAVED,\n+\t\t\t\t      full_reg_clobbers);\n+    }\n+  return no_callee_saved_abi;\n+}\n+\n+/* Return the descriptor of no_caller_saved_registers function type.\n+   All registers are preserved, except for MMX and x87 registers\n+   which aren't supported when saving and restoring registers.  */\n+\n+static const predefined_function_abi &\n+ix86_no_caller_saved_abi_void (void)\n+{\n+  auto &no_caller_saved_abi\n+    = function_abis[ABI_NO_CALLER_SAVED_RETURN_VOID];\n+  if (!no_caller_saved_abi.initialized_p ())\n+    {\n+      HARD_REG_SET full_reg_clobbers = {};\n+      for (int i = 0; i < FIRST_PSEUDO_REGISTER; i++)\n+\tif ((TARGET_80387 && STACK_REGNO_P (i))\n+\t    || (TARGET_MMX && MMX_REGNO_P (i)))\n+\t  SET_HARD_REG_BIT (full_reg_clobbers, i);\n+      no_caller_saved_abi.initialize\n+\t(ABI_NO_CALLER_SAVED_RETURN_VOID, full_reg_clobbers);\n+    }\n+  return no_caller_saved_abi;\n+}\n+\n+/* Return the descriptor of no_caller_saved_registers function type.\n+   All registers are preserved, except for AX used for return value,\n+   MMX and x87 registers which aren't supported when saving and\n+   restoring registers.  */\n+\n+static const predefined_function_abi &\n+ix86_no_caller_saved_abi_ax (void)\n+{\n+  auto &no_caller_saved_abi\n+    = function_abis[ABI_NO_CALLER_SAVED_RETURN_AX];\n+  if (!no_caller_saved_abi.initialized_p ())\n+    {\n+      HARD_REG_SET full_reg_clobbers = {};\n+      for (int i = 0; i < FIRST_PSEUDO_REGISTER; i++)\n+\tif (i == AX_REG\n+\t    || (TARGET_80387 && STACK_REGNO_P (i))\n+\t    || (TARGET_MMX && MMX_REGNO_P (i)))\n+\t  SET_HARD_REG_BIT (full_reg_clobbers, i);\n+      no_caller_saved_abi.initialize\n+\t(ABI_NO_CALLER_SAVED_RETURN_AX, full_reg_clobbers);\n+    }\n+  return no_caller_saved_abi;\n+}\n+\n+/* Return the descriptor of no_caller_saved_registers function type.\n+   All registers are preserved, except for AX/DX used for return value,\n+   MMX and x87 registers which aren't supported when saving and\n+   restoring registers.  */\n+\n+static const predefined_function_abi &\n+ix86_no_caller_saved_abi_ax_dx (void)\n+{\n+  auto &no_caller_saved_abi\n+    = function_abis[ABI_NO_CALLER_SAVED_RETURN_AX_DX];\n+  if (!no_caller_saved_abi.initialized_p ())\n+    {\n+      HARD_REG_SET full_reg_clobbers = {};\n+      for (int i = 0; i < FIRST_PSEUDO_REGISTER; i++)\n+\tif (i == AX_REG\n+\t    || i == DX_REG\n+\t    || (TARGET_80387 && STACK_REGNO_P (i))\n+\t    || (TARGET_MMX && MMX_REGNO_P (i)))\n+\t  SET_HARD_REG_BIT (full_reg_clobbers, i);\n+      no_caller_saved_abi.initialize\n+\t(ABI_NO_CALLER_SAVED_RETURN_AX_DX, full_reg_clobbers);\n+    }\n+  return no_caller_saved_abi;\n+}\n+\n+/* Return the descriptor of no_caller_saved_registers function type.\n+   All registers are preserved, except for XMM0 used for return value,\n+   MMX and x87 registers which aren't supported when saving and\n+   restoring registers.  */\n+\n+static const predefined_function_abi &\n+ix86_no_caller_saved_abi_xmm0 (void)\n+{\n+  auto &no_caller_saved_abi\n+    = function_abis[ABI_NO_CALLER_SAVED_RETURN_XMM0];\n+  if (!no_caller_saved_abi.initialized_p ())\n+    {\n+      HARD_REG_SET full_reg_clobbers = {};\n+      for (int i = 0; i < FIRST_PSEUDO_REGISTER; i++)\n+\tif (i == XMM0_REG\n+\t    || (TARGET_80387 && STACK_REGNO_P (i))\n+\t    || (TARGET_MMX && MMX_REGNO_P (i)))\n+\t  SET_HARD_REG_BIT (full_reg_clobbers, i);\n+      no_caller_saved_abi.initialize\n+\t(ABI_NO_CALLER_SAVED_RETURN_XMM0, full_reg_clobbers);\n+    }\n+  return no_caller_saved_abi;\n+}\n+\n+/* Return the descriptor of no_caller_saved_registers function type.\n+   All registers are preserved, except for XMM0/XMM1 used for return\n+   value, MMX and x87 registers which aren't supported when saving and\n+   restoring registers.  */\n+\n+static const predefined_function_abi &\n+ix86_no_caller_saved_abi_xmm0_xmm1 (void)\n+{\n+  auto &no_caller_saved_abi\n+    = function_abis[ABI_NO_CALLER_SAVED_RETURN_XMM0_XMM1];\n+  if (!no_caller_saved_abi.initialized_p ())\n+    {\n+      HARD_REG_SET full_reg_clobbers = {};\n+      for (int i = 0; i < FIRST_PSEUDO_REGISTER; i++)\n+\tif (i == XMM0_REG\n+\t    || i == XMM1_REG\n+\t    || (TARGET_80387 && STACK_REGNO_P (i))\n+\t    || (TARGET_MMX && MMX_REGNO_P (i)))\n+\t  SET_HARD_REG_BIT (full_reg_clobbers, i);\n+      no_caller_saved_abi.initialize\n+\t(ABI_NO_CALLER_SAVED_RETURN_XMM0_XMM1, full_reg_clobbers);\n+    }\n+  return no_caller_saved_abi;\n+}\n+\n+/* Implement TARGET_FNTYPE_ABI.  */\n+\n+static const predefined_function_abi &\n+ix86_fntype_abi (const_tree fntype)\n+{\n+  if (lookup_attribute (\"no_callee_saved_registers\",\n+\t\t\tTYPE_ATTRIBUTES (fntype))\n+      || lookup_attribute (\"no_callee_saved_registers\",\n+\t\t\t   TYPE_ATTRIBUTES (fntype)))\n+    return ix86_no_callee_saved_abi ();\n+\n+  if (lookup_attribute (\"no_caller_saved_registers\",\n+\t\t\tTYPE_ATTRIBUTES (fntype)))\n+    {\n+      tree type = TREE_TYPE (fntype);\n+      if (VOID_TYPE_P (type))\n+\treturn ix86_no_caller_saved_abi_void ();\n+      /* AX register contains the address of the return value location\n+\t passed in by the caller.  */\n+      else if (ix86_return_in_memory (type, fntype))\n+\treturn ix86_no_caller_saved_abi_ax ();\n+      rtx ret = ix86_function_value (type, fntype, false);\n+      unsigned int nregs;\n+      if (REG_P (ret))\n+\t{\n+\t  unsigned int regno = REGNO (ret);\n+\t  if (STACK_REGNO_P (regno) || MMX_REGNO_P (regno))\n+\t    return ix86_no_caller_saved_abi_void ();\n+\t  else\n+\t    switch (regno)\n+\t      {\n+\t      case AX_REG:\n+\t\tnregs = REG_NREGS (ret);\n+\t\tif (nregs == 1)\n+\t\t  return ix86_no_caller_saved_abi_ax ();\n+\t\telse if (nregs == 2)\n+\t\t  return ix86_no_caller_saved_abi_ax_dx ();\n+\t\tbreak;\n+\t      case XMM0_REG:\n+\t\treturn ix86_no_caller_saved_abi_xmm0 ();\n+\t      }\n+\t}\n+      else if (GET_CODE (ret) == PARALLEL && XVECLEN (ret, 0) == 2)\n+\t{\n+\t  rtx x0 = XVECEXP (ret, 0, 0);\n+\t  rtx x1 = XVECEXP (ret, 0, 1);\n+\t  if (GET_CODE (x0) == EXPR_LIST\n+\t      && GET_CODE (x1) == EXPR_LIST)\n+\t    {\n+\t      x0 = XEXP (x0, 0);\n+\t      x1 = XEXP (x1, 0);\n+\t      if (REG_P (x0)\n+\t\t  && REGNO (x0) == XMM0_REG\n+\t\t  && REG_P (x1)\n+\t\t  && REGNO (x1) == XMM1_REG)\n+\t\treturn ix86_no_caller_saved_abi_xmm0_xmm1 ();\n+\t    }\n+\t}\n+\n+      gcc_unreachable ();\n+    }\n+\n+  return default_function_abi;\n+}\n+\n /* Implement TARGET_INSN_CALLEE_ABI.  */\n \n const predefined_function_abi &\n@@ -21769,12 +21982,41 @@ static bool\n ix86_hard_regno_call_part_clobbered (unsigned int abi_id, unsigned int regno,\n \t\t\t\t     machine_mode mode)\n {\n-  /* Special ABI for vzeroupper which only clobber higher part of sse regs.  */\n-  if (abi_id == ABI_VZEROUPPER)\n+  switch (abi_id)\n+    {\n+    case ABI_VZEROUPPER:\n+      /* Special ABI for vzeroupper which only clobbers higher part of\n+\t SSE registers.  */\n       return (GET_MODE_SIZE (mode) > 16\n \t      && ((TARGET_64BIT && REX_SSE_REGNO_P (regno))\n \t\t  || LEGACY_SSE_REGNO_P (regno)));\n \n+    case ABI_DEFAULT:\n+    case ABI_NO_CALLEE_SAVED:\n+      break;\n+\n+    case ABI_NO_CALLER_SAVED_RETURN_VOID:\n+    case ABI_NO_CALLER_SAVED_RETURN_AX:\n+    case ABI_NO_CALLER_SAVED_RETURN_AX_DX:\n+      /* These ABIs don't clobber SSE registers.  */\n+      return false;\n+\n+    case ABI_NO_CALLER_SAVED_RETURN_XMM0:\n+      /* This ABI only clobbers XMM0.  */\n+      if (regno != XMM0_REG)\n+\treturn false;\n+      break;\n+\n+    case ABI_NO_CALLER_SAVED_RETURN_XMM0_XMM1:\n+      /* This ABI only clobbers XMM0 and XMM1.  */\n+      if (regno != XMM0_REG && regno != XMM1_REG)\n+\treturn false;\n+      break;\n+\n+    default:\n+      gcc_unreachable ();\n+    }\n+\n   return SSE_REGNO_P (regno) && GET_MODE_SIZE (mode) > 16;\n }\n \n@@ -28642,6 +28884,9 @@ ix86_libgcc_floating_mode_supported_p\n #define TARGET_HARD_REGNO_CALL_PART_CLOBBERED \\\n   ix86_hard_regno_call_part_clobbered\n \n+#undef TARGET_FNTYPE_ABI\n+#define TARGET_FNTYPE_ABI ix86_fntype_abi\n+\n #undef TARGET_INSN_CALLEE_ABI\n #define TARGET_INSN_CALLEE_ABI ix86_insn_callee_abi\n \ndiff --git a/gcc/config/i386/i386.md b/gcc/config/i386/i386.md\nindex c67b1c7183e..65367ea922d 100644\n--- a/gcc/config/i386/i386.md\n+++ b/gcc/config/i386/i386.md\n@@ -515,7 +515,23 @@ (define_constants\n (define_constants\n   [(ABI_DEFAULT\t\t0)\n    (ABI_VZEROUPPER\t1)\n-   (ABI_UNKNOWN\t\t2)])\n+   (ABI_NO_CALLEE_SAVED 2)\n+   ;; Return void.\n+   (ABI_NO_CALLER_SAVED_RETURN_VOID 3)\n+   ;; Return char, short, int in 32-bit/64-bit.\n+   ;; Return int64 and _Complex int in 64-bit.\n+   ;; Return _Complex float in MS 32-bit/64-bit.\n+   (ABI_NO_CALLER_SAVED_RETURN_AX 4)\n+   ;; Return int64 and _Complex int in 32-bit.\n+   ;; Return _Complex int64 in 64-bit.\n+   (ABI_NO_CALLER_SAVED_RETURN_AX_DX 5)\n+   ;; Return float and double in 64-bit.\n+   ;; Return _Complex float in SYSV 64-bit.\n+   ;; Return int28, _Complex double in MS 64-bit.\n+   (ABI_NO_CALLER_SAVED_RETURN_XMM0 6)\n+   ;; Return _Complex double in SYSV 64-bit.\n+   (ABI_NO_CALLER_SAVED_RETURN_XMM0_XMM1 7)\n+   (ABI_UNKNOWN\t\t8)])\n \n ;; Insns whose names begin with \"x86_\" are emitted by gen_FOO calls\n ;; from i386.cc.\ndiff --git a/gcc/testsuite/gcc.target/i386/no-callee-saved-2.c b/gcc/testsuite/gcc.target/i386/no-callee-saved-2.c\nindex e074ca51df4..86864ea9bff 100644\n--- a/gcc/testsuite/gcc.target/i386/no-callee-saved-2.c\n+++ b/gcc/testsuite/gcc.target/i386/no-callee-saved-2.c\n@@ -26,7 +26,9 @@ foo (void *frame)\n   }\n }\n \n-/* { dg-final { scan-assembler-times \"push(?:l|q)\\[\\\\t \\]*%(?:e|r)bp\" 1 } } */\n-/* { dg-final { scan-assembler-times \"pop(?:l|q)\\[\\\\t \\]*%(?:e|r)bp\" 1 } } */\n-/* { dg-final { scan-assembler-times \"push(?:l|q)\\[\\\\t \\]*\" 1 } } */\n-/* { dg-final { scan-assembler-times \"pop(?:l|q)\\[\\\\t \\]*\" 1 } } */\n+/* { dg-final { scan-assembler-times \"push(?:l|q)\\[\\\\t \\]*%(?:e|r)bp\" 1 { target ia32 } } } */\n+/* { dg-final { scan-assembler-times \"pop(?:l|q)\\[\\\\t \\]*%(?:e|r)bp\" 1 { target ia32 } } } */\n+/* { dg-final { scan-assembler-times \"push(?:l|q)\\[\\\\t \\]*\" 1 { target ia32 } } } */\n+/* { dg-final { scan-assembler-times \"pop(?:l|q)\\[\\\\t \\]*\" 1 { target ia32 } } } */\n+/* { dg-final { scan-assembler-not \"push(?:l|q)\\[\\\\t \\]*\" { target { ! ia32 } } } } */\n+/* { dg-final { scan-assembler-not \"pop(?:l|q)\\[\\\\t \\]*\" { target { ! ia32 } } } } */\ndiff --git a/gcc/testsuite/gcc.target/i386/no-caller-saved-1.c b/gcc/testsuite/gcc.target/i386/no-caller-saved-1.c\nnew file mode 100644\nindex 00000000000..e675f4327cb\n--- /dev/null\n+++ b/gcc/testsuite/gcc.target/i386/no-caller-saved-1.c\n@@ -0,0 +1,46 @@\n+/* PR target/124798  */\n+/* { dg-do compile } */\n+/* { dg-options \"-O2 -mtune=corei7 -mtune-ctrl=^prologue_using_move,^epilogue_using_move -fomit-frame-pointer\" } */\n+\n+[[gnu::no_caller_saved_registers]] extern void foo (void);\n+\n+void\n+qux (void)\n+{\n+  int a, b, c, d, e, f;\n+  asm volatile (\"# %0 %1 %2 %3 %4 %5\"\n+\t\t: \"=r\" (a), \"=r\" (b), \"=r\" (c), \"=r\" (d), \"=r\" (e), \"=r\" (f));\n+#ifdef __x86_64__\n+  int g, h, i, j, k, l, m, n, o, p;\n+  asm volatile (\"# %0 %1\"\n+\t\t: \"=r\" (g), \"=r\" (h));\n+  asm volatile (\"# %0 %1 %2 %3 %4 %5 %6 %7\"\n+\t\t: \"=r\" (i), \"=r\" (j), \"=r\" (k), \"=r\" (l), \"=r\" (m), \"=r\" (n), \"=r\" (o), \"=r\" (p));\n+#endif\n+  foo ();\n+  asm volatile (\"# %0 %1 %2 %3 %4 %5\"\n+\t\t:: \"r\" (a), \"r\" (b), \"r\" (c), \"r\" (d), \"r\" (e), \"r\" (f));\n+#ifdef __x86_64__\n+  asm volatile (\"# %0 %1\"\n+\t\t:: \"r\" (g), \"r\" (h));\n+  asm volatile (\"# %0 %1 %2 %3 %4 %5 %6 %7\"\n+\t\t: : \"r\" (i), \"r\" (j), \"r\" (k), \"r\" (l), \"r\" (m), \"r\" (n), \"r\" (o), \"r\" (p));\n+#endif\n+}\n+\n+/* { dg-final { scan-assembler-not \"mov(l|q)\\[ \\\\t\\]+%edx, \\[0-9\\]*\\\\(%\\[re\\]?sp\\\\)\" } } */\n+/* { dg-final { scan-assembler-not \"mov(l|q)\\[ \\\\t\\]+%ecx, \\[0-9\\]*\\\\(%\\[re\\]?sp\\\\)\" } } */\n+/* { dg-final { scan-assembler-not \"mov(l|q)\\[ \\\\t\\]+%esi, \\[0-9\\]*\\\\(%\\[re\\]?sp\\\\)\" } } */\n+/* { dg-final { scan-assembler-not \"mov(l|q)\\[ \\\\t\\]+%edi, \\[0-9\\]*\\\\(%\\[re\\]?sp\\\\)\" } } */\n+/* { dg-final { scan-assembler-not \"mov(l|q)\\[ \\\\t\\]+\\[0-9\\]*\\\\(%\\[re\\]?sp\\\\), %edx\" } } */\n+/* { dg-final { scan-assembler-not \"mov(l|q)\\[ \\\\t\\]+\\[0-9\\]*\\\\(%\\[re\\]?sp\\\\), %ecx\" } } */\n+/* { dg-final { scan-assembler-not \"mov(l|q)\\[ \\\\t\\]+\\[0-9\\]*\\\\(%\\[re\\]?sp\\\\), %esi\" } } */\n+/* { dg-final { scan-assembler-not \"mov(l|q)\\[ \\\\t\\]+\\[0-9\\]*\\\\(%\\[re\\]?sp\\\\), %edi\" } } */\n+/* { dg-final { scan-assembler-not \"mov(l|q)\\[ \\\\t\\]+%r8d, \\[0-9\\]*\\\\(%\\[re\\]?sp\\\\)\" { target { ! ia32 } } } } */\n+/* { dg-final { scan-assembler-not \"mov(l|q)\\[ \\\\t\\]+%r9d, \\[0-9\\]*\\\\(%\\[re\\]?sp\\\\)\" { target { ! ia32 } } } } */\n+/* { dg-final { scan-assembler-not \"mov(l|q)\\[ \\\\t\\]+%r10d, \\[0-9\\]*\\\\(%\\[re\\]?sp\\\\)\" { target { ! ia32 } } } } */\n+/* { dg-final { scan-assembler-not \"mov(l|q)\\[ \\\\t\\]+%r11d, \\[0-9\\]*\\\\(%\\[re\\]?sp\\\\)\" { target { ! ia32 } } } } */\n+/* { dg-final { scan-assembler-not \"mov(l|q)\\[ \\\\t\\]+\\[0-9\\]*\\\\(%\\[re\\]?sp\\\\), %r8d\" { target { ! ia32 } } } } */\n+/* { dg-final { scan-assembler-not \"mov(l|q)\\[ \\\\t\\]+\\[0-9\\]*\\\\(%\\[re\\]?sp\\\\), %r9d\" { target { ! ia32 } } } } */\n+/* { dg-final { scan-assembler-not \"mov(l|q)\\[ \\\\t\\]+\\[0-9\\]*\\\\(%\\[re\\]?sp\\\\), %r10d\" { target { ! ia32 } } } } */\n+/* { dg-final { scan-assembler-not \"mov(l|q)\\[ \\\\t\\]+\\[0-9\\]*\\\\(%\\[re\\]?sp\\\\), %r11d\" { target { ! ia32 } } } } */\ndiff --git a/gcc/testsuite/gcc.target/i386/no-caller-saved-2.c b/gcc/testsuite/gcc.target/i386/no-caller-saved-2.c\nnew file mode 100644\nindex 00000000000..0a7e443b3db\n--- /dev/null\n+++ b/gcc/testsuite/gcc.target/i386/no-caller-saved-2.c\n@@ -0,0 +1,45 @@\n+/* PR target/124798  */\n+/* { dg-do compile } */\n+/* { dg-options \"-O2 -mtune=corei7 -mtune-ctrl=^prologue_using_move,^epilogue_using_move -fomit-frame-pointer\" } */\n+\n+[[gnu::no_caller_saved_registers]] extern int foo (void);\n+\n+int\n+qux (void)\n+{\n+  int a, b, c, d, e, f;\n+  asm volatile (\"# %0 %1 %2 %3 %4 %5\"\n+\t\t: \"=r\" (a), \"=r\" (b), \"=r\" (c), \"=r\" (d), \"=r\" (e), \"=r\" (f));\n+#ifdef __x86_64__\n+  int g, h, i, j, k, l, m, n, o, p;\n+  asm volatile (\"# %0 %1\"\n+\t\t: \"=r\" (g), \"=r\" (h));\n+  asm volatile (\"# %0 %1 %2 %3 %4 %5 %6 %7\"\n+\t\t: \"=r\" (i), \"=r\" (j), \"=r\" (k), \"=r\" (l), \"=r\" (m), \"=r\" (n), \"=r\" (o), \"=r\" (p));\n+#endif\n+  int ret = foo ();\n+  asm volatile (\"# %0 %1 %2 %3 %4 %5\"\n+\t\t:: \"r\" (a), \"r\" (b), \"r\" (c), \"r\" (d), \"r\" (e), \"r\" (f));\n+#ifdef __x86_64__\n+  asm volatile (\"# %0 %1\"\n+\t\t:: \"r\" (g), \"r\" (h));\n+  asm volatile (\"# %0 %1 %2 %3 %4 %5 %6 %7\"\n+\t\t: : \"r\" (i), \"r\" (j), \"r\" (k), \"r\" (l), \"r\" (m), \"r\" (n), \"r\" (o), \"r\" (p));\n+#endif\n+\n+  return ret;\n+}\n+\n+/* { dg-final { scan-assembler-not \"mov(l|q)\\[ \\\\t\\]+%ecx, \\[0-9\\]*\\\\(%\\[re\\]?sp\\\\)\" } } */\n+/* { dg-final { scan-assembler-not \"mov(l|q)\\[ \\\\t\\]+%esi, \\[0-9\\]*\\\\(%\\[re\\]?sp\\\\)\" } } */\n+/* { dg-final { scan-assembler-not \"mov(l|q)\\[ \\\\t\\]+%edi, \\[0-9\\]*\\\\(%\\[re\\]?sp\\\\)\" } } */\n+/* { dg-final { scan-assembler-not \"mov(l|q)\\[ \\\\t\\]+\\[0-9\\]*\\\\(%\\[re\\]?sp\\\\), %ecx\" } } */\n+/* { dg-final { scan-assembler-not \"mov(l|q)\\[ \\\\t\\]+\\[0-9\\]*\\\\(%\\[re\\]?sp\\\\), %esi\" } } */\n+/* { dg-final { scan-assembler-not \"mov(l|q)\\[ \\\\t\\]+\\[0-9\\]*\\\\(%\\[re\\]?sp\\\\), %edi\" } } */\n+/* { dg-final { scan-assembler-not \"mov(l|q)\\[ \\\\t\\]+%r8d, \\[0-9\\]*\\\\(%\\[re\\]?sp\\\\)\" { target { ! ia32 } } } } */\n+/* { dg-final { scan-assembler-not \"mov(l|q)\\[ \\\\t\\]+%r9d, \\[0-9\\]*\\\\(%\\[re\\]?sp\\\\)\" { target { ! ia32 } } } } */\n+/* { dg-final { scan-assembler-not \"mov(l|q)\\[ \\\\t\\]+%r10d, \\[0-9\\]*\\\\(%\\[re\\]?sp\\\\)\" { target { ! ia32 } } } } */\n+/* { dg-final { scan-assembler-not \"mov(l|q)\\[ \\\\t\\]+%r11d, \\[0-9\\]*\\\\(%\\[re\\]?sp\\\\)\" { target { ! ia32 } } } } */\n+/* { dg-final { scan-assembler-not \"mov(l|q)\\[ \\\\t\\]+\\[0-9\\]*\\\\(%\\[re\\]?sp\\\\), %r8d\" { target { ! ia32 } } } } */\n+/* { dg-final { scan-assembler-not \"mov(l|q)\\[ \\\\t\\]+\\[0-9\\]*\\\\(%\\[re\\]?sp\\\\), %r9d\" { target { ! ia32 } } } } */\n+/* { dg-final { scan-assembler-not \"mov(l|q)\\[ \\\\t\\]+\\[0-9\\]*\\\\(%\\[re\\]?sp\\\\), %r11d\" { target { ! ia32 } } } } */\ndiff --git a/gcc/testsuite/gcc.target/i386/no-caller-saved-3.c b/gcc/testsuite/gcc.target/i386/no-caller-saved-3.c\nnew file mode 100644\nindex 00000000000..e940ee85cfe\n--- /dev/null\n+++ b/gcc/testsuite/gcc.target/i386/no-caller-saved-3.c\n@@ -0,0 +1,44 @@\n+/* PR target/124798  */\n+/* { dg-do compile } */\n+/* { dg-options \"-O2 -mtune=corei7 -mtune-ctrl=^prologue_using_move,^epilogue_using_move -fomit-frame-pointer\" } */\n+\n+[[gnu::no_caller_saved_registers]] extern long long foo (void);\n+\n+long long\n+qux (void)\n+{\n+  int a, b, c, d, e, f;\n+  asm volatile (\"# %0 %1 %2 %3 %4 %5\"\n+\t\t: \"=r\" (a), \"=r\" (b), \"=r\" (c), \"=r\" (d), \"=r\" (e), \"=r\" (f));\n+#ifdef __x86_64__\n+  int g, h, i, j, k, l, m, n;\n+  asm volatile (\"# %0 %1 %2 %3 %4 %5 %6 %7\"\n+\t\t: \"=r\" (g), \"=r\" (h), \"=r\" (i), \"=r\" (j), \"=r\" (k), \"=r\" (l), \"=r\" (m), \"=r\" (n));\n+#endif\n+  long long ret = foo ();\n+  asm volatile (\"# %0 %1 %2 %3 %4 %5\"\n+\t\t:: \"r\" (a), \"r\" (b), \"r\" (c), \"r\" (d), \"r\" (e), \"r\" (f));\n+#ifdef __x86_64__\n+  asm volatile (\"# %0 %1 %2 %3 %4 %5 %6 %7\"\n+\t\t: : \"r\" (g), \"r\" (h), \"r\" (i), \"r\" (j), \"r\" (k), \"r\" (l), \"r\" (m), \"r\" (n));\n+#endif\n+\n+  return ret;\n+}\n+\n+/* { dg-final { scan-assembler-not \"mov(l|q)\\[ \\\\t\\]+%ecx, \\[0-9\\]*\\\\(%\\[re\\]?sp\\\\)\" } } */\n+/* { dg-final { scan-assembler-not \"mov(l|q)\\[ \\\\t\\]+%esi, \\[0-9\\]*\\\\(%\\[re\\]?sp\\\\)\" } } */\n+/* { dg-final { scan-assembler-not \"mov(l|q)\\[ \\\\t\\]+%edi, \\[0-9\\]*\\\\(%\\[re\\]?sp\\\\)\" } } */\n+/* { dg-final { scan-assembler-not \"mov(l|q)\\[ \\\\t\\]+\\[0-9\\]*\\\\(%\\[re\\]?sp\\\\), %ecx\" } } */\n+/* { dg-final { scan-assembler-not \"mov(l|q)\\[ \\\\t\\]+\\[0-9\\]*\\\\(%\\[re\\]?sp\\\\), %esi\" } } */\n+/* { dg-final { scan-assembler-not \"mov(l|q)\\[ \\\\t\\]+\\[0-9\\]*\\\\(%\\[re\\]?sp\\\\), %edi\" } } */\n+/* { dg-final { scan-assembler-not \"mov(l|q)\\[ \\\\t\\]+%edx, \\[0-9\\]*\\\\(%\\[re\\]?sp\\\\)\" { target { ! ia32 } } } } */\n+/* { dg-final { scan-assembler-not \"mov(l|q)\\[ \\\\t\\]+%r8d, \\[0-9\\]*\\\\(%\\[re\\]?sp\\\\)\" { target { ! ia32 } } } } */\n+/* { dg-final { scan-assembler-not \"mov(l|q)\\[ \\\\t\\]+%r9d, \\[0-9\\]*\\\\(%\\[re\\]?sp\\\\)\" { target { ! ia32 } } } } */\n+/* { dg-final { scan-assembler-not \"mov(l|q)\\[ \\\\t\\]+%r10d, \\[0-9\\]*\\\\(%\\[re\\]?sp\\\\)\" { target { ! ia32 } } } } */\n+/* { dg-final { scan-assembler-not \"mov(l|q)\\[ \\\\t\\]+%r11d, \\[0-9\\]*\\\\(%\\[re\\]?sp\\\\)\" { target { ! ia32 } } } } */\n+/* { dg-final { scan-assembler-not \"mov(l|q)\\[ \\\\t\\]+\\[0-9\\]*\\\\(%\\[re\\]?sp\\\\), %edx\" { target { ! ia32 } } } } */\n+/* { dg-final { scan-assembler-not \"mov(l|q)\\[ \\\\t\\]+\\[0-9\\]*\\\\(%\\[re\\]?sp\\\\), %r8d\" { target { ! ia32 } } } } */\n+/* { dg-final { scan-assembler-not \"mov(l|q)\\[ \\\\t\\]+\\[0-9\\]*\\\\(%\\[re\\]?sp\\\\), %r9d\" { target { ! ia32 } } } } */\n+/* { dg-final { scan-assembler-not \"mov(l|q)\\[ \\\\t\\]+\\[0-9\\]*\\\\(%\\[re\\]?sp\\\\), %r10d\" { target { ! ia32 } } } } */\n+/* { dg-final { scan-assembler-not \"mov(l|q)\\[ \\\\t\\]+\\[0-9\\]*\\\\(%\\[re\\]?sp\\\\), %r11d\" { target { ! ia32 } } } } */\ndiff --git a/gcc/testsuite/gcc.target/i386/no-caller-saved-4.c b/gcc/testsuite/gcc.target/i386/no-caller-saved-4.c\nnew file mode 100644\nindex 00000000000..e52a0cd9c4b\n--- /dev/null\n+++ b/gcc/testsuite/gcc.target/i386/no-caller-saved-4.c\n@@ -0,0 +1,44 @@\n+/* PR target/124798  */\n+/* { dg-do compile { target int128 } } */\n+/* { dg-options \"-O2 -mtune=corei7 -mtune-ctrl=^prologue_using_move,^epilogue_using_move -fomit-frame-pointer\" } */\n+\n+[[gnu::no_caller_saved_registers]] extern __int128 foo (void);\n+\n+__int128\n+qux (void)\n+{\n+  int a, b, c, d, e, f;\n+  asm volatile (\"# %0 %1 %2 %3 %4 %5\"\n+\t\t: \"=r\" (a), \"=r\" (b), \"=r\" (c), \"=r\" (d), \"=r\" (e), \"=r\" (f));\n+#ifdef __x86_64__\n+  int g, h, i, j, k, l, m, n;\n+  asm volatile (\"# %0 %1 %2 %3 %4 %5 %6 %7\"\n+\t\t: \"=r\" (g), \"=r\" (h), \"=r\" (i), \"=r\" (j), \"=r\" (k), \"=r\" (l), \"=r\" (m), \"=r\" (n));\n+#endif\n+  __int128 ret = foo ();\n+  asm volatile (\"# %0 %1 %2 %3 %4 %5\"\n+\t\t:: \"r\" (a), \"r\" (b), \"r\" (c), \"r\" (d), \"r\" (e), \"r\" (f));\n+#ifdef __x86_64__\n+  asm volatile (\"# %0 %1 %2 %3 %4 %5 %6 %7\"\n+\t\t: : \"r\" (g), \"r\" (h), \"r\" (i), \"r\" (j), \"r\" (k), \"r\" (l), \"r\" (m), \"r\" (n));\n+#endif\n+\n+  return ret;\n+}\n+\n+/* { dg-final { scan-assembler-not \"mov(l|q)\\[ \\\\t\\]+%edx, \\[0-9\\]*\\\\(%\\[re\\]?sp\\\\)\" } } */\n+/* { dg-final { scan-assembler-not \"mov(l|q)\\[ \\\\t\\]+%ecx, \\[0-9\\]*\\\\(%\\[re\\]?sp\\\\)\" } } */\n+/* { dg-final { scan-assembler-not \"mov(l|q)\\[ \\\\t\\]+%esi, \\[0-9\\]*\\\\(%\\[re\\]?sp\\\\)\" } } */\n+/* { dg-final { scan-assembler-not \"mov(l|q)\\[ \\\\t\\]+%edi, \\[0-9\\]*\\\\(%\\[re\\]?sp\\\\)\" } } */\n+/* { dg-final { scan-assembler-not \"mov(l|q)\\[ \\\\t\\]+\\[0-9\\]*\\\\(%\\[re\\]?sp\\\\), %edx\" } } */\n+/* { dg-final { scan-assembler-not \"mov(l|q)\\[ \\\\t\\]+\\[0-9\\]*\\\\(%\\[re\\]?sp\\\\), %ecx\" } } */\n+/* { dg-final { scan-assembler-not \"mov(l|q)\\[ \\\\t\\]+\\[0-9\\]*\\\\(%\\[re\\]?sp\\\\), %esi\" } } */\n+/* { dg-final { scan-assembler-not \"mov(l|q)\\[ \\\\t\\]+\\[0-9\\]*\\\\(%\\[re\\]?sp\\\\), %edi\" } } */\n+/* { dg-final { scan-assembler-not \"mov(l|q)\\[ \\\\t\\]+%r8d, \\[0-9\\]*\\\\(%\\[re\\]?sp\\\\)\" { target { ! ia32 } } } } */\n+/* { dg-final { scan-assembler-not \"mov(l|q)\\[ \\\\t\\]+%r9d, \\[0-9\\]*\\\\(%\\[re\\]?sp\\\\)\" { target { ! ia32 } } } } */\n+/* { dg-final { scan-assembler-not \"mov(l|q)\\[ \\\\t\\]+%r10d, \\[0-9\\]*\\\\(%\\[re\\]?sp\\\\)\" { target { ! ia32 } } } } */\n+/* { dg-final { scan-assembler-not \"mov(l|q)\\[ \\\\t\\]+%r11d, \\[0-9\\]*\\\\(%\\[re\\]?sp\\\\)\" { target { ! ia32 } } } } */\n+/* { dg-final { scan-assembler-not \"mov(l|q)\\[ \\\\t\\]+\\[0-9\\]*\\\\(%\\[re\\]?sp\\\\), %r8d\" { target { ! ia32 } } } } */\n+/* { dg-final { scan-assembler-not \"mov(l|q)\\[ \\\\t\\]+\\[0-9\\]*\\\\(%\\[re\\]?sp\\\\), %r9d\" { target { ! ia32 } } } } */\n+/* { dg-final { scan-assembler-not \"mov(l|q)\\[ \\\\t\\]+\\[0-9\\]*\\\\(%\\[re\\]?sp\\\\), %r10d\" { target { ! ia32 } } } } */\n+/* { dg-final { scan-assembler-not \"mov(l|q)\\[ \\\\t\\]+\\[0-9\\]*\\\\(%\\[re\\]?sp\\\\), %r11d\" { target { ! ia32 } } } } */\ndiff --git a/gcc/testsuite/gcc.target/i386/no-caller-saved-5.c b/gcc/testsuite/gcc.target/i386/no-caller-saved-5.c\nnew file mode 100644\nindex 00000000000..98f58fe92f5\n--- /dev/null\n+++ b/gcc/testsuite/gcc.target/i386/no-caller-saved-5.c\n@@ -0,0 +1,34 @@\n+/* PR target/124798  */\n+/* { dg-do compile } */\n+/* { dg-options \"-O2 -mtune=corei7 -msse2 -mtune-ctrl=^prologue_using_move,^epilogue_using_move -fomit-frame-pointer\" } */\n+\n+[[gnu::no_caller_saved_registers]] extern float foo (void);\n+\n+float\n+qux (void)\n+{\n+  float a, b, c, d, e, f;\n+  asm volatile (\"# %0 %1 %2 %3 %4 %5\"\n+\t\t: \"=v\" (a), \"=v\" (b), \"=v\" (c), \"=v\" (d), \"=v\" (e), \"=v\" (f));\n+#ifdef __x86_64__\n+  float g, h, i, j, k, l, m, n, o, p;\n+  asm volatile (\"# %0 %1\"\n+\t\t: \"=v\" (g), \"=v\" (h));\n+  asm volatile (\"# %0 %1 %2 %3 %4 %5 %6 %7\"\n+\t\t: \"=v\" (i), \"=v\" (j), \"=v\" (k), \"=v\" (l), \"=v\" (m), \"=v\" (n), \"=v\" (o), \"=v\" (p));\n+#endif\n+  float ret = foo ();\n+  asm volatile (\"# %0 %1 %2 %3 %4 %5\"\n+\t\t:: \"v\" (a), \"v\" (b), \"v\" (c), \"v\" (d), \"v\" (e), \"v\" (f));\n+#ifdef __x86_64__\n+  asm volatile (\"# %0 %1\"\n+\t\t:: \"v\" (g), \"v\" (h));\n+  asm volatile (\"# %0 %1 %2 %3 %4 %5 %6 %7\"\n+\t\t: : \"v\" (i), \"v\" (j), \"v\" (k), \"v\" (l), \"v\" (m), \"v\" (n), \"v\" (o), \"v\" (p));\n+#endif\n+\n+  return ret;\n+}\n+\n+/* { dg-final { scan-assembler-not \"movss\\[ \\\\t\\]+%xmm\\[0-9\\]+, \\[0-9\\]*\\\\(%\\[re\\]?sp\\\\)\" } } */\n+/* { dg-final { scan-assembler-not \"mov(l|q)\\[ \\\\t\\]+\\[0-9\\]*\\\\(%\\[re\\]?sp\\\\), %xmm\\[0-9\\]+\" } } */\ndiff --git a/gcc/testsuite/gcc.target/i386/no-caller-saved-6.c b/gcc/testsuite/gcc.target/i386/no-caller-saved-6.c\nnew file mode 100644\nindex 00000000000..5eb5b102843\n--- /dev/null\n+++ b/gcc/testsuite/gcc.target/i386/no-caller-saved-6.c\n@@ -0,0 +1,34 @@\n+/* PR target/124798  */\n+/* { dg-do compile } */\n+/* { dg-options \"-O2 -mtune=corei7 -msse2 -mtune-ctrl=^prologue_using_move,^epilogue_using_move -fomit-frame-pointer\" } */\n+\n+[[gnu::no_caller_saved_registers]] extern _Complex double foo (void);\n+\n+_Complex double\n+qux (void)\n+{\n+  double a, b, c, d, e, f;\n+  asm volatile (\"# %0 %1 %2 %3 %4 %5\"\n+\t\t: \"=v\" (a), \"=v\" (b), \"=v\" (c), \"=v\" (d), \"=v\" (e), \"=v\" (f));\n+#ifdef __x86_64__\n+  double g, h, i, j, k, l, m, n, o, p;\n+  asm volatile (\"# %0 %1\"\n+\t\t: \"=v\" (g), \"=v\" (h));\n+  asm volatile (\"# %0 %1 %2 %3 %4 %5 %6 %7\"\n+\t\t: \"=v\" (i), \"=v\" (j), \"=v\" (k), \"=v\" (l), \"=v\" (m), \"=v\" (n), \"=v\" (o), \"=v\" (p));\n+#endif\n+  _Complex double ret = foo ();\n+  asm volatile (\"# %0 %1 %2 %3 %4 %5\"\n+\t\t:: \"v\" (a), \"v\" (b), \"v\" (c), \"v\" (d), \"v\" (e), \"v\" (f));\n+#ifdef __x86_64__\n+  asm volatile (\"# %0 %1\"\n+\t\t:: \"v\" (g), \"v\" (h));\n+  asm volatile (\"# %0 %1 %2 %3 %4 %5 %6 %7\"\n+\t\t: : \"v\" (i), \"v\" (j), \"v\" (k), \"v\" (l), \"v\" (m), \"v\" (n), \"v\" (o), \"v\" (p));\n+#endif\n+\n+  return ret;\n+}\n+\n+/* { dg-final { scan-assembler-not \"movss\\[ \\\\t\\]+%xmm\\[0-9\\]+, \\[0-9\\]*\\\\(%\\[re\\]?sp\\\\)\" } } */\n+/* { dg-final { scan-assembler-not \"mov(l|q)\\[ \\\\t\\]+\\[0-9\\]*\\\\(%\\[re\\]?sp\\\\), %xmm\\[0-9\\]+\" } } */\ndiff --git a/gcc/testsuite/gcc.target/i386/no-caller-saved-7.c b/gcc/testsuite/gcc.target/i386/no-caller-saved-7.c\nnew file mode 100644\nindex 00000000000..c8a99e950da\n--- /dev/null\n+++ b/gcc/testsuite/gcc.target/i386/no-caller-saved-7.c\n@@ -0,0 +1,49 @@\n+/* PR target/124798  */\n+/* { dg-do compile } */\n+/* { dg-options \"-O2 -mtune=corei7 -mtune-ctrl=^prologue_using_move,^epilogue_using_move -fomit-frame-pointer\" } */\n+\n+typedef struct\n+{\n+  double d[16];\n+} record;\n+\n+[[gnu::no_caller_saved_registers]] extern record foo (void);\n+\n+record\n+qux (void)\n+{\n+  int a, b, c, d, e, f;\n+  asm volatile (\"# %0 %1 %2 %3 %4 %5\"\n+\t\t: \"=r\" (a), \"=r\" (b), \"=r\" (c), \"=r\" (d), \"=r\" (e), \"=r\" (f));\n+#ifdef __x86_64__\n+  int g, h, i, j;\n+  asm volatile (\"# %0 %1 %2 %3\"\n+\t\t: \"=r\" (g), \"=r\" (h), \"=r\" (i), \"=r\" (j));\n+#endif\n+  record ret = foo ();\n+  asm volatile (\"# %0 %1 %2 %3 %4 %5\"\n+\t\t:: \"r\" (a), \"r\" (b), \"r\" (c), \"r\" (d), \"r\" (e), \"r\" (f));\n+#ifdef __x86_64__\n+  asm volatile (\"# %0 %1 %2 %3\"\n+\t\t:: \"r\" (g), \"r\" (h), \"r\" (i), \"r\" (j));\n+#endif\n+\n+  return ret;\n+}\n+\n+/* { dg-final { scan-assembler-not \"mov(l|q)\\[ \\\\t\\]+%edx, \\[0-9\\]*\\\\(%\\[re\\]?sp\\\\)\" } } */\n+/* { dg-final { scan-assembler-not \"mov(l|q)\\[ \\\\t\\]+%ecx, \\[0-9\\]*\\\\(%\\[re\\]?sp\\\\)\" } } */\n+/* { dg-final { scan-assembler-not \"mov(l|q)\\[ \\\\t\\]+%esi, \\[0-9\\]*\\\\(%\\[re\\]?sp\\\\)\" } } */\n+/* { dg-final { scan-assembler-not \"mov(l|q)\\[ \\\\t\\]+%edi, \\[0-9\\]*\\\\(%\\[re\\]?sp\\\\)\" } } */\n+/* { dg-final { scan-assembler-not \"mov(l|q)\\[ \\\\t\\]+\\[0-9\\]*\\\\(%\\[re\\]?sp\\\\), %edx\" } } */\n+/* { dg-final { scan-assembler-not \"mov(l|q)\\[ \\\\t\\]+\\[0-9\\]*\\\\(%\\[re\\]?sp\\\\), %ecx\" } } */\n+/* { dg-final { scan-assembler-not \"mov(l|q)\\[ \\\\t\\]+\\[0-9\\]*\\\\(%\\[re\\]?sp\\\\), %esi\" } } */\n+/* { dg-final { scan-assembler-not \"mov(l|q)\\[ \\\\t\\]+\\[0-9\\]*\\\\(%\\[re\\]?sp\\\\), %edi\" } } */\n+/* { dg-final { scan-assembler-not \"mov(l|q)\\[ \\\\t\\]+%r8d, \\[0-9\\]*\\\\(%\\[re\\]?sp\\\\)\" { target { ! ia32 } } } } */\n+/* { dg-final { scan-assembler-not \"mov(l|q)\\[ \\\\t\\]+%r9d, \\[0-9\\]*\\\\(%\\[re\\]?sp\\\\)\" { target { ! ia32 } } } } */\n+/* { dg-final { scan-assembler-not \"mov(l|q)\\[ \\\\t\\]+%r10d, \\[0-9\\]*\\\\(%\\[re\\]?sp\\\\)\" { target { ! ia32 } } } } */\n+/* { dg-final { scan-assembler-not \"mov(l|q)\\[ \\\\t\\]+%r11d, \\[0-9\\]*\\\\(%\\[re\\]?sp\\\\)\" { target { ! ia32 } } } } */\n+/* { dg-final { scan-assembler-not \"mov(l|q)\\[ \\\\t\\]+\\[0-9\\]*\\\\(%\\[re\\]?sp\\\\), %r8d\" { target { ! ia32 } } } } */\n+/* { dg-final { scan-assembler-not \"mov(l|q)\\[ \\\\t\\]+\\[0-9\\]*\\\\(%\\[re\\]?sp\\\\), %r9d\" { target { ! ia32 } } } } */\n+/* { dg-final { scan-assembler-not \"mov(l|q)\\[ \\\\t\\]+\\[0-9\\]*\\\\(%\\[re\\]?sp\\\\), %r10d\" { target { ! ia32 } } } } */\n+/* { dg-final { scan-assembler-not \"mov(l|q)\\[ \\\\t\\]+\\[0-9\\]*\\\\(%\\[re\\]?sp\\\\), %r11d\" { target { ! ia32 } } } } */\ndiff --git a/gcc/testsuite/gcc.target/i386/preserve-none-7.c b/gcc/testsuite/gcc.target/i386/preserve-none-7.c\nindex 2c80560887c..6f252ee50a4 100644\n--- a/gcc/testsuite/gcc.target/i386/preserve-none-7.c\n+++ b/gcc/testsuite/gcc.target/i386/preserve-none-7.c\n@@ -26,7 +26,9 @@ foo (void *frame)\n   }\n }\n \n-/* { dg-final { scan-assembler-times \"push(?:l|q)\\[\\\\t \\]*%(?:e|r)bp\" 1 } } */\n-/* { dg-final { scan-assembler-times \"pop(?:l|q)\\[\\\\t \\]*%(?:e|r)bp\" 1 } } */\n-/* { dg-final { scan-assembler-times \"push(?:l|q)\\[\\\\t \\]*\" 1 } } */\n-/* { dg-final { scan-assembler-times \"pop(?:l|q)\\[\\\\t \\]*\" 1 } } */\n+/* { dg-final { scan-assembler-times \"push(?:l|q)\\[\\\\t \\]*%(?:e|r)bp\" 1 { target ia32 } } } */\n+/* { dg-final { scan-assembler-times \"pop(?:l|q)\\[\\\\t \\]*%(?:e|r)bp\" 1 { target ia32 } } } */\n+/* { dg-final { scan-assembler-times \"push(?:l|q)\\[\\\\t \\]*\" 1 { target ia32 } } } */\n+/* { dg-final { scan-assembler-times \"pop(?:l|q)\\[\\\\t \\]*\" 1 { target ia32 } } } */\n+/* { dg-final { scan-assembler-not \"push(?:l|q)\\[\\\\t \\]*\" { target { ! ia32 } } } } */\n+/* { dg-final { scan-assembler-not \"pop(?:l|q)\\[\\\\t \\]*\" { target { ! ia32 } } } } */\n-- \n2.53.0\n\n",
    "prefixes": []
}