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GET /api/patches/2230874/?format=api
{ "id": 2230874, "url": "http://patchwork.ozlabs.org/api/patches/2230874/?format=api", "web_url": "http://patchwork.ozlabs.org/project/qemu-devel/patch/20260430071315.354333-5-zhenzhong.duan@intel.com/", "project": { "id": 14, "url": "http://patchwork.ozlabs.org/api/projects/14/?format=api", "name": "QEMU Development", "link_name": "qemu-devel", "list_id": "qemu-devel.nongnu.org", "list_email": "qemu-devel@nongnu.org", "web_url": "", "scm_url": "", "webscm_url": "", "list_archive_url": "", "list_archive_url_format": "", "commit_url_format": "" }, "msgid": "<20260430071315.354333-5-zhenzhong.duan@intel.com>", "list_archive_url": null, "date": "2026-04-30T07:13:00", "name": "[v4,04/15] intel_iommu: Create the nested hwpt with IOMMU_HWPT_ALLOC_PASID flag", "commit_ref": null, "pull_url": null, "state": "new", "archived": false, "hash": "5972cc21f8a337e8f098ff8f610907763c6b7434", "submitter": { "id": 81636, "url": "http://patchwork.ozlabs.org/api/people/81636/?format=api", "name": "Duan, Zhenzhong", "email": "zhenzhong.duan@intel.com" }, "delegate": null, "mbox": "http://patchwork.ozlabs.org/project/qemu-devel/patch/20260430071315.354333-5-zhenzhong.duan@intel.com/mbox/", "series": [ { "id": 502222, "url": "http://patchwork.ozlabs.org/api/series/502222/?format=api", "web_url": "http://patchwork.ozlabs.org/project/qemu-devel/list/?series=502222", "date": "2026-04-30T07:12:57", "name": "intel_iommu: Enable PASID support for passthrough device", "version": 4, "mbox": "http://patchwork.ozlabs.org/series/502222/mbox/" } ], "comments": "http://patchwork.ozlabs.org/api/patches/2230874/comments/", "check": "pending", "checks": "http://patchwork.ozlabs.org/api/patches/2230874/checks/", "tags": {}, "related": [], "headers": { "Return-Path": "<qemu-devel-bounces+incoming=patchwork.ozlabs.org@nongnu.org>", "X-Original-To": "incoming@patchwork.ozlabs.org", "Delivered-To": "patchwork-incoming@legolas.ozlabs.org", "Authentication-Results": [ "legolas.ozlabs.org;\n\tdkim=pass (2048-bit key;\n unprotected) header.d=intel.com header.i=@intel.com header.a=rsa-sha256\n header.s=Intel header.b=lOojp8KI;\n\tdkim-atps=neutral", "legolas.ozlabs.org;\n spf=pass (sender SPF authorized) smtp.mailfrom=nongnu.org\n (client-ip=209.51.188.17; helo=lists1p.gnu.org;\n envelope-from=qemu-devel-bounces+incoming=patchwork.ozlabs.org@nongnu.org;\n receiver=patchwork.ozlabs.org)" ], "Received": [ "from lists1p.gnu.org (lists1p.gnu.org [209.51.188.17])\n\t(using TLSv1.2 with cipher ECDHE-ECDSA-AES256-GCM-SHA384 (256/256 bits))\n\t(No client certificate requested)\n\tby legolas.ozlabs.org (Postfix) with ESMTPS id 4g5ln9605Nz1yHZ\n\tfor <incoming@patchwork.ozlabs.org>; Thu, 30 Apr 2026 17:15:25 +1000 (AEST)", "from localhost ([::1] helo=lists1p.gnu.org)\n\tby lists1p.gnu.org with esmtp (Exim 4.90_1)\n\t(envelope-from <qemu-devel-bounces@nongnu.org>)\n\tid 1wILbP-0005NI-MJ; Thu, 30 Apr 2026 03:14:27 -0400", "from eggs.gnu.org ([2001:470:142:3::10])\n by lists1p.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_256_GCM_SHA384:256)\n (Exim 4.90_1) (envelope-from <zhenzhong.duan@intel.com>)\n id 1wILao-00058f-G2\n for qemu-devel@nongnu.org; Thu, 30 Apr 2026 03:13:52 -0400", "from mgamail.intel.com ([192.198.163.13])\n by eggs.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_256_GCM_SHA384:256)\n (Exim 4.90_1) (envelope-from <zhenzhong.duan@intel.com>)\n id 1wILal-0008G4-75\n for qemu-devel@nongnu.org; Thu, 30 Apr 2026 03:13:48 -0400", "from orviesa007.jf.intel.com ([10.64.159.147])\n by fmvoesa107.fm.intel.com with ESMTP/TLS/ECDHE-RSA-AES256-GCM-SHA384;\n 30 Apr 2026 00:13:46 -0700", "from unknown (HELO gnr-sp-2s-612.sh.intel.com) ([10.112.230.229])\n by orviesa007-auth.jf.intel.com with ESMTP/TLS/ECDHE-RSA-AES256-GCM-SHA384;\n 30 Apr 2026 00:13:44 -0700" ], "DKIM-Signature": "v=1; a=rsa-sha256; c=relaxed/simple;\n d=intel.com; i=@intel.com; q=dns/txt; s=Intel;\n t=1777533227; x=1809069227;\n h=from:to:cc:subject:date:message-id:in-reply-to:\n references:mime-version:content-transfer-encoding;\n bh=WhVGnhbo+Pqtx83Hy48OkP5Wl8zor8CPU++Q6Tws2aA=;\n b=lOojp8KIsxZnw7Gd4ASdFauVJ/E1j2+8BpE7QMQb5QQ1nuRTR/SNHkFz\n vpqObFuSyQqGKVz4xVk2iceFgWKbcU0agFCERh9ycLH7G+SQ4fXcQyVyZ\n 9C5kM6og1mulMsBtF1wbzQ1GUT/h0B3cJbrY4aAhAIIKyf9y2zQwSZ17x\n 22K1pHgmPoMKqWqvAMUx+5WYK63XslkMwFilpGF55KRn8DCjyCI0lQmcx\n BKOFFmaiX3xWLtGBOcrluFI7yGU0rAbTFW9ZN+EzpLLA3aifLDS1QlReR\n XEiWLDs6Hfd+UtavGswDODS/9DKahxNM1qMP9D1EKdY7MxnbIiCtAEyxy g==;", "X-CSE-ConnectionGUID": [ "bJ3nY/vyRyS78sfIoaOzXQ==", "rcmfRGstQoOfl59joyaDMw==" ], "X-CSE-MsgGUID": [ "M1y169s0SiW195TSifr4Zw==", "1syNqg47T1OsEEoBlEd9Ww==" ], "X-IronPort-AV": [ "E=McAfee;i=\"6800,10657,11771\"; a=\"81051592\"", "E=Sophos;i=\"6.23,207,1770624000\"; d=\"scan'208\";a=\"81051592\"", "E=Sophos;i=\"6.23,207,1770624000\"; d=\"scan'208\";a=\"234771483\"" ], "X-ExtLoop1": "1", "From": "Zhenzhong Duan <zhenzhong.duan@intel.com>", "To": "qemu-devel@nongnu.org", "Cc": "alex@shazbot.org, clg@redhat.com, eric.auger@redhat.com, mst@redhat.com,\n jasowang@redhat.com, jgg@nvidia.com, nicolinc@nvidia.com,\n skolothumtho@nvidia.com, joao.m.martins@oracle.com,\n clement.mathieu--drif@bull.com, kevin.tian@intel.com, yi.l.liu@intel.com,\n xudong.hao@intel.com, Zhenzhong Duan <zhenzhong.duan@intel.com>", "Subject": "[PATCH v4 04/15] intel_iommu: Create the nested hwpt with\n IOMMU_HWPT_ALLOC_PASID flag", "Date": "Thu, 30 Apr 2026 03:13:00 -0400", "Message-ID": "<20260430071315.354333-5-zhenzhong.duan@intel.com>", "X-Mailer": "git-send-email 2.47.3", "In-Reply-To": "<20260430071315.354333-1-zhenzhong.duan@intel.com>", "References": "<20260430071315.354333-1-zhenzhong.duan@intel.com>", "MIME-Version": "1.0", "Content-Transfer-Encoding": "8bit", "Received-SPF": "pass client-ip=192.198.163.13;\n envelope-from=zhenzhong.duan@intel.com; helo=mgamail.intel.com", "X-Spam_score_int": "-43", "X-Spam_score": "-4.4", "X-Spam_bar": "----", "X-Spam_report": "(-4.4 / 5.0 requ) BAYES_00=-1.9, DKIMWL_WL_HIGH=-0.001,\n DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1,\n RCVD_IN_DNSWL_MED=-2.3, SPF_HELO_NONE=0.001,\n SPF_PASS=-0.001 autolearn=ham autolearn_force=no", "X-Spam_action": "no action", "X-BeenThere": "qemu-devel@nongnu.org", "X-Mailman-Version": "2.1.29", "Precedence": "list", "List-Id": "qemu development <qemu-devel.nongnu.org>", "List-Unsubscribe": "<https://lists.nongnu.org/mailman/options/qemu-devel>,\n <mailto:qemu-devel-request@nongnu.org?subject=unsubscribe>", "List-Archive": "<https://lists.nongnu.org/archive/html/qemu-devel>", "List-Post": "<mailto:qemu-devel@nongnu.org>", "List-Help": "<mailto:qemu-devel-request@nongnu.org?subject=help>", "List-Subscribe": "<https://lists.nongnu.org/mailman/listinfo/qemu-devel>,\n <mailto:qemu-devel-request@nongnu.org?subject=subscribe>", "Errors-To": "qemu-devel-bounces+incoming=patchwork.ozlabs.org@nongnu.org", "Sender": "qemu-devel-bounces+incoming=patchwork.ozlabs.org@nongnu.org" }, "content": "When pasid is enabled, any hwpt attached to non-PASID or PASID should be\nIOMMU_HWPT_ALLOC_PASID flagged, or else attachment fails.\n\nChange vtd_destroy_old_fs_hwpt() to pass in 'VTDHostIOMMUDevice *' for\nnaming consistency.\n\nSigned-off-by: Zhenzhong Duan <zhenzhong.duan@intel.com>\nReviewed-by: Clement Mathieu--Drif <clement.mathieu--drif@bull.com>\nReviewed-by: Yi Liu <yi.l.liu@intel.com>\nTested-by: Xudong Hao <xudong.hao@intel.com>\n---\n hw/i386/intel_iommu_accel.c | 19 ++++++++++++-------\n 1 file changed, 12 insertions(+), 7 deletions(-)", "diff": "diff --git a/hw/i386/intel_iommu_accel.c b/hw/i386/intel_iommu_accel.c\nindex 3217a2afac..bd1236c070 100644\n--- a/hw/i386/intel_iommu_accel.c\n+++ b/hw/i386/intel_iommu_accel.c\n@@ -69,11 +69,13 @@ VTDHostIOMMUDevice *vtd_find_hiod_iommufd(VTDAddressSpace *as)\n return NULL;\n }\n \n-static bool vtd_create_fs_hwpt(HostIOMMUDeviceIOMMUFD *hiodi,\n+static bool vtd_create_fs_hwpt(VTDHostIOMMUDevice *vtd_hiod,\n VTDPASIDEntry *pe, uint32_t *fs_hwpt_id,\n Error **errp)\n {\n+ HostIOMMUDeviceIOMMUFD *hiodi = HOST_IOMMU_DEVICE_IOMMUFD(vtd_hiod->hiod);\n struct iommu_hwpt_vtd_s1 vtd = {};\n+ uint32_t flags = vtd_hiod->iommu_state->pasid ? IOMMU_HWPT_ALLOC_PASID : 0;\n \n vtd.flags = (VTD_SM_PASID_ENTRY_SRE(pe) ? IOMMU_VTD_S1_SRE : 0) |\n (VTD_SM_PASID_ENTRY_WPE(pe) ? IOMMU_VTD_S1_WPE : 0) |\n@@ -82,13 +84,16 @@ static bool vtd_create_fs_hwpt(HostIOMMUDeviceIOMMUFD *hiodi,\n vtd.pgtbl_addr = (uint64_t)vtd_pe_get_fspt_base(pe);\n \n return iommufd_backend_alloc_hwpt(hiodi->iommufd, hiodi->devid,\n- hiodi->hwpt_id, 0, IOMMU_HWPT_DATA_VTD_S1,\n- sizeof(vtd), &vtd, fs_hwpt_id, errp);\n+ hiodi->hwpt_id, flags,\n+ IOMMU_HWPT_DATA_VTD_S1, sizeof(vtd), &vtd,\n+ fs_hwpt_id, errp);\n }\n \n-static void vtd_destroy_old_fs_hwpt(HostIOMMUDeviceIOMMUFD *hiodi,\n+static void vtd_destroy_old_fs_hwpt(VTDHostIOMMUDevice *vtd_hiod,\n VTDAddressSpace *vtd_as)\n {\n+ HostIOMMUDeviceIOMMUFD *hiodi = HOST_IOMMU_DEVICE_IOMMUFD(vtd_hiod->hiod);\n+\n if (!vtd_as->fs_hwpt_id) {\n return;\n }\n@@ -116,7 +121,7 @@ static bool vtd_device_attach_iommufd(VTDHostIOMMUDevice *vtd_hiod,\n }\n \n if (vtd_pe_pgtt_is_fst(pe)) {\n- if (!vtd_create_fs_hwpt(hiodi, pe, &hwpt_id, errp)) {\n+ if (!vtd_create_fs_hwpt(vtd_hiod, pe, &hwpt_id, errp)) {\n return false;\n }\n }\n@@ -126,7 +131,7 @@ static bool vtd_device_attach_iommufd(VTDHostIOMMUDevice *vtd_hiod,\n trace_vtd_device_attach_hwpt(hiodi->devid, IOMMU_NO_PASID, hwpt_id, ret);\n if (ret) {\n /* Destroy old fs_hwpt if it's a replacement */\n- vtd_destroy_old_fs_hwpt(hiodi, vtd_as);\n+ vtd_destroy_old_fs_hwpt(vtd_hiod, vtd_as);\n if (vtd_pe_pgtt_is_fst(pe)) {\n vtd_as->fs_hwpt_id = hwpt_id;\n }\n@@ -161,7 +166,7 @@ static bool vtd_device_detach_iommufd(VTDHostIOMMUDevice *vtd_hiod,\n }\n \n if (ret) {\n- vtd_destroy_old_fs_hwpt(hiodi, vtd_as);\n+ vtd_destroy_old_fs_hwpt(vtd_hiod, vtd_as);\n }\n \n return ret;\n", "prefixes": [ "v4", "04/15" ] }