Patch Detail
get:
Show a patch.
patch:
Update a patch.
put:
Update a patch.
GET /api/patches/2230853/?format=api
{ "id": 2230853, "url": "http://patchwork.ozlabs.org/api/patches/2230853/?format=api", "web_url": "http://patchwork.ozlabs.org/project/gcc/patch/afL5pUs4StfArj_E@cowardly-lion.the-meissners.org/", "project": { "id": 17, "url": "http://patchwork.ozlabs.org/api/projects/17/?format=api", "name": "GNU Compiler Collection", "link_name": "gcc", "list_id": "gcc-patches.gcc.gnu.org", "list_email": "gcc-patches@gcc.gnu.org", "web_url": null, "scm_url": null, "webscm_url": null, "list_archive_url": "", "list_archive_url_format": "", "commit_url_format": "" }, "msgid": "<afL5pUs4StfArj_E@cowardly-lion.the-meissners.org>", "list_archive_url": null, "date": "2026-04-30T06:41:41", "name": "GCC 17, PowerPC Dense Math V7 (patch 3/7) -- Add -mdense-math switch", "commit_ref": null, "pull_url": null, "state": "new", "archived": false, "hash": "117108ff2cc731321d17449d0c840d73c65fc77e", "submitter": { "id": 73991, "url": "http://patchwork.ozlabs.org/api/people/73991/?format=api", "name": "Michael Meissner", "email": "meissner@linux.ibm.com" }, "delegate": null, "mbox": "http://patchwork.ozlabs.org/project/gcc/patch/afL5pUs4StfArj_E@cowardly-lion.the-meissners.org/mbox/", "series": [ { "id": 502214, "url": "http://patchwork.ozlabs.org/api/series/502214/?format=api", "web_url": "http://patchwork.ozlabs.org/project/gcc/list/?series=502214", "date": "2026-04-30T06:41:41", "name": "GCC 17, PowerPC Dense Math V7 (patch 3/7) -- Add -mdense-math switch", "version": 1, "mbox": "http://patchwork.ozlabs.org/series/502214/mbox/" } ], "comments": "http://patchwork.ozlabs.org/api/patches/2230853/comments/", "check": "pending", "checks": "http://patchwork.ozlabs.org/api/patches/2230853/checks/", "tags": {}, "related": [], "headers": { "Return-Path": "<gcc-patches-bounces~incoming=patchwork.ozlabs.org@gcc.gnu.org>", "X-Original-To": [ "incoming@patchwork.ozlabs.org", "gcc-patches@gcc.gnu.org" ], "Delivered-To": [ "patchwork-incoming@legolas.ozlabs.org", "gcc-patches@gcc.gnu.org" ], "Authentication-Results": [ "legolas.ozlabs.org;\n\tdkim=pass (2048-bit key;\n unprotected) header.d=ibm.com header.i=@ibm.com header.a=rsa-sha256\n header.s=pp1 header.b=o6R7NpNl;\n\tdkim-atps=neutral", "legolas.ozlabs.org;\n spf=pass (sender SPF authorized) smtp.mailfrom=gcc.gnu.org\n (client-ip=2620:52:6:3111::32; helo=vm01.sourceware.org;\n envelope-from=gcc-patches-bounces~incoming=patchwork.ozlabs.org@gcc.gnu.org;\n receiver=patchwork.ozlabs.org)", "sourceware.org;\n\tdkim=pass (2048-bit key,\n unprotected) header.d=ibm.com header.i=@ibm.com header.a=rsa-sha256\n header.s=pp1 header.b=o6R7NpNl", "sourceware.org;\n dmarc=none (p=none dis=none) header.from=linux.ibm.com", "sourceware.org; spf=pass smtp.mailfrom=linux.ibm.com", "server2.sourceware.org;\n arc=none smtp.remote-ip=148.163.156.1" ], "Received": [ "from vm01.sourceware.org (vm01.sourceware.org\n [IPv6:2620:52:6:3111::32])\n\t(using TLSv1.3 with cipher TLS_AES_256_GCM_SHA384 (256/256 bits)\n\t key-exchange x25519 server-signature ECDSA (secp384r1) server-digest SHA384)\n\t(No client certificate requested)\n\tby legolas.ozlabs.org (Postfix) with ESMTPS id 4g5l3C5lV7z1yHv\n\tfor <incoming@patchwork.ozlabs.org>; Thu, 30 Apr 2026 16:42:31 +1000 (AEST)", "from vm01.sourceware.org (localhost [127.0.0.1])\n\tby sourceware.org (Postfix) with ESMTP id F07114315071\n\tfor <incoming@patchwork.ozlabs.org>; Thu, 30 Apr 2026 06:42:29 +0000 (GMT)", "from mx0a-001b2d01.pphosted.com (mx0a-001b2d01.pphosted.com\n [148.163.156.1])\n by sourceware.org (Postfix) with ESMTPS id 79969431507C\n for <gcc-patches@gcc.gnu.org>; Thu, 30 Apr 2026 06:41:49 +0000 (GMT)", "from pps.filterd (m0356517.ppops.net [127.0.0.1])\n by mx0a-001b2d01.pphosted.com (8.18.1.11/8.18.1.11) with ESMTP id\n 63U5Qa2R961793; Thu, 30 Apr 2026 06:41:48 GMT", "from ppma23.wdc07v.mail.ibm.com\n (5d.69.3da9.ip4.static.sl-reverse.com [169.61.105.93])\n by mx0a-001b2d01.pphosted.com (PPS) with ESMTPS id 4drnb5e8p1-1\n (version=TLSv1.2 cipher=ECDHE-RSA-AES256-GCM-SHA384 bits=256 verify=NOT);\n Thu, 30 Apr 2026 06:41:48 +0000 (GMT)", "from pps.filterd (ppma23.wdc07v.mail.ibm.com [127.0.0.1])\n by ppma23.wdc07v.mail.ibm.com (8.18.1.7/8.18.1.7) with ESMTP id\n 63U6cs1K008770;\n Thu, 30 Apr 2026 06:41:47 GMT", "from smtprelay01.wdc07v.mail.ibm.com ([172.16.1.68])\n by ppma23.wdc07v.mail.ibm.com (PPS) with ESMTPS id 4ds9ehhnss-1\n (version=TLSv1.2 cipher=ECDHE-RSA-AES256-GCM-SHA384 bits=256 verify=NOT);\n Thu, 30 Apr 2026 06:41:47 +0000 (GMT)", "from smtpav04.dal12v.mail.ibm.com (smtpav04.dal12v.mail.ibm.com\n [10.241.53.103])\n by smtprelay01.wdc07v.mail.ibm.com (8.14.9/8.14.9/NCO v10.0) with ESMTP id\n 63U6fhg25178286\n (version=TLSv1/SSLv3 cipher=DHE-RSA-AES256-GCM-SHA384 bits=256 verify=OK);\n Thu, 30 Apr 2026 06:41:43 GMT", "from smtpav04.dal12v.mail.ibm.com (unknown [127.0.0.1])\n by IMSVA (Postfix) with ESMTP id 270455805E;\n Thu, 30 Apr 2026 06:41:43 +0000 (GMT)", "from smtpav04.dal12v.mail.ibm.com (unknown [127.0.0.1])\n by IMSVA (Postfix) with ESMTP id 7A9C658052;\n Thu, 30 Apr 2026 06:41:42 +0000 (GMT)", "from cowardly-lion.the-meissners.org (unknown [9.61.149.103])\n by smtpav04.dal12v.mail.ibm.com (Postfix) with ESMTPS;\n Thu, 30 Apr 2026 06:41:42 +0000 (GMT)" ], "DKIM-Filter": [ "OpenDKIM Filter v2.11.0 sourceware.org F07114315071", "OpenDKIM Filter v2.11.0 sourceware.org 79969431507C" ], "DMARC-Filter": "OpenDMARC Filter v1.4.2 sourceware.org 79969431507C", "ARC-Filter": "OpenARC Filter v1.0.0 sourceware.org 79969431507C", "ARC-Seal": "i=1; a=rsa-sha256; d=sourceware.org; s=key; t=1777531309; cv=none;\n b=g4/vSz9ORaADR6lZKNi8BJ/GlyvWCuf6Hea50Z8JqhmkgqxYHkaBe9tIy7lvdljN5m/5hmqrMX2wiI0J04sSGKPBapFD79A2B3vOBjDkkcHAndUo3/fv9leqN3OWwUwC80MSyChI1S3E1uXo1EnbbKwrs3yxnB4N9XEBtgwDHt0=", "ARC-Message-Signature": "i=1; a=rsa-sha256; d=sourceware.org; s=key;\n t=1777531309; c=relaxed/simple;\n bh=Ugvh7BvfmXSEGpSE462wK8mDTu/Xi8puQ7HRUUy2Psg=;\n h=DKIM-Signature:Date:From:To:Subject:Message-ID:MIME-Version;\n b=WVKFe5RoBVicqi4SDDEOcmB+x/hWx+FLNj7qOMl+dz2pvSqdKshwE9u8QI1NF/AmDb2BshU5Y/CDBt56WGQcCE1HYYe2ziFCkIXvVraG47/9JXbER8Rh7eUGYxraypEucJeme2Fk9MDV7JynQC0M9znqLmVOqhZGwqXOxQs+ibA=", "ARC-Authentication-Results": "i=1; server2.sourceware.org", "DKIM-Signature": "v=1; a=rsa-sha256; c=relaxed/relaxed; d=ibm.com; h=\n content-type:date:from:in-reply-to:message-id:mime-version\n :references:subject:to; s=pp1; bh=xPu9md2dxAIBLj6A0x/GUU4YID2Fwg\n RBPGqU81PDVJM=; b=o6R7NpNl7+R79PVV5omMf6cbzq5ELcIu7eHgpHiIBcPYZg\n 8JZF8W24ct4z76YKIgsxs2RD+DfjZSp/es/M9vHcmD+KOIirbp8UoNHh3SvCpGIX\n knkgVCIreA/hkqH20ZWHcNR92fBwf2PVhMq2bvYXvkB5DIfJvvvEwdGsvO9hrKjE\n EGRLK9V3AT6e1hx8/h+3PO2F25ieBGChsvAXFU6Y0POn1hbR1SlZUCowhRsetSVV\n l6/TMJsf4W5e/8WlLAUthjf7m5Z0YB/iL/mXJsxxQci5/fT45idV7tDMWUi8qn8s\n qZWAXAPrLmHM+/Cbt0SApeOhp5ZExZ4+v6/ybhIQ==", "Date": "Thu, 30 Apr 2026 02:41:41 -0400", "From": "Michael Meissner <meissner@linux.ibm.com>", "To": "Michael Meissner <meissner@linux.ibm.com>, gcc-patches@gcc.gnu.org,\n Segher Boessenkool <segher@kernel.crashing.org>,\n jeevitha <jeevitha@linux.ibm.com>,\n Surya Kumari Jangala <jskumari@linux.ibm.com>,\n Kishan Parmar <kishan@linux.ibm.com>,\n Avinash Jayakar <avinashd@linux.ibm.com>,\n Ayappan Perumal <ayappap2@in.ibm.com>,\n Juergen Christ <jchrist@linux.ibm.com>", "Subject": "GCC 17, PowerPC Dense Math V7 (patch 3/7) -- Add -mdense-math switch", "Message-ID": "<afL5pUs4StfArj_E@cowardly-lion.the-meissners.org>", "Mail-Followup-To": "Michael Meissner <meissner@linux.ibm.com>,\n gcc-patches@gcc.gnu.org,\n Segher Boessenkool <segher@kernel.crashing.org>,\n jeevitha <jeevitha@linux.ibm.com>,\n Surya Kumari Jangala <jskumari@linux.ibm.com>,\n Kishan Parmar <kishan@linux.ibm.com>,\n Avinash Jayakar <avinashd@linux.ibm.com>,\n Ayappan Perumal <ayappap2@in.ibm.com>,\n Juergen Christ <jchrist@linux.ibm.com>", "References": "<afL4oa26tUJlc9zg@cowardly-lion.the-meissners.org>", "MIME-Version": "1.0", "Content-Type": "text/plain; charset=us-ascii", "Content-Disposition": "inline", "In-Reply-To": "<afL4oa26tUJlc9zg@cowardly-lion.the-meissners.org>", "X-TM-AS-GCONF": "00", "X-Authority-Analysis": "v=2.4 cv=AqDeGu9P c=1 sm=1 tr=0 ts=69f2f9ac cx=c_pps\n a=3Bg1Hr4SwmMryq2xdFQyZA==:117 a=3Bg1Hr4SwmMryq2xdFQyZA==:17\n a=kj9zAlcOel0A:10 a=A5OVakUREuEA:10 a=VkNPw1HP01LnGYTKEx00:22\n a=RnoormkPH1_aCDwRdu11:22 a=U7nrCbtTmkRpXpFmAIza:22 a=mDV3o1hIAAAA:8\n a=VnNF1IyMAAAA:8 a=Jz-Qs_lQuOGvCERg6MEA:9 a=CjuIK1q_8ugA:10", "X-Proofpoint-Spam-Details-Enc": "AW1haW4tMjYwNDMwMDA2MCBTYWx0ZWRfX53kKY0RwPs0K\n XC8xFYFPSBlEUJ7D5Mnus80JzcwiMiHW4RXsaFpTMhLyozLp5dNwyMA/E4oZck1xDmN1IBPxRWF\n 1DeKd+xG9BTFHKqSMwnL+SVB37HDiDmaOyxTo99ulLpbpoNzVdanCk/8ARXyc2Ax40IKMH5L8Gi\n Mimb3gQtFxTR2wrHFSwvfEz6ECkJKCDVEqWIIl4YlTtZgyg6s1q1lbGNrVxqVnTgt5zffeTkmQD\n 5f50F4dtBCh5fcQo6PuU3VfjDwdSrg9xKJUnTq1+yL1KfehbJybV/Io68OISnNA/92T80mgMAlY\n ZcQEXSz4bmb40z3sAsBJ9/LtfwGVwN8YqPrJLgmbRhgEUHYBAxxx5Jn7ibrR7ML1wG4eKniZQYV\n HNBzl0+q3YKGB9jsmTFt5rDp/oUF+dJ5a4E3e1d74jtR5KYarYSH61IvK5Mp8b8bEmcazwxisnT\n XD2RADLUKh+lH1V+cJg==", "X-Proofpoint-GUID": "B9sr6_shA3eVMTNm-8GDnoN4WywykoyB", "X-Proofpoint-ORIG-GUID": "B9sr6_shA3eVMTNm-8GDnoN4WywykoyB", "X-Proofpoint-Virus-Version": "vendor=baseguard\n engine=ICAP:2.0.293,Aquarius:18.0.1143,Hydra:6.1.51,FMLib:17.12.100.49\n definitions=2026-04-30_02,2026-04-28_01,2025-10-01_01", "X-Proofpoint-Spam-Details": "rule=outbound_notspam policy=outbound score=0\n adultscore=0 priorityscore=1501 phishscore=0 suspectscore=0 clxscore=1015\n lowpriorityscore=0 spamscore=0 bulkscore=0 impostorscore=0 malwarescore=0\n classifier=typeunknown authscore=0 authtc= authcc= route=outbound adjust=0\n reason=mlx scancount=1 engine=8.22.0-2604200000 definitions=main-2604300060", "X-BeenThere": "gcc-patches@gcc.gnu.org", "X-Mailman-Version": "2.1.30", "Precedence": "list", "List-Id": "Gcc-patches mailing list <gcc-patches.gcc.gnu.org>", "List-Unsubscribe": "<https://gcc.gnu.org/mailman/options/gcc-patches>,\n <mailto:gcc-patches-request@gcc.gnu.org?subject=unsubscribe>", "List-Archive": "<https://gcc.gnu.org/pipermail/gcc-patches/>", "List-Post": "<mailto:gcc-patches@gcc.gnu.org>", "List-Help": "<mailto:gcc-patches-request@gcc.gnu.org?subject=help>", "List-Subscribe": "<https://gcc.gnu.org/mailman/listinfo/gcc-patches>,\n <mailto:gcc-patches-request@gcc.gnu.org?subject=subscribe>", "Errors-To": "gcc-patches-bounces~incoming=patchwork.ozlabs.org@gcc.gnu.org" }, "content": "This is part three of the dense math register patches for the PowerPC.\nThis is the 7th version of the dense math patches.\n\nVersion 6 of the dense math register patches were posted on April 21st,\n2026.\n\n * https://gcc.gnu.org/pipermail/gcc-patches/2026-April/713352.html\n * https://gcc.gnu.org/pipermail/gcc-patches/2026-April/713353.html\n * https://gcc.gnu.org/pipermail/gcc-patches/2026-April/713354.html\n * https://gcc.gnu.org/pipermail/gcc-patches/2026-April/713355.html\n * https://gcc.gnu.org/pipermail/gcc-patches/2026-April/713356.html\n * https://gcc.gnu.org/pipermail/gcc-patches/2026-April/713357.html\n\nThis patch needs the -mcpu=future patch posted on April 8th, 2026:\n\n * https://gcc.gnu.org/pipermail/gcc-patches/2026-April/712532.html\n\nThis patch (patch #3) is the same as patch #2 in the V6 patches.\n\nThis patch adds the -mdense-math option for -mcpu=future. The next set of\npatches will support for using dense math registers with the MMA instructions.\nAll this patch does is add the option. A future patch will implement support\nfor dense math registers, and another patch will then switch the MMA\ninstructions to use dense math registers.\n\nFor users, the following macros are defined:\n\n\t__MMA_NO_DENSE_MATH__\tISA 3.1 MMA support.\n\t__MMA_DENSE_MATH__\tMMA with dense math registers.\n\nWithin the compiler, the following macros are defined:\n\n\tTARGET_MMA_NO_DENSE_MATH\tISA 3.1 MMA support.\n\tTARGET_MMA_DENSE_MATH\t\tMMA with dense math registers.\n\nI have built bootstrap little endian compilers on power10 systems, and\nbig endian compiler on power9 systems. There were no regression in the\ntests. Can I add the patches to the GCC trunk after the -mcpu=future\npatch is applied and GCC 17 has opened up?\n\n2026-04-29 Michael Meissner <meissner@linux.ibm.com>\n\ngcc/\n\n\t* config/rs6000/rs6000-c.cc (rs6000_define_or_undefine_macro): Define\n\t__MMA_DENSE_MATH__ if we have MMA that uses dense math register\n\taccumulators. Define __MMA_NO_DENSE_MATH__ if we have MMA but we are\n\tusing ISA 3.1 where the accumulators are overlaid over VSX registers\n\t0..32. Define __DENSE_MATH__ if we have dense math registers.\n\t* config/rs6000/rs6000.cc (rs6000_option_override_internal): Do not\n\tallow -mdense-math unless -mcpu=future is used.\n\t(rs6000_opt_masks): Add -mdense-math support.\n\t* config/rs6000/rs6000.h (TARGET_MMA_DENSE_MATH): New macro.\n\t(TARGET_MMA_NO_DENSE_MATH): Likewise.\n\t* config/rs6000/rs6000.opt (-mdense-math): New option.\n\t* doc/invoke.texi (RS/6000 and PowerPC Options): Add -mdense-math.\n---\n gcc/config/rs6000/rs6000-c.cc | 22 ++++++++++++++++++++--\n gcc/config/rs6000/rs6000.cc | 10 ++++++++++\n gcc/config/rs6000/rs6000.h | 6 ++++++\n gcc/config/rs6000/rs6000.opt | 4 ++++\n gcc/doc/invoke.texi | 7 +++++++\n 5 files changed, 47 insertions(+), 2 deletions(-)", "diff": "diff --git a/gcc/config/rs6000/rs6000-c.cc b/gcc/config/rs6000/rs6000-c.cc\nindex 3fa7c04a7ce..ce7d836541f 100644\n--- a/gcc/config/rs6000/rs6000-c.cc\n+++ b/gcc/config/rs6000/rs6000-c.cc\n@@ -587,9 +587,27 @@ rs6000_target_modify_macros (bool define_p, HOST_WIDE_INT flags)\n if (rs6000_cpu == PROCESSOR_CELL)\n rs6000_define_or_undefine_macro (define_p, \"__PPU__\");\n \n- /* Tell the user if we support the MMA instructions. */\n+ /* Tell the user if we support the MMA instructions. Also tell them if we\n+ have MMA with ISA 3.1 that uses accumulators overlaid over VSX registers\n+ 0..31 or if we have support with separate dense math accumulators. */\n if ((flags & OPTION_MASK_MMA) != 0)\n- rs6000_define_or_undefine_macro (define_p, \"__MMA__\");\n+ {\n+ rs6000_define_or_undefine_macro (define_p, \"__MMA__\");\n+ if ((flags & OPTION_MASK_DENSE_MATH) != 0)\n+\t{\n+\t rs6000_define_or_undefine_macro (define_p, \"__MMA_DENSE_MATH__\");\n+\t rs6000_define_or_undefine_macro (false, \"__MMA_NO_DENSE_MATH__\");\n+\t}\n+ else\n+\t{\n+\t rs6000_define_or_undefine_macro (false, \"__MMA_DENSE_MATH__\");\n+\t rs6000_define_or_undefine_macro (define_p, \"__MMA_NO_DENSE_MATH__\");\n+\t}\n+ }\n+ /* Tell the user if we support the dense math registers for use with MMA and\n+ cryptography. */\n+ if ((flags & OPTION_MASK_DENSE_MATH) != 0)\n+ rs6000_define_or_undefine_macro (define_p, \"__DENSE_MATH__\");\n /* Whether pc-relative code is being generated. */\n if ((flags & OPTION_MASK_PCREL) != 0)\n rs6000_define_or_undefine_macro (define_p, \"__PCREL__\");\ndiff --git a/gcc/config/rs6000/rs6000.cc b/gcc/config/rs6000/rs6000.cc\nindex 38df0b43f6f..31ab5bdccf1 100644\n--- a/gcc/config/rs6000/rs6000.cc\n+++ b/gcc/config/rs6000/rs6000.cc\n@@ -4410,6 +4410,15 @@ rs6000_option_override_internal (bool global_init_p)\n if (!TARGET_PCREL && TARGET_PCREL_OPT)\n rs6000_isa_flags &= ~OPTION_MASK_PCREL_OPT;\n \n+ /* Turn off dense math register support on non-future systems. */\n+ if (TARGET_DENSE_MATH && !TARGET_FUTURE)\n+ {\n+ if ((rs6000_isa_flags_explicit & OPTION_MASK_DENSE_MATH) != 0)\n+\terror (\"%qs requires %qs\", \"-mdense-math\", \"-mcpu=future\");\n+\n+ rs6000_isa_flags &= ~OPTION_MASK_DENSE_MATH;\n+ }\n+\n if (TARGET_DEBUG_REG || TARGET_DEBUG_TARGET)\n rs6000_print_isa_options (stderr, 0, \"after subtarget\", rs6000_isa_flags);\n \n@@ -24463,6 +24472,7 @@ static struct rs6000_opt_mask const rs6000_opt_masks[] =\n \t\t\t\t\t\t\t\tfalse, true },\n { \"cmpb\",\t\t\tOPTION_MASK_CMPB,\t\tfalse, true },\n { \"crypto\",\t\t\tOPTION_MASK_CRYPTO,\t\tfalse, true },\n+ { \"dense-math\",\t\tOPTION_MASK_DENSE_MATH,\t\tfalse, true },\n { \"direct-move\",\t\t0,\t\t\t\tfalse, true },\n { \"dlmzb\",\t\t\tOPTION_MASK_DLMZB,\t\tfalse, true },\n { \"efficient-unaligned-vsx\",\tOPTION_MASK_EFFICIENT_UNALIGNED_VSX,\ndiff --git a/gcc/config/rs6000/rs6000.h b/gcc/config/rs6000/rs6000.h\nindex 04709f0dcd6..91e60085515 100644\n--- a/gcc/config/rs6000/rs6000.h\n+++ b/gcc/config/rs6000/rs6000.h\n@@ -500,6 +500,12 @@ extern int rs6000_vector_align[];\n #define TARGET_MINMAX\t(TARGET_HARD_FLOAT && TARGET_PPC_GFXOPT\t\t\\\n \t\t\t && (TARGET_P9_MINMAX || !flag_trapping_math))\n \n+/* Define if the MMA subsystem uses ISA 3.1 where the accumulators are overlaid\n+ over VSX registers 0..31 or whether MMA uses separate dense math\n+ accumulators. */\n+#define TARGET_MMA_DENSE_MATH\t\t(TARGET_MMA && TARGET_DENSE_MATH)\n+#define TARGET_MMA_NO_DENSE_MATH\t(TARGET_MMA && !TARGET_DENSE_MATH)\n+\n /* In switching from using target_flags to using rs6000_isa_flags, the options\n machinery creates OPTION_MASK_<xxx> instead of MASK_<xxx>. The MASK_<xxxx>\n options that have not yet been replaced by their OPTION_MASK_<xxx>\ndiff --git a/gcc/config/rs6000/rs6000.opt b/gcc/config/rs6000/rs6000.opt\nindex 2b6ec5222fc..5bf1b98e4e7 100644\n--- a/gcc/config/rs6000/rs6000.opt\n+++ b/gcc/config/rs6000/rs6000.opt\n@@ -638,6 +638,10 @@ mieee128-constant\n Target Var(TARGET_IEEE128_CONSTANT) Init(1) Save\n Generate (do not generate) code that uses the LXVKQ instruction.\n \n+mdense-math\n+Target Mask(DENSE_MATH) Var(rs6000_isa_flags)\n+Generate (do not generate) instructions that use dense math registers.\n+\n ; Documented parameters\n \n -param=rs6000-vect-unroll-limit=\ndiff --git a/gcc/doc/invoke.texi b/gcc/doc/invoke.texi\nindex 2ee0af8faae..e3c5fc4cc9a 100644\n--- a/gcc/doc/invoke.texi\n+++ b/gcc/doc/invoke.texi\n@@ -32820,6 +32820,13 @@ This option is enabled by default.\n Enable or disable warnings about deprecated @samp{vector long ...} Altivec\n type usage. This option is enabled by default.\n \n+@opindex mdense-math\n+@opindex mno-dense-math\n+@item -mdense-math\n+@itemx -mno-dense-math\n+Generate (do not generate) code that uses the dense math registers.\n+This option is enabled by default.\n+\n @end table\n \n @node RX Options\n", "prefixes": [] }