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GET /api/patches/2230663/?format=api
{ "id": 2230663, "url": "http://patchwork.ozlabs.org/api/patches/2230663/?format=api", "web_url": "http://patchwork.ozlabs.org/project/qemu-devel/patch/20260430000524.56046-11-richard.henderson@linaro.org/", "project": { "id": 14, "url": "http://patchwork.ozlabs.org/api/projects/14/?format=api", "name": "QEMU Development", "link_name": "qemu-devel", "list_id": "qemu-devel.nongnu.org", "list_email": "qemu-devel@nongnu.org", "web_url": "", "scm_url": "", "webscm_url": "", "list_archive_url": "", "list_archive_url_format": "", "commit_url_format": "" }, "msgid": "<20260430000524.56046-11-richard.henderson@linaro.org>", "list_archive_url": null, "date": "2026-04-30T00:04:53", "name": "[v2,10/40] fpu: Export FloatFmt structures", "commit_ref": null, "pull_url": null, "state": "new", "archived": false, "hash": "b0e4c5c9d81773dd7d160aec83bcf852aa98eb7e", "submitter": { "id": 72104, "url": "http://patchwork.ozlabs.org/api/people/72104/?format=api", "name": "Richard Henderson", "email": "richard.henderson@linaro.org" }, "delegate": null, "mbox": "http://patchwork.ozlabs.org/project/qemu-devel/patch/20260430000524.56046-11-richard.henderson@linaro.org/mbox/", "series": [ { "id": 502170, "url": "http://patchwork.ozlabs.org/api/series/502170/?format=api", "web_url": "http://patchwork.ozlabs.org/project/qemu-devel/list/?series=502170", "date": "2026-04-30T00:04:48", "name": "fpu: Export some internals for targets", "version": 2, "mbox": "http://patchwork.ozlabs.org/series/502170/mbox/" } ], "comments": "http://patchwork.ozlabs.org/api/patches/2230663/comments/", "check": "pending", "checks": "http://patchwork.ozlabs.org/api/patches/2230663/checks/", "tags": {}, "related": [], "headers": { "Return-Path": "<qemu-devel-bounces+incoming=patchwork.ozlabs.org@nongnu.org>", "X-Original-To": "incoming@patchwork.ozlabs.org", "Delivered-To": "patchwork-incoming@legolas.ozlabs.org", "Authentication-Results": [ "legolas.ozlabs.org;\n\tdkim=pass (2048-bit key;\n unprotected) header.d=linaro.org header.i=@linaro.org header.a=rsa-sha256\n header.s=google header.b=lEcO4nFg;\n\tdkim-atps=neutral", "legolas.ozlabs.org;\n spf=pass (sender SPF authorized) smtp.mailfrom=nongnu.org\n (client-ip=209.51.188.17; helo=lists1p.gnu.org;\n envelope-from=qemu-devel-bounces+incoming=patchwork.ozlabs.org@nongnu.org;\n receiver=patchwork.ozlabs.org)" ], "Received": [ "from lists1p.gnu.org (lists1p.gnu.org [209.51.188.17])\n\t(using TLSv1.2 with cipher ECDHE-ECDSA-AES256-GCM-SHA384 (256/256 bits))\n\t(No client certificate requested)\n\tby legolas.ozlabs.org (Postfix) with ESMTPS id 4g5ZFt4qC7z1yHZ\n\tfor <incoming@patchwork.ozlabs.org>; Thu, 30 Apr 2026 10:06:10 +1000 (AEST)", "from localhost ([::1] helo=lists1p.gnu.org)\n\tby lists1p.gnu.org with esmtp (Exim 4.90_1)\n\t(envelope-from <qemu-devel-bounces@nongnu.org>)\n\tid 1wIEuk-0006RJ-Jn; Wed, 29 Apr 2026 20:05:58 -0400", "from eggs.gnu.org ([2001:470:142:3::10])\n by lists1p.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_256_GCM_SHA384:256)\n (Exim 4.90_1) (envelope-from <richard.henderson@linaro.org>)\n id 1wIEuh-0006GJ-DM\n for qemu-devel@nongnu.org; Wed, 29 Apr 2026 20:05:55 -0400", "from mail-pf1-x436.google.com ([2607:f8b0:4864:20::436])\n by eggs.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_128_GCM_SHA256:128)\n (Exim 4.90_1) (envelope-from <richard.henderson@linaro.org>)\n id 1wIEuf-0001lR-3B\n for qemu-devel@nongnu.org; Wed, 29 Apr 2026 20:05:55 -0400", "by mail-pf1-x436.google.com with SMTP id\n d2e1a72fcca58-824c9da9928so149271b3a.3\n for <qemu-devel@nongnu.org>; Wed, 29 Apr 2026 17:05:52 -0700 (PDT)", "from stoup.. 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helo=mail-pf1-x436.google.com", "X-Spam_score_int": "-20", "X-Spam_score": "-2.1", "X-Spam_bar": "--", "X-Spam_report": "(-2.1 / 5.0 requ) BAYES_00=-1.9, DKIM_SIGNED=0.1,\n DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1,\n RCVD_IN_DNSWL_NONE=-0.0001, SPF_HELO_NONE=0.001,\n SPF_PASS=-0.001 autolearn=ham autolearn_force=no", "X-Spam_action": "no action", "X-BeenThere": "qemu-devel@nongnu.org", "X-Mailman-Version": "2.1.29", "Precedence": "list", "List-Id": "qemu development <qemu-devel.nongnu.org>", "List-Unsubscribe": "<https://lists.nongnu.org/mailman/options/qemu-devel>,\n <mailto:qemu-devel-request@nongnu.org?subject=unsubscribe>", "List-Archive": "<https://lists.nongnu.org/archive/html/qemu-devel>", "List-Post": "<mailto:qemu-devel@nongnu.org>", "List-Help": "<mailto:qemu-devel-request@nongnu.org?subject=help>", "List-Subscribe": "<https://lists.nongnu.org/mailman/listinfo/qemu-devel>,\n <mailto:qemu-devel-request@nongnu.org?subject=subscribe>", "Errors-To": "qemu-devel-bounces+incoming=patchwork.ozlabs.org@nongnu.org", "Sender": "qemu-devel-bounces+incoming=patchwork.ozlabs.org@nongnu.org" }, "content": "Export most of the FloatFmt structures.\nSkip float16_params_ahp and the floatx80 precisions.\n\nSigned-off-by: Richard Henderson <richard.henderson@linaro.org>\n---\n include/fpu/softfloat-parts.h | 48 ++++++++++++++++++++++++++++++\n fpu/softfloat.c | 55 +++++------------------------------\n 2 files changed, 56 insertions(+), 47 deletions(-)", "diff": "diff --git a/include/fpu/softfloat-parts.h b/include/fpu/softfloat-parts.h\nindex 13c1f3d2d6..a3ae12bb45 100644\n--- a/include/fpu/softfloat-parts.h\n+++ b/include/fpu/softfloat-parts.h\n@@ -18,6 +18,54 @@\n #ifndef SOFTFLOAT_PARTS_H\n #define SOFTFLOAT_PARTS_H\n \n+/* Format-specific handling of exp == exp_max */\n+typedef enum __attribute__((__packed__)) {\n+ /* exp==max, frac==0 ? infinity : nan; this is ieee standard. */\n+ float_expmax_ieee,\n+ /* exp==max is a normal number; no infinity or nan representation. */\n+ float_expmax_normal,\n+ /* exp==max, frac==max ? nan : normal; no infinity representation. */\n+ float_expmax_e4m3,\n+} FloatFmtExpMaxKind;\n+\n+/*\n+ * Structure holding all of the relevant parameters for a format.\n+ * exp_size: the size of the exponent field\n+ * exp_bias: the offset applied to the exponent field\n+ * exp_max: the maximum normalised exponent\n+ * frac_size: the size of the fraction field\n+ * frac_shift: shift to normalise the fraction with DECOMPOSED_BINARY_POINT\n+ * The following are computed based the size of fraction\n+ * round_mask: bits below lsb which must be rounded\n+ * The following optional modifiers are available:\n+ * exp_max_kind: affects how exp == exp_max is interpreted\n+ * has_explicit_bit: has an explicit integer bit; this affects whether\n+ * the float_status floatx80_behaviour handling applies\n+ * overflow_raises_invalid: for float_expmax_normal, raise invalid\n+ * instead of overflow.\n+ */\n+typedef struct {\n+ int exp_size;\n+ int exp_bias;\n+ int exp_re_bias;\n+ int exp_max;\n+ int frac_size;\n+ int frac_shift;\n+ FloatFmtExpMaxKind exp_max_kind;\n+ bool has_explicit_bit;\n+ bool overflow_raises_invalid;\n+ uint64_t round_mask;\n+} FloatFmt;\n+\n+extern const FloatFmt float4_e2m1_params;\n+extern const FloatFmt float8_e4m3_params;\n+extern const FloatFmt float8_e5m2_params;\n+extern const FloatFmt float16_params;\n+extern const FloatFmt bfloat16_params;\n+extern const FloatFmt float32_params;\n+extern const FloatFmt float64_params;\n+extern const FloatFmt float128_params;\n+\n /*\n * Classify a floating point number. Everything above float_class_qnan\n * is a NaN so cls >= float_class_qnan is any NaN.\ndiff --git a/fpu/softfloat.c b/fpu/softfloat.c\nindex cd75df3160..d3277e3f60 100644\n--- a/fpu/softfloat.c\n+++ b/fpu/softfloat.c\n@@ -457,45 +457,6 @@ typedef struct {\n #define DECOMPOSED_BINARY_POINT 63\n #define DECOMPOSED_IMPLICIT_BIT (1ull << DECOMPOSED_BINARY_POINT)\n \n-/* Format-specific handling of exp == exp_max */\n-typedef enum __attribute__((__packed__)) {\n- /* exp==max, frac==0 ? infinity : nan; this is ieee standard. */\n- float_expmax_ieee,\n- /* exp==max is a normal number; no infinity or nan representation. */\n- float_expmax_normal,\n- /* exp==max, frac==max ? nan : normal; no infinity representation. */\n- float_expmax_e4m3,\n-} FloatFmtExpMaxKind;\n-\n-/*\n- * Structure holding all of the relevant parameters for a format.\n- * exp_size: the size of the exponent field\n- * exp_bias: the offset applied to the exponent field\n- * exp_max: the maximum normalised exponent\n- * frac_size: the size of the fraction field\n- * frac_shift: shift to normalise the fraction with DECOMPOSED_BINARY_POINT\n- * The following are computed based the size of fraction\n- * round_mask: bits below lsb which must be rounded\n- * The following optional modifiers are available:\n- * exp_max_kind: affects how exp == exp_max is interpreted\n- * has_explicit_bit: has an explicit integer bit; this affects whether\n- * the float_status floatx80_behaviour handling applies\n- * overflow_raises_invalid: for float_expmax_normal, raise invalid\n- * instead of overflow.\n- */\n-typedef struct {\n- int exp_size;\n- int exp_bias;\n- int exp_re_bias;\n- int exp_max;\n- int frac_size;\n- int frac_shift;\n- FloatFmtExpMaxKind exp_max_kind;\n- bool has_explicit_bit;\n- bool overflow_raises_invalid;\n- uint64_t round_mask;\n-} FloatFmt;\n-\n /* Expand fields based on the size of exponent and fraction */\n #define FLOAT_PARAMS_(E) \\\n .exp_size = E, \\\n@@ -509,12 +470,12 @@ typedef struct {\n .frac_shift = (-F - 1) & 63, \\\n .round_mask = (1ull << ((-F - 1) & 63)) - 1\n \n-static const FloatFmt float4_e2m1_params = {\n+const FloatFmt float4_e2m1_params = {\n FLOAT_PARAMS(2, 1),\n .exp_max_kind = float_expmax_normal,\n };\n \n-static const FloatFmt float8_e4m3_params = {\n+const FloatFmt float8_e4m3_params = {\n FLOAT_PARAMS(4, 3),\n .exp_max_kind = float_expmax_e4m3\n };\n@@ -522,11 +483,11 @@ static const FloatFmt float8_e4m3_params = {\n /* 110 << frac_shift, with the implicit bit set */\n #define E4M3_NORMAL_FRAC_MAX 0xe000000000000000ull\n \n-static const FloatFmt float8_e5m2_params = {\n+const FloatFmt float8_e5m2_params = {\n FLOAT_PARAMS(5, 2)\n };\n \n-static const FloatFmt float16_params = {\n+const FloatFmt float16_params = {\n FLOAT_PARAMS(5, 10)\n };\n \n@@ -536,19 +497,19 @@ static const FloatFmt float16_params_ahp = {\n .overflow_raises_invalid = true,\n };\n \n-static const FloatFmt bfloat16_params = {\n+const FloatFmt bfloat16_params = {\n FLOAT_PARAMS(8, 7)\n };\n \n-static const FloatFmt float32_params = {\n+const FloatFmt float32_params = {\n FLOAT_PARAMS(8, 23)\n };\n \n-static const FloatFmt float64_params = {\n+const FloatFmt float64_params = {\n FLOAT_PARAMS(11, 52)\n };\n \n-static const FloatFmt float128_params = {\n+const FloatFmt float128_params = {\n FLOAT_PARAMS(15, 112)\n };\n \n", "prefixes": [ "v2", "10/40" ] }