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GET /api/patches/2230612/?format=api
{ "id": 2230612, "url": "http://patchwork.ozlabs.org/api/patches/2230612/?format=api", "web_url": "http://patchwork.ozlabs.org/project/qemu-devel/patch/20260429222445.26301-18-richard.henderson@linaro.org/", "project": { "id": 14, "url": "http://patchwork.ozlabs.org/api/projects/14/?format=api", "name": "QEMU Development", "link_name": "qemu-devel", "list_id": "qemu-devel.nongnu.org", "list_email": "qemu-devel@nongnu.org", "web_url": "", "scm_url": "", "webscm_url": "", "list_archive_url": "", "list_archive_url_format": "", "commit_url_format": "" }, "msgid": "<20260429222445.26301-18-richard.henderson@linaro.org>", "list_archive_url": null, "date": "2026-04-29T22:24:14", "name": "[PULL,17/48] fpu: Drop parts_round_to_int_normal", "commit_ref": null, "pull_url": null, "state": "new", "archived": false, "hash": "07e8dd0272ee1cbf9410caa45efaf8b6117dd058", "submitter": { "id": 72104, "url": "http://patchwork.ozlabs.org/api/people/72104/?format=api", "name": "Richard Henderson", "email": "richard.henderson@linaro.org" }, "delegate": null, "mbox": "http://patchwork.ozlabs.org/project/qemu-devel/patch/20260429222445.26301-18-richard.henderson@linaro.org/mbox/", "series": [ { "id": 502161, "url": "http://patchwork.ozlabs.org/api/series/502161/?format=api", "web_url": "http://patchwork.ozlabs.org/project/qemu-devel/list/?series=502161", "date": "2026-04-29T22:23:57", "name": "[PULL,01/48] fpu: Drop parts_canonicalize", "version": 1, "mbox": "http://patchwork.ozlabs.org/series/502161/mbox/" } ], "comments": "http://patchwork.ozlabs.org/api/patches/2230612/comments/", "check": "pending", "checks": "http://patchwork.ozlabs.org/api/patches/2230612/checks/", "tags": {}, "related": [], "headers": { "Return-Path": "<qemu-devel-bounces+incoming=patchwork.ozlabs.org@nongnu.org>", "X-Original-To": "incoming@patchwork.ozlabs.org", "Delivered-To": "patchwork-incoming@legolas.ozlabs.org", "Authentication-Results": [ "legolas.ozlabs.org;\n\tdkim=pass (2048-bit key;\n unprotected) header.d=linaro.org header.i=@linaro.org header.a=rsa-sha256\n header.s=google header.b=N3mJvLoa;\n\tdkim-atps=neutral", "legolas.ozlabs.org;\n spf=pass (sender SPF authorized) smtp.mailfrom=nongnu.org\n (client-ip=209.51.188.17; helo=lists1p.gnu.org;\n envelope-from=qemu-devel-bounces+incoming=patchwork.ozlabs.org@nongnu.org;\n receiver=patchwork.ozlabs.org)" ], "Received": [ "from lists1p.gnu.org (lists1p.gnu.org [209.51.188.17])\n\t(using TLSv1.2 with cipher ECDHE-ECDSA-AES256-GCM-SHA384 (256/256 bits))\n\t(No client certificate requested)\n\tby legolas.ozlabs.org (Postfix) with ESMTPS id 4g5X423pcVz1yHZ\n\tfor <incoming@patchwork.ozlabs.org>; Thu, 30 Apr 2026 08:27:30 +1000 (AEST)", "from localhost ([::1] helo=lists1p.gnu.org)\n\tby lists1p.gnu.org with esmtp (Exim 4.90_1)\n\t(envelope-from <qemu-devel-bounces@nongnu.org>)\n\tid 1wIDLj-0000NH-MH; Wed, 29 Apr 2026 18:25:43 -0400", "from eggs.gnu.org ([2001:470:142:3::10])\n by lists1p.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_256_GCM_SHA384:256)\n (Exim 4.90_1) (envelope-from <richard.henderson@linaro.org>)\n id 1wIDLe-0000H9-7y\n for qemu-devel@nongnu.org; Wed, 29 Apr 2026 18:25:39 -0400", "from mail-pj1-x1033.google.com ([2607:f8b0:4864:20::1033])\n by eggs.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_128_GCM_SHA256:128)\n (Exim 4.90_1) (envelope-from <richard.henderson@linaro.org>)\n id 1wIDLc-0004tb-Ff\n for qemu-devel@nongnu.org; Wed, 29 Apr 2026 18:25:37 -0400", "by mail-pj1-x1033.google.com with SMTP id\n 98e67ed59e1d1-3614826eca4so214730a91.1\n for <qemu-devel@nongnu.org>; Wed, 29 Apr 2026 15:25:36 -0700 (PDT)", "from stoup.. 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charset=UTF-8", "Content-Transfer-Encoding": "8bit", "Received-SPF": "pass client-ip=2607:f8b0:4864:20::1033;\n envelope-from=richard.henderson@linaro.org; helo=mail-pj1-x1033.google.com", "X-Spam_score_int": "-20", "X-Spam_score": "-2.1", "X-Spam_bar": "--", "X-Spam_report": "(-2.1 / 5.0 requ) BAYES_00=-1.9, DKIM_SIGNED=0.1,\n DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1,\n RCVD_IN_DNSWL_NONE=-0.0001, SPF_HELO_NONE=0.001,\n SPF_PASS=-0.001 autolearn=ham autolearn_force=no", "X-Spam_action": "no action", "X-BeenThere": "qemu-devel@nongnu.org", "X-Mailman-Version": "2.1.29", "Precedence": "list", "List-Id": "qemu development <qemu-devel.nongnu.org>", "List-Unsubscribe": "<https://lists.nongnu.org/mailman/options/qemu-devel>,\n <mailto:qemu-devel-request@nongnu.org?subject=unsubscribe>", "List-Archive": "<https://lists.nongnu.org/archive/html/qemu-devel>", "List-Post": "<mailto:qemu-devel@nongnu.org>", "List-Help": "<mailto:qemu-devel-request@nongnu.org?subject=help>", "List-Subscribe": "<https://lists.nongnu.org/mailman/listinfo/qemu-devel>,\n <mailto:qemu-devel-request@nongnu.org?subject=subscribe>", "Errors-To": "qemu-devel-bounces+incoming=patchwork.ozlabs.org@nongnu.org", "Sender": "qemu-devel-bounces+incoming=patchwork.ozlabs.org@nongnu.org" }, "content": "Reviewed-by: Philippe Mathieu-Daudé <philmd@linaro.org>\nSigned-off-by: Richard Henderson <richard.henderson@linaro.org>\n---\n fpu/softfloat.c | 22 +++++++---------------\n fpu/softfloat-parts.c.inc | 10 +++++-----\n 2 files changed, 12 insertions(+), 20 deletions(-)", "diff": "diff --git a/fpu/softfloat.c b/fpu/softfloat.c\nindex 0a6bc6d580..1f03fcf687 100644\n--- a/fpu/softfloat.c\n+++ b/fpu/softfloat.c\n@@ -779,14 +779,6 @@ static float128 QEMU_FLATTEN float128_pack_raw(const FloatParts128 *p)\n FloatParts128 *: parts128_##NAME, \\\n FloatParts256 *: parts256_##NAME)\n \n-static bool parts64_round_to_int_normal(FloatParts64 *a, FloatRoundMode rm,\n- int scale, int frac_size);\n-static bool parts128_round_to_int_normal(FloatParts128 *a, FloatRoundMode r,\n- int scale, int frac_size);\n-\n-#define parts_round_to_int_normal(A, R, C, F) \\\n- PARTS_GENERIC_64_128(round_to_int_normal, A)(A, R, C, F)\n-\n static void parts64_round_to_int(FloatParts64 *a, FloatRoundMode rm,\n int scale, float_status *s,\n const FloatFmt *fmt);\n@@ -3365,7 +3357,7 @@ static Int128 float128_to_int128_scalbn(float128 a, FloatRoundMode rmode,\n \n case float_class_normal:\n case float_class_denormal:\n- if (parts_round_to_int_normal(&p, rmode, scale, 128 - 2)) {\n+ if (parts128_round_to_int_normal(&p, rmode, scale, 128 - 2)) {\n flags = float_flag_inexact;\n }\n \n@@ -3793,7 +3785,7 @@ static Int128 float128_to_uint128_scalbn(float128 a, FloatRoundMode rmode,\n \n case float_class_normal:\n case float_class_denormal:\n- if (parts_round_to_int_normal(&p, rmode, scale, 128 - 2)) {\n+ if (parts128_round_to_int_normal(&p, rmode, scale, 128 - 2)) {\n flags = float_flag_inexact;\n if (p.cls == float_class_zero) {\n r = int128_zero();\n@@ -5482,11 +5474,11 @@ static void parts_s390_divide_to_integer(FloatParts64 *a, FloatParts64 *b,\n * of distinguishing partial quotients, so ignore the exception.\n */\n *n = *q;\n- parts_round_to_int_normal(n,\n- is_q_smallish ?\n- final_quotient_rounding_mode :\n- float_round_to_zero,\n- 0, fmt->frac_size);\n+ parts64_round_to_int_normal(n,\n+ is_q_smallish\n+ ? final_quotient_rounding_mode\n+ : float_round_to_zero,\n+ 0, fmt->frac_size);\n \n /* Compute precise remainder */\n r_precise_buf = *b;\ndiff --git a/fpu/softfloat-parts.c.inc b/fpu/softfloat-parts.c.inc\nindex 6e1800b117..9b719ac5cf 100644\n--- a/fpu/softfloat-parts.c.inc\n+++ b/fpu/softfloat-parts.c.inc\n@@ -1127,7 +1127,7 @@ static void partsN(sqrt)(FloatPartsN *a, float_status *status,\n * according to the IEC/IEEE Standard for Binary Floating-Point\n * Arithmetic.\n *\n- * parts_round_to_int_normal is an internal helper function for\n+ * partsN(round_to_int_normal) is an internal helper function for\n * normal numbers only, returning true for inexact but not directly\n * raising float_flag_inexact.\n */\n@@ -1270,7 +1270,7 @@ static void partsN(round_to_int)(FloatPartsN *a, FloatRoundMode rmode,\n break;\n case float_class_normal:\n case float_class_denormal:\n- if (parts_round_to_int_normal(a, rmode, scale, fmt->frac_size)) {\n+ if (partsN(round_to_int_normal)(a, rmode, scale, fmt->frac_size)) {\n float_raise(float_flag_inexact, s);\n }\n break;\n@@ -1316,7 +1316,7 @@ static int64_t partsN(float_to_sint)(FloatPartsN *p, FloatRoundMode rmode,\n case float_class_normal:\n case float_class_denormal:\n /* TODO: N - 2 is frac_size for rounding; could use input fmt. */\n- if (parts_round_to_int_normal(p, rmode, scale, N - 2)) {\n+ if (partsN(round_to_int_normal)(p, rmode, scale, N - 2)) {\n flags = float_flag_inexact;\n }\n \n@@ -1384,7 +1384,7 @@ static uint64_t partsN(float_to_uint)(FloatPartsN *p, FloatRoundMode rmode,\n case float_class_normal:\n case float_class_denormal:\n /* TODO: N - 2 is frac_size for rounding; could use input fmt. */\n- if (parts_round_to_int_normal(p, rmode, scale, N - 2)) {\n+ if (partsN(round_to_int_normal)(p, rmode, scale, N - 2)) {\n flags = float_flag_inexact;\n if (p->cls == float_class_zero) {\n r = 0;\n@@ -1448,7 +1448,7 @@ static int64_t partsN(float_to_sint_modulo)(FloatPartsN *p,\n case float_class_normal:\n case float_class_denormal:\n /* TODO: N - 2 is frac_size for rounding; could use input fmt. */\n- if (parts_round_to_int_normal(p, rmode, 0, N - 2)) {\n+ if (partsN(round_to_int_normal)(p, rmode, 0, N - 2)) {\n flags = float_flag_inexact;\n }\n \n", "prefixes": [ "PULL", "17/48" ] }