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{ "id": 2230577, "url": "http://patchwork.ozlabs.org/api/patches/2230577/?format=api", "web_url": "http://patchwork.ozlabs.org/project/uboot/patch/20260429-add-ethernet-support-for-genio-520-720-v4-4-be54e17239b7@baylibre.com/", "project": { "id": 18, "url": "http://patchwork.ozlabs.org/api/projects/18/?format=api", "name": "U-Boot", "link_name": "uboot", "list_id": "u-boot.lists.denx.de", "list_email": "u-boot@lists.denx.de", "web_url": null, "scm_url": null, "webscm_url": null, "list_archive_url": "", "list_archive_url_format": "", "commit_url_format": "" }, "msgid": "<20260429-add-ethernet-support-for-genio-520-720-v4-4-be54e17239b7@baylibre.com>", "list_archive_url": null, "date": "2026-04-29T13:58:57", "name": "[v4,4/9] net: Fix alphabetical ordering in drivers/net/Kconfig", "commit_ref": null, "pull_url": null, "state": "new", "archived": false, "hash": "b6e9c9fa098a648a909ad080468dddcc7f6d7c27", "submitter": { "id": 84831, "url": "http://patchwork.ozlabs.org/api/people/84831/?format=api", "name": "Julien Stephan", "email": "jstephan@baylibre.com" }, "delegate": { "id": 161331, "url": "http://patchwork.ozlabs.org/api/users/161331/?format=api", "username": "dlech", "first_name": "David", "last_name": "Lechner", "email": "dlechner@baylibre.com" }, "mbox": "http://patchwork.ozlabs.org/project/uboot/patch/20260429-add-ethernet-support-for-genio-520-720-v4-4-be54e17239b7@baylibre.com/mbox/", "series": [ { "id": 502153, "url": "http://patchwork.ozlabs.org/api/series/502153/?format=api", "web_url": "http://patchwork.ozlabs.org/project/uboot/list/?series=502153", "date": "2026-04-29T13:58:53", "name": "Add ethernet support for genio 520/720 EVK boards", "version": 4, "mbox": "http://patchwork.ozlabs.org/series/502153/mbox/" } ], "comments": "http://patchwork.ozlabs.org/api/patches/2230577/comments/", "check": "pending", "checks": "http://patchwork.ozlabs.org/api/patches/2230577/checks/", "tags": {}, "related": [], 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<20260429-add-ethernet-support-for-genio-520-720-v4-0-be54e17239b7@baylibre.com>", "To": "u-boot@lists.denx.de", "Cc": "GSS_MTK_Uboot_upstream <GSS_MTK_Uboot_upstream@mediatek.com>,\n Jerome Forissier <jerome.forissier@arm.com>, Tom Rini <trini@konsulko.com>,\n Christian Marangi <ansuelsmth@gmail.com>,\n Robert Marko <robert.marko@sartura.hr>, Simon Glass <sjg@chromium.org>,\n Yao Zi <me@ziyao.cc>, Quentin Schulz <quentin.schulz@cherry.de>,\n Mikhail Kshevetskiy <mikhail.kshevetskiy@iopsys.eu>,\n Marek Vasut <marek.vasut+renesas@mailbox.org>,\n \"Lucien.Jheng\" <lucienzx159@gmail.com>,\n Weijie Gao <weijie.gao@mediatek.com>,\n Romain Gantois <romain.gantois@bootlin.com>,\n Siddharth Vadapalli <s-vadapalli@ti.com>,\n Yanqing Wang <ot_yanqing.wang@mediatek.com>, Beiyan Yun <root@infi.wang>,\n Ryder Lee <ryder.lee@mediatek.com>,\n Chunfeng Yun <chunfeng.yun@mediatek.com>,\n Igor Belwon <igor.belwon@mentallysanemainliners.org>,\n David Lechner <dlechner@baylibre.com>,\n Neil Armstrong <neil.armstrong@linaro.org>,\n Kory Maincent <kory.maincent@bootlin.com>,\n Ilias Apalodimas <ilias.apalodimas@linaro.org>,\n Kuan-Wei Chiu <visitorckw@gmail.com>,\n Raymond Mao <raymond.mao@riscstar.com>, Peng Fan <peng.fan@nxp.com>,\n Stefan Roese <stefan.roese@mailbox.org>,\n Philip Molloy <philip.molloy@analog.com>,\n fanyi zhang <fanyi.zhang@mediatek.com>, Jonas Karlman <jonas@kwiboo.se>,\n Kever Yang <kever.yang@rock-chips.com>,\n Marek Vasut <marek.vasut@mailbox.org>,\n Patrick Delaunay <patrick.delaunay@foss.st.com>,\n Heiko Stuebner <heiko@sntech.de>,\n Samuel Holland <samuel.holland@sifive.com>,\n Christophe Roullier <christophe.roullier@foss.st.com>,\n Patrice Chotard <patrice.chotard@foss.st.com>,\n Chris-QJ Chen <chris-qj.chen@mediatek.com>,\n Macpaul Lin <macpaul.lin@mediatek.com>,\n Sam Protsenko <semen.protsenko@linaro.org>,\n Michael Trimarchi <michael@amarulasolutions.com>,\n Sky Huang <SkyLake.Huang@mediatek.com>,\n Leo Yu-Chi Liang <ycliang@andestech.com>,\n Tommy Shih <tommy.shih@airoha.com>,\n Kevin-KW Huang <kevin-kw.huang@airoha.com>,\n Peter Robinson <pbrobinson@gmail.com>,\n Julien Stephan <jstephan@baylibre.com>", "X-Mailer": "b4 0.14.3", "X-Mailman-Approved-At": "Wed, 29 Apr 2026 23:15:47 +0200", "X-BeenThere": "u-boot@lists.denx.de", "X-Mailman-Version": "2.1.39", "Precedence": "list", "List-Id": "U-Boot discussion <u-boot.lists.denx.de>", "List-Unsubscribe": "<https://lists.denx.de/options/u-boot>,\n <mailto:u-boot-request@lists.denx.de?subject=unsubscribe>", "List-Archive": "<https://lists.denx.de/pipermail/u-boot/>", "List-Post": "<mailto:u-boot@lists.denx.de>", "List-Help": "<mailto:u-boot-request@lists.denx.de?subject=help>", "List-Subscribe": "<https://lists.denx.de/listinfo/u-boot>,\n <mailto:u-boot-request@lists.denx.de?subject=subscribe>", "Errors-To": "u-boot-bounces@lists.denx.de", "Sender": "\"U-Boot\" <u-boot-bounces@lists.denx.de>", "X-Virus-Scanned": "clamav-milter 0.103.8 at phobos.denx.de", "X-Virus-Status": "Clean" }, "content": "Reorder entries under DWC_ETH_QOS to maintain alphabetical sorting by\nCONFIG_ names:\n- Move CONFIG_DWC_ETH_QOS_QCOM before CONFIG_DWC_ETH_QOS_ROCKCHIP\n- Move CONFIG_DWC_ETH_QOS_STARFIVE after CONFIG_DWC_ETH_QOS_ROCKCHIP\n\nSigned-off-by: Julien Stephan <jstephan@baylibre.com>\n---\n drivers/net/Kconfig | 28 ++++++++++++++--------------\n 1 file changed, 14 insertions(+), 14 deletions(-)", "diff": "diff --git a/drivers/net/Kconfig b/drivers/net/Kconfig\nindex 666618681df..15a4b3b7705 100644\n--- a/drivers/net/Kconfig\n+++ b/drivers/net/Kconfig\n@@ -246,6 +246,13 @@ config DWC_ETH_QOS_INTEL\n \t The Synopsys Designware Ethernet QOS IP block with the specific\n \t configuration used in the Intel Elkhart-Lake soc.\n \n+config DWC_ETH_QOS_QCOM\n+\tbool \"Synopsys DWC Ethernet QOS device support for Qcom SoCs\"\n+\tdepends on DWC_ETH_QOS\n+\thelp\n+\t The Synopsys Designware Ethernet QOS IP block with specific\n+\t configuration used in Qcom QCS404 SoC.\n+\n config DWC_ETH_QOS_ROCKCHIP\n \tbool \"Synopsys DWC Ethernet QOS device support for Rockchip SoCs\"\n \tdepends on DWC_ETH_QOS && ARCH_ROCKCHIP\n@@ -254,6 +261,13 @@ config DWC_ETH_QOS_ROCKCHIP\n \t The Synopsys Designware Ethernet QOS IP block with specific\n \t configuration used in Rockchip SoCs.\n \n+config DWC_ETH_QOS_STARFIVE\n+\tbool \"Synopsys DWC Ethernet QOS device support for STARFIVE\"\n+\tdepends on DWC_ETH_QOS\n+\thelp\n+\t The Synopsys Designware Ethernet QOS IP block with specific\n+\t configuration used in STARFIVE JH7110 soc.\n+\n config DWC_ETH_QOS_STM32\n \tbool \"Synopsys DWC Ethernet QOS device support for STM32\"\n \tdepends on DWC_ETH_QOS && ARCH_STM32MP\n@@ -271,20 +285,6 @@ config DWC_ETH_QOS_TEGRA186\n \t The Synopsys Designware Ethernet QOS IP block with specific\n \t configuration used in NVIDIA's Tegra186 chip.\n \n-config DWC_ETH_QOS_QCOM\n-\tbool \"Synopsys DWC Ethernet QOS device support for Qcom SoCs\"\n-\tdepends on DWC_ETH_QOS\n-\thelp\n-\t The Synopsys Designware Ethernet QOS IP block with specific\n-\t configuration used in Qcom QCS404 SoC.\n-\n-config DWC_ETH_QOS_STARFIVE\n-\tbool \"Synopsys DWC Ethernet QOS device support for STARFIVE\"\n-\tdepends on DWC_ETH_QOS\n-\thelp\n-\t The Synopsys Designware Ethernet QOS IP block with specific\n-\t configuration used in STARFIVE JH7110 soc.\n-\n config E1000\n \tbool \"Intel PRO/1000 Gigabit Ethernet support\"\n \tdepends on PCI\n", "prefixes": [ "v4", "4/9" ] }