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GET /api/patches/2228716/?format=api
{ "id": 2228716, "url": "http://patchwork.ozlabs.org/api/patches/2228716/?format=api", "web_url": "http://patchwork.ozlabs.org/project/linux-pci/patch/20260427085843.42460-3-fengchengwen@huawei.com/", "project": { "id": 28, "url": "http://patchwork.ozlabs.org/api/projects/28/?format=api", "name": "Linux PCI development", "link_name": "linux-pci", "list_id": "linux-pci.vger.kernel.org", "list_email": "linux-pci@vger.kernel.org", "web_url": null, "scm_url": null, "webscm_url": null, "list_archive_url": "", "list_archive_url_format": "", "commit_url_format": "" }, "msgid": "<20260427085843.42460-3-fengchengwen@huawei.com>", "list_archive_url": null, "date": "2026-04-27T08:58:39", "name": "[v5,2/6] PCI/TPH: Export pcie_tph_get_st_modes() for external use", "commit_ref": null, "pull_url": null, "state": "new", "archived": false, "hash": "aa2d02f7f456dd7a1bdeb3ea114f70044f6833e6", "submitter": { "id": 92756, "url": "http://patchwork.ozlabs.org/api/people/92756/?format=api", "name": "Chengwen Feng", "email": "fengchengwen@huawei.com" }, "delegate": null, "mbox": "http://patchwork.ozlabs.org/project/linux-pci/patch/20260427085843.42460-3-fengchengwen@huawei.com/mbox/", "series": [ { "id": 501609, "url": "http://patchwork.ozlabs.org/api/series/501609/?format=api", "web_url": "http://patchwork.ozlabs.org/project/linux-pci/list/?series=501609", "date": "2026-04-27T08:58:42", "name": "vfio/pci: Add PCIe TPH support", "version": 5, "mbox": "http://patchwork.ozlabs.org/series/501609/mbox/" } ], "comments": "http://patchwork.ozlabs.org/api/patches/2228716/comments/", "check": "pending", "checks": "http://patchwork.ozlabs.org/api/patches/2228716/checks/", "tags": {}, "related": [], "headers": { "Return-Path": "\n <linux-pci+bounces-53206-incoming=patchwork.ozlabs.org@vger.kernel.org>", "X-Original-To": [ "incoming@patchwork.ozlabs.org", "linux-pci@vger.kernel.org" ], "Delivered-To": "patchwork-incoming@legolas.ozlabs.org", "Authentication-Results": [ "legolas.ozlabs.org;\n\tdkim=pass (1024-bit key;\n unprotected) header.d=huawei.com header.i=@huawei.com header.a=rsa-sha256\n header.s=dkim header.b=Jyi5Z8br;\n\tdkim-atps=neutral", "legolas.ozlabs.org;\n spf=pass (sender SPF authorized) smtp.mailfrom=vger.kernel.org\n (client-ip=2600:3c04:e001:36c::12fc:5321; helo=tor.lore.kernel.org;\n envelope-from=linux-pci+bounces-53206-incoming=patchwork.ozlabs.org@vger.kernel.org;\n receiver=patchwork.ozlabs.org)", "smtp.subspace.kernel.org;\n\tdkim=pass (1024-bit key) header.d=huawei.com header.i=@huawei.com\n header.b=\"Jyi5Z8br\"", "smtp.subspace.kernel.org;\n arc=none smtp.client-ip=113.46.200.221", "smtp.subspace.kernel.org;\n dmarc=pass (p=quarantine dis=none) header.from=huawei.com", "smtp.subspace.kernel.org;\n spf=pass smtp.mailfrom=huawei.com" ], "Received": [ "from tor.lore.kernel.org (tor.lore.kernel.org\n [IPv6:2600:3c04:e001:36c::12fc:5321])\n\t(using TLSv1.3 with cipher TLS_AES_256_GCM_SHA384 (256/256 bits)\n\t key-exchange x25519)\n\t(No client certificate requested)\n\tby legolas.ozlabs.org (Postfix) with ESMTPS id 4g3yHY3yfzz1yJX\n\tfor <incoming@patchwork.ozlabs.org>; Mon, 27 Apr 2026 19:02:01 +1000 (AEST)", "from smtp.subspace.kernel.org (conduit.subspace.kernel.org\n [100.90.174.1])\n\tby tor.lore.kernel.org (Postfix) with ESMTP id 3C9C1301877C\n\tfor <incoming@patchwork.ozlabs.org>; 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Mon, 27 Apr 2026 16:58:49 +0800" ], "ARC-Seal": "i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116;\n\tt=1777280336; cv=none;\n b=Zis5YK9I9urYOSZLFtIDzhNtks/OBh2EwjR+HS9LF0CPczmCM/1L4PRTJ3Oxh3voVTSEVC4/+/GZuECKyNmxjawXLIiMPd/qGSNsbtWg2IxdS7wAkRp2sWoeC4r/3miUzBtUkmfiUDITFaRF3H9I82ji4twPm0FXgANL8vL4gBk=", "ARC-Message-Signature": "i=1; a=rsa-sha256; d=subspace.kernel.org;\n\ts=arc-20240116; t=1777280336; c=relaxed/simple;\n\tbh=6qathRGnGP9yE5UoaN2GwAxh+0MDThBzSvSSUJuR4kE=;\n\th=From:To:CC:Subject:Date:Message-ID:In-Reply-To:References:\n\t MIME-Version:Content-Type;\n b=f2MMWyv1tESiVL6xMbveHNQcKOyvXrMFIIb2yFbb3J2k4T0p2ZxPAoa0ixvspo5VgQQ6AnR/LntkS3v7mhcjDPNibeoTGW4GSkyyPXMvrvggPvDodDTA2wVIc5deTBme9/BGBT3mmi7Z/+vVPXxEIXO5gDImNl8pRGhCCIPef4o=", "ARC-Authentication-Results": "i=1; smtp.subspace.kernel.org;\n dmarc=pass (p=quarantine dis=none) header.from=huawei.com;\n spf=pass smtp.mailfrom=huawei.com;\n dkim=pass (1024-bit key) header.d=huawei.com header.i=@huawei.com\n header.b=Jyi5Z8br; arc=none smtp.client-ip=113.46.200.221", "dkim-signature": "v=1; a=rsa-sha256; d=huawei.com; s=dkim;\n\tc=relaxed/relaxed; q=dns/txt;\n\th=From;\n\tbh=korfu+g3aejVDVbZAS1D6jrYvlSOL5yJV1X9i0GngFw=;\n\tb=Jyi5Z8br6y3ZCzmZRVokwqqUBUs50sJZTf2YqlkSRDQV7Xpkda37hZbBzmuyNiZ9qfmfYZghw\n\txQlzTu/312Dimz56m26ufatSGrX8sgf4MkSmZVMc2CmKg/PBZZvLapxZBbmnvlFNyJSwz0mEZ+Y\n\taqg22K04in3f3JLjY0FAKp4=", "From": "Chengwen Feng <fengchengwen@huawei.com>", "To": "<alex@shazbot.org>, <jgg@ziepe.ca>", "CC": "<wathsala.vithanage@arm.com>, <helgaas@kernel.org>,\n\t<wangzhou1@hisilicon.com>, <wangyushan12@huawei.com>,\n\t<liuyonglong@huawei.com>, <kvm@vger.kernel.org>, <linux-pci@vger.kernel.org>", "Subject": "[PATCH v5 2/6] PCI/TPH: Export pcie_tph_get_st_modes() for external\n use", "Date": "Mon, 27 Apr 2026 16:58:39 +0800", "Message-ID": "<20260427085843.42460-3-fengchengwen@huawei.com>", "X-Mailer": "git-send-email 2.17.1", "In-Reply-To": "<20260427085843.42460-1-fengchengwen@huawei.com>", "References": "<20260427085843.42460-1-fengchengwen@huawei.com>", "Precedence": "bulk", "X-Mailing-List": "linux-pci@vger.kernel.org", "List-Id": "<linux-pci.vger.kernel.org>", "List-Subscribe": "<mailto:linux-pci+subscribe@vger.kernel.org>", "List-Unsubscribe": "<mailto:linux-pci+unsubscribe@vger.kernel.org>", "MIME-Version": "1.0", "Content-Type": "text/plain", "X-ClientProxiedBy": "kwepems100002.china.huawei.com (7.221.188.206) To\n kwepemk500009.china.huawei.com (7.202.194.94)" }, "content": "Export the helper to retrieve supported PCIe TPH steering tag modes so\nthat drivers like VFIO can query and expose device capabilities to\nuserspace.\n\nAnd also add pcie_tph_get_st_table_size() and\npcie_tph_get_st_table_loc() stub implementation in the !CONFIG_PCI_TPH\ncase.\n\nSigned-off-by: Chengwen Feng <fengchengwen@huawei.com>\nAcked-by: Bjorn Helgaas <bhelgaas@google.com>\n---\n drivers/pci/tph.c | 13 +++++++++++--\n include/linux/pci-tph.h | 7 +++++++\n 2 files changed, 18 insertions(+), 2 deletions(-)", "diff": "diff --git a/drivers/pci/tph.c b/drivers/pci/tph.c\nindex f17b74b5fb1e..32b5f42370cf 100644\n--- a/drivers/pci/tph.c\n+++ b/drivers/pci/tph.c\n@@ -145,7 +145,15 @@ static void set_ctrl_reg_req_en(struct pci_dev *pdev, u8 req_type)\n \tpci_write_config_dword(pdev, pdev->tph_cap + PCI_TPH_CTRL, reg);\n }\n \n-static u8 get_st_modes(struct pci_dev *pdev)\n+/**\n+ * pcie_tph_get_st_modes - Get supported Steering Tag modes\n+ * @pdev: PCI device to query\n+ *\n+ * Return:\n+ * Bitmask of supported ST modes (PCI_TPH_CAP_ST_NS, PCI_TPH_CAP_ST_IV,\n+ * PCI_TPH_CAP_ST_DS)\n+ */\n+u8 pcie_tph_get_st_modes(struct pci_dev *pdev)\n {\n \tu32 reg;\n \n@@ -154,6 +162,7 @@ static u8 get_st_modes(struct pci_dev *pdev)\n \n \treturn reg;\n }\n+EXPORT_SYMBOL(pcie_tph_get_st_modes);\n \n /**\n * pcie_tph_get_st_table_loc - Return the device's ST table location\n@@ -394,7 +403,7 @@ int pcie_enable_tph(struct pci_dev *pdev, int mode)\n \n \t/* Sanitize and check ST mode compatibility */\n \tmode &= PCI_TPH_CTRL_MODE_SEL_MASK;\n-\tdev_modes = get_st_modes(pdev);\n+\tdev_modes = pcie_tph_get_st_modes(pdev);\n \tif (!((1 << mode) & dev_modes))\n \t\treturn -EINVAL;\n \ndiff --git a/include/linux/pci-tph.h b/include/linux/pci-tph.h\nindex be68cd17f2f8..586c75b19e01 100644\n--- a/include/linux/pci-tph.h\n+++ b/include/linux/pci-tph.h\n@@ -30,6 +30,7 @@ void pcie_disable_tph(struct pci_dev *pdev);\n int pcie_enable_tph(struct pci_dev *pdev, int mode);\n u16 pcie_tph_get_st_table_size(struct pci_dev *pdev);\n u32 pcie_tph_get_st_table_loc(struct pci_dev *pdev);\n+u8 pcie_tph_get_st_modes(struct pci_dev *pdev);\n #else\n static inline int pcie_tph_set_st_entry(struct pci_dev *pdev,\n \t\t\t\t\tunsigned int index, u16 tag)\n@@ -41,6 +42,12 @@ static inline int pcie_tph_get_cpu_st(struct pci_dev *dev,\n static inline void pcie_disable_tph(struct pci_dev *pdev) { }\n static inline int pcie_enable_tph(struct pci_dev *pdev, int mode)\n { return -EINVAL; }\n+static inline u16 pcie_tph_get_st_table_size(struct pci_dev *pdev)\n+{ return 0; }\n+static inline u32 pcie_tph_get_st_table_loc(struct pci_dev *pdev)\n+{ return 0x7FF; /* Values that do not appear in normal case */ }\n+static inline u8 pcie_tph_get_st_modes(struct pci_dev *pdev)\n+{ return 0; }\n #endif\n \n #endif /* LINUX_PCI_TPH_H */\n", "prefixes": [ "v5", "2/6" ] }