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GET /api/patches/2228095/?format=api
{ "id": 2228095, "url": "http://patchwork.ozlabs.org/api/patches/2228095/?format=api", "web_url": "http://patchwork.ozlabs.org/project/linux-pci/patch/20260425084607.53825-5-fengchengwen@huawei.com/", "project": { "id": 28, "url": "http://patchwork.ozlabs.org/api/projects/28/?format=api", "name": "Linux PCI development", "link_name": "linux-pci", "list_id": "linux-pci.vger.kernel.org", "list_email": "linux-pci@vger.kernel.org", "web_url": null, "scm_url": null, "webscm_url": null, "list_archive_url": "", "list_archive_url_format": "", "commit_url_format": "" }, "msgid": "<20260425084607.53825-5-fengchengwen@huawei.com>", "list_archive_url": null, "date": "2026-04-25T08:46:06", "name": "[v4,4/5] vfio/pci: Add PCIe TPH GET_ST interface", "commit_ref": null, "pull_url": null, "state": "new", "archived": false, "hash": "1a99201076357a8067e7fb71942022dc8085cd13", "submitter": { "id": 92756, "url": "http://patchwork.ozlabs.org/api/people/92756/?format=api", "name": "Chengwen Feng", "email": "fengchengwen@huawei.com" }, "delegate": null, "mbox": "http://patchwork.ozlabs.org/project/linux-pci/patch/20260425084607.53825-5-fengchengwen@huawei.com/mbox/", "series": [ { "id": 501427, "url": "http://patchwork.ozlabs.org/api/series/501427/?format=api", "web_url": "http://patchwork.ozlabs.org/project/linux-pci/list/?series=501427", "date": "2026-04-25T08:46:02", "name": "vfio/pci: Add PCIe TPH support", "version": 4, "mbox": "http://patchwork.ozlabs.org/series/501427/mbox/" } ], "comments": "http://patchwork.ozlabs.org/api/patches/2228095/comments/", "check": "pending", "checks": "http://patchwork.ozlabs.org/api/patches/2228095/checks/", "tags": {}, "related": [], "headers": { "Return-Path": "\n <linux-pci+bounces-53169-incoming=patchwork.ozlabs.org@vger.kernel.org>", "X-Original-To": [ "incoming@patchwork.ozlabs.org", "linux-pci@vger.kernel.org" ], "Delivered-To": "patchwork-incoming@legolas.ozlabs.org", "Authentication-Results": [ "legolas.ozlabs.org;\n\tdkim=pass (1024-bit key;\n unprotected) header.d=huawei.com header.i=@huawei.com header.a=rsa-sha256\n header.s=dkim header.b=THaqdYdH;\n\tdkim-atps=neutral", "legolas.ozlabs.org;\n spf=pass (sender SPF authorized) smtp.mailfrom=vger.kernel.org\n (client-ip=2600:3c0a:e001:db::12fc:5321; helo=sea.lore.kernel.org;\n envelope-from=linux-pci+bounces-53169-incoming=patchwork.ozlabs.org@vger.kernel.org;\n receiver=patchwork.ozlabs.org)", "smtp.subspace.kernel.org;\n\tdkim=pass (1024-bit key) header.d=huawei.com header.i=@huawei.com\n header.b=\"THaqdYdH\"", "smtp.subspace.kernel.org;\n arc=none smtp.client-ip=113.46.200.217", "smtp.subspace.kernel.org;\n dmarc=pass (p=quarantine dis=none) header.from=huawei.com", "smtp.subspace.kernel.org;\n spf=pass smtp.mailfrom=huawei.com" ], "Received": [ "from sea.lore.kernel.org (sea.lore.kernel.org\n [IPv6:2600:3c0a:e001:db::12fc:5321])\n\t(using TLSv1.3 with cipher TLS_AES_256_GCM_SHA384 (256/256 bits)\n\t key-exchange x25519)\n\t(No client certificate requested)\n\tby legolas.ozlabs.org (Postfix) with ESMTPS id 4g2k3m5lzJz1xvV\n\tfor <incoming@patchwork.ozlabs.org>; Sat, 25 Apr 2026 18:47:32 +1000 (AEST)", "from smtp.subspace.kernel.org (conduit.subspace.kernel.org\n [100.90.174.1])\n\tby sea.lore.kernel.org (Postfix) with ESMTP id 8D3C13029773\n\tfor <incoming@patchwork.ozlabs.org>; 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Sat, 25 Apr 2026 16:46:18 +0800" ], "ARC-Seal": "i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116;\n\tt=1777106789; cv=none;\n b=VIBjxApL9MSC+7Y6veJELZ0qOol/jOciReyyt+w/D24Bvtf1L0mxmD01Xtv47W3IIMsUzLl9iSl4gcaHRf4aszlkuelBgsBWH9wWbSLpe+Ncs0Zfz0TwI/w+oaKJVdG+QG5/tV6KMlUzrKDPZXYy6J7mvL5PpUQCoXziop7b0EY=", "ARC-Message-Signature": "i=1; a=rsa-sha256; d=subspace.kernel.org;\n\ts=arc-20240116; t=1777106789; c=relaxed/simple;\n\tbh=c/LSa4c2ND8sR2hogj4rj2UYdUruQFUzZEVqnktIhi8=;\n\th=From:To:CC:Subject:Date:Message-ID:In-Reply-To:References:\n\t MIME-Version:Content-Type;\n b=bufTQBRJ7fcAslm5c7gnqwg6jZIqd0bW2OuHx11xdAhW1VIo6fpaZ+0Yisxyjw0XNByz02VhjTFankIUfSjU5ct8bqXTA/tnKurhLsi3gOdO4o78hzw25ET4TZZfamJaRt/NvqYvauicVAtM1BIC3xuF8uMfelUuA6VZQDqsNpA=", "ARC-Authentication-Results": "i=1; smtp.subspace.kernel.org;\n dmarc=pass (p=quarantine dis=none) header.from=huawei.com;\n spf=pass smtp.mailfrom=huawei.com;\n dkim=pass (1024-bit key) header.d=huawei.com header.i=@huawei.com\n header.b=THaqdYdH; arc=none smtp.client-ip=113.46.200.217", "dkim-signature": "v=1; a=rsa-sha256; d=huawei.com; s=dkim;\n\tc=relaxed/relaxed; q=dns/txt;\n\th=From;\n\tbh=OBnrMR4MnWcWLrUmYHB0MBqvOLtlPifbC+RCJlMYZtI=;\n\tb=THaqdYdHgWWZUajktkwTKezVfICIUba2RWobMTht4W61VOyFaI/3jmV5ttVAoh+z/WtAnye+y\n\tnhd7yKgmcze9aGDJh7RfKUseXXjJN9n/5BFQqVkuNlaeJXHQ9GQ0CiZsKFw9dEfXepFxMobIesJ\n\t78E7iV2XeDHJ3a1oOsyvA6U=", "From": "Chengwen Feng <fengchengwen@huawei.com>", "To": "<alex@shazbot.org>, <jgg@ziepe.ca>", "CC": "<wathsala.vithanage@arm.com>, <helgaas@kernel.org>,\n\t<wangzhou1@hisilicon.com>, <wangyushan12@huawei.com>,\n\t<liuyonglong@huawei.com>, <kvm@vger.kernel.org>, <linux-pci@vger.kernel.org>", "Subject": "[PATCH v4 4/5] vfio/pci: Add PCIe TPH GET_ST interface", "Date": "Sat, 25 Apr 2026 16:46:06 +0800", "Message-ID": "<20260425084607.53825-5-fengchengwen@huawei.com>", "X-Mailer": "git-send-email 2.17.1", "In-Reply-To": "<20260425084607.53825-1-fengchengwen@huawei.com>", "References": "<20260425084607.53825-1-fengchengwen@huawei.com>", "Precedence": "bulk", "X-Mailing-List": "linux-pci@vger.kernel.org", "List-Id": "<linux-pci.vger.kernel.org>", "List-Subscribe": "<mailto:linux-pci+subscribe@vger.kernel.org>", "List-Unsubscribe": "<mailto:linux-pci+unsubscribe@vger.kernel.org>", "MIME-Version": "1.0", "Content-Type": "text/plain", "X-ClientProxiedBy": "kwepems500001.china.huawei.com (7.221.188.70) To\n kwepemk500009.china.huawei.com (7.202.194.94)" }, "content": "Add support to batch get CPU steering tags for device-specific TPH mode\nthat does not implement an ST table. This interface requires enabling the\n'enable_unsafe_tph_ds_mode' module parameter.\n\nSigned-off-by: Chengwen Feng <fengchengwen@huawei.com>\n---\n drivers/vfio/pci/vfio_pci_core.c | 57 ++++++++++++++++++++++++++++++++\n 1 file changed, 57 insertions(+)", "diff": "diff --git a/drivers/vfio/pci/vfio_pci_core.c b/drivers/vfio/pci/vfio_pci_core.c\nindex f8c8c52437e9..8f7a97dd922c 100644\n--- a/drivers/vfio/pci/vfio_pci_core.c\n+++ b/drivers/vfio/pci/vfio_pci_core.c\n@@ -1524,6 +1524,61 @@ static int vfio_pci_tph_disable(struct vfio_pci_core_device *vdev)\n \treturn 0;\n }\n \n+static int vfio_pci_tph_get_st(struct vfio_pci_core_device *vdev,\n+\t\t\t struct vfio_device_pci_tph_op *op,\n+\t\t\t void __user *uarg)\n+{\n+\tstruct pci_dev *pdev = vdev->pdev;\n+\tstruct vfio_pci_tph_entry *ents;\n+\tstruct vfio_pci_tph_st st;\n+\tenum tph_mem_type mtype;\n+\tsize_t size;\n+\tint i, err;\n+\n+\tif (!enable_unsafe_tph_ds_mode ||\n+\t\tpcie_tph_get_st_table_loc(pdev) != PCI_TPH_LOC_NONE)\n+\t\treturn -EOPNOTSUPP;\n+\n+\tif (copy_from_user(&st, uarg, sizeof(st)))\n+\t\treturn -EFAULT;\n+\n+\tif (!st.count || st.count > VFIO_PCI_TPH_MAX_ENTRIES)\n+\t\treturn -EINVAL;\n+\n+\tsize = st.count * sizeof(*ents);\n+\tents = kvmalloc(size, GFP_KERNEL);\n+\tif (!ents)\n+\t\treturn -ENOMEM;\n+\n+\tif (copy_from_user(ents, uarg + sizeof(st), size)) {\n+\t\terr = -EFAULT;\n+\t\tgoto out;\n+\t}\n+\n+\tfor (i = 0; i < st.count; i++) {\n+\t\tif (ents[i].mem_type == VFIO_PCI_TPH_MEM_TYPE_VM) {\n+\t\t\tmtype = TPH_MEM_TYPE_VM;\n+\t\t} else if (ents[i].mem_type == VFIO_PCI_TPH_MEM_TYPE_PM) {\n+\t\t\tmtype = TPH_MEM_TYPE_PM;\n+\t\t} else {\n+\t\t\terr = -EINVAL;\n+\t\t\tgoto out;\n+\t\t}\n+\n+\t\terr = pcie_tph_get_cpu_st(pdev, mtype, ents[i].cpu,\n+\t\t\t\t\t &ents[i].st);\n+\t\tif (err)\n+\t\t\tgoto out;\n+\t}\n+\n+\tif (copy_to_user(uarg + sizeof(st), ents, size))\n+\t\terr = -EFAULT;\n+\n+out:\n+\tkvfree(ents);\n+\treturn err;\n+}\n+\n static int vfio_pci_ioctl_tph(struct vfio_pci_core_device *vdev,\n \t\t\t void __user *uarg)\n {\n@@ -1544,6 +1599,8 @@ static int vfio_pci_ioctl_tph(struct vfio_pci_core_device *vdev,\n \t\treturn vfio_pci_tph_enable(vdev, &op, uarg + minsz);\n \tcase VFIO_PCI_TPH_DISABLE:\n \t\treturn vfio_pci_tph_disable(vdev);\n+\tcase VFIO_PCI_TPH_GET_ST:\n+\t\treturn vfio_pci_tph_get_st(vdev, &op, uarg + minsz);\n \tdefault:\n \t\t/* Other ops are not implemented yet */\n \t\treturn -EINVAL;\n", "prefixes": [ "v4", "4/5" ] }