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GET /api/patches/2227935/?format=api
{ "id": 2227935, "url": "http://patchwork.ozlabs.org/api/patches/2227935/?format=api", "web_url": "http://patchwork.ozlabs.org/project/qemu-devel/patch/20260424-gpu-v2-2-9fd2fc0dd1bd@rsg.ci.i.u-tokyo.ac.jp/", "project": { "id": 14, "url": "http://patchwork.ozlabs.org/api/projects/14/?format=api", "name": "QEMU Development", "link_name": "qemu-devel", "list_id": "qemu-devel.nongnu.org", "list_email": "qemu-devel@nongnu.org", "web_url": "", "scm_url": "", "webscm_url": "", "list_archive_url": "", "list_archive_url_format": "", "commit_url_format": "" }, "msgid": "<20260424-gpu-v2-2-9fd2fc0dd1bd@rsg.ci.i.u-tokyo.ac.jp>", "list_archive_url": null, "date": "2026-04-24T14:06:42", "name": "[v2,2/2] virtio-gpu: Do not wait for the main thread during reset", "commit_ref": null, "pull_url": null, "state": "new", "archived": false, "hash": "97d191555228f28fd08e0d5d7712cb972da870b9", "submitter": { "id": 90980, "url": "http://patchwork.ozlabs.org/api/people/90980/?format=api", "name": "Akihiko Odaki", "email": "odaki@rsg.ci.i.u-tokyo.ac.jp" }, "delegate": null, "mbox": "http://patchwork.ozlabs.org/project/qemu-devel/patch/20260424-gpu-v2-2-9fd2fc0dd1bd@rsg.ci.i.u-tokyo.ac.jp/mbox/", "series": [ { "id": 501374, "url": "http://patchwork.ozlabs.org/api/series/501374/?format=api", "web_url": "http://patchwork.ozlabs.org/project/qemu-devel/list/?series=501374", "date": "2026-04-24T14:06:40", "name": "[v2,1/2] virtio-gpu: Run reset cleanup in the same BH", "version": 2, "mbox": "http://patchwork.ozlabs.org/series/501374/mbox/" } ], "comments": "http://patchwork.ozlabs.org/api/patches/2227935/comments/", "check": "pending", "checks": "http://patchwork.ozlabs.org/api/patches/2227935/checks/", "tags": {}, "related": [], "headers": { "Return-Path": "<qemu-devel-bounces+incoming=patchwork.ozlabs.org@nongnu.org>", "X-Original-To": "incoming@patchwork.ozlabs.org", "Delivered-To": "patchwork-incoming@legolas.ozlabs.org", "Authentication-Results": [ "legolas.ozlabs.org;\n\tdkim=fail reason=\"key not found in DNS\" header.d=rsg.ci.i.u-tokyo.ac.jp\n header.i=@rsg.ci.i.u-tokyo.ac.jp header.a=rsa-sha256 header.s=rs20250326\n header.b=wHjbxLHK;\n\tdkim-atps=neutral", "legolas.ozlabs.org;\n spf=pass (sender SPF authorized) smtp.mailfrom=nongnu.org\n (client-ip=209.51.188.17; helo=lists1p.gnu.org;\n envelope-from=qemu-devel-bounces+incoming=patchwork.ozlabs.org@nongnu.org;\n receiver=patchwork.ozlabs.org)" ], "Received": [ "from lists1p.gnu.org (lists1p.gnu.org [209.51.188.17])\n\t(using TLSv1.2 with cipher ECDHE-ECDSA-AES256-GCM-SHA384 (256/256 bits))\n\t(No client certificate requested)\n\tby legolas.ozlabs.org (Postfix) with ESMTPS id 4g2FD60LQGz1yD5\n\tfor <incoming@patchwork.ozlabs.org>; Sat, 25 Apr 2026 00:08:06 +1000 (AEST)", "from localhost ([::1] helo=lists1p.gnu.org)\n\tby lists1p.gnu.org with esmtp (Exim 4.90_1)\n\t(envelope-from <qemu-devel-bounces@nongnu.org>)\n\tid 1wGHBb-0002ZO-36; Fri, 24 Apr 2026 10:07:15 -0400", "from eggs.gnu.org ([2001:470:142:3::10])\n by lists1p.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_256_GCM_SHA384:256)\n (Exim 4.90_1) (envelope-from <odaki@rsg.ci.i.u-tokyo.ac.jp>)\n id 1wGHBZ-0002Yx-Rm\n for qemu-devel@nongnu.org; Fri, 24 Apr 2026 10:07:13 -0400", "from www3579.sakura.ne.jp ([49.212.243.89])\n by eggs.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_256_GCM_SHA384:256)\n (Exim 4.90_1) (envelope-from <odaki@rsg.ci.i.u-tokyo.ac.jp>)\n id 1wGHBU-0007Ob-Vg\n for qemu-devel@nongnu.org; Fri, 24 Apr 2026 10:07:13 -0400", "from h205.csg.ci.i.u-tokyo.ac.jp (h205.csg.ci.i.u-tokyo.ac.jp\n [133.11.54.205]) (authenticated bits=0)\n by www3579.sakura.ne.jp (8.16.1/8.16.1) with ESMTPSA id 63OE6rPc008037\n (version=TLSv1.2 cipher=ECDHE-RSA-AES256-GCM-SHA384 bits=256 verify=NO);\n Fri, 24 Apr 2026 23:06:55 +0900 (JST)\n (envelope-from odaki@rsg.ci.i.u-tokyo.ac.jp)" ], "DKIM-Signature": "a=rsa-sha256; bh=CI8Wwu42TZO2W6YwUFoTsN1IVWVdvPURG6kNvALL5RY=;\n c=relaxed/relaxed; d=rsg.ci.i.u-tokyo.ac.jp;\n h=From:Message-Id:To:Subject:Date;\n s=rs20250326; t=1777039615; v=1;\n b=wHjbxLHKjEfPiFEXXZJTHsVXbJ2bTrWviJVyXfnEX/zSwMSD+9+ahNR5P9tkn1Gx\n bt7WgOjIiELg1d6iDab8fhTw8uPebT/6xxTDTFY3jnE7AMf536YsgY/L/7sA3HgD\n eeUS/QhtUB3jdcA8FH3K8nOf+T71Sl7dSMcgfaYjYJNm9UuDkGHghWqIxWdt23s3\n VBnc+Rca/Ii+ZH0MkpJwfZxtysi/6CPWsS5drGF3BfwAJwyMWso76cirltn39XHa\n 1XGoP0+6Hx2FT8zAQSzIod0wLK+CaSfYW3uFdbTep5+F7HBgvd60XJgHcisyZUZS\n 71sME0mII+AfPFvlEppDoA==", "From": "Akihiko Odaki <odaki@rsg.ci.i.u-tokyo.ac.jp>", "Date": "Fri, 24 Apr 2026 23:06:42 +0900", "Subject": "[PATCH v2 2/2] virtio-gpu: Do not wait for the main thread during\n reset", "MIME-Version": "1.0", "Content-Type": "text/plain; charset=\"utf-8\"", "Content-Transfer-Encoding": "7bit", "Message-Id": "<20260424-gpu-v2-2-9fd2fc0dd1bd@rsg.ci.i.u-tokyo.ac.jp>", "References": "<20260424-gpu-v2-0-9fd2fc0dd1bd@rsg.ci.i.u-tokyo.ac.jp>", "In-Reply-To": "<20260424-gpu-v2-0-9fd2fc0dd1bd@rsg.ci.i.u-tokyo.ac.jp>", "To": "qemu-devel@nongnu.org", "Cc": "=?utf-8?q?Alex_Benn=C3=A9e?= <alex.bennee@linaro.org>,\n Dmitry Osipenko <dmitry.osipenko@collabora.com>,\n \"Michael S. Tsirkin\" <mst@redhat.com>,\n Akihiko Odaki <odaki@rsg.ci.i.u-tokyo.ac.jp>", "X-Mailer": "b4 0.16-dev-16047", "Received-SPF": "pass client-ip=49.212.243.89;\n envelope-from=odaki@rsg.ci.i.u-tokyo.ac.jp; helo=www3579.sakura.ne.jp", "X-Spam_score_int": "-16", "X-Spam_score": "-1.7", "X-Spam_bar": "-", "X-Spam_report": "(-1.7 / 5.0 requ) BAYES_00=-1.9, DKIM_INVALID=0.1,\n DKIM_SIGNED=0.1, SPF_HELO_NONE=0.001,\n SPF_PASS=-0.001 autolearn=no autolearn_force=no", "X-Spam_action": "no action", "X-BeenThere": "qemu-devel@nongnu.org", "X-Mailman-Version": "2.1.29", "Precedence": "list", "List-Id": "qemu development <qemu-devel.nongnu.org>", "List-Unsubscribe": "<https://lists.nongnu.org/mailman/options/qemu-devel>,\n <mailto:qemu-devel-request@nongnu.org?subject=unsubscribe>", "List-Archive": "<https://lists.nongnu.org/archive/html/qemu-devel>", "List-Post": "<mailto:qemu-devel@nongnu.org>", "List-Help": "<mailto:qemu-devel-request@nongnu.org?subject=help>", "List-Subscribe": "<https://lists.nongnu.org/mailman/listinfo/qemu-devel>,\n <mailto:qemu-devel-request@nongnu.org?subject=subscribe>", "Errors-To": "qemu-devel-bounces+incoming=patchwork.ozlabs.org@nongnu.org", "Sender": "qemu-devel-bounces+incoming=patchwork.ozlabs.org@nongnu.org" }, "content": "virtio-gpu waits for the main thread to destroy resources and replace\nsurfaces, but it occasionally results in deadlock, so remove the code\nto wait.\n\nIn particular, when running a test case[1] the main thread may wait for\nthe vCPUs to pause during shut down while a vCPU may be concurrently\nresetting virtio-gpu.\n\nvCPU actually does not need to perform resource destruction and surface\nreplacement synchronously, but it only needs to ensure correct ordering\namong virtio-gpu operations. virtio-gpu-gl already exploits this fact to\nensure that virglrenderer is reset on the main thread; instead of\nsynchronously resetting virglrenderer when the device is being reset,\nit resets virglrenderer just before processing the first command after\nthe device reset arrives.\n\nTake advantage of this fact by removing synchronization between the main\nthread and the resetting vCPU thread. The ordering with the control and\ncursor queues is enforced by running the reset operation before\nprocessing their commands as virtio-gpu-gl does.\n\n[1] https://lore.kernel.org/qemu-devel/20251014111234.3190346-9-alex.bennee@linaro.org/\n\nFixes: a41e2d97f92b (\"virtio-gpu: reset gfx resources in main thread\")\nSigned-off-by: Akihiko Odaki <odaki@rsg.ci.i.u-tokyo.ac.jp>\n---\n include/hw/virtio/virtio-gpu.h | 4 +---\n hw/display/virtio-gpu.c | 28 +++++++++++++---------------\n 2 files changed, 14 insertions(+), 18 deletions(-)", "diff": "diff --git a/include/hw/virtio/virtio-gpu.h b/include/hw/virtio/virtio-gpu.h\nindex f69fc1946273..48fb54aa4605 100644\n--- a/include/hw/virtio/virtio-gpu.h\n+++ b/include/hw/virtio/virtio-gpu.h\n@@ -195,9 +195,7 @@ struct VirtIOGPU {\n \n QEMUBH *ctrl_bh;\n QEMUBH *cursor_bh;\n- QEMUBH *reset_bh;\n- QemuCond reset_cond;\n- bool reset_finished;\n+ bool reset_pending;\n \n QTAILQ_HEAD(, virtio_gpu_simple_resource) reslist;\n QTAILQ_HEAD(, virtio_gpu_ctrl_command) cmdq;\ndiff --git a/hw/display/virtio-gpu.c b/hw/display/virtio-gpu.c\nindex d514b548efd9..4c053e9a2f75 100644\n--- a/hw/display/virtio-gpu.c\n+++ b/hw/display/virtio-gpu.c\n@@ -40,7 +40,7 @@ virtio_gpu_find_check_resource(VirtIOGPU *g, uint32_t resource_id,\n bool require_backing,\n const char *caller, uint32_t *error);\n \n-static void virtio_gpu_reset_bh(void *opaque);\n+static void virtio_gpu_reset_bh(VirtIOGPU *g);\n \n void virtio_gpu_update_cursor_data(VirtIOGPU *g,\n struct virtio_gpu_scanout *s,\n@@ -1138,6 +1138,7 @@ static void virtio_gpu_ctrl_bh(void *opaque)\n VirtIOGPU *g = opaque;\n VirtIOGPUClass *vgc = VIRTIO_GPU_GET_CLASS(g);\n \n+ virtio_gpu_reset_bh(g);\n vgc->handle_ctrl(VIRTIO_DEVICE(g), g->ctrl_vq);\n }\n \n@@ -1176,6 +1177,7 @@ static void virtio_gpu_handle_cursor(VirtIODevice *vdev, VirtQueue *vq)\n static void virtio_gpu_cursor_bh(void *opaque)\n {\n VirtIOGPU *g = opaque;\n+ virtio_gpu_reset_bh(g);\n virtio_gpu_handle_cursor(&g->parent_obj.parent_obj, g->cursor_vq);\n }\n \n@@ -1560,8 +1562,6 @@ void virtio_gpu_device_realize(DeviceState *qdev, Error **errp)\n g->cursor_vq = virtio_get_queue(vdev, 1);\n g->ctrl_bh = virtio_bh_io_new_guarded(qdev, virtio_gpu_ctrl_bh, g);\n g->cursor_bh = virtio_bh_io_new_guarded(qdev, virtio_gpu_cursor_bh, g);\n- g->reset_bh = virtio_bh_io_new_guarded(qdev, virtio_gpu_reset_bh, g);\n- qemu_cond_init(&g->reset_cond);\n QTAILQ_INIT(&g->reslist);\n QTAILQ_INIT(&g->cmdq);\n QTAILQ_INIT(&g->fenceq);\n@@ -1573,14 +1573,11 @@ static void virtio_gpu_device_unrealize(DeviceState *qdev)\n \n g_clear_pointer(&g->ctrl_bh, qemu_bh_delete);\n g_clear_pointer(&g->cursor_bh, qemu_bh_delete);\n- g_clear_pointer(&g->reset_bh, qemu_bh_delete);\n- qemu_cond_destroy(&g->reset_cond);\n virtio_gpu_base_device_unrealize(qdev);\n }\n \n-static void virtio_gpu_reset_bh(void *opaque)\n+static void virtio_gpu_reset_bh(VirtIOGPU *g)\n {\n- VirtIOGPU *g = VIRTIO_GPU(opaque);\n VirtIOGPUClass *vgc = VIRTIO_GPU_GET_CLASS(g);\n struct virtio_gpu_ctrl_command *cmd;\n struct virtio_gpu_simple_resource *res, *tmp;\n@@ -1588,6 +1585,10 @@ static void virtio_gpu_reset_bh(void *opaque)\n Error *local_err = NULL;\n int i = 0;\n \n+ if (!g->reset_pending) {\n+ return;\n+ }\n+\n QTAILQ_FOREACH_SAFE(res, &g->reslist, next, tmp) {\n resource_id = res->resource_id;\n vgc->resource_destroy(g, res, &local_err);\n@@ -1621,22 +1622,19 @@ static void virtio_gpu_reset_bh(void *opaque)\n \n virtio_gpu_base_reset(VIRTIO_GPU_BASE(g));\n \n- g->reset_finished = true;\n- qemu_cond_signal(&g->reset_cond);\n+ g->reset_pending = false;\n }\n \n void virtio_gpu_reset(VirtIODevice *vdev)\n {\n VirtIOGPU *g = VIRTIO_GPU(vdev);\n \n+ g->reset_pending = true;\n+\n if (qemu_in_vcpu_thread()) {\n- g->reset_finished = false;\n- qemu_bh_schedule(g->reset_bh);\n- while (!g->reset_finished) {\n- qemu_cond_wait_bql(&g->reset_cond);\n- }\n+ qemu_bh_schedule(g->ctrl_bh);\n } else {\n- aio_bh_call(g->reset_bh);\n+ virtio_gpu_reset_bh(g);\n }\n }\n \n", "prefixes": [ "v2", "2/2" ] }