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GET /api/patches/2227355/?format=api
{ "id": 2227355, "url": "http://patchwork.ozlabs.org/api/patches/2227355/?format=api", "web_url": "http://patchwork.ozlabs.org/project/linux-tegra/patch/20260423-glymur-v2-2-0296bccb9f4e@oss.qualcomm.com/", "project": { "id": 21, "url": "http://patchwork.ozlabs.org/api/projects/21/?format=api", "name": "Linux Tegra Development", "link_name": "linux-tegra", "list_id": "linux-tegra.vger.kernel.org", "list_email": "linux-tegra@vger.kernel.org", "web_url": null, "scm_url": null, "webscm_url": null, "list_archive_url": "", "list_archive_url_format": "", "commit_url_format": "" }, "msgid": "<20260423-glymur-v2-2-0296bccb9f4e@oss.qualcomm.com>", "list_archive_url": null, "date": "2026-04-23T13:29:31", "name": "[v2,02/13] drivers: base: Add generic dma context bus", "commit_ref": null, "pull_url": null, "state": "new", "archived": false, "hash": "7009089047791d5af02183b96ae0bc8c9d56e411", "submitter": { "id": 93161, "url": "http://patchwork.ozlabs.org/api/people/93161/?format=api", "name": "Vishnu Reddy", "email": "busanna.reddy@oss.qualcomm.com" }, "delegate": null, "mbox": "http://patchwork.ozlabs.org/project/linux-tegra/patch/20260423-glymur-v2-2-0296bccb9f4e@oss.qualcomm.com/mbox/", "series": [ { "id": 501197, "url": "http://patchwork.ozlabs.org/api/series/501197/?format=api", "web_url": "http://patchwork.ozlabs.org/project/linux-tegra/list/?series=501197", "date": "2026-04-23T13:29:29", "name": "media: iris: Add support for glymur platform", "version": 2, "mbox": "http://patchwork.ozlabs.org/series/501197/mbox/" } ], "comments": "http://patchwork.ozlabs.org/api/patches/2227355/comments/", "check": "pending", "checks": "http://patchwork.ozlabs.org/api/patches/2227355/checks/", "tags": {}, "related": [], "headers": { "Return-Path": "\n <linux-tegra+bounces-13919-incoming=patchwork.ozlabs.org@vger.kernel.org>", "X-Original-To": [ "incoming@patchwork.ozlabs.org", "linux-tegra@vger.kernel.org" ], "Delivered-To": "patchwork-incoming@legolas.ozlabs.org", "Authentication-Results": [ "legolas.ozlabs.org;\n\tdkim=pass (2048-bit key;\n unprotected) header.d=qualcomm.com header.i=@qualcomm.com header.a=rsa-sha256\n header.s=qcppdkim1 header.b=W83kJCb9;\n\tdkim=pass (2048-bit key;\n unprotected) header.d=oss.qualcomm.com header.i=@oss.qualcomm.com\n header.a=rsa-sha256 header.s=google header.b=HnsKjtIQ;\n\tdkim-atps=neutral", "legolas.ozlabs.org;\n spf=pass (sender SPF authorized) smtp.mailfrom=vger.kernel.org\n (client-ip=172.105.105.114; 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charset=\"utf-8\"", "Content-Transfer-Encoding": "7bit", "Message-Id": "<20260423-glymur-v2-2-0296bccb9f4e@oss.qualcomm.com>", "References": "<20260423-glymur-v2-0-0296bccb9f4e@oss.qualcomm.com>", "In-Reply-To": "<20260423-glymur-v2-0-0296bccb9f4e@oss.qualcomm.com>", "To": "Bryan O'Donoghue <bod@kernel.org>,\n Vikash Garodia <vikash.garodia@oss.qualcomm.com>,\n Dikshita Agarwal <dikshita.agarwal@oss.qualcomm.com>,\n Abhinav Kumar <abhinav.kumar@linux.dev>,\n Mauro Carvalho Chehab <mchehab@kernel.org>,\n Rob Herring <robh@kernel.org>,\n Krzysztof Kozlowski <krzk+dt@kernel.org>,\n Conor Dooley <conor+dt@kernel.org>, Joerg Roedel <joro@8bytes.org>,\n Will Deacon <will@kernel.org>, Robin Murphy <robin.murphy@arm.com>,\n Bjorn Andersson <andersson@kernel.org>,\n Konrad Dybcio <konradybcio@kernel.org>,\n Stefan Schmidt <stefan.schmidt@linaro.org>,\n Hans Verkuil <hverkuil@kernel.org>,\n Greg Kroah-Hartman <gregkh@linuxfoundation.org>,\n \"Rafael J. Wysocki\" <rafael@kernel.org>,\n Danilo Krummrich <dakr@kernel.org>,\n Thierry Reding <thierry.reding@kernel.org>,\n Mikko Perttunen <mperttunen@nvidia.com>,\n David Airlie <airlied@gmail.com>, Simona Vetter <simona@ffwll.ch>,\n Jonathan Hunter <jonathanh@nvidia.com>", "Cc": "linux-media@vger.kernel.org, linux-arm-msm@vger.kernel.org,\n devicetree@vger.kernel.org, linux-kernel@vger.kernel.org,\n iommu@lists.linux.dev, driver-core@lists.linux.dev,\n dri-devel@lists.freedesktop.org, linux-tegra@vger.kernel.org,\n Vishnu Reddy <busanna.reddy@oss.qualcomm.com>,\n Ekansh Gupta <ekansh.gupta@oss.qualcomm.com>,\n Dmitry Baryshkov <dmitry.baryshkov@oss.qualcomm.com>", "X-Mailer": "b4 0.14.3", "X-Developer-Signature": "v=1; a=ed25519-sha256; t=1776950985; l=5182;\n i=busanna.reddy@oss.qualcomm.com; s=20260216; h=from:subject:message-id;\n bh=m9Ev3cg1dRS/apkqmuIWrlLItkWfgL3nCRaQ+GTJ4d8=;\n b=a0MO/i8o4a8De0o+pVmxc5nct6busfcAWycf0+sRmWbw7J9/KUDBhEJPpZ7lySVphzTFDiOk0\n lCbAAc8uQyBCNukA9WgkyrwbsxQ7npM3UxMTlbG7g7ze+2dYMgz8VVH", "X-Developer-Key": "i=busanna.reddy@oss.qualcomm.com; a=ed25519;\n pk=9vmy9HahBKVAa+GBFj1yHVbz0ey/ucIs1hrlfx+qtok=", "X-Authority-Analysis": "v=2.4 cv=f4Z4wuyM c=1 sm=1 tr=0 ts=69ea1ee7 cx=c_pps\n a=MTSHoo12Qbhz2p7MsH1ifg==:117 a=fChuTYTh2wq5r3m49p7fHw==:17\n a=IkcTkHD0fZMA:10 a=A5OVakUREuEA:10 a=s4-Qcg_JpJYA:10\n a=VkNPw1HP01LnGYTKEx00:22 a=u7WPNUs3qKkmUXheDGA7:22 a=yOCtJkima9RkubShWh1s:22\n a=EUspDBNiAAAA:8 a=nxtABoNUPiTGfhWLCFsA:9 a=QEXdDO2ut3YA:10\n a=GvdueXVYPmCkWapjIL-Q:22", "X-Proofpoint-Spam-Details-Enc": "AW1haW4tMjYwNDIzMDEzNCBTYWx0ZWRfX2TK6k4IHcf4q\n ZbWjaW5WtnuR3ageHa9s9JgJtmT8bpfA1ON+rmEU4bRnZ8UKfOsiXJ36u8ziFKPtsWnjkQ8WgQ9\n BNwrsr4aOrDKgoaejz137gOuqr28LjwZfLFyg+cxeqQaptS8HpqsgjmSwDAPJkbBhMzfKxQlEOO\n 5gjAQPECE9gbQlWYMEBkdsM5h2h0GRpdwqcT+ZEcZJdPClwJbd/EQdGbbtIhmJjCQjjyeZRF5vI\n 2Ym1EKE1jPJ48HqvUaKI8fM/m+/boUEoPQ737LM2Qg0LyLpxEYXF4khJH0CncJB/+nv4nRj1dS6\n TGC3+4V+fs9F7BmlU068cnHd24bxxdmMKqo0w5Da8tWVG+dRhpYjOSH8DoBmbPthY4xWiAHeXIr\n ZWtSKI/30l4r9hENWQJ2UiYFStQuAiPHERJHRsaNHA/Qudm0ckMITLDUL7na6va2n/KX76+yD7r\n 68YL7PiElYxFqLf8+AA==", "X-Proofpoint-GUID": "ubJlQyDmNmih45r_-XEDjn8ozO0Eev58", "X-Proofpoint-ORIG-GUID": "ubJlQyDmNmih45r_-XEDjn8ozO0Eev58", "X-Proofpoint-Virus-Version": "vendor=baseguard\n engine=ICAP:2.0.293,Aquarius:18.0.1143,Hydra:6.1.51,FMLib:17.12.100.49\n definitions=2026-04-23_03,2026-04-21_02,2025-10-01_01", "X-Proofpoint-Spam-Details": "rule=outbound_notspam policy=outbound score=0\n impostorscore=0 phishscore=0 bulkscore=0 malwarescore=0 clxscore=1015\n spamscore=0 suspectscore=0 adultscore=0 priorityscore=1501 lowpriorityscore=0\n classifier=typeunknown authscore=0 authtc= authcc= route=outbound adjust=0\n reason=mlx scancount=1 engine=8.22.0-2604200000 definitions=main-2604230134" }, "content": "From: Ekansh Gupta <ekansh.gupta@oss.qualcomm.com>\n\nWhen a driver needs to create virtual device at runtime and map it to\nan IOMMU context for memory isolation, there is no common bus available\nfor this purpose. Each driver ends up implementing its own bus type,\nleading to duplicated logic across multiple drivers.\n\nhost1x driver implemented its own bus type to attach an IOMMU context to\na dynamically created device. The Iris VPU driver now has the same\nrequirement. Rather than duplicating the same bus logic again, a shared\nbus type is introduced under drivers/base that multiple drivers can use\ndirectly.\n\nThe bus takes care of creating a device and attaching the IOMMU context\nto it based on the client inputs.\n\nSuggested-by: Dmitry Baryshkov <dmitry.baryshkov@oss.qualcomm.com>\nSigned-off-by: Ekansh Gupta <ekansh.gupta@oss.qualcomm.com>\nSigned-off-by: Vikash Garodia <vikash.garodia@oss.qualcomm.com>\nSigned-off-by: Vishnu Reddy <busanna.reddy@oss.qualcomm.com>\n---\n drivers/base/Kconfig | 3 ++\n drivers/base/Makefile | 1 +\n drivers/base/dma_context_bus.c | 77 +++++++++++++++++++++++++++++++++++++++++\n include/linux/dma_context_bus.h | 26 ++++++++++++++\n 4 files changed, 107 insertions(+)", "diff": "diff --git a/drivers/base/Kconfig b/drivers/base/Kconfig\nindex f7d385cbd3ba..499ea92dd88f 100644\n--- a/drivers/base/Kconfig\n+++ b/drivers/base/Kconfig\n@@ -4,6 +4,9 @@ menu \"Generic Driver Options\"\n config AUXILIARY_BUS\n \tbool\n \n+config DMA_CONTEXT_BUS\n+\tbool\n+\n config UEVENT_HELPER\n \tbool \"Support for uevent helper\"\n \thelp\ndiff --git a/drivers/base/Makefile b/drivers/base/Makefile\nindex 8074a10183dc..348e69695e55 100644\n--- a/drivers/base/Makefile\n+++ b/drivers/base/Makefile\n@@ -8,6 +8,7 @@ obj-y\t\t\t:= component.o core.o bus.o dd.o syscore.o \\\n \t\t\t topology.o container.o property.o cacheinfo.o \\\n \t\t\t swnode.o faux.o\n obj-$(CONFIG_AUXILIARY_BUS) += auxiliary.o\n+obj-$(CONFIG_DMA_CONTEXT_BUS) += dma_context_bus.o\n obj-$(CONFIG_DEVTMPFS)\t+= devtmpfs.o\n obj-y\t\t\t+= power/\n obj-$(CONFIG_ISA_BUS_API)\t+= isa.o\ndiff --git a/drivers/base/dma_context_bus.c b/drivers/base/dma_context_bus.c\nnew file mode 100644\nindex 000000000000..c2ac189ce08d\n--- /dev/null\n+++ b/drivers/base/dma_context_bus.c\n@@ -0,0 +1,77 @@\n+// SPDX-License-Identifier: GPL-2.0-only\n+/*\n+ * Copyright (c) Qualcomm Technologies, Inc. and/or its subsidiaries.\n+ */\n+\n+#include <linux/dma_context_bus.h>\n+#include <linux/of_device.h>\n+\n+static atomic_t dma_context_bus_device_id = ATOMIC_INIT(0);\n+\n+static int dma_context_bus_device_configure(struct device *dev)\n+{\n+\tconst u32 *iommu_fid = dev_get_drvdata(dev);\n+\tstruct device_node *of_node = dev->of_node;\n+\n+\tif (!of_node)\n+\t\tof_node = dev->parent->of_node;\n+\n+\treturn of_dma_configure_id(dev, of_node, true, iommu_fid);\n+}\n+\n+const struct bus_type dma_context_bus_type = {\n+\t.name = \"dma-context-bus\",\n+\t.dma_configure = dma_context_bus_device_configure,\n+};\n+EXPORT_SYMBOL_GPL(dma_context_bus_type);\n+\n+static void release_dma_context_bus_device(struct device *dev)\n+{\n+\tkfree(dev);\n+}\n+\n+struct device *create_dma_context_bus_device(struct device *parent_device,\n+\t\t\t\t\t struct device_node *of_node,\n+\t\t\t\t\t u64 dma_mask, const u32 *iommu_fid)\n+{\n+\tstruct device *dev;\n+\tint dev_id, ret;\n+\n+\tdev = kzalloc_obj(*dev);\n+\tif (!dev)\n+\t\treturn ERR_PTR(-ENOMEM);\n+\n+\tdev->release = release_dma_context_bus_device;\n+\tdev->bus = &dma_context_bus_type;\n+\tdev->parent = parent_device;\n+\tdev->coherent_dma_mask = dma_mask;\n+\tdev->dma_mask = &dev->coherent_dma_mask;\n+\tdev->of_node = of_node;\n+\n+\tdev_id = atomic_inc_return(&dma_context_bus_device_id);\n+\tdev_set_name(dev, \"dma-context-bus-%d\", dev_id);\n+\tdev_set_drvdata(dev, (void *)iommu_fid);\n+\n+\tret = device_register(dev);\n+\tif (ret) {\n+\t\tput_device(dev);\n+\t\treturn ERR_PTR(ret);\n+\t}\n+\n+\treturn dev;\n+}\n+EXPORT_SYMBOL_GPL(create_dma_context_bus_device);\n+\n+static int __init dma_context_bus_init(void)\n+{\n+\tint err;\n+\n+\terr = bus_register(&dma_context_bus_type);\n+\tif (err) {\n+\t\tpr_err(\"dma-context-bus registration failed: %d\\n\", err);\n+\t\treturn err;\n+\t}\n+\n+\treturn 0;\n+}\n+postcore_initcall(dma_context_bus_init);\ndiff --git a/include/linux/dma_context_bus.h b/include/linux/dma_context_bus.h\nnew file mode 100644\nindex 000000000000..3d89594fbce4\n--- /dev/null\n+++ b/include/linux/dma_context_bus.h\n@@ -0,0 +1,26 @@\n+/* SPDX-License-Identifier: GPL-2.0-only */\n+/*\n+ * Copyright (c) Qualcomm Technologies, Inc. and/or its subsidiaries.\n+ */\n+\n+#ifndef _LINUX_DMA_CONTEXT_BUS_H\n+#define _LINUX_DMA_CONTEXT_BUS_H\n+\n+#include <linux/device.h>\n+\n+#ifdef CONFIG_DMA_CONTEXT_BUS\n+extern const struct bus_type dma_context_bus_type;\n+\n+struct device *create_dma_context_bus_device(struct device *parent_device,\n+\t\t\t\t\t struct device_node *of_node,\n+\t\t\t\t\t u64 dma_mask, const u32 *iommu_f_id);\n+#else\n+static inline struct device *create_dma_context_bus_device(struct device *parent_device,\n+\t\t\t\t\t\t\t struct device_node *of_node,\n+\t\t\t\t\t\t\t u64 dma_mask, const u32 *iommu_f_id)\n+{\n+\treturn NULL;\n+}\n+#endif\n+\n+#endif /* _LINUX_DMA_CONTEXT_BUS_H */\n", "prefixes": [ "v2", "02/13" ] }