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{ "id": 2227058, "url": "http://patchwork.ozlabs.org/api/patches/2227058/?format=api", "web_url": "http://patchwork.ozlabs.org/project/opensbi/patch/20260423052339.356900-4-anup.patel@oss.qualcomm.com/", "project": { "id": 67, "url": "http://patchwork.ozlabs.org/api/projects/67/?format=api", "name": "OpenSBI development", "link_name": "opensbi", "list_id": "opensbi.lists.infradead.org", "list_email": "opensbi@lists.infradead.org", "web_url": "https://github.com/riscv/opensbi", "scm_url": "", "webscm_url": "", "list_archive_url": "", "list_archive_url_format": "", "commit_url_format": "https://github.com/riscv/opensbi/commit/{}" }, "msgid": "<20260423052339.356900-4-anup.patel@oss.qualcomm.com>", "list_archive_url": null, "date": "2026-04-23T05:23:36", "name": "[3/6] lib: sbi_irqchip: Allow interrupt client to specify line sensing", "commit_ref": null, "pull_url": null, "state": "new", "archived": false, "hash": "6471024258c32cf941b094ba715c75c87af53a30", "submitter": { "id": 92322, "url": "http://patchwork.ozlabs.org/api/people/92322/?format=api", "name": "Anup Patel", "email": "anup.patel@oss.qualcomm.com" }, "delegate": null, "mbox": "http://patchwork.ozlabs.org/project/opensbi/patch/20260423052339.356900-4-anup.patel@oss.qualcomm.com/mbox/", "series": [ { "id": 501146, "url": "http://patchwork.ozlabs.org/api/series/501146/?format=api", "web_url": "http://patchwork.ozlabs.org/project/opensbi/list/?series=501146", "date": "2026-04-23T05:23:35", "name": "Extend irqchip framework for MSIs and line sensing", "version": 1, "mbox": "http://patchwork.ozlabs.org/series/501146/mbox/" } ], "comments": "http://patchwork.ozlabs.org/api/patches/2227058/comments/", "check": "pending", "checks": "http://patchwork.ozlabs.org/api/patches/2227058/checks/", "tags": {}, "related": [], "headers": { "Return-Path": "\n <opensbi-bounces+incoming=patchwork.ozlabs.org@lists.infradead.org>", "X-Original-To": "incoming@patchwork.ozlabs.org", "Delivered-To": "patchwork-incoming@legolas.ozlabs.org", "Authentication-Results": [ "legolas.ozlabs.org;\n\tdkim=pass (2048-bit key;\n secure) header.d=lists.infradead.org header.i=@lists.infradead.org\n header.a=rsa-sha256 header.s=bombadil.20210309 header.b=gRc6YVtE;\n\tdkim=fail reason=\"signature verification failed\" (2048-bit key;\n unprotected) header.d=qualcomm.com header.i=@qualcomm.com header.a=rsa-sha256\n header.s=qcppdkim1 header.b=WhiTSZA8;\n\tdkim-atps=neutral", "legolas.ozlabs.org;\n spf=none (no SPF record) smtp.mailfrom=lists.infradead.org\n (client-ip=2607:7c80:54:3::133; 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Thu, 23 Apr 2026 10:53:41 +0530 (+0530)" ], "DKIM-Signature": [ "v=1; a=rsa-sha256; q=dns/txt; c=relaxed/relaxed;\n\td=lists.infradead.org; s=bombadil.20210309; h=Sender:\n\tContent-Transfer-Encoding:Content-Type:List-Subscribe:List-Help:List-Post:\n\tList-Archive:List-Unsubscribe:List-Id:MIME-Version:References:In-Reply-To:\n\tMessage-ID:Date:Subject:Cc:To:From:Reply-To:Content-ID:Content-Description:\n\tResent-Date:Resent-From:Resent-Sender:Resent-To:Resent-Cc:Resent-Message-ID:\n\tList-Owner; bh=3/btJzRgU7ITtUU1e7J5Nl7PFqTg20ZmYiyVOMpTTMA=; b=gRc6YVtE6un2JS\n\thKh+b0DiD5Da6+IpmkW7sMOzhPrP7NqFw3aqydYmr0IeWHDBo55HNo0RsiOe5xpAUHsAVJcO6I08T\n\t0KcMYrOjSo/jaSozcUzHB/inKv++xptu4IUNU0Wu4nGwtWd/mvxE9CR1PKKUDIBwaN5Hr6hr7OP0q\n\tJSyT5t7z/BSICmVwu0p2UGW60GBsrW3YiF8yD7vaq9PCsGRSV9vDK6rj/jF2aPSZAvzyImt/gkgsq\n\tVyToTA8WNlb6FQcOuC1cOn/1KmBmu0lk2Hypr8IFD4FGcHOLUhS4Sj7tr7uNwGLM4uIYud6ThMKkQ\n\tI1ooPdnoo7qkQMEV4WAQ==;", "v=1; a=rsa-sha256; c=relaxed/relaxed; d=qualcomm.com; h=\n\tcc:content-transfer-encoding:date:from:in-reply-to:message-id\n\t:mime-version:references:subject:to; s=qcppdkim1; bh=AzhNDWSBDj8\n\tEiqEuZ51hrJbof4CcNLwv2JY0I9uX9+Q=; b=WhiTSZA8dXn7FUKpCKCOs33PNqk\n\tEwMgzb2Dkrvlm3J7wLpDj+iWX5kEnkEzKsNfoVbxVIwZLmhXSvxsmkdqhblJv4Nn\n\tpOVYsGvC1Muw37swflZrFSbMkms4JPzU9CHI0qFZX+naQIO370rd0n1fBxt1/ZQW\n\tt8wwKwcVlyxgZykuabbgTDglaBpZAX7Gn8VqAiqChou4jyJZXjS/4hh3ahtePrfZ\n\tuPTv4W0Q9YG//EhB19Uylc9DzqtVJdxnYeqhcUAlMnZjiWR8CXSWxXHTbbf/mwAp\n\t1CBINADrdYsuuIMmB/StEwFlsTFxShfRHSUYj++1VYRfluOD4rob5KqxTag==" ], "From": "Anup Patel <anup.patel@oss.qualcomm.com>", "To": "Atish Patra <atish.patra@linux.dev>", "Cc": "Andrew Jones <andrew.jones@oss.qualcomm.com>,\n Raymond Mao <raymond.mao@riscstar.com>,\n Dave Patel <dave.patel@riscstar.com>,\n Evgeny Voevodin <evvoevod@tenstorrent.com>,\n Samuel Holland <samuel.holland@sifive.com>,\n Anup Patel <anup@brainfault.org>, opensbi@lists.infradead.org,\n Anup Patel <anup.patel@oss.qualcomm.com>", "Subject": "[PATCH 3/6] lib: sbi_irqchip: Allow interrupt client to specify line\n sensing", "Date": "Thu, 23 Apr 2026 10:53:36 +0530", "Message-ID": "<20260423052339.356900-4-anup.patel@oss.qualcomm.com>", "X-Mailer": "git-send-email 2.43.0", "In-Reply-To": "<20260423052339.356900-1-anup.patel@oss.qualcomm.com>", "References": "<20260423052339.356900-1-anup.patel@oss.qualcomm.com>", "MIME-Version": "1.0", "X-QCInternal": [ "smtphost", "smtphost" ], "X-Proofpoint-Spam-Details-Enc": "AW1haW4tMjYwNDIzMDA0NyBTYWx0ZWRfX+XWjpXQOzSO+\n N7Bn1kzeiGqzxMLSsYnae46qMPpHsBZcSAewShva3Ka03xXw/0bDjcBHW+2ZNESpEaymG98vbme\n PiCldwtNFekvJPF/IpuzTiCFWidTu36GiTRJCsbefgN4wLOWR8OWpNO2yot7xN4i+SKV5EPSGBE\n XZKhc4oGVWIdIHnOTPnYRuXyXQfjwmRPuRmq6eTAbCZY+LkqdB+hiS563qQFX24I/g+S4Z5XOyd\n bcQEzUJK4T5ZWCdOLgRQJQ7PgLMz/c+Tt6eaTjgUW3ETb/9pxdKxkV+V8WnouLu1tUswdgPADLB\n iNfdrKeSLiMInL/Nb3f0gSXgqj4JaHgAPftEU/uXfB0U1oGiSvmJqlsK/5QoJBe4KRn4sIQUFkl\n 8OJTZNrQTebc9X/u0qM/LdyG+5D8BTNx8dNHYJLqN0pmFkHAopugmXYhW8N9AsizSAJy9IbksXe\n 5gRtqxvuu0pAP0yvqHA==", "X-Proofpoint-ORIG-GUID": "CI2Q86Ke90HaSgU9EJEtxuks6EZrK2MN", "X-Proofpoint-GUID": "CI2Q86Ke90HaSgU9EJEtxuks6EZrK2MN", "X-Authority-Analysis": "v=2.4 cv=f5J4wuyM c=1 sm=1 tr=0 ts=69e9ace1 cx=c_pps\n a=Ou0eQOY4+eZoSc0qltEV5Q==:117 a=Ou0eQOY4+eZoSc0qltEV5Q==:17\n a=A5OVakUREuEA:10 a=VkNPw1HP01LnGYTKEx00:22 a=u7WPNUs3qKkmUXheDGA7:22\n a=ZpdpYltYx_vBUK5n70dp:22 a=EUspDBNiAAAA:8 a=KUY_xoyuxW_Na2JgVsYA:9", "X-Proofpoint-Virus-Version": "vendor=baseguard\n engine=ICAP:2.0.293,Aquarius:18.0.1143,Hydra:6.1.51,FMLib:17.12.100.49\n definitions=2026-04-23_01,2026-04-21_02,2025-10-01_01", "X-Proofpoint-Spam-Details": "rule=outbound_notspam policy=outbound score=0\n bulkscore=0 priorityscore=1501 phishscore=0 adultscore=0 malwarescore=0\n spamscore=0 suspectscore=0 impostorscore=0 lowpriorityscore=0 clxscore=1015\n classifier=typeunknown authscore=0 authtc= authcc= route=outbound adjust=0\n reason=mlx scancount=1 engine=8.22.0-2604200000 definitions=main-2604230047", "X-CRM114-Version": "20100106-BlameMichelson ( TRE 0.8.0 (BSD) ) MR-646709E3 ", "X-CRM114-CacheID": "sfid-20260422_222412_631566_F8984E02 ", "X-CRM114-Status": "GOOD ( 14.40 )", "X-Spam-Score": "-2.7 (--)", "X-Spam-Report": "Spam detection software,\n running on the system \"bombadil.infradead.org\",\n has NOT identified this incoming email as spam. The original\n message has been attached to this so you can view it or label\n similar future email. If you have any questions, see\n the administrator of that system for details.\n Content preview: The interrupt client should be allowed to specify the line\n sensing type of the hwirqs for which it is registering handler. To support\n this, add hwirq_flags parameter to hwirq_setup() callback provided [...]\n Content analysis details: (-2.7 points, 5.0 required)\n pts rule name description\n ---- ----------------------\n --------------------------------------------------\n -0.7 RCVD_IN_DNSWL_LOW RBL: Sender listed at https://www.dnswl.org/, low\n trust\n [205.220.180.131 listed in list.dnswl.org]\n 0.0 SPF_HELO_NONE SPF: HELO does not publish an SPF Record\n -0.0 SPF_PASS SPF: sender matches SPF record\n -0.1 DKIM_VALID Message has at least one valid DKIM or DK\n signature\n -0.1 DKIM_VALID_EF Message has a valid DKIM or DK signature from\n envelope-from domain\n 0.1 DKIM_SIGNED Message has a DKIM or DK signature,\n not necessarily valid\n -1.9 BAYES_00 BODY: Bayes spam probability is 0 to 1%\n [score: 0.0000]", "X-BeenThere": "opensbi@lists.infradead.org", "X-Mailman-Version": "2.1.34", "Precedence": "list", "List-Id": "<opensbi.lists.infradead.org>", "List-Unsubscribe": "<http://lists.infradead.org/mailman/options/opensbi>,\n <mailto:opensbi-request@lists.infradead.org?subject=unsubscribe>", "List-Archive": "<http://lists.infradead.org/pipermail/opensbi/>", "List-Post": "<mailto:opensbi@lists.infradead.org>", "List-Help": "<mailto:opensbi-request@lists.infradead.org?subject=help>", "List-Subscribe": "<http://lists.infradead.org/mailman/listinfo/opensbi>,\n <mailto:opensbi-request@lists.infradead.org?subject=subscribe>", "Content-Type": "text/plain; charset=\"us-ascii\"", "Content-Transfer-Encoding": "7bit", "Sender": "\"opensbi\" <opensbi-bounces@lists.infradead.org>", "Errors-To": "opensbi-bounces+incoming=patchwork.ozlabs.org@lists.infradead.org" }, "content": "The interrupt client should be allowed to specify the line sensing\ntype of the hwirqs for which it is registering handler. To support\nthis, add hwirq_flags parameter to hwirq_setup() callback provided\nby the irqchip driver.\n\nSigned-off-by: Anup Patel <anup.patel@oss.qualcomm.com>\n---\n include/sbi/sbi_irqchip.h | 13 +++++++++++--\n lib/sbi/sbi_irqchip.c | 4 ++--\n lib/utils/irqchip/imsic.c | 4 ++--\n 3 files changed, 15 insertions(+), 6 deletions(-)", "diff": "diff --git a/include/sbi/sbi_irqchip.h b/include/sbi/sbi_irqchip.h\nindex 77b54110..9035dcef 100644\n--- a/include/sbi/sbi_irqchip.h\n+++ b/include/sbi/sbi_irqchip.h\n@@ -43,7 +43,16 @@ struct sbi_irqchip_device {\n \tint (*process_hwirqs)(struct sbi_irqchip_device *chip);\n \n \t/** Setup a hardware interrupt of this irqchip */\n-\tint (*hwirq_setup)(struct sbi_irqchip_device *chip, u32 hwirq);\n+\tint (*hwirq_setup)(struct sbi_irqchip_device *chip, u32 hwirq,\n+\t\t\t u32 hwirq_flags);\n+#define SBI_HWIRQ_FLAGS_NONE\t\t\t0x00000000UL\n+#define SBI_HWIRQ_FLAGS_EDGE_RISING\t\t0x00000001UL\n+#define SBI_HWIRQ_FLAGS_EDGE_FALLING\t\t0x00000002UL\n+#define SBI_HWIRQ_FLAGS_EDGE_BOTH\t\t(SBI_HWIRQ_FLAGS_EDGE_RISING | \\\n+\t\t\t\t\t\t SBI_HWIRQ_FLAGS_EDGE_FALLING)\n+#define SBI_HWIRQ_FLAGS_LEVEL_HIGH\t\t0x00000004UL\n+#define SBI_HWIRQ_FLAGS_LEVEL_LOW\t\t0x00000008UL\n+#define SBI_HWIRQ_FLAGS_LEVEL_SENSE_MASK\t0x0000000fUL\n \n \t/** Cleanup a hardware interrupt of this irqchip */\n \tvoid (*hwirq_cleanup)(struct sbi_irqchip_device *chip, u32 hwirq);\n@@ -91,7 +100,7 @@ int sbi_irqchip_set_raw_handler(struct sbi_irqchip_device *chip, u32 hwirq,\n \n /** Register a hardware interrupt handler */\n int sbi_irqchip_register_handler(struct sbi_irqchip_device *chip,\n-\t\t\t\t u32 first_hwirq, u32 num_hwirq,\n+\t\t\t\t u32 first_hwirq, u32 num_hwirq, u32 hwirq_flags,\n \t\t\t\t int (*callback)(u32 hwirq, void *opaque), void *opaque);\n \n /** Unregister a hardware interrupt handler */\ndiff --git a/lib/sbi/sbi_irqchip.c b/lib/sbi/sbi_irqchip.c\nindex f9e2eb5a..ea684303 100644\n--- a/lib/sbi/sbi_irqchip.c\n+++ b/lib/sbi/sbi_irqchip.c\n@@ -136,7 +136,7 @@ int sbi_irqchip_set_raw_handler(struct sbi_irqchip_device *chip, u32 hwirq,\n }\n \n int sbi_irqchip_register_handler(struct sbi_irqchip_device *chip,\n-\t\t\t\t u32 first_hwirq, u32 num_hwirq,\n+\t\t\t\t u32 first_hwirq, u32 num_hwirq, u32 hwirq_flags,\n \t\t\t\t int (*callback)(u32 hwirq, void *opaque), void *priv)\n {\n \tstruct sbi_irqchip_handler *h, *th, *nh;\n@@ -177,7 +177,7 @@ int sbi_irqchip_register_handler(struct sbi_irqchip_device *chip,\n \n \tif (chip->hwirq_setup) {\n \t\tfor (i = 0; i < h->num_hwirq; i++) {\n-\t\t\trc = chip->hwirq_setup(chip, h->first_hwirq + i);\n+\t\t\trc = chip->hwirq_setup(chip, h->first_hwirq + i, hwirq_flags);\n \t\t\tif (rc) {\n \t\t\t\tif (chip->hwirq_cleanup) {\n \t\t\t\t\tfor (j = 0; j < i; j++)\ndiff --git a/lib/utils/irqchip/imsic.c b/lib/utils/irqchip/imsic.c\nindex 7559a069..877255f8 100644\n--- a/lib/utils/irqchip/imsic.c\n+++ b/lib/utils/irqchip/imsic.c\n@@ -346,9 +346,9 @@ int imsic_data_check(struct imsic_data *imsic)\n \treturn 0;\n }\n \n-static int imsic_hwirq_setup(struct sbi_irqchip_device *chip, u32 hwirq)\n+static int imsic_hwirq_setup(struct sbi_irqchip_device *chip, u32 hwirq, u32 hwirq_flags)\n {\n-\tif (!hwirq || hwirq == IMSIC_IPI_ID)\n+\tif (!hwirq || hwirq == IMSIC_IPI_ID || hwirq_flags != SBI_HWIRQ_FLAGS_NONE)\n \t\treturn SBI_ENOTSUPP;\n \treturn 0;\n }\n", "prefixes": [ "3/6" ] }