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GET /api/patches/2227014/?format=api
{ "id": 2227014, "url": "http://patchwork.ozlabs.org/api/patches/2227014/?format=api", "web_url": "http://patchwork.ozlabs.org/project/linux-pci/patch/20260423010851.46737-3-fengchengwen@huawei.com/", "project": { "id": 28, "url": "http://patchwork.ozlabs.org/api/projects/28/?format=api", "name": "Linux PCI development", "link_name": "linux-pci", "list_id": "linux-pci.vger.kernel.org", "list_email": "linux-pci@vger.kernel.org", "web_url": null, "scm_url": null, "webscm_url": null, "list_archive_url": "", "list_archive_url_format": "", "commit_url_format": "" }, "msgid": "<20260423010851.46737-3-fengchengwen@huawei.com>", "list_archive_url": null, "date": "2026-04-23T01:08:48", "name": "[v3,2/5] vfio/pci: Add PCIe TPH interface with capability query", "commit_ref": null, "pull_url": null, "state": "new", "archived": false, "hash": "f47547077537a3ac1a1d0671619aa319b0a59235", "submitter": { "id": 92756, "url": "http://patchwork.ozlabs.org/api/people/92756/?format=api", "name": "fengchengwen", "email": "fengchengwen@huawei.com" }, "delegate": null, "mbox": "http://patchwork.ozlabs.org/project/linux-pci/patch/20260423010851.46737-3-fengchengwen@huawei.com/mbox/", "series": [ { "id": 501135, "url": "http://patchwork.ozlabs.org/api/series/501135/?format=api", "web_url": "http://patchwork.ozlabs.org/project/linux-pci/list/?series=501135", "date": "2026-04-23T01:08:48", "name": "vfio/pci: Add PCIe TPH support", "version": 3, "mbox": "http://patchwork.ozlabs.org/series/501135/mbox/" } ], "comments": "http://patchwork.ozlabs.org/api/patches/2227014/comments/", "check": "pending", "checks": "http://patchwork.ozlabs.org/api/patches/2227014/checks/", "tags": {}, "related": [], "headers": { "Return-Path": "\n <linux-pci+bounces-53026-incoming=patchwork.ozlabs.org@vger.kernel.org>", "X-Original-To": [ "incoming@patchwork.ozlabs.org", "linux-pci@vger.kernel.org" ], "Delivered-To": "patchwork-incoming@legolas.ozlabs.org", "Authentication-Results": [ "legolas.ozlabs.org;\n\tdkim=pass (1024-bit key;\n unprotected) header.d=huawei.com header.i=@huawei.com header.a=rsa-sha256\n header.s=dkim header.b=Bz1xx3t3;\n\tdkim-atps=neutral", "legolas.ozlabs.org;\n spf=pass (sender SPF authorized) smtp.mailfrom=vger.kernel.org\n (client-ip=2600:3c04:e001:36c::12fc:5321; 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Thu, 23 Apr 2026 09:08:57 +0800" ], "ARC-Seal": "i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116;\n\tt=1776906544; cv=none;\n b=TjhqUy6RDv5ieFk1hutG5S9z/bYLcZrNkln44pGyCJw55N8fyby3fqL0a8Q/LzKc8LDXGCE8EW6f8lQyP/w5i2GOuJ5MUIxC1rY47J0z7YKRipBjk+3GrSpb1zOkT3ABMtCcqVrAWC+pM0yq8h9MjxQlKTS8lW6daYOR1hIZXMI=", "ARC-Message-Signature": "i=1; a=rsa-sha256; d=subspace.kernel.org;\n\ts=arc-20240116; t=1776906544; c=relaxed/simple;\n\tbh=nQVWoCy9TpUqR65Ovoovtuh58pQuSSUeFrkq8K3hQu4=;\n\th=From:To:CC:Subject:Date:Message-ID:In-Reply-To:References:\n\t MIME-Version:Content-Type;\n b=J3HLtBEWyERdmrpQTDe5Idb8fYFTXa4PWEHBR700ViKE3WPcNrxKuf53FxGIsr85GykIghOaKf4oSNUTt93wE+2CRYoXx1+lAk+0icVXpzAVa6LOpPgYw6ti7rflyTzB/2owrOWQCfx4835VRx6B+XxMoQb3vaH6wSQgTWkZE74=", "ARC-Authentication-Results": "i=1; smtp.subspace.kernel.org;\n dmarc=pass (p=quarantine dis=none) header.from=huawei.com;\n spf=pass smtp.mailfrom=huawei.com;\n dkim=pass (1024-bit key) header.d=huawei.com header.i=@huawei.com\n header.b=Bz1xx3t3; arc=none smtp.client-ip=113.46.200.227", "dkim-signature": "v=1; a=rsa-sha256; d=huawei.com; s=dkim;\n\tc=relaxed/relaxed; q=dns/txt;\n\th=From;\n\tbh=sLRQPwxQz1P3NqZSeRwHPK6/GSAYnXddXdgC33HtWb4=;\n\tb=Bz1xx3t3UJEsBOnrh0kHmShi4Zm1lgIwdPm07v5JUob3/SNF9wYwgCYNMVH3i/eIJXvklAGbN\n\tZlhESTEDCfEJb/hzz7SEjAWOdWk+ncgM22ALO/OuqDrkkLl3LMUd5Et7hsUCDoP4AcWo7XDXLcg\n\tyERsTqNQXSZSczZd2HbM6q8=", "From": "Chengwen Feng <fengchengwen@huawei.com>", "To": "<alex@shazbot.org>, <jgg@ziepe.ca>", "CC": "<wathsala.vithanage@arm.com>, <helgaas@kernel.org>,\n\t<wangzhou1@hisilicon.com>, <wangyushan12@huawei.com>,\n\t<liuyonglong@huawei.com>, <kvm@vger.kernel.org>, <linux-pci@vger.kernel.org>", "Subject": "[PATCH v3 2/5] vfio/pci: Add PCIe TPH interface with capability query", "Date": "Thu, 23 Apr 2026 09:08:48 +0800", "Message-ID": "<20260423010851.46737-3-fengchengwen@huawei.com>", "X-Mailer": "git-send-email 2.17.1", "In-Reply-To": "<20260423010851.46737-1-fengchengwen@huawei.com>", "References": "<20260423010851.46737-1-fengchengwen@huawei.com>", "Precedence": "bulk", "X-Mailing-List": "linux-pci@vger.kernel.org", "List-Id": "<linux-pci.vger.kernel.org>", "List-Subscribe": "<mailto:linux-pci+subscribe@vger.kernel.org>", "List-Unsubscribe": "<mailto:linux-pci+unsubscribe@vger.kernel.org>", "MIME-Version": "1.0", "Content-Type": "text/plain", "X-ClientProxiedBy": "kwepems500002.china.huawei.com (7.221.188.17) To\n kwepemk500009.china.huawei.com (7.202.194.94)" }, "content": "Add the VFIO_DEVICE_PCI_TPH IOCTL and implement the basic capability query\noperation to let userspace discover device TPH support, supported modes and\nST table information.\n\nAdd module parameter 'enable_unsafe_tph_ds' to restrict unsafe device\nspecific mode without ST table to trusted userspace only.\n\nSigned-off-by: Chengwen Feng <fengchengwen@huawei.com>\n---\n drivers/vfio/pci/vfio_pci.c | 13 ++-\n drivers/vfio/pci/vfio_pci_core.c | 55 ++++++++++++-\n include/linux/vfio_pci_core.h | 3 +-\n include/uapi/linux/vfio.h | 131 +++++++++++++++++++++++++++++++\n 4 files changed, 199 insertions(+), 3 deletions(-)", "diff": "diff --git a/drivers/vfio/pci/vfio_pci.c b/drivers/vfio/pci/vfio_pci.c\nindex 0c771064c0b8..cbef61cda16f 100644\n--- a/drivers/vfio/pci/vfio_pci.c\n+++ b/drivers/vfio/pci/vfio_pci.c\n@@ -60,6 +60,12 @@ static bool disable_denylist;\n module_param(disable_denylist, bool, 0444);\n MODULE_PARM_DESC(disable_denylist, \"Disable use of device denylist. Disabling the denylist allows binding to devices with known errata that may lead to exploitable stability or security issues when accessed by untrusted users.\");\n \n+#ifdef CONFIG_PCIE_TPH\n+static bool enable_unsafe_tph_ds;\n+module_param(enable_unsafe_tph_ds, bool, 0444);\n+MODULE_PARM_DESC(enable_unsafe_tph_ds, \"Enable UNSAFE TPH device-specific mode with no standard steering-tag table. Only for bare-metal trusted userspace. Hypervisors must NOT enable.\");\n+#endif\n+\n static bool vfio_pci_dev_in_denylist(struct pci_dev *pdev)\n {\n \tswitch (pdev->vendor) {\n@@ -257,12 +263,17 @@ static int __init vfio_pci_init(void)\n {\n \tint ret;\n \tbool is_disable_vga = true;\n+\tbool is_enable_unsafe_tph_ds = false;\n \n #ifdef CONFIG_VFIO_PCI_VGA\n \tis_disable_vga = disable_vga;\n #endif\n+#ifdef CONFIG_PCIE_TPH\n+\tis_enable_unsafe_tph_ds = enable_unsafe_tph_ds;\n+#endif\n \n-\tvfio_pci_core_set_params(nointxmask, is_disable_vga, disable_idle_d3);\n+\tvfio_pci_core_set_params(nointxmask, is_disable_vga, disable_idle_d3,\n+\t\t\t\t is_enable_unsafe_tph_ds);\n \n \t/* Register and scan for devices */\n \tret = pci_register_driver(&vfio_pci_driver);\ndiff --git a/drivers/vfio/pci/vfio_pci_core.c b/drivers/vfio/pci/vfio_pci_core.c\nindex ad52abc46c04..9f1f07f3255e 100644\n--- a/drivers/vfio/pci/vfio_pci_core.c\n+++ b/drivers/vfio/pci/vfio_pci_core.c\n@@ -29,6 +29,7 @@\n #include <linux/sched/mm.h>\n #include <linux/iommufd.h>\n #include <linux/pci-p2pdma.h>\n+#include <linux/pci-tph.h>\n #if IS_ENABLED(CONFIG_EEH)\n #include <asm/eeh.h>\n #endif\n@@ -41,6 +42,7 @@\n static bool nointxmask;\n static bool disable_vga;\n static bool disable_idle_d3;\n+static bool enable_unsafe_tph_ds;\n \n static void vfio_pci_eventfd_rcu_free(struct rcu_head *rcu)\n {\n@@ -1461,6 +1463,53 @@ static int vfio_pci_ioctl_ioeventfd(struct vfio_pci_core_device *vdev,\n \t\t\t\t ioeventfd.fd);\n }\n \n+static int vfio_pci_tph_get_cap(struct vfio_pci_core_device *vdev,\n+\t\t\t\tstruct vfio_device_pci_tph_op *op,\n+\t\t\t\tvoid __user *uarg)\n+{\n+\tstruct pci_dev *pdev = vdev->pdev;\n+\tu8 mode = pcie_tph_get_st_modes(pdev);\n+\tstruct vfio_pci_tph_cap cap = {0};\n+\n+\tif (mode == 0 || mode == PCI_TPH_CAP_ST_NS)\n+\t\treturn -EOPNOTSUPP;\n+\n+\tif (mode & PCI_TPH_CAP_ST_IV)\n+\t\tcap.supported_modes |= VFIO_PCI_TPH_MODE_IV;\n+\tif (mode & PCI_TPH_CAP_ST_DS)\n+\t\tcap.supported_modes |= VFIO_PCI_TPH_MODE_DS;\n+\n+\tif (pcie_tph_get_st_table_loc(pdev) != PCI_TPH_LOC_NONE)\n+\t\tcap.st_table_sz = pcie_tph_get_st_table_size(pdev);\n+\n+\tif (copy_to_user(uarg, &cap, sizeof(cap)))\n+\t\treturn -EFAULT;\n+\n+\treturn 0;\n+}\n+\n+static int vfio_pci_ioctl_tph(struct vfio_pci_core_device *vdev,\n+\t\t\t void __user *uarg)\n+{\n+\tstruct vfio_device_pci_tph_op op;\n+\tsize_t minsz;\n+\n+\tif (copy_from_user(&op, uarg, sizeof(op.argsz) + sizeof(op.op)))\n+\t\treturn -EFAULT;\n+\n+\tminsz = offsetof(struct vfio_device_pci_tph_op, cap);\n+\tif (op.argsz < minsz)\n+\t\treturn -EINVAL;\n+\n+\tswitch (op.op) {\n+\tcase VFIO_PCI_TPH_GET_CAP:\n+\t\treturn vfio_pci_tph_get_cap(vdev, &op, uarg + minsz);\n+\tdefault:\n+\t\t/* Other ops are not implemented yet */\n+\t\treturn -EINVAL;\n+\t}\n+}\n+\n long vfio_pci_core_ioctl(struct vfio_device *core_vdev, unsigned int cmd,\n \t\t\t unsigned long arg)\n {\n@@ -1483,6 +1532,8 @@ long vfio_pci_core_ioctl(struct vfio_device *core_vdev, unsigned int cmd,\n \t\treturn vfio_pci_ioctl_reset(vdev, uarg);\n \tcase VFIO_DEVICE_SET_IRQS:\n \t\treturn vfio_pci_ioctl_set_irqs(vdev, uarg);\n+\tcase VFIO_DEVICE_PCI_TPH:\n+\t\treturn vfio_pci_ioctl_tph(vdev, uarg);\n \tdefault:\n \t\treturn -ENOTTY;\n \t}\n@@ -2570,11 +2621,13 @@ static void vfio_pci_dev_set_try_reset(struct vfio_device_set *dev_set)\n }\n \n void vfio_pci_core_set_params(bool is_nointxmask, bool is_disable_vga,\n-\t\t\t bool is_disable_idle_d3)\n+\t\t\t bool is_disable_idle_d3,\n+\t\t\t bool is_enable_unsafe_tph_ds)\n {\n \tnointxmask = is_nointxmask;\n \tdisable_vga = is_disable_vga;\n \tdisable_idle_d3 = is_disable_idle_d3;\n+\tenable_unsafe_tph_ds = is_enable_unsafe_tph_ds;\n }\n EXPORT_SYMBOL_GPL(vfio_pci_core_set_params);\n \ndiff --git a/include/linux/vfio_pci_core.h b/include/linux/vfio_pci_core.h\nindex 2ebba746c18f..0bc857af9119 100644\n--- a/include/linux/vfio_pci_core.h\n+++ b/include/linux/vfio_pci_core.h\n@@ -157,7 +157,8 @@ int vfio_pci_core_register_dev_region(struct vfio_pci_core_device *vdev,\n \t\t\t\t const struct vfio_pci_regops *ops,\n \t\t\t\t size_t size, u32 flags, void *data);\n void vfio_pci_core_set_params(bool nointxmask, bool is_disable_vga,\n-\t\t\t bool is_disable_idle_d3);\n+\t\t\t bool is_disable_idle_d3,\n+\t\t\t bool is_enable_unsafe_tph_ds);\n void vfio_pci_core_close_device(struct vfio_device *core_vdev);\n int vfio_pci_core_init_dev(struct vfio_device *core_vdev);\n void vfio_pci_core_release_dev(struct vfio_device *core_vdev);\ndiff --git a/include/uapi/linux/vfio.h b/include/uapi/linux/vfio.h\nindex 5de618a3a5ee..f899521e52c6 100644\n--- a/include/uapi/linux/vfio.h\n+++ b/include/uapi/linux/vfio.h\n@@ -1321,6 +1321,137 @@ struct vfio_precopy_info {\n \n #define VFIO_MIG_GET_PRECOPY_INFO _IO(VFIO_TYPE, VFIO_BASE + 21)\n \n+/**\n+ * struct vfio_pci_tph_cap - PCIe TPH capability information\n+ * @supported_modes: Supported TPH operating modes\n+ * @st_table_sz: Number of entries in ST table; 0 means no ST table\n+ * @reserved: Must be zero\n+ *\n+ * Used with VFIO_PCI_TPH_GET_CAP operation to return device\n+ * TLP Processing Hints (TPH) capabilities to userspace.\n+ */\n+struct vfio_pci_tph_cap {\n+\t__u8 supported_modes;\n+#define VFIO_PCI_TPH_MODE_IV\t(1u << 0) /* Interrupt vector */\n+#define VFIO_PCI_TPH_MODE_DS\t(1u << 1) /* Device specific */\n+\t__u8 reserved0;\n+\t__u16 st_table_sz;\n+\t__u32 reserved;\n+};\n+\n+/**\n+ * struct vfio_pci_tph_ctrl - TPH enable control structure\n+ * @mode: Selected TPH operating mode (VFIO_PCI_TPH_MODE_*)\n+ * @reserved: Must be zero\n+ *\n+ * Used with VFIO_PCI_TPH_ENABLE operation to specify the\n+ * operating mode when enabling TPH on the device.\n+ */\n+struct vfio_pci_tph_ctrl {\n+\t__u8 mode;\n+\t__u8 reserved[7];\n+};\n+\n+/**\n+ * struct vfio_pci_tph_entry - Single TPH steering tag entry\n+ * @cpu: CPU identifier for steering tag calculation\n+ * @mem_type: Memory type (VFIO_PCI_TPH_MEM_TYPE_*)\n+ * @reserved0: Must be zero\n+ * @index: ST table index for programming\n+ * @st: Unused for SET_ST\n+ * @reserved1: Must be zero\n+ *\n+ * For VFIO_PCI_TPH_GET_ST:\n+ * Userspace sets @cpu and @mem_type; kernel returns @st.\n+ *\n+ * For VFIO_PCI_TPH_SET_ST:\n+ * Userspace sets @index, @cpu, and @mem_type.\n+ * Kernel internally computes the steering tag and programs\n+ * it into the specified @index.\n+ *\n+ * If @cpu == U32_MAX, kernel clears the steering tag at\n+ * the specified @index.\n+ */\n+struct vfio_pci_tph_entry {\n+\t__u32 cpu;\n+\t__u8 mem_type;\n+#define VFIO_PCI_TPH_MEM_TYPE_VM\t0\n+#define VFIO_PCI_TPH_MEM_TYPE_PM\t1\n+\t__u8 reserved0;\n+\t__u16 index;\n+\t__u16 st;\n+\t__u16 reserved1;\n+};\n+\n+/**\n+ * struct vfio_pci_tph_st - Batch steering tag request\n+ * @count: Number of entries in the array\n+ * @reserved: Must be zero\n+ * @ents: Flexible array of steering tag entries\n+ *\n+ * Container structure for batch get/set operations.\n+ * Used with both VFIO_PCI_TPH_GET_ST and VFIO_PCI_TPH_SET_ST.\n+ */\n+struct vfio_pci_tph_st {\n+\t__u32 count;\n+\t__u32 reserved;\n+\tstruct vfio_pci_tph_entry ents[];\n+#define VFIO_PCI_TPH_MAX_ENTRIES 2048\n+};\n+\n+/**\n+ * struct vfio_device_pci_tph_op - Argument for VFIO_DEVICE_PCI_TPH\n+ * @argsz: User allocated size of this structure\n+ * @op: TPH operation (VFIO_PCI_TPH_*)\n+ * @cap: Capability data for GET_CAP\n+ * @ctrl: Control data for ENABLE\n+ * @st: Batch entry data for GET_ST/SET_ST\n+ *\n+ * @argsz must be set by the user to the size of the structure\n+ * being executed. Kernel validates input and returns data\n+ * only within the specified size.\n+ *\n+ * Operations:\n+ * - VFIO_PCI_TPH_GET_CAP: Query device TPH capabilities.\n+ * - VFIO_PCI_TPH_ENABLE: Enable TPH using mode from &ctrl.\n+ * - VFIO_PCI_TPH_DISABLE: Disable TPH on the device.\n+ * - VFIO_PCI_TPH_GET_ST: Retrieve CPU's steering tags.\n+ * Valid only for Device-Specific mode and\n+ * no ST table is present.\n+ * - VFIO_PCI_TPH_SET_ST: Program steering tags into device table.\n+ * If any entry fails, previously programmed entries\n+ * are rolled back to 0 before returning error.\n+ */\n+struct vfio_device_pci_tph_op {\n+\t__u32 argsz;\n+\t__u32 op;\n+#define VFIO_PCI_TPH_GET_CAP\t0\n+#define VFIO_PCI_TPH_ENABLE\t1\n+#define VFIO_PCI_TPH_DISABLE\t2\n+#define VFIO_PCI_TPH_GET_ST\t3\n+#define VFIO_PCI_TPH_SET_ST\t4\n+\tunion {\n+\t\tstruct vfio_pci_tph_cap cap;\n+\t\tstruct vfio_pci_tph_ctrl ctrl;\n+\t\tstruct vfio_pci_tph_st st;\n+\t};\n+};\n+\n+/**\n+ * VFIO_DEVICE_PCI_TPH - _IO(VFIO_TYPE, VFIO_BASE + 22)\n+ *\n+ * IOCTL for managing PCIe TLP Processing Hints (TPH) on\n+ * a VFIO-assigned PCI device. Provides operations to query\n+ * device capabilities, enable/disable TPH, retrieve CPU's\n+ * steering tags, and program steering tag tables.\n+ *\n+ * Return: 0 on success, negative errno on failure.\n+ * -EOPNOTSUPP: Operation not supported\n+ * -ENODEV: Device or required functionality not present\n+ * -EINVAL: Invalid argument or TPH not supported\n+ */\n+#define VFIO_DEVICE_PCI_TPH\t_IO(VFIO_TYPE, VFIO_BASE + 22)\n+\n /*\n * Upon VFIO_DEVICE_FEATURE_SET, allow the device to be moved into a low power\n * state with the platform-based power management. Device use of lower power\n", "prefixes": [ "v3", "2/5" ] }