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GET /api/patches/2226933/?format=api
{ "id": 2226933, "url": "http://patchwork.ozlabs.org/api/patches/2226933/?format=api", "web_url": "http://patchwork.ozlabs.org/project/qemu-devel/patch/20260422214225.2242-8-mohamed@unpredictable.fr/", "project": { "id": 14, "url": "http://patchwork.ozlabs.org/api/projects/14/?format=api", "name": "QEMU Development", "link_name": "qemu-devel", "list_id": "qemu-devel.nongnu.org", "list_email": "qemu-devel@nongnu.org", "web_url": "", "scm_url": "", "webscm_url": "", "list_archive_url": "", "list_archive_url_format": "", "commit_url_format": "" }, "msgid": "<20260422214225.2242-8-mohamed@unpredictable.fr>", "list_archive_url": null, "date": "2026-04-22T21:41:55", "name": "[v3,07/37] whpx: i386: introduce proper cpuid support", "commit_ref": null, "pull_url": null, "state": "new", "archived": false, "hash": "d4b1558d336fba4b541c7741c701003cbdc898af", "submitter": { "id": 91318, "url": "http://patchwork.ozlabs.org/api/people/91318/?format=api", "name": "Mohamed Mediouni", "email": "mohamed@unpredictable.fr" }, "delegate": null, "mbox": "http://patchwork.ozlabs.org/project/qemu-devel/patch/20260422214225.2242-8-mohamed@unpredictable.fr/mbox/", "series": [ { "id": 501116, "url": "http://patchwork.ozlabs.org/api/series/501116/?format=api", "web_url": "http://patchwork.ozlabs.org/project/qemu-devel/list/?series=501116", "date": "2026-04-22T21:41:48", "name": "[v3,01/37] target/i386: emulate: include name of unhandled instruction", "version": 3, "mbox": "http://patchwork.ozlabs.org/series/501116/mbox/" } ], "comments": "http://patchwork.ozlabs.org/api/patches/2226933/comments/", "check": "pending", "checks": "http://patchwork.ozlabs.org/api/patches/2226933/checks/", "tags": {}, "related": [], "headers": { "Return-Path": "<qemu-devel-bounces+incoming=patchwork.ozlabs.org@nongnu.org>", "X-Original-To": "incoming@patchwork.ozlabs.org", "Delivered-To": "patchwork-incoming@legolas.ozlabs.org", "Authentication-Results": [ "legolas.ozlabs.org;\n\tdkim=pass (2048-bit key;\n unprotected) header.d=unpredictable.fr header.i=@unpredictable.fr\n header.a=rsa-sha256 header.s=sig1 header.b=OcDqLMVL;\n\tdkim-atps=neutral", "legolas.ozlabs.org;\n spf=pass (sender SPF authorized) smtp.mailfrom=nongnu.org\n (client-ip=209.51.188.17; helo=lists1p.gnu.org;\n envelope-from=qemu-devel-bounces+incoming=patchwork.ozlabs.org@nongnu.org;\n receiver=patchwork.ozlabs.org)" ], "Received": [ "from lists1p.gnu.org (lists1p.gnu.org [209.51.188.17])\n\t(using TLSv1.2 with cipher ECDHE-ECDSA-AES256-GCM-SHA384 (256/256 bits))\n\t(No client certificate requested)\n\tby legolas.ozlabs.org (Postfix) with ESMTPS id 4g1CTN1KXjz1yD5\n\tfor <incoming@patchwork.ozlabs.org>; Thu, 23 Apr 2026 07:46:00 +1000 (AEST)", "from localhost ([::1] helo=lists1p.gnu.org)\n\tby lists1p.gnu.org with esmtp (Exim 4.90_1)\n\t(envelope-from <qemu-devel-bounces@nongnu.org>)\n\tid 1wFfLQ-0007yH-3t; Wed, 22 Apr 2026 17:42:52 -0400", "from eggs.gnu.org ([2001:470:142:3::10])\n by lists1p.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_256_GCM_SHA384:256)\n (Exim 4.90_1) (envelope-from <mohamed@unpredictable.fr>)\n id 1wFfLO-0007x9-O1\n for qemu-devel@nongnu.org; Wed, 22 Apr 2026 17:42:50 -0400", "from p-east2-cluster1-host9-snip4-7.eps.apple.com ([57.103.76.110]\n helo=outbound.st.icloud.com)\n by eggs.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_256_GCM_SHA384:256)\n (Exim 4.90_1) (envelope-from <mohamed@unpredictable.fr>)\n id 1wFfLM-00071f-QA\n for qemu-devel@nongnu.org; Wed, 22 Apr 2026 17:42:50 -0400", "from outbound.st.icloud.com (unknown [127.0.0.2])\n by p00-icloudmta-asmtp-us-east-1a-100-percent-1 (Postfix) with ESMTPS id\n 013DA18000A2; Wed, 22 Apr 2026 21:42:43 +0000 (UTC)", "from localhost.localdomain (unknown [17.42.251.67])\n by p00-icloudmta-asmtp-us-east-1a-100-percent-1 (Postfix) with ESMTPSA id\n 512E918000CB; Wed, 22 Apr 2026 21:42:41 +0000 (UTC)" ], "X-ICL-Out-Info": "\n HUtFAUMHWwJACUgBTUQeDx5WFlZNRAJCTQFIHV8DWRxBAUkdXw9LVxQEFVwFVgZXFHkNXR1FDlYZWgxSD1sOHBZLWFUJCgZdGFgVVgl3HlwASx1XBFQfUxJVHR0LRUtAEwRJAU1fDl4fBBdGGVUERx5dVkAZGQJRHFYNV0NUBF9QSQxBUGxaAEcXSB1dGVlvUF0cDhhZG0AVXRFQGVYJXhUXHkFNWgJWTQVKA18BWwZCC0oCWQVZB14LSgdfGlMfHVYQUgBSD3IFVwhBCFMCUQRYGl8IGQ1AThkMSh1SVlEFSgxcAGgPXR1YEV0=", "Dkim-Signature": "v=1; a=rsa-sha256; c=relaxed/relaxed; d=unpredictable.fr;\n s=sig1; t=1776894167; x=1779486167;\n bh=LbkTYL/emjmTtubWjDApjBeMnmXQk5lJhboi+ilmPdI=;\n h=From:To:Subject:Date:Message-ID:MIME-Version:x-icloud-hme;\n b=OcDqLMVLbKrAX4gUijebvDmSSvaJKZB2PFrIR4tgp2VD5rIpeZuF/tP8EegcxuWcsOlLgZvow+6Q5yc6EpW4Pf5li3Y/nny7Hejaur7OyCBo1R6272LJHD0ATp1o1y92FqbPskvxr5onBx67Q1HoJWE9tXDuZbtXfP4EO4RgmP5QxRShAhap3tXezlfCIihRiZ8cleL5UnWC5Yzw4FUtKHSp6ocYdQ9TA0BbZvRSDpuNu+wriCy/wskyPJZX9tYWxTKqH2ag/TZSqR0/Snp1ivBDlH19oBtqB5iq5rEHbUN6+MUEAP9v+QTOpBUzR1+evOjpkHstKqMKsF83B6PdLw==", "mail-alias-created-date": "1752046281608", "From": "Mohamed Mediouni <mohamed@unpredictable.fr>", "To": "qemu-devel@nongnu.org", "Cc": "Pedro Barbuda <pbarbuda@microsoft.com>, qemu-arm@nongnu.org,\n Pierrick Bouvier <pierrick.bouvier@linaro.org>,\n Mohamed Mediouni <mohamed@unpredictable.fr>,\n Roman Bolshakov <rbolshakov@ddn.com>,\n \"Michael S. Tsirkin\" <mst@redhat.com>, Wei Liu <wei.liu@kernel.org>,\n Phil Dennis-Jordan <phil@philjordan.eu>,\n Peter Maydell <peter.maydell@linaro.org>, Zhao Liu <zhao1.liu@intel.com>,\n Paolo Bonzini <pbonzini@redhat.com>", "Subject": "[PATCH v3 07/37] whpx: i386: introduce proper cpuid support", "Date": "Wed, 22 Apr 2026 23:41:55 +0200", "Message-ID": "<20260422214225.2242-8-mohamed@unpredictable.fr>", "X-Mailer": "git-send-email 2.50.1", "In-Reply-To": "<20260422214225.2242-1-mohamed@unpredictable.fr>", "References": "<20260422214225.2242-1-mohamed@unpredictable.fr>", "MIME-Version": "1.0", "Content-Transfer-Encoding": "8bit", "X-Proofpoint-GUID": "9LtywL4pZIm3GB1pDvAZno_gE8i2zlGW", "X-Proofpoint-Spam-Details-Enc": "AW1haW4tMjYwNDIyMDIxMSBTYWx0ZWRfX1KI+PadiQ2JO\n dR5C7bw8IJLpHo+M3NmdX4G2sIcpzVP6UKlZ6F8A+6UsJeaBcmP9AG92h0GprUYBGTBq5zjddX8\n N2TJj1L0pIaLr9q9ClInSFLR10hKfe8BhL6MazpdNvP5Ahor9hj8zB/p+XKKIWQg6XqCCAdrpNk\n bquORuOP4ZL02iYoNcKrQQjC5nBLU6XugTX4BAgn1phadjK3JzhBbbrNC/Ytu0UxYkbzdeUGq5f\n qOOAjzQ1dGyq1AUHOgybzz9BGXPCIkduLIA/ESo1URcFfTB17rQ9plThCM9MBKG/iMJiONvBHuE\n nSP8cwtwtD8rt/83D3mmxdZYXMF/eZtjn0T46IgZzdVFRFMHNdKhv3tYgnRFYM=", "X-Authority-Info-Out": "v=2.4 cv=XaGEDY55 c=1 sm=1 tr=0 ts=69e940d5\n cx=c_apl:c_pps:t_out a=YrL12D//S6tul8v/L+6tKg==:117\n a=YrL12D//S6tul8v/L+6tKg==:17 a=A5OVakUREuEA:10 a=VkNPw1HP01LnGYTKEx00:22\n a=mDV3o1hIAAAA:8 a=raKznI45vfUyTbRhOY0A:9", "X-Proofpoint-ORIG-GUID": "9LtywL4pZIm3GB1pDvAZno_gE8i2zlGW", "Received-SPF": "pass client-ip=57.103.76.110;\n envelope-from=mohamed@unpredictable.fr; helo=outbound.st.icloud.com", "X-Spam_score_int": "-20", "X-Spam_score": "-2.1", "X-Spam_bar": "--", "X-Spam_report": "(-2.1 / 5.0 requ) BAYES_00=-1.9, DKIM_SIGNED=0.1,\n DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1,\n SPF_HELO_PASS=-0.001,\n SPF_PASS=-0.001 autolearn=unavailable autolearn_force=no", "X-Spam_action": "no action", "X-BeenThere": "qemu-devel@nongnu.org", "X-Mailman-Version": "2.1.29", "Precedence": "list", "List-Id": "qemu development <qemu-devel.nongnu.org>", "List-Unsubscribe": "<https://lists.nongnu.org/mailman/options/qemu-devel>,\n <mailto:qemu-devel-request@nongnu.org?subject=unsubscribe>", "List-Archive": "<https://lists.nongnu.org/archive/html/qemu-devel>", "List-Post": "<mailto:qemu-devel@nongnu.org>", "List-Help": "<mailto:qemu-devel-request@nongnu.org?subject=help>", "List-Subscribe": "<https://lists.nongnu.org/mailman/listinfo/qemu-devel>,\n <mailto:qemu-devel-request@nongnu.org?subject=subscribe>", "Errors-To": "qemu-devel-bounces+incoming=patchwork.ozlabs.org@nongnu.org", "Sender": "qemu-devel-bounces+incoming=patchwork.ozlabs.org@nongnu.org" }, "content": "Unlike the implementation in QEMU 10.2, this one works.\n\nIt's not optimal though as it doesn't use the Hyper-V support for this.\n\nSigned-off-by: Mohamed Mediouni <mohamed@unpredictable.fr>\n---\n target/i386/whpx/whpx-all.c | 136 +++++++++++++++++++++++++----\n target/i386/whpx/whpx-cpu-legacy.c | 15 +---\n 2 files changed, 122 insertions(+), 29 deletions(-)", "diff": "diff --git a/target/i386/whpx/whpx-all.c b/target/i386/whpx/whpx-all.c\nindex f9f330c038..73e351d895 100644\n--- a/target/i386/whpx/whpx-all.c\n+++ b/target/i386/whpx/whpx-all.c\n@@ -2168,18 +2168,11 @@ int whpx_vcpu_run(CPUState *cpu)\n vcpu->exit_ctx.VpContext.Rip +\n vcpu->exit_ctx.VpContext.InstructionLength;\n \n- if (whpx_is_legacy_os()) {\n- reg_values[1].Reg64 = vcpu->exit_ctx.CpuidAccess.DefaultResultRax;\n- reg_values[2].Reg64 = vcpu->exit_ctx.CpuidAccess.DefaultResultRcx;\n- reg_values[3].Reg64 = vcpu->exit_ctx.CpuidAccess.DefaultResultRdx;\n- reg_values[4].Reg64 = vcpu->exit_ctx.CpuidAccess.DefaultResultRbx;\n- } else {\n- cpu_x86_cpuid(env, vcpu->exit_ctx.CpuidAccess.Rax,\n- vcpu->exit_ctx.CpuidAccess.Rcx,\n- (UINT32 *)®_values[1].Reg32,\n- (UINT32 *)®_values[4].Reg32, (UINT32 *)®_values[2].Reg32,\n- (UINT32 *)®_values[3].Reg32);\n- }\n+ cpu_x86_cpuid(env, vcpu->exit_ctx.CpuidAccess.Rax,\n+ vcpu->exit_ctx.CpuidAccess.Rcx,\n+ (UINT32 *)®_values[1].Reg32,\n+ (UINT32 *)®_values[4].Reg32, (UINT32 *)®_values[2].Reg32,\n+ (UINT32 *)®_values[3].Reg32);\n \n if (!whpx->hyperv_enlightenments_enabled) {\n switch (vcpu->exit_ctx.CpuidAccess.Rax) {\n@@ -2220,6 +2213,68 @@ int whpx_vcpu_run(CPUState *cpu)\n }\n break;\n }\n+ } else {\n+ switch (vcpu->exit_ctx.CpuidAccess.Rax) {\n+ case 0x40000000:\n+ case 0x40000001:\n+ case 0x40000010:\n+ reg_values[1].Reg64 = vcpu->exit_ctx.CpuidAccess.DefaultResultRax;\n+ reg_values[2].Reg64 = vcpu->exit_ctx.CpuidAccess.DefaultResultRcx;\n+ reg_values[3].Reg64 = vcpu->exit_ctx.CpuidAccess.DefaultResultRdx;\n+ reg_values[4].Reg64 = vcpu->exit_ctx.CpuidAccess.DefaultResultRbx;\n+ break;\n+ }\n+ }\n+\n+ if (vcpu->exit_ctx.CpuidAccess.Rax == 0x1) {\n+ if (cpu_has_x2apic_feature(env)) {\n+ reg_values[2].Reg64 |= CPUID_EXT_X2APIC;\n+ } else {\n+ reg_values[2].Reg32 &= ~CPUID_EXT_X2APIC;\n+ }\n+ }\n+\n+ /* Dynamic depending on XCR0 and XSS, so query DefaultResult */\n+ if (vcpu->exit_ctx.CpuidAccess.Rax == 0x07\n+ && vcpu->exit_ctx.CpuidAccess.Rcx == 0) {\n+ if (vcpu->exit_ctx.CpuidAccess.DefaultResultRdx\n+ & CPUID_7_0_EDX_CET_IBT) {\n+ reg_values[3].Reg32 |= CPUID_7_0_EDX_CET_IBT;\n+ } else {\n+ reg_values[3].Reg32 &= ~CPUID_7_0_EDX_CET_IBT;\n+ }\n+\n+ if (vcpu->exit_ctx.CpuidAccess.DefaultResultRcx\n+ & CPUID_7_0_ECX_CET_SHSTK) {\n+ reg_values[2].Reg32 |= CPUID_7_0_ECX_CET_SHSTK;\n+ } else {\n+ reg_values[2].Reg32 &= ~CPUID_7_0_ECX_CET_SHSTK;\n+ }\n+\n+ if (vcpu->exit_ctx.CpuidAccess.DefaultResultRcx\n+ & CPUID_7_0_ECX_OSPKE) {\n+ reg_values[2].Reg32 |= CPUID_7_0_ECX_OSPKE;\n+ } else {\n+ reg_values[2].Reg32 &= ~CPUID_7_0_ECX_OSPKE;\n+ }\n+ }\n+\n+ /* CPUID[0xD,{1,2}].EBX are dynamic depending on guest features. */\n+ if (vcpu->exit_ctx.CpuidAccess.Rax == 0xd) {\n+ if (vcpu->exit_ctx.CpuidAccess.Rcx == 1\n+ || vcpu->exit_ctx.CpuidAccess.Rcx == 2) {\n+ reg_values[4].Reg64 = vcpu->exit_ctx.CpuidAccess.DefaultResultRbx;\n+ }\n+ }\n+\n+ /* OSXSAVE is dynamic. Do this instead of syncing CR4 */\n+ if (vcpu->exit_ctx.CpuidAccess.Rax == 1) {\n+ if (vcpu->exit_ctx.CpuidAccess.DefaultResultRcx\n+ & CPUID_EXT_OSXSAVE) {\n+ reg_values[2].Reg32 |= CPUID_EXT_OSXSAVE;\n+ } else {\n+ reg_values[2].Reg32 &= ~CPUID_EXT_OSXSAVE;\n+ }\n }\n \n hr = whp_dispatch.WHvSetVirtualProcessorRegisters(\n@@ -2409,6 +2464,45 @@ error:\n return ret;\n }\n \n+static void whpx_cpu_xsave_init(void)\n+{\n+ static bool first = true;\n+ int i;\n+\n+ if (!first) {\n+ return;\n+ }\n+ first = false;\n+\n+ /* x87 and SSE states are in the legacy region of the XSAVE area. */\n+ x86_ext_save_areas[XSTATE_FP_BIT].offset = 0;\n+ x86_ext_save_areas[XSTATE_SSE_BIT].offset = 0;\n+\n+ for (i = XSTATE_SSE_BIT + 1; i < XSAVE_STATE_AREA_COUNT; i++) {\n+ ExtSaveArea *esa = &x86_ext_save_areas[i];\n+\n+ if (esa->size) {\n+ int sz = whpx_get_supported_cpuid(0xd, i, R_EAX);\n+ if (sz != 0) {\n+ assert(esa->size == sz);\n+ esa->offset = whpx_get_supported_cpuid(0xd, i, R_EBX);\n+ }\n+ }\n+ }\n+}\n+\n+static void whpx_cpu_max_instance_init(X86CPU *cpu)\n+{\n+ CPUX86State *env = &cpu->env;\n+\n+ env->cpuid_min_level =\n+ whpx_get_supported_cpuid(0x0, 0, R_EAX);\n+ env->cpuid_min_xlevel =\n+ whpx_get_supported_cpuid(0x80000000, 0, R_EAX);\n+ env->cpuid_min_xlevel2 =\n+ whpx_get_supported_cpuid(0xC0000000, 0, R_EAX);\n+}\n+\n static PropValue whpx_default_props[] = {\n { \"x2apic\", \"on\" },\n { NULL, NULL },\n@@ -2418,9 +2512,18 @@ static PropValue whpx_default_props[] = {\n void whpx_cpu_instance_init(CPUState *cs)\n {\n X86CPU *cpu = X86_CPU(cs);\n+ X86CPUClass *xcc = X86_CPU_GET_CLASS(cpu);\n \n host_cpu_instance_init(cpu);\n x86_cpu_apply_props(cpu, whpx_default_props);\n+\n+ if (xcc->max_features) {\n+ whpx_cpu_max_instance_init(cpu);\n+ }\n+\n+ if (whpx_has_xsave()) {\n+ whpx_cpu_xsave_init();\n+ }\n }\n \n /*\n@@ -2438,8 +2541,11 @@ int whpx_accel_init(AccelState *as, MachineState *ms)\n WHV_CAPABILITY_FEATURES features = {0};\n WHV_PROCESSOR_FEATURES_BANKS processor_features;\n WHV_PROCESSOR_PERFMON_FEATURES perfmon_features;\n- UINT32 cpuidExitList[] = {1};\n- UINT32 cpuidExitList_nohyperv[] = {1, 0x40000000, 0x40000001, 0x40000010};\n+\n+ UINT32 cpuidExitList[] = {0x0, 0x1, 0x6, 0x7, 0xb, 0xd, 0x14, 0x24, 0x29, 0x1E,\n+ 0x40000000, 0x40000001, 0x40000010, 0x80000000, 0x80000001,\n+ 0x80000002, 0x80000003, 0x80000004, 0x80000007, 0x80000008,\n+ 0x8000000A, 0x80000021, 0x80000022, 0xC0000000, 0xC0000001};\n \n whpx = &whpx_global;\n \n@@ -2698,7 +2804,7 @@ int whpx_accel_init(AccelState *as, MachineState *ms)\n hr = whp_dispatch.WHvSetPartitionProperty(\n whpx->partition,\n WHvPartitionPropertyCodeCpuidExitList,\n- whpx->hyperv_enlightenments_enabled ? cpuidExitList : cpuidExitList_nohyperv,\n+ cpuidExitList,\n RTL_NUMBER_OF(cpuidExitList) * sizeof(UINT32));\n \n if (FAILED(hr)) {\ndiff --git a/target/i386/whpx/whpx-cpu-legacy.c b/target/i386/whpx/whpx-cpu-legacy.c\nindex 477429b460..d341e6f4fd 100644\n--- a/target/i386/whpx/whpx-cpu-legacy.c\n+++ b/target/i386/whpx/whpx-cpu-legacy.c\n@@ -4,20 +4,7 @@\n * Copyright (c) 2003 Fabrice Bellard\n * Copyright (c) 2017 Google Inc.\n *\n- * This program is free software; you can redistribute it and/or\n- * modify it under the terms of the GNU Lesser General Public\n- * License as published by the Free Software Foundation; either\n- * version 2.1 of the License, or (at your option) any later version.\n- *\n- * This program is distributed in the hope that it will be useful,\n- * but WITHOUT ANY WARRANTY; without even the implied warranty of\n- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU\n- * Lesser General Public License for more details.\n- *\n- * You should have received a copy of the GNU Lesser General Public\n- * License along with this program; if not, see <http://www.gnu.org/licenses/>.\n- *\n- * cpuid\n+ * SPDX-License-Identifier: LGPL-2.1-or-later\n */\n \n #include \"qemu/osdep.h\"\n", "prefixes": [ "v3", "07/37" ] }