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GET /api/patches/2226880/?format=api
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{
    "id": 2226880,
    "url": "http://patchwork.ozlabs.org/api/patches/2226880/?format=api",
    "web_url": "http://patchwork.ozlabs.org/project/gcc/patch/bmm.hhuph3sz8c.gcc.gcc-TEST.clyon.121.2.9@forge-stage.sourceware.org/",
    "project": {
        "id": 17,
        "url": "http://patchwork.ozlabs.org/api/projects/17/?format=api",
        "name": "GNU Compiler Collection",
        "link_name": "gcc",
        "list_id": "gcc-patches.gcc.gnu.org",
        "list_email": "gcc-patches@gcc.gnu.org",
        "web_url": null,
        "scm_url": null,
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        "list_archive_url": "",
        "list_archive_url_format": "",
        "commit_url_format": ""
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    "msgid": "<bmm.hhuph3sz8c.gcc.gcc-TEST.clyon.121.2.9@forge-stage.sourceware.org>",
    "list_archive_url": null,
    "date": "2026-04-22T19:01:43",
    "name": "[v2,09/14] arm: [MVE intrinsics] rework uqrshll uqrshll_sat48",
    "commit_ref": null,
    "pull_url": null,
    "state": "new",
    "archived": false,
    "hash": "6a4b95ad9e7585e7496879868411b0f83031091f",
    "submitter": {
        "id": 92734,
        "url": "http://patchwork.ozlabs.org/api/people/92734/?format=api",
        "name": "Christophe Lyon via Sourceware Forge",
        "email": "forge-bot+clyon@forge-stage.sourceware.org"
    },
    "delegate": null,
    "mbox": "http://patchwork.ozlabs.org/project/gcc/patch/bmm.hhuph3sz8c.gcc.gcc-TEST.clyon.121.2.9@forge-stage.sourceware.org/mbox/",
    "series": [
        {
            "id": 501104,
            "url": "http://patchwork.ozlabs.org/api/series/501104/?format=api",
            "web_url": "http://patchwork.ozlabs.org/project/gcc/list/?series=501104",
            "date": "2026-04-22T19:01:35",
            "name": "arm: [MVE intrinsics] rework vpnot, vgetq_lane, vsetq_lane, vuninitialized and scalar shifts",
            "version": 2,
            "mbox": "http://patchwork.ozlabs.org/series/501104/mbox/"
        }
    ],
    "comments": "http://patchwork.ozlabs.org/api/patches/2226880/comments/",
    "check": "pending",
    "checks": "http://patchwork.ozlabs.org/api/patches/2226880/checks/",
    "tags": {},
    "related": [],
    "headers": {
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        ],
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        "ARC-Seal": "i=1; a=rsa-sha256; d=sourceware.org; s=key; t=1776884569; cv=none;\n b=mhH3+uiWe0NH+DSbjQvCUomqt5i4WB5Fgv8c8bobxv2Fn28rQKVz9ANpKR6jSMhdq7VDaRtfNFRFMUQF1DATwyf+G1uKPILteQdOEFlwynjmQo9AFNNWXrhWDXYQST6R5R1egMZelaFekFvgWdNjsJBpJ4SYqRMQU9IEwAaI+Lk=",
        "ARC-Message-Signature": "i=1; a=rsa-sha256; d=sourceware.org; s=key;\n t=1776884569; c=relaxed/simple;\n bh=ysBLpzL9bKlp6EtcYcEcP0a6fqbYaQHQYTonCjySMPU=;\n h=From:Date:Subject:To:Message-ID;\n b=V6HIuGrq3UF5LrOberjzXDdb1IVsib0B3+j7Q8fdehFSg4qSpkgJXPA5XSgpr6uDX8nyw6Mw9yFlSFWZnoDmmeqEbmdI0Fhx6Rj2QqB+1Qf6QEkOffpB3LsH3YCaWtzJVOKc77k50CNEllshw6zrUEyWOAqtmRh1YCrii1/2Ipw=",
        "ARC-Authentication-Results": "i=1; server2.sourceware.org",
        "From": "Christophe Lyon via Sourceware Forge\n <forge-bot+clyon@forge-stage.sourceware.org>",
        "Date": "Wed, 22 Apr 2026 19:01:43 +0000",
        "Subject": "[PATCH v2 09/14] arm: [MVE intrinsics] rework uqrshll uqrshll_sat48",
        "To": "gcc-patches mailing list <gcc-patches@gcc.gnu.org>",
        "Cc": "sloosemore@baylibre.com",
        "Message-ID": "\n <bmm.hhuph3sz8c.gcc.gcc-TEST.clyon.121.2.9@forge-stage.sourceware.org>",
        "X-Mailer": "batrachomyomachia",
        "X-Pull-Request-Organization": "gcc",
        "X-Pull-Request-Repository": "gcc-TEST",
        "X-Pull-Request": "https://forge.sourceware.org/gcc/gcc-TEST/pulls/121",
        "References": "\n <bmm.hhuph3sz8c.gcc.gcc-TEST.clyon.121.2.0@forge-stage.sourceware.org>",
        "In-Reply-To": "\n <bmm.hhuph3sz8c.gcc.gcc-TEST.clyon.121.2.0@forge-stage.sourceware.org>",
        "X-Patch-URL": "\n https://forge.sourceware.org/clyon/gcc-TEST/commit/ba3b31aaa48e35069af94122714136bb63d6ca59",
        "X-BeenThere": "gcc-patches@gcc.gnu.org",
        "X-Mailman-Version": "2.1.30",
        "Precedence": "list",
        "List-Id": "Gcc-patches mailing list <gcc-patches.gcc.gnu.org>",
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        "List-Archive": "<https://gcc.gnu.org/pipermail/gcc-patches/>",
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        "Reply-To": "gcc-patches mailing list <gcc-patches@gcc.gnu.org>,\n sloosemore@baylibre.com, clyon@gcc.gnu.org",
        "Errors-To": "gcc-patches-bounces~incoming=patchwork.ozlabs.org@gcc.gnu.org"
    },
    "content": "From: Christophe Lyon <christophe.lyon@linaro.org>\n\nImplement uqrshll and uqrshll_sat48 using the new MVE builtins\nframework.\n\ngcc/ChangeLog:\n\t* config/arm/arm-mve-builtins-base.cc (enum which_scalar_shift):\n\tAdd ss_UQRSHLL, ss_UQRSHLL_SAT48.\n\t(mve_function_scalar_shift): Add support for ss_UQRSHLL,\n\tss_UQRSHLL_SAT48.\n\t* config/arm/arm-mve-builtins-base.def (uqrshll, uqrshll_sat48):\n\tNew.\n\t* config/arm/arm-mve-builtins-base.h (uqrshll, uqrshll_sat48):\n\tNew.\n\t* config/arm/arm_mve.h (uqrshll): Delete.\n\t(uqrshll_sat48): Delete.\n\t(__arm_uqrshll): Delete.\n\t(__arm_uqrshll_sat48): Delete.\n\t* config/arm/mve.md (mve_uqrshll_sat<supf>_di): Add '@' prefix.\n---\n gcc/config/arm/arm-mve-builtins-base.cc  | 12 ++++++++++++\n gcc/config/arm/arm-mve-builtins-base.def |  2 ++\n gcc/config/arm/arm-mve-builtins-base.h   |  2 ++\n gcc/config/arm/arm_mve.h                 | 16 ----------------\n gcc/config/arm/mve.md                    |  2 +-\n 5 files changed, 17 insertions(+), 17 deletions(-)",
    "diff": "diff --git a/gcc/config/arm/arm-mve-builtins-base.cc b/gcc/config/arm/arm-mve-builtins-base.cc\nindex 66d77ffe90ee..9f3b83355c9b 100644\n--- a/gcc/config/arm/arm-mve-builtins-base.cc\n+++ b/gcc/config/arm/arm-mve-builtins-base.cc\n@@ -1246,6 +1246,8 @@ public:\n enum which_scalar_shift {\n   ss_ASRL,\n   ss_LSLL,\n+  ss_UQRSHLL,\n+  ss_UQRSHLL_SAT48,\n };\n \n class mve_function_scalar_shift : public function_base\n@@ -1275,6 +1277,14 @@ public:\n \tcode = CODE_FOR_mve_lsll;\n \tbreak;\n \n+      case ss_UQRSHLL:\n+\tcode = code_for_mve_uqrshll_sat_di (UQRSHLL_64);\n+\tbreak;\n+\n+      case ss_UQRSHLL_SAT48:\n+\tcode = code_for_mve_uqrshll_sat_di (UQRSHLL_48);\n+\tbreak;\n+\n       default:\n \tgcc_unreachable ();\n       }\n@@ -1452,6 +1462,8 @@ namespace arm_mve {\n \n FUNCTION (asrl, mve_function_scalar_shift, (ss_ASRL))\n FUNCTION (lsll, mve_function_scalar_shift, (ss_LSLL))\n+FUNCTION (uqrshll, mve_function_scalar_shift, (ss_UQRSHLL))\n+FUNCTION (uqrshll_sat48, mve_function_scalar_shift, (ss_UQRSHLL_SAT48))\n FUNCTION_PRED_P_S_U (vabavq, VABAVQ)\n FUNCTION_WITHOUT_N (vabdq, VABDQ)\n FUNCTION (vabsq, unspec_based_mve_function_exact_insn, (ABS, ABS, ABS, -1, -1, -1, VABSQ_M_S, -1, VABSQ_M_F, -1, -1, -1))\ndiff --git a/gcc/config/arm/arm-mve-builtins-base.def b/gcc/config/arm/arm-mve-builtins-base.def\nindex 422b5580c53b..29ca4045be36 100644\n--- a/gcc/config/arm/arm-mve-builtins-base.def\n+++ b/gcc/config/arm/arm-mve-builtins-base.def\n@@ -20,6 +20,8 @@\n #define REQUIRES_FLOAT false\n DEF_MVE_FUNCTION (asrl, scalar_s64_shift, none, none)\n DEF_MVE_FUNCTION (lsll, scalar_u64_shift, none, none)\n+DEF_MVE_FUNCTION (uqrshll, scalar_u64_shift, none, none)\n+DEF_MVE_FUNCTION (uqrshll_sat48, scalar_u64_shift, none, none)\n DEF_MVE_FUNCTION (vabavq, binary_acca_int32, all_integer, p_or_none)\n DEF_MVE_FUNCTION (vabdq, binary, all_integer, mx_or_none)\n DEF_MVE_FUNCTION (vabsq, unary, all_signed, mx_or_none)\ndiff --git a/gcc/config/arm/arm-mve-builtins-base.h b/gcc/config/arm/arm-mve-builtins-base.h\nindex 0f35031dcc97..953ae3d0894e 100644\n--- a/gcc/config/arm/arm-mve-builtins-base.h\n+++ b/gcc/config/arm/arm-mve-builtins-base.h\n@@ -25,6 +25,8 @@ namespace functions {\n \n extern const function_base *const asrl;\n extern const function_base *const lsll;\n+extern const function_base *const uqrshll;\n+extern const function_base *const uqrshll_sat48;\n extern const function_base *const vabavq;\n extern const function_base *const vabdq;\n extern const function_base *const vabsq;\ndiff --git a/gcc/config/arm/arm_mve.h b/gcc/config/arm/arm_mve.h\nindex c642a3c4327c..d27195efe978 100644\n--- a/gcc/config/arm/arm_mve.h\n+++ b/gcc/config/arm/arm_mve.h\n@@ -66,28 +66,12 @@\n #define srshr(__p0, __p1) __arm_srshr(__p0, __p1)\n #define srshrl(__p0, __p1) __arm_srshrl(__p0, __p1)\n #define uqrshl(__p0, __p1) __arm_uqrshl(__p0, __p1)\n-#define uqrshll(__p0, __p1) __arm_uqrshll(__p0, __p1)\n-#define uqrshll_sat48(__p0, __p1) __arm_uqrshll_sat48(__p0, __p1)\n #define uqshl(__p0, __p1) __arm_uqshl(__p0, __p1)\n #define uqshll(__p0, __p1) __arm_uqshll(__p0, __p1)\n #define urshr(__p0, __p1) __arm_urshr(__p0, __p1)\n #define urshrl(__p0, __p1) __arm_urshrl(__p0, __p1)\n #endif\n \n-__extension__ extern __inline uint64_t\n-__attribute__ ((__always_inline__, __gnu_inline__, __artificial__))\n-__arm_uqrshll (uint64_t value, int32_t shift)\n-{\n-  return __builtin_mve_uqrshll_sat64_di (value, shift);\n-}\n-\n-__extension__ extern __inline uint64_t\n-__attribute__ ((__always_inline__, __gnu_inline__, __artificial__))\n-__arm_uqrshll_sat48 (uint64_t value, int32_t shift)\n-{\n-  return __builtin_mve_uqrshll_sat48_di (value, shift);\n-}\n-\n __extension__ extern __inline int64_t\n __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))\n __arm_sqrshrl (int64_t value, int32_t shift)\ndiff --git a/gcc/config/arm/mve.md b/gcc/config/arm/mve.md\nindex ba71b279dc32..62bb14d94cc0 100644\n--- a/gcc/config/arm/mve.md\n+++ b/gcc/config/arm/mve.md\n@@ -4279,7 +4279,7 @@\n ;;\n ;; [uqrshll_di]\n ;;\n-(define_insn \"mve_uqrshll_sat<supf>_di\"\n+(define_insn \"@mve_uqrshll_sat<supf>_di\"\n   [(set (match_operand:DI 0 \"arm_low_register_operand\" \"=l\")\n \t(unspec:DI [(match_operand:DI 1 \"arm_low_register_operand\" \"0\")\n \t\t    (match_operand:SI 2 \"register_operand\" \"r\")]\n",
    "prefixes": [
        "v2",
        "09/14"
    ]
}