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GET /api/patches/2226872/?format=api
{ "id": 2226872, "url": "http://patchwork.ozlabs.org/api/patches/2226872/?format=api", "web_url": "http://patchwork.ozlabs.org/project/gcc/patch/bmm.hhuph3sz8c.gcc.gcc-TEST.clyon.121.2.11@forge-stage.sourceware.org/", "project": { "id": 17, "url": "http://patchwork.ozlabs.org/api/projects/17/?format=api", "name": "GNU Compiler Collection", "link_name": "gcc", "list_id": "gcc-patches.gcc.gnu.org", "list_email": "gcc-patches@gcc.gnu.org", "web_url": null, "scm_url": null, "webscm_url": null, "list_archive_url": "", "list_archive_url_format": "", "commit_url_format": "" }, "msgid": "<bmm.hhuph3sz8c.gcc.gcc-TEST.clyon.121.2.11@forge-stage.sourceware.org>", "list_archive_url": null, "date": "2026-04-22T19:01:45", "name": "[v2,11/14] arm: [MVE intrinsics] rework sqshll srshrl uqshll urshrl", "commit_ref": null, "pull_url": null, "state": "new", "archived": false, "hash": "562cf40d0e6fca75fb1a30deda9f290bcabae970", "submitter": { "id": 92734, "url": "http://patchwork.ozlabs.org/api/people/92734/?format=api", "name": "Christophe Lyon via Sourceware Forge", "email": "forge-bot+clyon@forge-stage.sourceware.org" }, "delegate": null, "mbox": "http://patchwork.ozlabs.org/project/gcc/patch/bmm.hhuph3sz8c.gcc.gcc-TEST.clyon.121.2.11@forge-stage.sourceware.org/mbox/", "series": [ { "id": 501104, "url": "http://patchwork.ozlabs.org/api/series/501104/?format=api", "web_url": "http://patchwork.ozlabs.org/project/gcc/list/?series=501104", "date": "2026-04-22T19:01:35", "name": "arm: [MVE intrinsics] rework vpnot, vgetq_lane, vsetq_lane, vuninitialized and scalar shifts", "version": 2, "mbox": "http://patchwork.ozlabs.org/series/501104/mbox/" } ], "comments": "http://patchwork.ozlabs.org/api/patches/2226872/comments/", "check": "pending", "checks": "http://patchwork.ozlabs.org/api/patches/2226872/checks/", "tags": {}, "related": [], "headers": { "Return-Path": "<gcc-patches-bounces~incoming=patchwork.ozlabs.org@gcc.gnu.org>", "X-Original-To": [ "incoming@patchwork.ozlabs.org", "gcc-patches@gcc.gnu.org" ], "Delivered-To": [ "patchwork-incoming@legolas.ozlabs.org", "gcc-patches@gcc.gnu.org" ], "Authentication-Results": [ "legolas.ozlabs.org;\n spf=pass (sender SPF authorized) smtp.mailfrom=gcc.gnu.org\n (client-ip=2620:52:6:3111::32; helo=vm01.sourceware.org;\n envelope-from=gcc-patches-bounces~incoming=patchwork.ozlabs.org@gcc.gnu.org;\n receiver=patchwork.ozlabs.org)", "sourceware.org; dmarc=none (p=none dis=none)\n header.from=forge-stage.sourceware.org", "sourceware.org;\n spf=pass smtp.mailfrom=forge-stage.sourceware.org", "server2.sourceware.org;\n arc=none smtp.remote-ip=38.145.34.39" ], "Received": [ "from vm01.sourceware.org (vm01.sourceware.org\n [IPv6:2620:52:6:3111::32])\n\t(using TLSv1.3 with cipher TLS_AES_256_GCM_SHA384 (256/256 bits)\n\t key-exchange x25519 server-signature ECDSA (secp384r1) server-digest SHA384)\n\t(No client certificate requested)\n\tby legolas.ozlabs.org (Postfix) with ESMTPS id 4g1BND3y3Vz1yGs\n\tfor <incoming@patchwork.ozlabs.org>; Thu, 23 Apr 2026 06:56:28 +1000 (AEST)", "from vm01.sourceware.org (localhost [127.0.0.1])\n\tby sourceware.org (Postfix) with ESMTP id 67A9D4452A2A\n\tfor <incoming@patchwork.ozlabs.org>; Wed, 22 Apr 2026 20:51:44 +0000 (GMT)", "from forge-stage.sourceware.org (vm08.sourceware.org [38.145.34.39])\n by sourceware.org (Postfix) with ESMTPS id 1F02D41B295B\n for <gcc-patches@gcc.gnu.org>; Wed, 22 Apr 2026 19:02:50 +0000 (GMT)", "from forge-stage.sourceware.org (localhost [IPv6:::1])\n (using TLSv1.3 with cipher TLS_AES_256_GCM_SHA384 (256/256 bits)\n key-exchange x25519 server-signature ECDSA (prime256v1) server-digest SHA256)\n (No client certificate requested)\n by forge-stage.sourceware.org (Postfix) with ESMTPS id CBEE643611;\n Wed, 22 Apr 2026 19:02:46 +0000 (UTC)" ], "DKIM-Filter": [ "OpenDKIM Filter v2.11.0 sourceware.org 67A9D4452A2A", "OpenDKIM Filter v2.11.0 sourceware.org 1F02D41B295B" ], "DMARC-Filter": "OpenDMARC Filter v1.4.2 sourceware.org 1F02D41B295B", "ARC-Filter": "OpenARC Filter v1.0.0 sourceware.org 1F02D41B295B", "ARC-Seal": "i=1; a=rsa-sha256; d=sourceware.org; s=key; t=1776884570; cv=none;\n b=FaGcaz/2nWIYkqpZ6GloirVkYqmhFSmqwd76QkWBQb1hF0L96ysqy07MjO6qRycJZzhAMgI78+J57RxhH+NQb6bvcF7LuFGqfGRIv8lfowZ+4AroGNIB4B60zuTQvv7z9KpM5nRhxjm4hW9uBvGy1itcXaRYpDA9yMTwOGzM0q0=", "ARC-Message-Signature": "i=1; a=rsa-sha256; d=sourceware.org; s=key;\n t=1776884570; c=relaxed/simple;\n bh=7by8LeTsgbKHzRBNCh1H2VJYHxkwwx+ImBmRZuxYQAg=;\n h=From:Date:Subject:To:Message-ID;\n b=B9PrmTkIZgnrO+1Ujlietm/c6bC/Zs1gdClM+xa31nvt52chuPCPVpjNo+WloyL0unffRFwrshnS6Xr8otDZ4tw/G/bq48U+biBDrppGZHnUpkyWwLcNrABewX+aBXBWKC3T7mwHPBVBuCTnH+SkPzuI+rYynCqM7CBgosZk+mE=", "ARC-Authentication-Results": "i=1; server2.sourceware.org", "From": "Christophe Lyon via Sourceware Forge\n <forge-bot+clyon@forge-stage.sourceware.org>", "Date": "Wed, 22 Apr 2026 19:01:45 +0000", "Subject": "[PATCH v2 11/14] arm: [MVE intrinsics] rework sqshll srshrl uqshll\n urshrl", "To": "gcc-patches mailing list <gcc-patches@gcc.gnu.org>", "Cc": "sloosemore@baylibre.com", "Message-ID": "\n <bmm.hhuph3sz8c.gcc.gcc-TEST.clyon.121.2.11@forge-stage.sourceware.org>", "X-Mailer": "batrachomyomachia", "X-Pull-Request-Organization": "gcc", "X-Pull-Request-Repository": "gcc-TEST", "X-Pull-Request": "https://forge.sourceware.org/gcc/gcc-TEST/pulls/121", "References": "\n <bmm.hhuph3sz8c.gcc.gcc-TEST.clyon.121.2.0@forge-stage.sourceware.org>", "In-Reply-To": "\n <bmm.hhuph3sz8c.gcc.gcc-TEST.clyon.121.2.0@forge-stage.sourceware.org>", "X-Patch-URL": "\n https://forge.sourceware.org/clyon/gcc-TEST/commit/cd827f2f2618e12c7c43ed2ee88899b789e85de9", "X-BeenThere": "gcc-patches@gcc.gnu.org", "X-Mailman-Version": "2.1.30", "Precedence": "list", "List-Id": "Gcc-patches mailing list <gcc-patches.gcc.gnu.org>", "List-Unsubscribe": "<https://gcc.gnu.org/mailman/options/gcc-patches>,\n <mailto:gcc-patches-request@gcc.gnu.org?subject=unsubscribe>", "List-Archive": "<https://gcc.gnu.org/pipermail/gcc-patches/>", "List-Post": "<mailto:gcc-patches@gcc.gnu.org>", "List-Help": "<mailto:gcc-patches-request@gcc.gnu.org?subject=help>", "List-Subscribe": "<https://gcc.gnu.org/mailman/listinfo/gcc-patches>,\n <mailto:gcc-patches-request@gcc.gnu.org?subject=subscribe>", "Reply-To": "gcc-patches mailing list <gcc-patches@gcc.gnu.org>,\n sloosemore@baylibre.com, clyon@gcc.gnu.org", "Errors-To": "gcc-patches-bounces~incoming=patchwork.ozlabs.org@gcc.gnu.org" }, "content": "From: Christophe Lyon <christophe.lyon@linaro.org>\n\nImplement sqshll, srshrl, uqshll and urshrl using the new MVE builtins\nframework.\n\ngcc/ChangeLog:\n\t* config/arm/arm-mve-builtins-base.cc (enum which_scalar_shift):\n\tAdd ss_SQSHLL, ss_SRSHRL, ss_UQSHLL, ss_URSHRL.\n\t(mve_function_scalar_shift): Add support for ss_SQSHLL, ss_SRSHRL,\n\tss_UQSHLL, ss_URSHRL.\n\t* config/arm/arm-mve-builtins-base.def (sqshll, srshrl, uqshll)\n\t(urshrl): New.\n\t* config/arm/arm-mve-builtins-base.h (sqshll, srshrl, uqshll)\n\t(urshrl): New.\n\t* config/arm/arm-mve-builtins-shapes.cc (scalar_s64_shift_imm)\n\t(scalar_u64_shift_imm): New.\n\t* config/arm/arm-mve-builtins-shapes.h (scalar_s64_shift_imm)\n\t(scalar_u64_shift_imm): New.\n\t* config/arm/arm_mve.h (sqshll): Delete.\n\t(srshrl): Delete.\n\t(uqshll): Delete.\n\t(urshrl): Delete.\n\t(__arm_uqshll): Delete.\n\t(__arm_urshrl): Delete.\n\t(__arm_srshrl): Delete.\n\t(__arm_sqshll): Delete.\n\ngcc/testsuite/ChangeLog:\n\t* gcc.target/arm/mve/intrinsics/sqshll_check_shift.c: New test.\n\t* gcc.target/arm/mve/intrinsics/srshrl_check_shift.c: New test.\n\t* gcc.target/arm/mve/intrinsics/uqshll_check_shift.c: New test.\n\t* gcc.target/arm/mve/intrinsics/urshrl_check_shift.c: New test.\n---\n gcc/config/arm/arm-mve-builtins-base.cc | 24 ++++++++++\n gcc/config/arm/arm-mve-builtins-base.def | 4 ++\n gcc/config/arm/arm-mve-builtins-base.h | 4 ++\n gcc/config/arm/arm-mve-builtins-shapes.cc | 46 +++++++++++++++++++\n gcc/config/arm/arm-mve-builtins-shapes.h | 2 +\n gcc/config/arm/arm_mve.h | 32 -------------\n .../arm/mve/intrinsics/sqshll_check_shift.c | 24 ++++++++++\n .../arm/mve/intrinsics/srshrl_check_shift.c | 24 ++++++++++\n .../arm/mve/intrinsics/uqshll_check_shift.c | 24 ++++++++++\n .../arm/mve/intrinsics/urshrl_check_shift.c | 24 ++++++++++\n 10 files changed, 176 insertions(+), 32 deletions(-)\n create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/sqshll_check_shift.c\n create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/srshrl_check_shift.c\n create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/uqshll_check_shift.c\n create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/urshrl_check_shift.c", "diff": "diff --git a/gcc/config/arm/arm-mve-builtins-base.cc b/gcc/config/arm/arm-mve-builtins-base.cc\nindex a192252f35a4..bcb97108b594 100644\n--- a/gcc/config/arm/arm-mve-builtins-base.cc\n+++ b/gcc/config/arm/arm-mve-builtins-base.cc\n@@ -1248,8 +1248,12 @@ enum which_scalar_shift {\n ss_LSLL,\n ss_SQRSHRL,\n ss_SQRSHRL_SAT48,\n+ ss_SQSHLL,\n+ ss_SRSHRL,\n ss_UQRSHLL,\n ss_UQRSHLL_SAT48,\n+ ss_UQSHLL,\n+ ss_URSHRL\n };\n \n class mve_function_scalar_shift : public function_base\n@@ -1287,6 +1291,14 @@ public:\n \tcode = code_for_mve_sqrshrl_sat_di (SQRSHRL_48);\n \tbreak;\n \n+ case ss_SQSHLL:\n+\tcode = CODE_FOR_mve_sqshll_di;\n+\tbreak;\n+\n+ case ss_SRSHRL:\n+\tcode = CODE_FOR_mve_srshrl_di;\n+\tbreak;\n+\n case ss_UQRSHLL:\n \tcode = code_for_mve_uqrshll_sat_di (UQRSHLL_64);\n \tbreak;\n@@ -1295,6 +1307,14 @@ public:\n \tcode = code_for_mve_uqrshll_sat_di (UQRSHLL_48);\n \tbreak;\n \n+ case ss_UQSHLL:\n+\tcode = CODE_FOR_mve_uqshll_di;\n+\tbreak;\n+\n+ case ss_URSHRL:\n+\tcode = CODE_FOR_mve_urshrl_di;\n+\tbreak;\n+\n default:\n \tgcc_unreachable ();\n }\n@@ -1474,8 +1494,12 @@ FUNCTION (asrl, mve_function_scalar_shift, (ss_ASRL))\n FUNCTION (lsll, mve_function_scalar_shift, (ss_LSLL))\n FUNCTION (sqrshrl, mve_function_scalar_shift, (ss_SQRSHRL))\n FUNCTION (sqrshrl_sat48, mve_function_scalar_shift, (ss_SQRSHRL_SAT48))\n+FUNCTION (sqshll, mve_function_scalar_shift, (ss_SQSHLL))\n+FUNCTION (srshrl, mve_function_scalar_shift, (ss_SRSHRL))\n FUNCTION (uqrshll, mve_function_scalar_shift, (ss_UQRSHLL))\n FUNCTION (uqrshll_sat48, mve_function_scalar_shift, (ss_UQRSHLL_SAT48))\n+FUNCTION (uqshll, mve_function_scalar_shift, (ss_UQSHLL))\n+FUNCTION (urshrl, mve_function_scalar_shift, (ss_URSHRL))\n FUNCTION_PRED_P_S_U (vabavq, VABAVQ)\n FUNCTION_WITHOUT_N (vabdq, VABDQ)\n FUNCTION (vabsq, unspec_based_mve_function_exact_insn, (ABS, ABS, ABS, -1, -1, -1, VABSQ_M_S, -1, VABSQ_M_F, -1, -1, -1))\ndiff --git a/gcc/config/arm/arm-mve-builtins-base.def b/gcc/config/arm/arm-mve-builtins-base.def\nindex 6ecb05e877b4..f46ce835596c 100644\n--- a/gcc/config/arm/arm-mve-builtins-base.def\n+++ b/gcc/config/arm/arm-mve-builtins-base.def\n@@ -22,8 +22,12 @@ DEF_MVE_FUNCTION (asrl, scalar_s64_shift, none, none)\n DEF_MVE_FUNCTION (lsll, scalar_u64_shift, none, none)\n DEF_MVE_FUNCTION (sqrshrl, scalar_s64_shift, none, none)\n DEF_MVE_FUNCTION (sqrshrl_sat48, scalar_s64_shift, none, none)\n+DEF_MVE_FUNCTION (sqshll, scalar_s64_shift_imm, none, none)\n+DEF_MVE_FUNCTION (srshrl, scalar_s64_shift_imm, none, none)\n DEF_MVE_FUNCTION (uqrshll, scalar_u64_shift, none, none)\n DEF_MVE_FUNCTION (uqrshll_sat48, scalar_u64_shift, none, none)\n+DEF_MVE_FUNCTION (uqshll, scalar_u64_shift_imm, none, none)\n+DEF_MVE_FUNCTION (urshrl, scalar_u64_shift_imm, none, none)\n DEF_MVE_FUNCTION (vabavq, binary_acca_int32, all_integer, p_or_none)\n DEF_MVE_FUNCTION (vabdq, binary, all_integer, mx_or_none)\n DEF_MVE_FUNCTION (vabsq, unary, all_signed, mx_or_none)\ndiff --git a/gcc/config/arm/arm-mve-builtins-base.h b/gcc/config/arm/arm-mve-builtins-base.h\nindex 2f047008573d..37302621d0b1 100644\n--- a/gcc/config/arm/arm-mve-builtins-base.h\n+++ b/gcc/config/arm/arm-mve-builtins-base.h\n@@ -27,8 +27,12 @@ extern const function_base *const asrl;\n extern const function_base *const lsll;\n extern const function_base *const sqrshrl;\n extern const function_base *const sqrshrl_sat48;\n+extern const function_base *const sqshll;\n+extern const function_base *const srshrl;\n extern const function_base *const uqrshll;\n extern const function_base *const uqrshll_sat48;\n+extern const function_base *const uqshll;\n+extern const function_base *const urshrl;\n extern const function_base *const vabavq;\n extern const function_base *const vabdq;\n extern const function_base *const vabsq;\ndiff --git a/gcc/config/arm/arm-mve-builtins-shapes.cc b/gcc/config/arm/arm-mve-builtins-shapes.cc\nindex 41e656e0861e..f75c7095d949 100644\n--- a/gcc/config/arm/arm-mve-builtins-shapes.cc\n+++ b/gcc/config/arm/arm-mve-builtins-shapes.cc\n@@ -1738,6 +1738,29 @@ struct scalar_s64_shift_def : public nonoverloaded_base\n };\n SHAPE (scalar_s64_shift)\n \n+/* int64_t foo(int64_t, const int)\n+\n+ Check that 'shift' is in the [1,32] range.\n+\n+ Example: sqshll.\n+ int64_t [__arm_]sqshll(int64_t value, const int shift) */\n+struct scalar_s64_shift_imm_def : public nonoverloaded_base\n+{\n+ void\n+ build (function_builder &b, const function_group_info &group,\n+\t bool preserve_user_namespace) const override\n+ {\n+ build_all (b, \"ss64,ss64,su64\", group, MODE_none, preserve_user_namespace);\n+ }\n+\n+ bool\n+ check (function_checker &c) const override\n+ {\n+ return c.require_immediate_range (1, 1, 32);\n+ }\n+};\n+SHAPE (scalar_s64_shift_imm)\n+\n /* uint64_t foo(uint64_t, int32_t)\n \n Example: lsll.\n@@ -1753,6 +1776,29 @@ struct scalar_u64_shift_def : public nonoverloaded_base\n };\n SHAPE (scalar_u64_shift)\n \n+/* uint64_t foo(uint64_t, const int)\n+\n+ Check that 'shift' is in the [1,32] range.\n+\n+ Example: uqshll.\n+ uint64_t [__arm_]uqshll(uint64_t value, const int shift) */\n+struct scalar_u64_shift_imm_def : public nonoverloaded_base\n+{\n+ void\n+ build (function_builder &b, const function_group_info &group,\n+\t bool preserve_user_namespace) const override\n+ {\n+ build_all (b, \"su64,su64,su64\", group, MODE_none, preserve_user_namespace);\n+ }\n+\n+ bool\n+ check (function_checker &c) const override\n+ {\n+ return c.require_immediate_range (1, 1, 32);\n+ }\n+};\n+SHAPE (scalar_u64_shift_imm)\n+\n /* <T0>_t vfoo[_t0](<S0>_t, <T0>_t, const_int)\n \n Check that 'idx' is in the [0..#num_lanes - 1] range.\ndiff --git a/gcc/config/arm/arm-mve-builtins-shapes.h b/gcc/config/arm/arm-mve-builtins-shapes.h\nindex 1841a8f7b22e..1ab11615ba49 100644\n--- a/gcc/config/arm/arm-mve-builtins-shapes.h\n+++ b/gcc/config/arm/arm-mve-builtins-shapes.h\n@@ -68,7 +68,9 @@ namespace arm_mve\n extern const function_shape *const load_gather_base;\n extern const function_shape *const mvn;\n extern const function_shape *const scalar_s64_shift;\n+ extern const function_shape *const scalar_s64_shift_imm;\n extern const function_shape *const scalar_u64_shift;\n+ extern const function_shape *const scalar_u64_shift_imm;\n extern const function_shape *const setq_lane;\n extern const function_shape *const store;\n extern const function_shape *const store_scatter_base;\ndiff --git a/gcc/config/arm/arm_mve.h b/gcc/config/arm/arm_mve.h\nindex 704a04eba452..3acb36a2a556 100644\n--- a/gcc/config/arm/arm_mve.h\n+++ b/gcc/config/arm/arm_mve.h\n@@ -60,44 +60,12 @@\n #define vuninitializedq_f32(void) __arm_vuninitializedq_f32(void)\n #define sqrshr(__p0, __p1) __arm_sqrshr(__p0, __p1)\n #define sqshl(__p0, __p1) __arm_sqshl(__p0, __p1)\n-#define sqshll(__p0, __p1) __arm_sqshll(__p0, __p1)\n #define srshr(__p0, __p1) __arm_srshr(__p0, __p1)\n-#define srshrl(__p0, __p1) __arm_srshrl(__p0, __p1)\n #define uqrshl(__p0, __p1) __arm_uqrshl(__p0, __p1)\n #define uqshl(__p0, __p1) __arm_uqshl(__p0, __p1)\n-#define uqshll(__p0, __p1) __arm_uqshll(__p0, __p1)\n #define urshr(__p0, __p1) __arm_urshr(__p0, __p1)\n-#define urshrl(__p0, __p1) __arm_urshrl(__p0, __p1)\n #endif\n \n-__extension__ extern __inline uint64_t\n-__attribute__ ((__always_inline__, __gnu_inline__, __artificial__))\n-__arm_uqshll (uint64_t value, const int shift)\n-{\n- return __builtin_mve_uqshll_di (value, shift);\n-}\n-\n-__extension__ extern __inline uint64_t\n-__attribute__ ((__always_inline__, __gnu_inline__, __artificial__))\n-__arm_urshrl (uint64_t value, const int shift)\n-{\n- return __builtin_mve_urshrl_di (value, shift);\n-}\n-\n-__extension__ extern __inline int64_t\n-__attribute__ ((__always_inline__, __gnu_inline__, __artificial__))\n-__arm_srshrl (int64_t value, const int shift)\n-{\n- return __builtin_mve_srshrl_di (value, shift);\n-}\n-\n-__extension__ extern __inline int64_t\n-__attribute__ ((__always_inline__, __gnu_inline__, __artificial__))\n-__arm_sqshll (int64_t value, const int shift)\n-{\n- return __builtin_mve_sqshll_di (value, shift);\n-}\n-\n __extension__ extern __inline uint32_t\n __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))\n __arm_uqrshl (uint32_t value, int32_t shift)\ndiff --git a/gcc/testsuite/gcc.target/arm/mve/intrinsics/sqshll_check_shift.c b/gcc/testsuite/gcc.target/arm/mve/intrinsics/sqshll_check_shift.c\nnew file mode 100644\nindex 000000000000..6b5fc41b0035\n--- /dev/null\n+++ b/gcc/testsuite/gcc.target/arm/mve/intrinsics/sqshll_check_shift.c\n@@ -0,0 +1,24 @@\n+/* { dg-require-effective-target arm_v8_1m_mve_ok } */\n+/* { dg-add-options arm_v8_1m_mve } */\n+\n+#include \"arm_mve.h\"\n+\n+#ifdef __cplusplus\n+extern \"C\" {\n+#endif\n+\n+int64_t\n+foo (int64_t value)\n+{\n+ return sqshll (value, 33); /* { dg-error {passing 33 to argument 2 of 'sqshll', which expects a value in the range \\[1, 32\\]} } */\n+}\n+\n+int64_t\n+foo1 (int64_t value)\n+{\n+ return sqshll (value, -1); /* { dg-error {passing -1 to argument 2 of 'sqshll', which expects a value in the range \\[1, 32\\]} } */\n+}\n+\n+#ifdef __cplusplus\n+}\n+#endif\ndiff --git a/gcc/testsuite/gcc.target/arm/mve/intrinsics/srshrl_check_shift.c b/gcc/testsuite/gcc.target/arm/mve/intrinsics/srshrl_check_shift.c\nnew file mode 100644\nindex 000000000000..d29a2390a197\n--- /dev/null\n+++ b/gcc/testsuite/gcc.target/arm/mve/intrinsics/srshrl_check_shift.c\n@@ -0,0 +1,24 @@\n+/* { dg-require-effective-target arm_v8_1m_mve_ok } */\n+/* { dg-add-options arm_v8_1m_mve } */\n+\n+#include \"arm_mve.h\"\n+\n+#ifdef __cplusplus\n+extern \"C\" {\n+#endif\n+\n+int64_t\n+foo (int64_t value)\n+{\n+ return srshrl (value, 33); /* { dg-error {passing 33 to argument 2 of 'srshrl', which expects a value in the range \\[1, 32\\]} } */\n+}\n+\n+int64_t\n+foo1 (int64_t value)\n+{\n+ return srshrl (value, -1); /* { dg-error {passing -1 to argument 2 of 'srshrl', which expects a value in the range \\[1, 32\\]} } */\n+}\n+\n+#ifdef __cplusplus\n+}\n+#endif\ndiff --git a/gcc/testsuite/gcc.target/arm/mve/intrinsics/uqshll_check_shift.c b/gcc/testsuite/gcc.target/arm/mve/intrinsics/uqshll_check_shift.c\nnew file mode 100644\nindex 000000000000..485fd01d4e77\n--- /dev/null\n+++ b/gcc/testsuite/gcc.target/arm/mve/intrinsics/uqshll_check_shift.c\n@@ -0,0 +1,24 @@\n+/* { dg-require-effective-target arm_v8_1m_mve_ok } */\n+/* { dg-add-options arm_v8_1m_mve } */\n+\n+#include \"arm_mve.h\"\n+\n+#ifdef __cplusplus\n+extern \"C\" {\n+#endif\n+\n+uint64_t\n+foo (uint64_t value)\n+{\n+ return uqshll (value, 33); /* { dg-error {passing 33 to argument 2 of 'uqshll', which expects a value in the range \\[1, 32\\]} } */\n+}\n+\n+uint64_t\n+foo1 (uint64_t value)\n+{\n+ return uqshll (value, -1); /* { dg-error {passing -1 to argument 2 of 'uqshll', which expects a value in the range \\[1, 32\\]} } */\n+}\n+\n+#ifdef __cplusplus\n+}\n+#endif\ndiff --git a/gcc/testsuite/gcc.target/arm/mve/intrinsics/urshrl_check_shift.c b/gcc/testsuite/gcc.target/arm/mve/intrinsics/urshrl_check_shift.c\nnew file mode 100644\nindex 000000000000..9d0d3b1d5ee9\n--- /dev/null\n+++ b/gcc/testsuite/gcc.target/arm/mve/intrinsics/urshrl_check_shift.c\n@@ -0,0 +1,24 @@\n+/* { dg-require-effective-target arm_v8_1m_mve_ok } */\n+/* { dg-add-options arm_v8_1m_mve } */\n+\n+#include \"arm_mve.h\"\n+\n+#ifdef __cplusplus\n+extern \"C\" {\n+#endif\n+\n+uint64_t\n+foo (uint64_t value)\n+{\n+ return urshrl (value, 33); /* { dg-error {passing 33 to argument 2 of 'urshrl', which expects a value in the range \\[1, 32\\]} } */\n+}\n+\n+uint64_t\n+foo1 (uint64_t value)\n+{\n+ return urshrl (value, -1); /* { dg-error {passing -1 to argument 2 of 'urshrl', which expects a value in the range \\[1, 32\\]} } */\n+}\n+\n+#ifdef __cplusplus\n+}\n+#endif\n", "prefixes": [ "v2", "11/14" ] }