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GET /api/patches/2226828/?format=api
{ "id": 2226828, "url": "http://patchwork.ozlabs.org/api/patches/2226828/?format=api", "web_url": "http://patchwork.ozlabs.org/project/qemu-devel/patch/20260422195746.88865-23-philmd@linaro.org/", "project": { "id": 14, "url": "http://patchwork.ozlabs.org/api/projects/14/?format=api", "name": "QEMU Development", "link_name": "qemu-devel", "list_id": "qemu-devel.nongnu.org", "list_email": "qemu-devel@nongnu.org", "web_url": "", "scm_url": "", "webscm_url": "", "list_archive_url": "", "list_archive_url_format": "", "commit_url_format": "" }, "msgid": "<20260422195746.88865-23-philmd@linaro.org>", "list_archive_url": null, "date": "2026-04-22T19:57:20", "name": "[PULL,22/48] hw/tpm: Propagate @ppi_enabled to tpm_tis_reset() and remove in TPMState", "commit_ref": null, "pull_url": null, "state": "new", "archived": false, "hash": "eeda9323d8fb5e460313a8bf982fc494a7a9deae", "submitter": { "id": 85046, "url": "http://patchwork.ozlabs.org/api/people/85046/?format=api", "name": "Philippe Mathieu-Daudé", "email": "philmd@linaro.org" }, "delegate": null, "mbox": "http://patchwork.ozlabs.org/project/qemu-devel/patch/20260422195746.88865-23-philmd@linaro.org/mbox/", "series": [ { "id": 501099, "url": "http://patchwork.ozlabs.org/api/series/501099/?format=api", "web_url": "http://patchwork.ozlabs.org/project/qemu-devel/list/?series=501099", "date": "2026-04-22T19:56:59", "name": "[PULL,01/48] hw/avr: Build as common unit files", "version": 1, "mbox": "http://patchwork.ozlabs.org/series/501099/mbox/" } ], "comments": "http://patchwork.ozlabs.org/api/patches/2226828/comments/", "check": "pending", "checks": "http://patchwork.ozlabs.org/api/patches/2226828/checks/", "tags": {}, "related": [], "headers": { "Return-Path": "<qemu-devel-bounces+incoming=patchwork.ozlabs.org@nongnu.org>", "X-Original-To": "incoming@patchwork.ozlabs.org", "Delivered-To": "patchwork-incoming@legolas.ozlabs.org", "Authentication-Results": [ "legolas.ozlabs.org;\n\tdkim=pass (2048-bit key;\n unprotected) header.d=linaro.org header.i=@linaro.org header.a=rsa-sha256\n header.s=google header.b=WGUlIyNk;\n\tdkim-atps=neutral", "legolas.ozlabs.org;\n spf=pass (sender SPF authorized) smtp.mailfrom=nongnu.org\n (client-ip=209.51.188.17; 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charset=UTF-8", "Content-Transfer-Encoding": "8bit", "Received-SPF": "pass client-ip=2a00:1450:4864:20::32b;\n envelope-from=philmd@linaro.org; helo=mail-wm1-x32b.google.com", "X-Spam_score_int": "-20", "X-Spam_score": "-2.1", "X-Spam_bar": "--", "X-Spam_report": "(-2.1 / 5.0 requ) BAYES_00=-1.9, DKIM_SIGNED=0.1,\n DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1,\n RCVD_IN_DNSWL_NONE=-0.0001, SPF_HELO_NONE=0.001,\n SPF_PASS=-0.001 autolearn=ham autolearn_force=no", "X-Spam_action": "no action", "X-BeenThere": "qemu-devel@nongnu.org", "X-Mailman-Version": "2.1.29", "Precedence": "list", "List-Id": "qemu development <qemu-devel.nongnu.org>", "List-Unsubscribe": "<https://lists.nongnu.org/mailman/options/qemu-devel>,\n <mailto:qemu-devel-request@nongnu.org?subject=unsubscribe>", "List-Archive": "<https://lists.nongnu.org/archive/html/qemu-devel>", "List-Post": "<mailto:qemu-devel@nongnu.org>", "List-Help": "<mailto:qemu-devel-request@nongnu.org?subject=help>", "List-Subscribe": "<https://lists.nongnu.org/mailman/listinfo/qemu-devel>,\n <mailto:qemu-devel-request@nongnu.org?subject=subscribe>", "Errors-To": "qemu-devel-bounces+incoming=patchwork.ozlabs.org@nongnu.org", "Sender": "qemu-devel-bounces+incoming=patchwork.ozlabs.org@nongnu.org" }, "content": "Of the TPM devices using FIFO mode, only the ISA variant has\nPPI, and calls tpm_ppi_init() to initialize the PPI state.\nPropagate @ppi_enabled to tpm_tis_reset() so it only resets\nthe PPI part when requested (ISA case) otherwise the PPI is in\nuninitialized state. Remove the now unused TPMState::ppi_enabled\nfield. Set the generic TPMIfClass::ppi_enabled so ACPI subsystem\ncan keep checking its availability.\n\nSigned-off-by: Philippe Mathieu-Daudé <philmd@linaro.org>\nReviewed-by: Stefan Berger <stefanb@linux.ibm.com>\nMessage-Id: <20260317120241.16320-5-philmd@linaro.org>\n---\n hw/tpm/tpm_tis.h | 3 +--\n hw/tpm/tpm_tis_common.c | 4 ++--\n hw/tpm/tpm_tis_i2c.c | 2 +-\n hw/tpm/tpm_tis_isa.c | 10 ++++------\n hw/tpm/tpm_tis_sysbus.c | 2 +-\n 5 files changed, 9 insertions(+), 12 deletions(-)", "diff": "diff --git a/hw/tpm/tpm_tis.h b/hw/tpm/tpm_tis.h\nindex 184632ff66b..1531620bf9d 100644\n--- a/hw/tpm/tpm_tis.h\n+++ b/hw/tpm/tpm_tis.h\n@@ -75,7 +75,6 @@ typedef struct TPMState {\n \n size_t be_buffer_size;\n \n- bool ppi_enabled;\n TPMPPI ppi;\n } TPMState;\n \n@@ -83,7 +82,7 @@ extern const VMStateDescription vmstate_locty;\n extern const MemoryRegionOps tpm_tis_memory_ops;\n \n int tpm_tis_pre_save(TPMState *s);\n-void tpm_tis_reset(TPMState *s);\n+void tpm_tis_reset(TPMState *s, bool ppi_enabled);\n enum TPMVersion tpm_tis_get_tpm_version(TPMState *s);\n void tpm_tis_request_completed(TPMState *s, int ret);\n uint32_t tpm_tis_read_data(TPMState *s, hwaddr addr, unsigned size);\ndiff --git a/hw/tpm/tpm_tis_common.c b/hw/tpm/tpm_tis_common.c\nindex f594b15b8ab..a134d5c2059 100644\n--- a/hw/tpm/tpm_tis_common.c\n+++ b/hw/tpm/tpm_tis_common.c\n@@ -813,7 +813,7 @@ enum TPMVersion tpm_tis_get_tpm_version(TPMState *s)\n * This function is called when the machine starts, resets or due to\n * S3 resume.\n */\n-void tpm_tis_reset(TPMState *s)\n+void tpm_tis_reset(TPMState *s, bool ppi_enabled)\n {\n int c;\n \n@@ -821,7 +821,7 @@ void tpm_tis_reset(TPMState *s)\n s->be_buffer_size = MIN(tpm_backend_get_buffer_size(s->be_driver),\n TPM_TIS_BUFFER_MAX);\n \n- if (s->ppi_enabled) {\n+ if (ppi_enabled) {\n tpm_ppi_reset(&s->ppi);\n }\n tpm_backend_reset(s->be_driver);\ndiff --git a/hw/tpm/tpm_tis_i2c.c b/hw/tpm/tpm_tis_i2c.c\nindex 9f13e0ec120..b4f258c7bcb 100644\n--- a/hw/tpm/tpm_tis_i2c.c\n+++ b/hw/tpm/tpm_tis_i2c.c\n@@ -523,7 +523,7 @@ static void tpm_tis_i2c_reset(DeviceState *dev)\n i2cst->csum_enable = 0;\n i2cst->loc_sel = 0x00;\n \n- return tpm_tis_reset(s);\n+ return tpm_tis_reset(s, false);\n }\n \n static void tpm_tis_i2c_class_init(ObjectClass *klass, const void *data)\ndiff --git a/hw/tpm/tpm_tis_isa.c b/hw/tpm/tpm_tis_isa.c\nindex 61e95434f5b..1ca403241de 100644\n--- a/hw/tpm/tpm_tis_isa.c\n+++ b/hw/tpm/tpm_tis_isa.c\n@@ -88,13 +88,12 @@ static void tpm_tis_isa_reset(DeviceState *dev)\n TPMStateISA *isadev = TPM_TIS_ISA(dev);\n TPMState *s = &isadev->state;\n \n- return tpm_tis_reset(s);\n+ return tpm_tis_reset(s, true);\n }\n \n static const Property tpm_tis_isa_properties[] = {\n DEFINE_PROP_UINT32(\"irq\", TPMStateISA, state.irq_num, TPM_TIS_IRQ),\n DEFINE_PROP_TPMBE(\"tpmdev\", TPMStateISA, state.be_driver),\n- DEFINE_PROP_BOOL(\"ppi\", TPMStateISA, state.ppi_enabled, true),\n };\n \n static void tpm_tis_isa_initfn(Object *obj)\n@@ -132,10 +131,8 @@ static void tpm_tis_isa_realizefn(DeviceState *dev, Error **errp)\n memory_region_add_subregion(isa_address_space(ISA_DEVICE(dev)),\n TPM_TIS_ADDR_BASE, &s->mmio);\n \n- if (s->ppi_enabled) {\n- tpm_ppi_init(&s->ppi, isa_address_space(ISA_DEVICE(dev)),\n- TPM_PPI_ADDR_BASE, OBJECT(dev));\n- }\n+ tpm_ppi_init(&s->ppi, isa_address_space(ISA_DEVICE(dev)),\n+ TPM_PPI_ADDR_BASE, OBJECT(dev));\n }\n \n static void build_tpm_tis_isa_aml(AcpiDevAmlIf *adev, Aml *scope)\n@@ -175,6 +172,7 @@ static void tpm_tis_isa_class_init(ObjectClass *klass, const void *data)\n device_class_set_props(dc, tpm_tis_isa_properties);\n dc->vmsd = &vmstate_tpm_tis_isa;\n tc->model = TPM_MODEL_TPM_TIS;\n+ tc->ppi_enabled = true;\n dc->realize = tpm_tis_isa_realizefn;\n device_class_set_legacy_reset(dc, tpm_tis_isa_reset);\n tc->request_completed = tpm_tis_isa_request_completed;\ndiff --git a/hw/tpm/tpm_tis_sysbus.c b/hw/tpm/tpm_tis_sysbus.c\nindex e9372e73163..dd30344d5ac 100644\n--- a/hw/tpm/tpm_tis_sysbus.c\n+++ b/hw/tpm/tpm_tis_sysbus.c\n@@ -87,7 +87,7 @@ static void tpm_tis_sysbus_reset(DeviceState *dev)\n TPMStateSysBus *sbdev = TPM_TIS_SYSBUS(dev);\n TPMState *s = &sbdev->state;\n \n- return tpm_tis_reset(s);\n+ return tpm_tis_reset(s, false);\n }\n \n static const Property tpm_tis_sysbus_properties[] = {\n", "prefixes": [ "PULL", "22/48" ] }