Patch Detail
get:
Show a patch.
patch:
Update a patch.
put:
Update a patch.
GET /api/patches/2226824/?format=api
{ "id": 2226824, "url": "http://patchwork.ozlabs.org/api/patches/2226824/?format=api", "web_url": "http://patchwork.ozlabs.org/project/qemu-devel/patch/20260422195746.88865-32-philmd@linaro.org/", "project": { "id": 14, "url": "http://patchwork.ozlabs.org/api/projects/14/?format=api", "name": "QEMU Development", "link_name": "qemu-devel", "list_id": "qemu-devel.nongnu.org", "list_email": "qemu-devel@nongnu.org", "web_url": "", "scm_url": "", "webscm_url": "", "list_archive_url": "", "list_archive_url_format": "", "commit_url_format": "" }, "msgid": "<20260422195746.88865-32-philmd@linaro.org>", "list_archive_url": null, "date": "2026-04-22T19:57:29", "name": "[PULL,31/48] docs/specs/tpm: document PPI support on ARM64 virt", "commit_ref": null, "pull_url": null, "state": "new", "archived": false, "hash": "54d35a52fc83ff8b6e91751c82fd2c5171fbd6c4", "submitter": { "id": 85046, "url": "http://patchwork.ozlabs.org/api/people/85046/?format=api", "name": "Philippe Mathieu-Daudé", "email": "philmd@linaro.org" }, "delegate": null, "mbox": "http://patchwork.ozlabs.org/project/qemu-devel/patch/20260422195746.88865-32-philmd@linaro.org/mbox/", "series": [ { "id": 501099, "url": "http://patchwork.ozlabs.org/api/series/501099/?format=api", "web_url": "http://patchwork.ozlabs.org/project/qemu-devel/list/?series=501099", "date": "2026-04-22T19:56:59", "name": "[PULL,01/48] hw/avr: Build as common unit files", "version": 1, "mbox": "http://patchwork.ozlabs.org/series/501099/mbox/" } ], "comments": "http://patchwork.ozlabs.org/api/patches/2226824/comments/", "check": "pending", "checks": "http://patchwork.ozlabs.org/api/patches/2226824/checks/", "tags": {}, "related": [], "headers": { "Return-Path": "<qemu-devel-bounces+incoming=patchwork.ozlabs.org@nongnu.org>", "X-Original-To": "incoming@patchwork.ozlabs.org", "Delivered-To": "patchwork-incoming@legolas.ozlabs.org", "Authentication-Results": [ "legolas.ozlabs.org;\n\tdkim=pass (2048-bit key;\n unprotected) header.d=linaro.org header.i=@linaro.org header.a=rsa-sha256\n header.s=google header.b=W9QT1Vtt;\n\tdkim-atps=neutral", "legolas.ozlabs.org;\n spf=pass (sender SPF authorized) smtp.mailfrom=nongnu.org\n (client-ip=209.51.188.17; helo=lists1p.gnu.org;\n envelope-from=qemu-devel-bounces+incoming=patchwork.ozlabs.org@nongnu.org;\n receiver=patchwork.ozlabs.org)" ], "Received": [ "from lists1p.gnu.org (lists1p.gnu.org [209.51.188.17])\n\t(using TLSv1.2 with cipher ECDHE-ECDSA-AES256-GCM-SHA384 (256/256 bits))\n\t(No client certificate requested)\n\tby legolas.ozlabs.org (Postfix) with ESMTPS id 4g19BX1FRVz1yD5\n\tfor <incoming@patchwork.ozlabs.org>; Thu, 23 Apr 2026 06:03:00 +1000 (AEST)", "from localhost ([::1] helo=lists1p.gnu.org)\n\tby lists1p.gnu.org with esmtp (Exim 4.90_1)\n\t(envelope-from <qemu-devel-bounces@nongnu.org>)\n\tid 1wFdlQ-0003dE-UN; Wed, 22 Apr 2026 16:01:38 -0400", "from eggs.gnu.org ([2001:470:142:3::10])\n by lists1p.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_256_GCM_SHA384:256)\n (Exim 4.90_1) (envelope-from <philmd@linaro.org>) id 1wFdlN-0003F3-Ez\n for qemu-devel@nongnu.org; Wed, 22 Apr 2026 16:01:33 -0400", "from mail-wm1-x332.google.com ([2a00:1450:4864:20::332])\n by eggs.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_128_GCM_SHA256:128)\n (Exim 4.90_1) (envelope-from <philmd@linaro.org>) id 1wFdlL-0002ea-JZ\n for qemu-devel@nongnu.org; Wed, 22 Apr 2026 16:01:33 -0400", "by mail-wm1-x332.google.com with SMTP id\n 5b1f17b1804b1-4852a9c6309so54524405e9.0\n for <qemu-devel@nongnu.org>; Wed, 22 Apr 2026 13:01:31 -0700 (PDT)", "from localhost.localdomain (88-187-86-199.subs.proxad.net.\n [88.187.86.199]) by smtp.gmail.com with ESMTPSA id\n 5b1f17b1804b1-488fc1393f5sm437715325e9.9.2026.04.22.13.01.28\n for <qemu-devel@nongnu.org>\n (version=TLS1_3 cipher=TLS_CHACHA20_POLY1305_SHA256 bits=256/256);\n Wed, 22 Apr 2026 13:01:28 -0700 (PDT)" ], "DKIM-Signature": "v=1; a=rsa-sha256; c=relaxed/relaxed;\n d=linaro.org; s=google; t=1776888090; x=1777492890; darn=nongnu.org;\n h=content-transfer-encoding:mime-version:references:in-reply-to\n :message-id:date:subject:to:from:from:to:cc:subject:date:message-id\n :reply-to; bh=XUAPjvfETyaF1LcO83CMB9i5YoVQlzQGnkm+idRhG8Q=;\n b=W9QT1Vtt6bgv4pu+UGU6vSEB7NnH/VWl+w75yv57+KotGvinisp3f/1m+ErVpa/v1q\n TbGO29YzNRsL8RrHeAJRex1S7Pg5K7kEUkvAqnxOlaGzO8UI9phFrbO2+b/5fbKFzJeN\n xrMeO6R2h8/UiJn4vml7yDt4Rm0MOtny5Lpeio9JhxfSndOoqiNNsOIK0/oLqt92g1lg\n /xnA6X3yGabGyJAbfboPceFZ6jAnuUjOBeT/GqyyJxZBHIMuOFKQI2bC2Ofd9OSSYB0/\n ldSo0extnn/jlNPqWyyv8+iJbvN4WDBfEmDF+SfnLZPTNnpBBonQZqaq224tKQm4ySpP\n Xyqw==", "X-Google-DKIM-Signature": "v=1; a=rsa-sha256; c=relaxed/relaxed;\n d=1e100.net; s=20251104; t=1776888090; x=1777492890;\n h=content-transfer-encoding:mime-version:references:in-reply-to\n :message-id:date:subject:to:from:x-gm-gg:x-gm-message-state:from:to\n :cc:subject:date:message-id:reply-to;\n bh=XUAPjvfETyaF1LcO83CMB9i5YoVQlzQGnkm+idRhG8Q=;\n b=LxZxT4690JnqeJBmEkGV0PLyNSSb/fOnfTYhdXsJpTdxx60xit+Xcv+BlHc/nZvOZb\n TZmQn8sjPfC122lgOAY9KsDUr8GyEw5k7lD7ubSHJ9uBlGCVOTLNmF/QVF/NqVKRwshR\n G2OOIsT2SIhf/xsnfr3dBI29vvogDax9joN1CxkYgxFqmitezClBcO4fkVTJkiAhnXCE\n FTdKFuYIQnU09gUIGZ1jP8w418ZAqjiphcO0xz9//DYGU5faJmH/tfkisrPQelLrF0ti\n MHU/DIWBiKXZHJLr5uAgL3hfc94Y1DzkawiOym/b94sWlgw57yKM0ZYhVj6z/PIeFf+W\n nCtw==", "X-Gm-Message-State": "AOJu0Yy+y1QlaC1hKnIOSGCT3oNvdKy39zWWbK8AgO8+1lQJYeR1zhmS\n 44w7wnH7PR1CORu71hrfOyoalMLqfnN5IZp9X+X5r4NCR1QjqoXLnJPkRj3TlFPqAFnOxoI580c\n l3/2KzFE=", "X-Gm-Gg": "AeBDievjv8n56sWmzVfYuzK7g7U2YuYHbZ2CccsbHnXQWAUOPKbF2tqxUqDJUTr6LWZ\n PXYoIdSwtknnCjAK5/1V2yRuiBQcaCS/kzs4cRW0kKrqXHPXEfK8P6YvNQ5vXx7jkD/hTao/jyf\n sUad45KHK/aChimDykXZHErz1r0Dv5WhkP0jy03gj7v5ogMAAJCPH86NeUhhXD+G0LYoImZ5lCB\n nbuTnxQvZn2qg8JeJcSM/tA9mkakCzlGq9XWRdQqEF3VUcPoazXJlHPuJrhcu/81cdvN+nFT/Lt\n 8e8id+2+G0kr7AotseXJCvUsyhj18E2oC5a89JH+tpSZkfoGyuprbnwFKDKcvALMiO61Wc1VVMI\n WhdqPBvnbOxve3Rp5btKf9nA8IbGBGw3wmrpo6SkLl/spRz3jDTpoUhAMan5nRZhOmr3ePlgYfr\n 9VgJ0ZLfqwNt0mvNS4Plz0YSzplogP5UtuMswziX1xXPMWlkO3ZnD1m4VW22ITZ3bDk80DPHTrv\n sXdR1qrs5o=", "X-Received": "by 2002:a05:600c:1554:b0:485:439b:683f with SMTP id\n 5b1f17b1804b1-488fb775fd5mr320977425e9.20.1776888089381;\n Wed, 22 Apr 2026 13:01:29 -0700 (PDT)", "From": "=?utf-8?q?Philippe_Mathieu-Daud=C3=A9?= <philmd@linaro.org>", "To": "qemu-devel@nongnu.org", "Subject": "[PULL 31/48] docs/specs/tpm: document PPI support on ARM64 virt", "Date": "Wed, 22 Apr 2026 21:57:29 +0200", "Message-ID": "<20260422195746.88865-32-philmd@linaro.org>", "X-Mailer": "git-send-email 2.53.0", "In-Reply-To": "<20260422195746.88865-1-philmd@linaro.org>", "References": "<20260422195746.88865-1-philmd@linaro.org>", "MIME-Version": "1.0", "Content-Type": "text/plain; charset=UTF-8", "Content-Transfer-Encoding": "8bit", "Received-SPF": "pass client-ip=2a00:1450:4864:20::332;\n envelope-from=philmd@linaro.org; helo=mail-wm1-x332.google.com", "X-Spam_score_int": "-20", "X-Spam_score": "-2.1", "X-Spam_bar": "--", "X-Spam_report": "(-2.1 / 5.0 requ) BAYES_00=-1.9, DKIM_SIGNED=0.1,\n DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1,\n RCVD_IN_DNSWL_NONE=-0.0001, SPF_HELO_NONE=0.001,\n SPF_PASS=-0.001 autolearn=ham autolearn_force=no", "X-Spam_action": "no action", "X-BeenThere": "qemu-devel@nongnu.org", "X-Mailman-Version": "2.1.29", "Precedence": "list", "List-Id": "qemu development <qemu-devel.nongnu.org>", "List-Unsubscribe": "<https://lists.nongnu.org/mailman/options/qemu-devel>,\n <mailto:qemu-devel-request@nongnu.org?subject=unsubscribe>", "List-Archive": "<https://lists.nongnu.org/archive/html/qemu-devel>", "List-Post": "<mailto:qemu-devel@nongnu.org>", "List-Help": "<mailto:qemu-devel-request@nongnu.org?subject=help>", "List-Subscribe": "<https://lists.nongnu.org/mailman/listinfo/qemu-devel>,\n <mailto:qemu-devel-request@nongnu.org?subject=subscribe>", "Errors-To": "qemu-devel-bounces+incoming=patchwork.ozlabs.org@nongnu.org", "Sender": "qemu-devel-bounces+incoming=patchwork.ozlabs.org@nongnu.org" }, "content": "From: Mohammadfaiz Bawa <mbawa@redhat.com>\n\nDocument that tpm-tis-device on the ARM virt machine supports PPI\nwith dynamically allocated MMIO via the platform bus, unlike x86\nwhere PPI is at the fixed address 0xFED45000.\n\nAlso add hw/arm/virt-acpi-build.c and hw/acpi/tpm.c to the list\nof files related to TPM ACPI tables.\n\nReviewed-by: Stefan Berger <stefanb@linux.ibm.com>\nSigned-off-by: Mohammadfaiz Bawa <mbawa@redhat.com>\nMessage-ID: <20260327173209.148180-2-mbawa@redhat.com>\nSigned-off-by: Philippe Mathieu-Daudé <philmd@linaro.org>\n---\n docs/specs/tpm.rst | 24 ++++++++++++++++++++++++\n 1 file changed, 24 insertions(+)", "diff": "diff --git a/docs/specs/tpm.rst b/docs/specs/tpm.rst\nindex b630a351b4f..ba2b0d72674 100644\n--- a/docs/specs/tpm.rst\n+++ b/docs/specs/tpm.rst\n@@ -187,8 +187,32 @@ The location of the table is given by the fw_cfg ``tpmppi_address``\n field. The PPI memory region size is 0x400 (``TPM_PPI_ADDR_SIZE``) to\n leave enough room for future updates.\n \n+PPI on ARM64 virt\n+-----------------\n+\n+The ARM virt machine supports PPI for ``tpm-tis-device`` as defined\n+in the `PPI specification`_.\n+\n+Unlike the x86 TIS device where the PPI memory region is mapped at\n+the fixed address ``0xFED45000`` (within the TIS MMIO range), the\n+ARM64 sysbus device registers PPI memory as a second MMIO region\n+on the platform bus. The platform bus assigns the guest physical\n+address dynamically at device plug time. The ACPI ``_DSM`` method\n+and PPI operation regions reference this dynamically resolved\n+address.\n+\n+PPI is controlled by the ``ppi`` property (default ``on``)::\n+\n+ -device tpm-tis-device,tpmdev=tpm0,ppi=on\n+\n+Without PPI, guest operating systems such as Windows 11\n+ARM64 will log errors when attempting to query TPM Physical\n+Presence capabilities via the ACPI ``_DSM`` method.\n+\n QEMU files related to TPM ACPI tables:\n - ``hw/i386/acpi-build.c``\n+ - ``hw/arm/virt-acpi-build.c``\n+ - ``hw/acpi/tpm.c``\n - ``include/hw/acpi/tpm.h``\n \n TPM backend devices\n", "prefixes": [ "PULL", "31/48" ] }