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GET /api/patches/2226443/?format=api
{ "id": 2226443, "url": "http://patchwork.ozlabs.org/api/patches/2226443/?format=api", "web_url": "http://patchwork.ozlabs.org/project/uboot/patch/20260422094649.57611-3-brian.ruley@gehealthcare.com/", "project": { "id": 18, "url": "http://patchwork.ozlabs.org/api/projects/18/?format=api", "name": "U-Boot", "link_name": "uboot", "list_id": "u-boot.lists.denx.de", "list_email": "u-boot@lists.denx.de", "web_url": null, "scm_url": null, "webscm_url": null, "list_archive_url": "", "list_archive_url_format": "", "commit_url_format": "" }, "msgid": "<20260422094649.57611-3-brian.ruley@gehealthcare.com>", "list_archive_url": null, "date": "2026-04-22T09:46:41", "name": "[3/5] imx6: clock: allow different clock sources for ldb", "commit_ref": null, "pull_url": null, "state": "new", "archived": false, "hash": "38c548f49b60eb65b7cc9af08c462409201dc33b", "submitter": { "id": 89422, "url": "http://patchwork.ozlabs.org/api/people/89422/?format=api", "name": "Brian Ruley", "email": "brian.ruley@gehealthcare.com" }, "delegate": { "id": 151988, "url": "http://patchwork.ozlabs.org/api/users/151988/?format=api", "username": "festevam", "first_name": "Fabio", "last_name": "Estevam", "email": "festevam@gmail.com" }, "mbox": "http://patchwork.ozlabs.org/project/uboot/patch/20260422094649.57611-3-brian.ruley@gehealthcare.com/mbox/", "series": [ { "id": 501004, "url": "http://patchwork.ozlabs.org/api/series/501004/?format=api", "web_url": "http://patchwork.ozlabs.org/project/uboot/list/?series=501004", "date": "2026-04-22T09:46:40", "name": "[1/5] clk: imx6q: cosmetic: keep pll definitions together", "version": 1, "mbox": "http://patchwork.ozlabs.org/series/501004/mbox/" } ], "comments": "http://patchwork.ozlabs.org/api/patches/2226443/comments/", "check": "pending", "checks": "http://patchwork.ozlabs.org/api/patches/2226443/checks/", "tags": {}, "related": [], "headers": { "Return-Path": "<u-boot-bounces@lists.denx.de>", "X-Original-To": "incoming@patchwork.ozlabs.org", "Delivered-To": "patchwork-incoming@legolas.ozlabs.org", "Authentication-Results": [ "legolas.ozlabs.org;\n\tdkim=pass (2048-bit key;\n unprotected) header.d=gehealthcare.com header.i=@gehealthcare.com\n header.a=rsa-sha256 header.s=selector1 header.b=d5hqJxpC;\n\tdkim-atps=neutral", "legolas.ozlabs.org;\n spf=pass (sender SPF authorized) smtp.mailfrom=lists.denx.de\n (client-ip=2a01:238:438b:c500:173d:9f52:ddab:ee01; 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c=relaxed/relaxed; d=gehealthcare.com;\n s=selector1;\n h=From:Date:Subject:Message-ID:Content-Type:MIME-Version:X-MS-Exchange-SenderADCheck;\n bh=glV0maNZAgmGEQ0iE4DmMwKCD2+TEp45OOgdX9j69oY=;\n b=d5hqJxpC/5LLhtZHxuFldRsC+pl/JH05hFDTblvp/y+bGgkQXL/9GeZbXY/YdAVmgSWIcsW8RLzyvRTFjoHLk7UTLpsKaVbpW/2NeWypTyZW9XxVVFd0bJwbPe1QQaF5K9CdGRvghX57imeKMgv3iT470CIx+WnAsuJAwgn72TtOJo9tuudN7K3TAlM5rJ32WDUWLNR9aYyWIwarkU5+KuFDS2ihbRdbe7TK0ldddZB1+45fJbFjOLnpKEKmD1dX8MUHCC/wUIgP4jnNB4RNzZhPv0j3w6ntExHxiNtm++FfWUggIglauLDal9a2zrDeOY8a7uKTfy2K3GnfQeGQ7g==", "X-MS-Exchange-Authentication-Results": "spf=fail (sender IP is 165.85.157.49)\n smtp.mailfrom=gehealthcare.com; dkim=none (message not signed)\n header.d=none;dmarc=fail action=quarantine header.from=gehealthcare.com;", "Received-SPF": "Fail (protection.outlook.com: domain of gehealthcare.com does\n not designate 165.85.157.49 as permitted sender)\n receiver=protection.outlook.com; client-ip=165.85.157.49;\n helo=atlrelay2.compute.ge-healthcare.net;", "From": "Brian Ruley <brian.ruley@gehealthcare.com>", "To": "Stefano Babic <sbabic@nabladev.com>, Fabio Estevam <festevam@gmail.com>,\n \"NXP i.MX U-Boot Team\" <uboot-imx@nxp.com>, Tom Rini <trini@konsulko.com>,\n Heiko Schocher <hs@nabladev.com>,\n \"Huan 'Kitty' Wang\" <HuanWang@gehealthcare.com>,\n Ian Ray <ian.ray@gehealthcare.com>,\n Martyn Welch <martyn.welch@collabora.com>", "Cc": "Brian Ruley <brian.ruley@gehealthcare.com>,\n\tu-boot@lists.denx.de", "Subject": "[PATCH 3/5] imx6: clock: allow different clock sources for ldb", "Date": "Wed, 22 Apr 2026 12:46:41 +0300", "Message-ID": "<20260422094649.57611-3-brian.ruley@gehealthcare.com>", "X-Mailer": "git-send-email 2.47.3", "In-Reply-To": "<20260422094649.57611-1-brian.ruley@gehealthcare.com>", "References": "<20260422094649.57611-1-brian.ruley@gehealthcare.com>", "MIME-Version": "1.0", "Content-Transfer-Encoding": "8bit", "X-EOPAttributedMessage": "0", "X-MS-PublicTrafficType": "Email", "X-MS-TrafficTypeDiagnostic": "CH1PEPF0000A34B:EE_|LV8PR22MB5700:EE_", "Content-Type": "text/plain", "X-MS-Office365-Filtering-Correlation-Id": "97785d64-2b65-49ab-f4ea-08dea05419b2", "X-MS-Exchange-SenderADCheck": "1", "X-MS-Exchange-AntiSpam-Relay": "0", "X-Microsoft-Antispam": "BCL:0;\n ARA:13230040|376014|36860700016|82310400026|1800799024|18002099003|22082099003|56012099003;", "X-Microsoft-Antispam-Message-Info": "\n RQaC7Ie5PLJKBBNXq47EHUY24+MNatOGQK7Sl4mLidyCBWNv5HwwVYTJzOaPBvf6EiJqUoTJ54lBQUPIudvgk3rP0n0ZDE/N+t+ZwMMm78m7uHasPtgCWUtOlAeD7m1u4ibrvloH9U/zwdNVm0y3uvczIlp0pBS9qwiH/3p9TN2oTBnweoRBugbsAqmkKBi/jbS3eSjrB2xgDlVt1q2jnT8bWPLTzzeMxYwpgSYophavJ5pOXLF+eK7Q6zfTmjQXcs9ZPNLHFDeSreOsLEXGgaiAL+sB205sn3z1QyEfp7acZaTr8xRvI2sYe8NKWfbE6uQ8CpyIvZS/auuI5xiF5UQ3XUQTYSVNR38HiXNpx5mhS5+CHmaohwgXEXB2srz3r0rbOZfvR2YxXNDwJovOobivMSt4jvTflRGF7mzKo9MdbnFdEFhvj+ATB5BKD0inZ/Ws2e18MiAMyAO4P+PGr28qRNhuMT44PxDfR8/fxSGee3WHyShQkOUutKzF5s0ygqiujFKzEuEVFwAtBXuCVKt7TFvEY+1dmsAUJButUnCGxKni4LS9kC56BgdJEAMDbMxqkcTxZzmchsK5zgNnFWnfr8J3n379kYb/dCKMcIFtItZfIIob85yM+1goQew+R3ZgAUbdCIOssVaNH/x/YhGlF430kIXnUctpFG8eIL8iZ9wYo6XrpjDoJH3HgJHncrWO2xizSuz/75UdSX8lnw8+dprADEaZ0H+hjCZa9BPqTo1j8iY4mHAUhDdgF5WAgtBIOwfWTk1FymEW8mu1Vw==", "X-Forefront-Antispam-Report": "CIP:165.85.157.49; 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Ip=[165.85.157.49];\n Helo=[atlrelay2.compute.ge-healthcare.net]", "X-MS-Exchange-CrossTenant-AuthAs": "Internal", "X-MS-Exchange-CrossTenant-AuthSource": "\n TreatMessagesAsInternal-CH1PEPF0000A34B.namprd04.prod.outlook.com", "X-MS-Exchange-CrossTenant-FromEntityHeader": "HybridOnPrem", "X-MS-Exchange-Transport-CrossTenantHeadersStamped": "LV8PR22MB5700", "X-Mailman-Approved-At": "Wed, 22 Apr 2026 14:34:21 +0200", "X-BeenThere": "u-boot@lists.denx.de", "X-Mailman-Version": "2.1.39", "Precedence": "list", "List-Id": "U-Boot discussion <u-boot.lists.denx.de>", "List-Unsubscribe": "<https://lists.denx.de/options/u-boot>,\n <mailto:u-boot-request@lists.denx.de?subject=unsubscribe>", "List-Archive": "<https://lists.denx.de/pipermail/u-boot/>", "List-Post": "<mailto:u-boot@lists.denx.de>", "List-Help": "<mailto:u-boot-request@lists.denx.de?subject=help>", "List-Subscribe": "<https://lists.denx.de/listinfo/u-boot>,\n <mailto:u-boot-request@lists.denx.de?subject=subscribe>", "Errors-To": "u-boot-bounces@lists.denx.de", "Sender": "\"U-Boot\" <u-boot-bounces@lists.denx.de>", "X-Virus-Scanned": "clamav-milter 0.103.8 at phobos.denx.de", "X-Virus-Status": "Clean" }, "content": "The LDB clock sources don't have to be the same, so allow DI1 clock to\nbe configured separately.\n\nUnlikely to be significant, but the reason will become apparent in the\nfollowing commit.\n\nSigned-off-by: Brian Ruley <brian.ruley@gehealthcare.com>\n---\n arch/arm/include/asm/arch-mx6/clock.h | 2 +-\n arch/arm/mach-imx/mx6/clock.c | 6 +++---\n board/aristainetos/aristainetos.c | 2 +-\n board/ge/b1x5v2/b1x5v2.c | 2 +-\n board/ge/bx50v3/bx50v3.c | 2 +-\n 5 files changed, 7 insertions(+), 7 deletions(-)", "diff": "diff --git a/arch/arm/include/asm/arch-mx6/clock.h b/arch/arm/include/asm/arch-mx6/clock.h\nindex 81af89c631f..9c5f3090bd8 100644\n--- a/arch/arm/include/asm/arch-mx6/clock.h\n+++ b/arch/arm/include/asm/arch-mx6/clock.h\n@@ -82,7 +82,7 @@ int enable_lcdif_clock(u32 base_addr, bool enable);\n void enable_qspi_clk(int qspi_num);\n void enable_thermal_clk(void);\n void mxs_set_lcdclk(u32 base_addr, u32 freq);\n-void select_ldb_di_clock_source(enum ldb_di_clock clk);\n+void select_ldb_di_clock_source(enum ldb_di_clock clk0, enum ldb_di_clock clk1);\n void enable_eim_clk(unsigned char enable);\n int do_mx6_showclocks(struct cmd_tbl *cmdtp, int flag, int argc,\n \t\t char *const argv[]);\ndiff --git a/arch/arm/mach-imx/mx6/clock.c b/arch/arm/mach-imx/mx6/clock.c\nindex b5aa606b8d0..828a101ba05 100644\n--- a/arch/arm/mach-imx/mx6/clock.c\n+++ b/arch/arm/mach-imx/mx6/clock.c\n@@ -1452,7 +1452,7 @@ static void enable_ldb_di_clock_sources(void)\n * Try call this function as early in the boot process as possible since the\n * function temporarily disables PLL2 PFD's, PLL3 PFD's and PLL5.\n */\n-void select_ldb_di_clock_source(enum ldb_di_clock clk)\n+void select_ldb_di_clock_source(enum ldb_di_clock clk0, enum ldb_di_clock clk1)\n {\n \tstruct mxc_ccm_reg *mxc_ccm = (struct mxc_ccm_reg *)CCM_BASE_ADDR;\n \tint reg;\n@@ -1525,8 +1525,8 @@ void select_ldb_di_clock_source(enum ldb_di_clock clk)\n \treg = readl(&mxc_ccm->cs2cdr);\n \treg &= ~(MXC_CCM_CS2CDR_LDB_DI1_CLK_SEL_MASK\n \t | MXC_CCM_CS2CDR_LDB_DI0_CLK_SEL_MASK);\n-\treg |= ((clk << MXC_CCM_CS2CDR_LDB_DI1_CLK_SEL_OFFSET)\n-\t | (clk << MXC_CCM_CS2CDR_LDB_DI0_CLK_SEL_OFFSET));\n+\treg |= ((clk0 << MXC_CCM_CS2CDR_LDB_DI1_CLK_SEL_OFFSET)\n+\t | (clk1 << MXC_CCM_CS2CDR_LDB_DI0_CLK_SEL_OFFSET));\n \twritel(reg, &mxc_ccm->cs2cdr);\n \n \t/* Unbypass pll3_sw_clk */\ndiff --git a/board/aristainetos/aristainetos.c b/board/aristainetos/aristainetos.c\nindex 8cfac9fbb34..4a2349e165b 100644\n--- a/board/aristainetos/aristainetos.c\n+++ b/board/aristainetos/aristainetos.c\n@@ -218,7 +218,7 @@ static void set_gpr_register(void)\n \n int board_early_init_f(void)\n {\n-\tselect_ldb_di_clock_source(MXC_PLL5_CLK);\n+\tselect_ldb_di_clock_source(MXC_PLL5_CLK, MXC_PLL5_CLK);\n \tset_gpr_register();\n \n \t/*\ndiff --git a/board/ge/b1x5v2/b1x5v2.c b/board/ge/b1x5v2/b1x5v2.c\nindex ddb7304d493..f7751fd6fb1 100644\n--- a/board/ge/b1x5v2/b1x5v2.c\n+++ b/board/ge/b1x5v2/b1x5v2.c\n@@ -320,7 +320,7 @@ int overwrite_console(void)\n \n int board_early_init_f(void)\n {\n-\tselect_ldb_di_clock_source(MXC_PLL5_CLK);\n+\tselect_ldb_di_clock_source(MXC_PLL5_CLK, MXC_PLL5_CLK);\n \n \treturn 0;\n }\ndiff --git a/board/ge/bx50v3/bx50v3.c b/board/ge/bx50v3/bx50v3.c\nindex e1d08475e94..9fc5f604a49 100644\n--- a/board/ge/bx50v3/bx50v3.c\n+++ b/board/ge/bx50v3/bx50v3.c\n@@ -383,7 +383,7 @@ int board_early_init_f(void)\n \n #if defined(CONFIG_VIDEO_IPUV3)\n \t/* Set LDB clock to Video PLL */\n-\tselect_ldb_di_clock_source(MXC_PLL5_CLK);\n+\tselect_ldb_di_clock_source(MXC_PLL5_CLK, MXC_PLL5_CLK);\n #endif\n \treturn 0;\n }\n", "prefixes": [ "3/5" ] }