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GET /api/patches/2226184/?format=api
{ "id": 2226184, "url": "http://patchwork.ozlabs.org/api/patches/2226184/?format=api", "web_url": "http://patchwork.ozlabs.org/project/linux-tegra/patch/20260422102957.2706861-1-sheetal@nvidia.com/", "project": { "id": 21, "url": "http://patchwork.ozlabs.org/api/projects/21/?format=api", "name": "Linux Tegra Development", "link_name": "linux-tegra", "list_id": "linux-tegra.vger.kernel.org", "list_email": "linux-tegra@vger.kernel.org", "web_url": null, "scm_url": null, "webscm_url": null, "list_archive_url": "", "list_archive_url_format": "", "commit_url_format": "" }, "msgid": "<20260422102957.2706861-1-sheetal@nvidia.com>", "list_archive_url": null, "date": "2026-04-22T10:29:57", "name": "ASoC: tegra: Add Mixer Fade controls", "commit_ref": null, "pull_url": null, "state": "new", "archived": false, "hash": "cb77778c8a9958d5993c173ee18047cd2e205bc1", "submitter": { "id": 87986, "url": "http://patchwork.ozlabs.org/api/people/87986/?format=api", "name": "Sheetal", "email": "sheetal@nvidia.com" }, "delegate": null, "mbox": "http://patchwork.ozlabs.org/project/linux-tegra/patch/20260422102957.2706861-1-sheetal@nvidia.com/mbox/", "series": [ { "id": 500967, "url": "http://patchwork.ozlabs.org/api/series/500967/?format=api", "web_url": "http://patchwork.ozlabs.org/project/linux-tegra/list/?series=500967", "date": "2026-04-22T10:29:57", "name": "ASoC: tegra: Add Mixer Fade controls", "version": 1, "mbox": "http://patchwork.ozlabs.org/series/500967/mbox/" } ], "comments": "http://patchwork.ozlabs.org/api/patches/2226184/comments/", "check": "pending", "checks": "http://patchwork.ozlabs.org/api/patches/2226184/checks/", "tags": {}, "related": [], "headers": { "Return-Path": "\n <linux-tegra+bounces-13846-incoming=patchwork.ozlabs.org@vger.kernel.org>", "X-Original-To": [ "incoming@patchwork.ozlabs.org", "linux-tegra@vger.kernel.org" ], "Delivered-To": "patchwork-incoming@legolas.ozlabs.org", "Authentication-Results": [ "legolas.ozlabs.org;\n\tdkim=pass (2048-bit key;\n unprotected) header.d=Nvidia.com header.i=@Nvidia.com header.a=rsa-sha256\n header.s=selector2 header.b=DdvEIZiH;\n\tdkim-atps=neutral", "legolas.ozlabs.org;\n spf=pass (sender SPF authorized) smtp.mailfrom=vger.kernel.org\n (client-ip=172.234.253.10; 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pr=C", "From": "Sheetal <sheetal@nvidia.com>", "To": "Liam Girdwood <lgirdwood@gmail.com>, Mark Brown <broonie@kernel.org>", "CC": "Jaroslav Kysela <perex@perex.cz>, Takashi Iwai <tiwai@suse.com>, \"Thierry\n Reding\" <thierry.reding@kernel.org>, Jonathan Hunter <jonathanh@nvidia.com>,\n\tSameer Pujar <spujar@nvidia.com>, Mohan Kumar <mkumard@nvidia.com>, \"Kuninori\n Morimoto\" <kuninori.morimoto.gx@renesas.com>, <linux-sound@vger.kernel.org>,\n\t<linux-tegra@vger.kernel.org>, <linux-kernel@vger.kernel.org>, Sheetal\n\t<sheetal@nvidia.com>", "Subject": "[PATCH] ASoC: tegra: Add Mixer Fade controls", "Date": "Wed, 22 Apr 2026 10:29:57 +0000", "Message-ID": "<20260422102957.2706861-1-sheetal@nvidia.com>", "X-Mailer": "git-send-email 2.17.1", "Precedence": "bulk", "X-Mailing-List": "linux-tegra@vger.kernel.org", "List-Id": "<linux-tegra.vger.kernel.org>", "List-Subscribe": "<mailto:linux-tegra+subscribe@vger.kernel.org>", "List-Unsubscribe": "<mailto:linux-tegra+unsubscribe@vger.kernel.org>", "MIME-Version": "1.0", "Content-Type": "text/plain", "X-NV-OnPremToCloud": "ExternallySecured", "X-EOPAttributedMessage": "0", "X-MS-PublicTrafficType": "Email", "X-MS-TrafficTypeDiagnostic": "CY4PEPF0000EE3F:EE_|DM6PR12MB4106:EE_", "X-MS-Office365-Filtering-Correlation-Id": "1e3d1f3f-93be-494e-579e-08dea05a3934", "X-MS-Exchange-SenderADCheck": "1", "X-MS-Exchange-AntiSpam-Relay": "0", "X-Microsoft-Antispam": "\n\tBCL:0;ARA:13230040|376014|30052699003|36860700016|82310400026|1800799024|56012099003|18002099003;", "X-Microsoft-Antispam-Message-Info": "\n\tm2b/cFcvlAsuiXNxx2LOQjC7aJQUhO6TsbdhAM5T/gRY27ESEVnhMckxkjqXO+3tViOVxWKR5qPqVuN963fwGXurvXIte7yH7R+r9+G3RD41hAea/RVuvHtzv83M+IYx0q/F5vEizz3cipkDfW8q197l7AocNXzOKWoX5Z+6cbUTV1Rs7INZ3SGwG5QgvDuHfx7HlbarAa/oDhF6L2a/xcxkm+YoIMug3b3MPHfFeJ2MTf0Aw6JTxidLkS1g7fAbaXCX6p7NUoACbb4tkBO11cdw8Sbxx542IZx9Mb3aKHbb+dOEg1TpIT+anM2WqYdox45ELSIdpaNeKqGqSDO8DdDTHBi3K2CtkKGizMoFm8owhkEVUgd7cybOjg1KVJ/dKMBH/upNr5gKYviyxw3LMrEi+d6r9/SstGts4IBxJ362VqwGyeXdpynswG+990ZCiux249E00q+UBpAq4pavnE4yOXU2gfHdkJ0mHJW5PyLVK2lRB5n1uMni9ukbbA42CWMZZzc4adSgTOZp5cu+9+94ap9kcUKPOiLJ2RCtNPXSir/q37OWuKkdNw11QdRmEFvWtIEaKOqqErt2zWr3Y+d3gzVQQwzZyU/ea2kT4gOyV04BKvIk7szx1b5h7wwrD+conBvwu14gL9U3/3xYT32smSYZ9ONspo3BLqdz3w3QcWvbLHR80AJHDvYX6uc2SLQS8kFcOhHyUpNrtXZ1ED0k88ncQojWR7OWDd2kD2ryCiob58f9OQD4zL9upX8QQDTqGUvJqISsDffzeLdL1w==", "X-Forefront-Antispam-Report": "\n\tCIP:216.228.117.160;CTRY:US;LANG:en;SCL:1;SRV:;IPV:NLI;SFV:NSPM;H:mail.nvidia.com;PTR:dc6edge1.nvidia.com;CAT:NONE;SFS:(13230040)(376014)(30052699003)(36860700016)(82310400026)(1800799024)(56012099003)(18002099003);DIR:OUT;SFP:1101;", "X-MS-Exchange-AntiSpam-MessageData-ChunkCount": "1", "X-MS-Exchange-AntiSpam-MessageData-0": "\n\tzMivIJdY1EviICC5mjeqFVJ+ytOJ5qniyYURJVBJGbV6jVoJ2GDzEnvtfZjmMgHMDmEo15rf5bjlSvpNVnTqzjMs6JhqgrPkTD2vQpyHjYxegQZQtrRfRXlWaga2MswtifNipVIr+euU6bxcsxd1Wzfbc9s+H/kLYfsCjQqoP3PcEPl7xO9VvXJqRJ28125huNFaxLiLd1VMwOjY40rbX2NasjUVDECSb6sb0ZptG50GhMrYEFujTlghIq9o0WAyRr8WT3EHQwLB81F/JsEE9mUGRryasa2vYwANlOK/wiaLkJE/06Fy3OzgFon7DramqngtfgWU1rpx4GJenDb+AVki/SPsxGs2FjOIxKfZT04PyEGTqKI/d3Tqqte6y6EBudhnoHYqNlp5u+8wwXHm4HWvlmXyAg4kmYF/YpuqCT3XeC9tQaegOVSHdRirgehT", "X-OriginatorOrg": "Nvidia.com", "X-MS-Exchange-CrossTenant-OriginalArrivalTime": "22 Apr 2026 10:30:49.9510\n (UTC)", "X-MS-Exchange-CrossTenant-Network-Message-Id": "\n 1e3d1f3f-93be-494e-579e-08dea05a3934", "X-MS-Exchange-CrossTenant-Id": "43083d15-7273-40c1-b7db-39efd9ccc17a", "X-MS-Exchange-CrossTenant-OriginalAttributedTenantConnectingIp": "\n TenantId=43083d15-7273-40c1-b7db-39efd9ccc17a;Ip=[216.228.117.160];Helo=[mail.nvidia.com]", "X-MS-Exchange-CrossTenant-AuthSource": "\n\tCY4PEPF0000EE3F.namprd03.prod.outlook.com", "X-MS-Exchange-CrossTenant-AuthAs": "Anonymous", "X-MS-Exchange-CrossTenant-FromEntityHeader": "HybridOnPrem", "X-MS-Exchange-Transport-CrossTenantHeadersStamped": "DM6PR12MB4106" }, "content": "Add fade controls for the Tegra mixer to allow the user to configure\nthe gain and duration for each mixer stream. The mixer supports up to\n10 input streams (RX1 through RX10), each with independently\nconfigurable target gain and fade duration. The duration is specified\nin terms of the total the number of samples and this is configured via\nthe N3 parameter in the mixer. The total duration (N3 parameter) used\nin gain curve calculations of the form n/N3 or (N3-n)/N3, where n is\nthe current sample position.\n\nThe fade control accepts a comma-separated list of triplets:\n amixer -c <card> cset name=\"MIXER1 Fade\" \\\n \"<id1>,<gain1>,<duration1>[,<id2>,<gain2>,<duration2>,...]\"\n id - mixer input RX stream index (1 to 10)\n gain - target gain level\n duration - fade duration in samples (N3 parameter)\n\n Example: fade 2 streams simultaneously:\n amixer -c <card> cset name=\"MIXER1 Fade\" \"1,12000,1024,2,15000,2048\"\n Stream 1: fade to gain 12000 over 1024 samples\n Stream 2: fade to gain 15000 over 2048 samples\n\nThe fade status reports per-stream state for all 10 RX inputs:\n amixer -c <card> cget name=\"MIXER1 Fade Status\"\n Output: \"0,1,-1,-1,-1,-1,-1,-1,-1,-1\"\n\n -1 - inactive (no fade configured)\n 0 - active (fade in progress)\n 1 - complete (target gain reached)\n\n Once fading completes, the status resets to inactive for that stream.\n\nSigned-off-by: Sheetal <sheetal@nvidia.com>\n---\n sound/soc/tegra/tegra210_mixer.c | 179 ++++++++++++++++++++++++++++++-\n sound/soc/tegra/tegra210_mixer.h | 16 ++-\n 2 files changed, 190 insertions(+), 5 deletions(-)", "diff": "diff --git a/sound/soc/tegra/tegra210_mixer.c b/sound/soc/tegra/tegra210_mixer.c\nindex ce44117a0b9c..7990038f005f 100644\n--- a/sound/soc/tegra/tegra210_mixer.c\n+++ b/sound/soc/tegra/tegra210_mixer.c\n@@ -151,10 +151,17 @@ static int tegra210_mixer_configure_gain(struct snd_soc_component *cmpnt,\n \tfor (i = 0; i < NUM_DURATION_PARMS; i++) {\n \t\tint val;\n \n-\t\tif (instant_gain)\n+\t\tif (instant_gain) {\n \t\t\tval = 1;\n-\t\telse\n-\t\t\tval = gain_params.duration[i];\n+\t\t} else {\n+\t\t\tif (i == DURATION_N3_ID)\n+\t\t\t\tval = mixer->duration[id];\n+\t\t\telse if (i == DURATION_INV_N3_ID)\n+\t\t\t\tval = (BIT(31) * BIT(TEGRA210_MIXER_PRESCALAR)) /\n+\t\t\t\t\tmixer->duration[id];\n+\t\t\telse\n+\t\t\t\tval = gain_params.duration[i];\n+\t\t}\n \n \t\terr = tegra210_mixer_write_ram(mixer,\n \t\t\t\t\t REG_DURATION_PARAM(reg, i),\n@@ -173,6 +180,124 @@ static int tegra210_mixer_configure_gain(struct snd_soc_component *cmpnt,\n \treturn err;\n }\n \n+static int tegra210_mixer_put_fade(struct snd_kcontrol *kcontrol,\n+\t\t\t\t struct snd_ctl_elem_value *ucontrol)\n+{\n+\tstruct snd_soc_component *cmpnt = snd_kcontrol_chip(kcontrol);\n+\tstruct tegra210_mixer *mixer = snd_soc_component_get_drvdata(cmpnt);\n+\tu32 rx_id, rx_gain, rx_duration;\n+\tint id, base, err = 0;\n+\n+\t/* Process array of RX stream parameters (id, gain, duration) */\n+\tfor (id = 0; id < TEGRA210_MIXER_RX_MAX; id++) {\n+\t\tbase = 3 * id;\n+\t\trx_id = ucontrol->value.integer.value[base];\n+\t\trx_gain = ucontrol->value.integer.value[base + 1];\n+\t\trx_duration = ucontrol->value.integer.value[base + 2];\n+\n+\t\tif (rx_id > TEGRA210_MIXER_RX_MAX) {\n+\t\t\tdev_err(cmpnt->dev, \"Invalid mixer rx index %d\\n\", rx_id);\n+\t\t\treturn -EINVAL;\n+\t\t}\n+\n+\t\t/* Array ends here, user isn't required to pass all RX configurations */\n+\t\tif (rx_id == 0 && rx_gain == 0 && rx_duration == 0)\n+\t\t\tbreak;\n+\n+\t\t/* Convert 1-based rx_id to 0-based array index */\n+\t\trx_id = rx_id - 1;\n+\n+\t\t/* Only update if values are different */\n+\t\tif (mixer->duration[rx_id] != rx_duration ||\n+\t\t mixer->gain_value[rx_id] != rx_gain) {\n+\t\t\terr = tegra210_mixer_configure_gain(cmpnt, rx_id, false);\n+\t\t\tif (err) {\n+\t\t\t\tdev_err(cmpnt->dev,\n+\t\t\t\t\t\"Failed to configure fade for channel %d\\n\",\n+\t\t\t\t\trx_id);\n+\t\t\t\treturn err;\n+\t\t\t}\n+\t\t\terr = 1;\n+\t\t\tmixer->duration[rx_id] = rx_duration;\n+\t\t\tmixer->gain_value[rx_id] = rx_gain;\n+\t\t}\n+\n+\t\tif (!mixer->in_fade[rx_id]) {\n+\t\t\tpm_runtime_get_sync(cmpnt->dev);\n+\t\t\terr = regmap_update_bits(mixer->regmap,\n+\t\t\t\t\t\t MIXER_REG(TEGRA210_MIXER_RX1_CTRL, rx_id),\n+\t\t\t\t\t\t TEGRA210_MIXER_SAMPLE_COUNT_ENABLE,\n+\t\t\t\t\t\t TEGRA210_MIXER_SAMPLE_COUNT_ENABLE);\n+\t\t\tpm_runtime_put(cmpnt->dev);\n+\t\t\tif (err) {\n+\t\t\t\tdev_err(cmpnt->dev,\n+\t\t\t\t\t\"Failed to enable sample count for channel %d\\n\", rx_id);\n+\t\t\t\treturn err;\n+\t\t\t}\n+\t\t\terr = 1;\n+\t\t\tmixer->in_fade[rx_id] = true;\n+\t\t}\n+\t}\n+\n+\treturn err;\n+}\n+\n+static int tegra210_mixer_get_fade(struct snd_kcontrol *kcontrol,\n+\t\t\t\t struct snd_ctl_elem_value *ucontrol)\n+{\n+\tstruct snd_soc_component *cmpnt = snd_kcontrol_chip(kcontrol);\n+\tstruct tegra210_mixer *mixer = snd_soc_component_get_drvdata(cmpnt);\n+\tu32 id, base, index = 0;\n+\n+\tfor (id = 0; id < TEGRA210_MIXER_RX_MAX; id++) {\n+\t\tif (mixer->in_fade[id]) {\n+\t\t\tbase = 3 * index;\n+\t\t\tucontrol->value.integer.value[base] = id + 1;\n+\t\t\tucontrol->value.integer.value[base + 1] = mixer->gain_value[id];\n+\t\t\tucontrol->value.integer.value[base + 2] = mixer->duration[id];\n+\t\t\tindex++;\n+\t\t}\n+\t}\n+\n+\treturn 0;\n+}\n+\n+static int tegra210_mixer_get_fade_status(struct snd_kcontrol *kcontrol,\n+\t\t\t\t\t struct snd_ctl_elem_value *ucontrol)\n+{\n+\tstruct snd_soc_component *cmpnt = snd_kcontrol_chip(kcontrol);\n+\tstruct tegra210_mixer *mixer = snd_soc_component_get_drvdata(cmpnt);\n+\tu32 count;\n+\tint id;\n+\n+\tpm_runtime_get_sync(cmpnt->dev);\n+\n+\tfor (id = 0; id < TEGRA210_MIXER_RX_MAX; id++) {\n+\t\tif (!mixer->in_fade[id]) {\n+\t\t\tucontrol->value.integer.value[id] = TEGRA210_MIXER_FADE_IDLE;\n+\t\t\tcontinue;\n+\t\t}\n+\n+\t\tregmap_read(mixer->regmap,\n+\t\t\t MIXER_REG(TEGRA210_MIXER_RX1_SAMPLE_COUNT, id),\n+\t\t\t &count);\n+\n+\t\tif (count >= mixer->duration[id]) {\n+\t\t\tucontrol->value.integer.value[id] = TEGRA210_MIXER_FADE_COMPLETE;\n+\t\t\tregmap_update_bits(mixer->regmap,\n+\t\t\t\t\t MIXER_REG(TEGRA210_MIXER_RX1_CTRL, id),\n+\t\t\t\t\t TEGRA210_MIXER_SAMPLE_COUNT_ENABLE, 0);\n+\t\t\tmixer->in_fade[id] = false;\n+\t\t} else {\n+\t\t\tucontrol->value.integer.value[id] = TEGRA210_MIXER_FADE_ACTIVE;\n+\t\t}\n+\t}\n+\n+\tpm_runtime_put(cmpnt->dev);\n+\n+\treturn 0;\n+}\n+\n static int tegra210_mixer_get_gain(struct snd_kcontrol *kcontrol,\n \t\t\t\t struct snd_ctl_elem_value *ucontrol)\n {\n@@ -396,6 +521,44 @@ ADDER_CTRL_DECL(adder3, TEGRA210_MIXER_TX3_ADDER_CONFIG);\n ADDER_CTRL_DECL(adder4, TEGRA210_MIXER_TX4_ADDER_CONFIG);\n ADDER_CTRL_DECL(adder5, TEGRA210_MIXER_TX5_ADDER_CONFIG);\n \n+static int tegra210_mixer_param_info(struct snd_kcontrol *kcontrol,\n+\t\t\t\t struct snd_ctl_elem_info *uinfo)\n+{\n+\tstruct soc_bytes *params = (void *)kcontrol->private_value;\n+\n+\tif (strstr(kcontrol->id.name, \"Status\")) {\n+\t\tparams->num_regs = 10;\n+\t\tuinfo->value.integer.min = TEGRA210_MIXER_FADE_IDLE;\n+\t\tuinfo->value.integer.max = TEGRA210_MIXER_FADE_COMPLETE;\n+\t} else {\n+\t\tparams->num_regs = 30;\n+\t\tuinfo->value.integer.min = 0;\n+\t\tuinfo->value.integer.max = U32_MAX;\n+\t}\n+\n+\t/* Set control info */\n+\tuinfo->type = params->mask;\n+\tuinfo->count = params->num_regs;\n+\n+\treturn 0;\n+}\n+\n+#define MIXER_FADE_CTRL(xname, xbase, xnum_regs, xget, xput, xaccess, xmask) \\\n+{ \\\n+\t.iface = SNDRV_CTL_ELEM_IFACE_MIXER, \\\n+\t.info = tegra210_mixer_param_info, \\\n+\t.name = xname, \\\n+\t.access = xaccess, \\\n+\t.get = xget, \\\n+\t.put = xput, \\\n+\t.private_value = (unsigned long)&(struct soc_bytes)\t\\\n+\t{ \\\n+\t\t.base = xbase, \\\n+\t\t.num_regs = xnum_regs, \\\n+\t\t.mask = xmask \\\n+\t} \\\n+},\n+\n #define GAIN_CTRL(id)\t\\\n \tSOC_SINGLE_EXT(\"RX\" #id \" Gain Volume\",\t\t\t\\\n \t\t MIXER_GAIN_CFG_RAM_ADDR((id) - 1), 0,\t\\\n@@ -418,6 +581,11 @@ static const struct snd_kcontrol_new tegra210_mixer_gain_ctls[] = {\n \tGAIN_CTRL(8)\n \tGAIN_CTRL(9)\n \tGAIN_CTRL(10)\n+\n+MIXER_FADE_CTRL(\"Fade\", 0x0, 30, tegra210_mixer_get_fade, tegra210_mixer_put_fade,\n+\t\tSNDRV_CTL_ELEM_ACCESS_READWRITE, SNDRV_CTL_ELEM_TYPE_INTEGER)\n+MIXER_FADE_CTRL(\"Fade Status\", 0x0, 10, tegra210_mixer_get_fade_status, NULL,\n+\t\tSNDRV_CTL_ELEM_ACCESS_READ, SNDRV_CTL_ELEM_TYPE_INTEGER)\n };\n \n static const struct snd_soc_dapm_widget tegra210_mixer_widgets[] = {\n@@ -579,6 +747,7 @@ static bool tegra210_mixer_volatile_reg(struct device *dev,\n \tcase TEGRA210_MIXER_GAIN_CFG_RAM_DATA:\n \tcase TEGRA210_MIXER_PEAKM_RAM_CTRL:\n \tcase TEGRA210_MIXER_PEAKM_RAM_DATA:\n+\tcase TEGRA210_MIXER_RX1_SAMPLE_COUNT:\n \t\treturn true;\n \tdefault:\n \t\treturn false;\n@@ -632,8 +801,10 @@ static int tegra210_mixer_platform_probe(struct platform_device *pdev)\n \tdev_set_drvdata(dev, mixer);\n \n \t/* Use default gain value for all MIXER inputs */\n-\tfor (i = 0; i < TEGRA210_MIXER_RX_MAX; i++)\n+\tfor (i = 0; i < TEGRA210_MIXER_RX_MAX; i++) {\n \t\tmixer->gain_value[i] = gain_params.gain_value;\n+\t\tmixer->duration[i] = gain_params.duration[DURATION_N3_ID];\n+\t}\n \n \tregs = devm_platform_ioremap_resource(pdev, 0);\n \tif (IS_ERR(regs))\ndiff --git a/sound/soc/tegra/tegra210_mixer.h b/sound/soc/tegra/tegra210_mixer.h\nindex a330530fbc61..da16f0002bfd 100644\n--- a/sound/soc/tegra/tegra210_mixer.h\n+++ b/sound/soc/tegra/tegra210_mixer.h\n@@ -79,12 +79,24 @@\n #define TEGRA210_MIXER_RX_LIMIT\t\t(TEGRA210_MIXER_RX_MAX * TEGRA210_MIXER_REG_STRIDE)\n #define TEGRA210_MIXER_TX_MAX\t\t5\n #define TEGRA210_MIXER_TX_LIMIT\t\t(TEGRA210_MIXER_RX_LIMIT + (TEGRA210_MIXER_TX_MAX * TEGRA210_MIXER_REG_STRIDE))\n+#define TEGRA210_MIXER_SAMPLE_COUNT_SHIFT\t24\n+#define TEGRA210_MIXER_SAMPLE_COUNT_ENABLE\tBIT(TEGRA210_MIXER_SAMPLE_COUNT_SHIFT)\n \n #define REG_CFG_DONE_TRIGGER\t0xf\n #define VAL_CFG_DONE_TRIGGER\t0x1\n \n #define NUM_GAIN_POLY_COEFFS 9\n-#define NUM_DURATION_PARMS 4\n+\n+#define TEGRA210_MIXER_PRESCALAR\t 6\n+#define TEGRA210_MIXER_FADE_IDLE\t (-1)\n+#define TEGRA210_MIXER_FADE_ACTIVE\t 0\n+#define TEGRA210_MIXER_FADE_COMPLETE\t1\n+\n+enum {\n+\tDURATION_N3_ID = 2,\n+\tDURATION_INV_N3_ID,\n+\tNUM_DURATION_PARMS,\n+};\n \n struct tegra210_mixer_gain_params {\n \tint poly_coeff[NUM_GAIN_POLY_COEFFS];\n@@ -94,6 +106,8 @@ struct tegra210_mixer_gain_params {\n \n struct tegra210_mixer {\n \tint gain_value[TEGRA210_MIXER_RX_MAX];\n+\tu32 duration[TEGRA210_MIXER_RX_MAX];\n+\tbool in_fade[TEGRA210_MIXER_RX_MAX];\n \tstruct regmap *regmap;\n };\n \n", "prefixes": [] }