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GET /api/patches/2225864/?format=api
{ "id": 2225864, "url": "http://patchwork.ozlabs.org/api/patches/2225864/?format=api", "web_url": "http://patchwork.ozlabs.org/project/qemu-devel/patch/20260421-mips-octeon-missing-insns-v2-v2-11-a0791df188c9@gmail.com/", "project": { "id": 14, "url": "http://patchwork.ozlabs.org/api/projects/14/?format=api", "name": "QEMU Development", "link_name": "qemu-devel", "list_id": "qemu-devel.nongnu.org", "list_email": "qemu-devel@nongnu.org", "web_url": "", "scm_url": "", "webscm_url": "", "list_archive_url": "", "list_archive_url_format": "", "commit_url_format": "" }, "msgid": "<20260421-mips-octeon-missing-insns-v2-v2-11-a0791df188c9@gmail.com>", "list_archive_url": null, "date": "2026-04-21T17:27:38", "name": "[v2,11/13] target/mips: add Octeon Camellia crypto support", "commit_ref": null, "pull_url": null, "state": "new", "archived": false, "hash": "6fb168358cae9f959c126388dda372de0ba338c9", "submitter": { "id": 66301, "url": "http://patchwork.ozlabs.org/api/people/66301/?format=api", "name": "James Hilliard", "email": "james.hilliard1@gmail.com" }, "delegate": null, "mbox": "http://patchwork.ozlabs.org/project/qemu-devel/patch/20260421-mips-octeon-missing-insns-v2-v2-11-a0791df188c9@gmail.com/mbox/", "series": [ { "id": 500858, "url": "http://patchwork.ozlabs.org/api/series/500858/?format=api", "web_url": "http://patchwork.ozlabs.org/project/qemu-devel/list/?series=500858", "date": "2026-04-21T17:27:27", "name": "target/mips: add missing Octeon user-mode support", "version": 2, "mbox": "http://patchwork.ozlabs.org/series/500858/mbox/" } ], "comments": "http://patchwork.ozlabs.org/api/patches/2225864/comments/", "check": "pending", "checks": "http://patchwork.ozlabs.org/api/patches/2225864/checks/", "tags": {}, "related": [], "headers": { "Return-Path": "<qemu-devel-bounces+incoming=patchwork.ozlabs.org@nongnu.org>", "X-Original-To": "incoming@patchwork.ozlabs.org", "Delivered-To": "patchwork-incoming@legolas.ozlabs.org", "Authentication-Results": [ "legolas.ozlabs.org;\n\tdkim=pass (2048-bit key;\n unprotected) header.d=gmail.com header.i=@gmail.com header.a=rsa-sha256\n header.s=20251104 header.b=nk9vIxnt;\n\tdkim-atps=neutral", "legolas.ozlabs.org;\n spf=pass (sender SPF authorized) smtp.mailfrom=nongnu.org\n (client-ip=209.51.188.17; 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charset=\"utf-8\"", "Content-Transfer-Encoding": "8bit", "Message-Id": "\n <20260421-mips-octeon-missing-insns-v2-v2-11-a0791df188c9@gmail.com>", "References": "\n <20260421-mips-octeon-missing-insns-v2-v2-0-a0791df188c9@gmail.com>", "In-Reply-To": "\n <20260421-mips-octeon-missing-insns-v2-v2-0-a0791df188c9@gmail.com>", "To": "qemu-devel@nongnu.org", "Cc": "Laurent Vivier <laurent@vivier.eu>,\n Pierrick Bouvier <pierrick.bouvier@linaro.org>, =?utf-8?q?Philippe_Mathieu?=\n\t=?utf-8?q?-Daud=C3=A9?= <philmd@linaro.org>,\n Aurelien Jarno <aurelien@aurel32.net>,\n Jiaxun Yang <jiaxun.yang@flygoat.com>,\n Aleksandar Rikalo <arikalo@gmail.com>, Huacai Chen <chenhuacai@kernel.org>,\n James Hilliard <james.hilliard1@gmail.com>", "X-Mailer": "b4 0.15.2", "Received-SPF": "pass client-ip=2001:4860:4864:20::36;\n envelope-from=james.hilliard1@gmail.com; helo=mail-oa1-x36.google.com", "X-Spam_score_int": "-17", "X-Spam_score": "-1.8", "X-Spam_bar": "-", "X-Spam_report": "(-1.8 / 5.0 requ) BAYES_00=-1.9, DKIM_SIGNED=0.1,\n DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1,\n FREEMAIL_ENVFROM_END_DIGIT=0.25, FREEMAIL_FROM=0.001,\n RCVD_IN_DNSWL_NONE=-0.0001, SPF_HELO_NONE=0.001,\n SPF_PASS=-0.001 autolearn=ham autolearn_force=no", "X-Spam_action": "no action", "X-BeenThere": "qemu-devel@nongnu.org", "X-Mailman-Version": "2.1.29", "Precedence": "list", "List-Id": "qemu development <qemu-devel.nongnu.org>", "List-Unsubscribe": "<https://lists.nongnu.org/mailman/options/qemu-devel>,\n <mailto:qemu-devel-request@nongnu.org?subject=unsubscribe>", "List-Archive": "<https://lists.nongnu.org/archive/html/qemu-devel>", "List-Post": "<mailto:qemu-devel@nongnu.org>", "List-Help": "<mailto:qemu-devel-request@nongnu.org?subject=help>", "List-Subscribe": "<https://lists.nongnu.org/mailman/listinfo/qemu-devel>,\n <mailto:qemu-devel-request@nongnu.org?subject=subscribe>", "Errors-To": "qemu-devel-bounces+incoming=patchwork.ozlabs.org@nongnu.org", "Sender": "qemu-devel-bounces+incoming=patchwork.ozlabs.org@nongnu.org" }, "content": "Add the Octeon Camellia ROUND, FL, and FLINV selectors and model the\nround engine that reuses the AES RESULT/RESINP bank.\n\nImplement the Camellia F-function and FL layers directly from RFC 3713\nso guest-managed key schedules can drive the engine through the hardware\ninterface.\n\nSigned-off-by: James Hilliard <james.hilliard1@gmail.com>\n---\nChanges v1 -> v2:\n - Drop the Octeon prefix from generic Camellia helper routines.\n (suggested by Philippe Mathieu-Daudé)\n - Add selector dispatch updates in octeon_translate.c after moving\n COP2 decode out of translate.c. (suggested by Philippe\n Mathieu-Daudé)\n---\n target/mips/cpu.h | 9 +++\n target/mips/tcg/octeon_crypto.c | 120 +++++++++++++++++++++++++++++++++++++\n target/mips/tcg/octeon_translate.c | 3 +\n 3 files changed, 132 insertions(+)", "diff": "diff --git a/target/mips/cpu.h b/target/mips/cpu.h\nindex 437d43636b..8411ef7de4 100644\n--- a/target/mips/cpu.h\n+++ b/target/mips/cpu.h\n@@ -587,6 +587,14 @@ typedef enum MIPSOcteonCop2Sel {\n OCTEON_COP2_SEL_AES_DEC0 = 0x010e,\n OCTEON_COP2_SEL_AES_KEYLENGTH = 0x0110,\n OCTEON_COP2_SEL_AES_DAT0 = 0x0111,\n+ /*\n+ * Camellia reuses the AES RESULT/RESINP bank and adds per-round and\n+ * diffusion-layer selectors for the guest-managed key schedule.\n+ */\n+ OCTEON_COP2_SEL_CAMELLIA_RESINP0 = OCTEON_COP2_SEL_AES_RESULT0,\n+ OCTEON_COP2_SEL_CAMELLIA_RESINP1 = OCTEON_COP2_SEL_AES_RESULT1,\n+ OCTEON_COP2_SEL_CAMELLIA_FL = 0x0115,\n+ OCTEON_COP2_SEL_CAMELLIA_FLINV = 0x0116,\n /*\n * SMS4 reuses the AES result/input, IV, and key banks and only adds\n * operation selectors for ECB/CBC encrypt/decrypt.\n@@ -688,6 +696,7 @@ typedef enum MIPSOcteonCop2Sel {\n OCTEON_COP2_SEL_AES_ENC1 = 0x310b,\n OCTEON_COP2_SEL_AES_DEC_CBC1 = 0x310d,\n OCTEON_COP2_SEL_AES_DEC1 = 0x310f,\n+ OCTEON_COP2_SEL_CAMELLIA_ROUND = 0x3114,\n OCTEON_COP2_SEL_SMS4_ENC_CBC1 = 0x3119,\n OCTEON_COP2_SEL_SMS4_ENC1 = 0x311b,\n OCTEON_COP2_SEL_SMS4_DEC_CBC1 = 0x311d,\ndiff --git a/target/mips/tcg/octeon_crypto.c b/target/mips/tcg/octeon_crypto.c\nindex 3ee56ef4c0..9c5f19f41d 100644\n--- a/target/mips/tcg/octeon_crypto.c\n+++ b/target/mips/tcg/octeon_crypto.c\n@@ -1650,6 +1650,117 @@ static void octeon_aes_store_block(uint64_t regs[2], const uint8_t *block)\n regs[1] = ldq_be_p(block + 8);\n }\n \n+static const uint8_t camellia_sbox1[256] = {\n+ 112, 130, 44, 236, 179, 39, 192, 229, 228, 133, 87, 53, 234, 12,\n+ 174, 65, 35, 239, 107, 147, 69, 25, 165, 33, 237, 14, 79, 78,\n+ 29, 101, 146, 189, 134, 184, 175, 143, 124, 235, 31, 206, 62, 48,\n+ 220, 95, 94, 197, 11, 26, 166, 225, 57, 202, 213, 71, 93, 61,\n+ 217, 1, 90, 214, 81, 86, 108, 77, 139, 13, 154, 102, 251, 204,\n+ 176, 45, 116, 18, 43, 32, 240, 177, 132, 153, 223, 76, 203, 194,\n+ 52, 126, 118, 5, 109, 183, 169, 49, 209, 23, 4, 215, 20, 88,\n+ 58, 97, 222, 27, 17, 28, 50, 15, 156, 22, 83, 24, 242, 34,\n+ 254, 68, 207, 178, 195, 181, 122, 145, 36, 8, 232, 168, 96, 252,\n+ 105, 80, 170, 208, 160, 125, 161, 137, 98, 151, 84, 91, 30, 149,\n+ 224, 255, 100, 210, 16, 196, 0, 72, 163, 247, 117, 219, 138, 3,\n+ 230, 218, 9, 63, 221, 148, 135, 92, 131, 2, 205, 74, 144, 51,\n+ 115, 103, 246, 243, 157, 127, 191, 226, 82, 155, 216, 38, 200, 55,\n+ 198, 59, 129, 150, 111, 75, 19, 190, 99, 46, 233, 121, 167, 140,\n+ 159, 110, 188, 142, 41, 245, 249, 182, 47, 253, 180, 89, 120, 152,\n+ 6, 106, 231, 70, 113, 186, 212, 37, 171, 66, 136, 162, 141, 250,\n+ 114, 7, 185, 85, 248, 238, 172, 10, 54, 73, 42, 104, 60, 56,\n+ 241, 164, 64, 40, 211, 123, 187, 201, 67, 193, 21, 227, 173, 244,\n+ 119, 199, 128, 158,\n+};\n+\n+static inline uint8_t camellia_rotl8(uint8_t v, unsigned int shift)\n+{\n+ return (v << shift) | (v >> (8 - shift));\n+}\n+\n+static inline uint8_t camellia_sbox2(uint8_t x)\n+{\n+ return camellia_rotl8(camellia_sbox1[x], 1);\n+}\n+\n+static inline uint8_t camellia_sbox3(uint8_t x)\n+{\n+ return camellia_rotl8(camellia_sbox1[x], 7);\n+}\n+\n+static inline uint8_t camellia_sbox4(uint8_t x)\n+{\n+ return camellia_sbox1[camellia_rotl8(x, 1)];\n+}\n+\n+static uint64_t camellia_f(uint64_t input, uint64_t key)\n+{\n+ uint64_t x = input ^ key;\n+ uint8_t t1 = camellia_sbox1[x >> 56];\n+ uint8_t t2 = camellia_sbox2((x >> 48) & 0xff);\n+ uint8_t t3 = camellia_sbox3((x >> 40) & 0xff);\n+ uint8_t t4 = camellia_sbox4((x >> 32) & 0xff);\n+ uint8_t t5 = camellia_sbox2((x >> 24) & 0xff);\n+ uint8_t t6 = camellia_sbox3((x >> 16) & 0xff);\n+ uint8_t t7 = camellia_sbox4((x >> 8) & 0xff);\n+ uint8_t t8 = camellia_sbox1[x & 0xff];\n+ uint8_t y1 = t1 ^ t3 ^ t4 ^ t6 ^ t7 ^ t8;\n+ uint8_t y2 = t1 ^ t2 ^ t4 ^ t5 ^ t7 ^ t8;\n+ uint8_t y3 = t1 ^ t2 ^ t3 ^ t5 ^ t6 ^ t8;\n+ uint8_t y4 = t2 ^ t3 ^ t4 ^ t5 ^ t6 ^ t7;\n+ uint8_t y5 = t1 ^ t2 ^ t6 ^ t7 ^ t8;\n+ uint8_t y6 = t2 ^ t3 ^ t5 ^ t7 ^ t8;\n+ uint8_t y7 = t3 ^ t4 ^ t5 ^ t6 ^ t8;\n+ uint8_t y8 = t1 ^ t4 ^ t5 ^ t6 ^ t7;\n+\n+ return ((uint64_t)y1 << 56) | ((uint64_t)y2 << 48) |\n+ ((uint64_t)y3 << 40) | ((uint64_t)y4 << 32) |\n+ ((uint64_t)y5 << 24) | ((uint64_t)y6 << 16) |\n+ ((uint64_t)y7 << 8) | y8;\n+}\n+\n+static uint64_t camellia_fl(uint64_t input, uint64_t key)\n+{\n+ uint32_t x1 = input >> 32;\n+ uint32_t x2 = input;\n+ uint32_t k1 = key >> 32;\n+ uint32_t k2 = key;\n+\n+ x2 ^= rol32(x1 & k1, 1);\n+ x1 ^= x2 | k2;\n+ return ((uint64_t)x1 << 32) | x2;\n+}\n+\n+static uint64_t camellia_flinv(uint64_t input, uint64_t key)\n+{\n+ uint32_t y1 = input >> 32;\n+ uint32_t y2 = input;\n+ uint32_t k1 = key >> 32;\n+ uint32_t k2 = key;\n+\n+ y1 ^= y2 | k2;\n+ y2 ^= rol32(y1 & k1, 1);\n+ return ((uint64_t)y1 << 32) | y2;\n+}\n+\n+static void octeon_camellia_round(MIPSOcteonCryptoState *crypto, uint64_t key)\n+{\n+ uint64_t left = crypto->aes_result[0];\n+ uint64_t right = crypto->aes_result[1];\n+\n+ crypto->aes_result[0] = right ^ camellia_f(left, key);\n+ crypto->aes_result[1] = left;\n+}\n+\n+static void octeon_camellia_fl_layer(MIPSOcteonCryptoState *crypto,\n+ uint64_t key, bool inverse)\n+{\n+ uint64_t state = crypto->aes_result[inverse ? 1 : 0];\n+\n+ crypto->aes_result[inverse ? 1 : 0] = inverse ?\n+ camellia_flinv(state, key) :\n+ camellia_fl(state, key);\n+}\n+\n static void octeon_sms4_crypt_common(MIPSOcteonCryptoState *crypto,\n bool encrypt, bool cbc)\n {\n@@ -2046,6 +2157,12 @@ void helper_octeon_cop2_dmtc2(CPUMIPSState *env, uint64_t value,\n case OCTEON_COP2_SEL_AES_KEYLENGTH:\n crypto->aes_keylen = q;\n break;\n+ case OCTEON_COP2_SEL_CAMELLIA_FL:\n+ octeon_camellia_fl_layer(crypto, q, false);\n+ break;\n+ case OCTEON_COP2_SEL_CAMELLIA_FLINV:\n+ octeon_camellia_fl_layer(crypto, q, true);\n+ break;\n case OCTEON_COP2_SEL_CRC_WRITE_POLYNOMIAL:\n case OCTEON_COP2_SEL_CRC_WRITE_POLYNOMIAL_REFLECT:\n crypto->crc_poly = q;\n@@ -2231,6 +2348,9 @@ void helper_octeon_cop2_dmtc2(CPUMIPSState *env, uint64_t value,\n crypto->aes_input[1] = q;\n octeon_aes_decrypt_common(crypto, false);\n break;\n+ case OCTEON_COP2_SEL_CAMELLIA_ROUND:\n+ octeon_camellia_round(crypto, q);\n+ break;\n case OCTEON_COP2_SEL_SMS4_ENC_CBC1:\n crypto->aes_input[1] = q;\n octeon_sms4_crypt_common(crypto, true, true);\ndiff --git a/target/mips/tcg/octeon_translate.c b/target/mips/tcg/octeon_translate.c\nindex 965dab1b34..004b937412 100644\n--- a/target/mips/tcg/octeon_translate.c\n+++ b/target/mips/tcg/octeon_translate.c\n@@ -115,6 +115,8 @@ static bool octeon_cop2_is_supported_dmtc2(uint16_t sel)\n case OCTEON_COP2_SEL_AES_DEC_CBC0:\n case OCTEON_COP2_SEL_AES_DEC0:\n case OCTEON_COP2_SEL_AES_KEYLENGTH:\n+ case OCTEON_COP2_SEL_CAMELLIA_FL:\n+ case OCTEON_COP2_SEL_CAMELLIA_FLINV:\n case OCTEON_COP2_SEL_CRC_WRITE_POLYNOMIAL:\n case OCTEON_COP2_SEL_CRC_IV:\n case OCTEON_COP2_SEL_CRC_WRITE_LEN:\n@@ -210,6 +212,7 @@ static bool octeon_cop2_is_supported_dmtc2(uint16_t sel)\n case OCTEON_COP2_SEL_AES_ENC1:\n case OCTEON_COP2_SEL_AES_DEC_CBC1:\n case OCTEON_COP2_SEL_AES_DEC1:\n+ case OCTEON_COP2_SEL_CAMELLIA_ROUND:\n case OCTEON_COP2_SEL_SMS4_ENC_CBC1:\n case OCTEON_COP2_SEL_SMS4_ENC1:\n case OCTEON_COP2_SEL_SMS4_DEC_CBC1:\n", "prefixes": [ "v2", "11/13" ] }