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GET /api/patches/2225709/?format=api
{ "id": 2225709, "url": "http://patchwork.ozlabs.org/api/patches/2225709/?format=api", "web_url": "http://patchwork.ozlabs.org/project/glibc/patch/20260421130804.66597-1-muhammad.kamran@arm.com/", "project": { "id": 41, "url": "http://patchwork.ozlabs.org/api/projects/41/?format=api", "name": "GNU C Library", "link_name": "glibc", "list_id": "libc-alpha.sourceware.org", "list_email": "libc-alpha@sourceware.org", "web_url": "", "scm_url": "", "webscm_url": "", "list_archive_url": "", "list_archive_url_format": "", "commit_url_format": "" }, "msgid": "<20260421130804.66597-1-muhammad.kamran@arm.com>", "list_archive_url": null, "date": "2026-04-21T13:08:04", "name": "aarch64: simplify __libc_arm_za_disable failure path", "commit_ref": null, "pull_url": null, "state": "new", "archived": false, "hash": "88cf6a36c1531368d0fa648ef25646654abbe261", "submitter": { "id": 92852, "url": "http://patchwork.ozlabs.org/api/people/92852/?format=api", "name": "Muhammad Kamran", "email": "muhammad.kamran@arm.com" }, "delegate": null, "mbox": "http://patchwork.ozlabs.org/project/glibc/patch/20260421130804.66597-1-muhammad.kamran@arm.com/mbox/", "series": [ { "id": 500801, "url": "http://patchwork.ozlabs.org/api/series/500801/?format=api", "web_url": "http://patchwork.ozlabs.org/project/glibc/list/?series=500801", "date": "2026-04-21T13:08:04", "name": "aarch64: simplify __libc_arm_za_disable failure path", "version": 1, "mbox": "http://patchwork.ozlabs.org/series/500801/mbox/" } ], "comments": "http://patchwork.ozlabs.org/api/patches/2225709/comments/", "check": "pending", "checks": "http://patchwork.ozlabs.org/api/patches/2225709/checks/", "tags": {}, "related": [], "headers": { "Return-Path": "<libc-alpha-bounces~incoming=patchwork.ozlabs.org@sourceware.org>", "X-Original-To": [ "incoming@patchwork.ozlabs.org", "libc-alpha@sourceware.org" ], "Delivered-To": [ "patchwork-incoming@legolas.ozlabs.org", "libc-alpha@sourceware.org" ], "Authentication-Results": [ "legolas.ozlabs.org;\n\tdkim=pass (1024-bit key;\n unprotected) header.d=arm.com header.i=@arm.com header.a=rsa-sha256\n header.s=selector1 header.b=lZIVrEFJ;\n\tdkim=pass (1024-bit key) header.d=arm.com header.i=@arm.com\n header.a=rsa-sha256 header.s=selector1 header.b=lZIVrEFJ;\n\tdkim-atps=neutral", "legolas.ozlabs.org;\n spf=pass (sender SPF authorized) smtp.mailfrom=sourceware.org\n (client-ip=2620:52:6:3111::32; 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Ip=[4.158.2.129];\n Helo=[outbound-uk1.az.dlp.m.darktrace.com]", "X-MS-Exchange-CrossTenant-AuthSource": "\n DU6PEPF00009525.eurprd02.prod.outlook.com", "X-MS-Exchange-CrossTenant-AuthAs": "Anonymous", "X-MS-Exchange-CrossTenant-FromEntityHeader": "HybridOnPrem", "X-BeenThere": "libc-alpha@sourceware.org", "X-Mailman-Version": "2.1.30", "Precedence": "list", "List-Id": "Libc-alpha mailing list <libc-alpha.sourceware.org>", "List-Unsubscribe": "<https://sourceware.org/mailman/options/libc-alpha>,\n <mailto:libc-alpha-request@sourceware.org?subject=unsubscribe>", "List-Archive": "<https://sourceware.org/pipermail/libc-alpha/>", "List-Post": "<mailto:libc-alpha@sourceware.org>", "List-Help": "<mailto:libc-alpha-request@sourceware.org?subject=help>", "List-Subscribe": "<https://sourceware.org/mailman/listinfo/libc-alpha>,\n <mailto:libc-alpha-request@sourceware.org?subject=subscribe>", "Errors-To": "libc-alpha-bounces~incoming=patchwork.ozlabs.org@sourceware.org" }, "content": "The failure tail of __libc_arm_za_disable only leads to\n__libc_fatal, so it does not need to preserve call frame state.\n\nRemove the PAC prologue, frame setup, saved cntd value, stack\nstores, and associated CFI directives from the fatal path, leaving\nonly the required SME state shutdown and fatal call.\n\nAdd tst-sme-za-disable-fail to exercise the abort path by providing\na TPIDR2 block with non-zero reserved bytes and checking that the\nprocess terminates with SIGABRT and the expected fatal message.\n---\n sysdeps/aarch64/Makefile | 2 +\n sysdeps/aarch64/__arm_za_disable.S | 10 ----\n sysdeps/aarch64/tst-sme-helper.h | 12 ++--\n sysdeps/aarch64/tst-sme-za-disable-fail.c | 67 +++++++++++++++++++++++\n 4 files changed, 75 insertions(+), 16 deletions(-)\n create mode 100644 sysdeps/aarch64/tst-sme-za-disable-fail.c", "diff": "diff --git a/sysdeps/aarch64/Makefile b/sysdeps/aarch64/Makefile\nindex d6c5cc96ca..57132179fd 100644\n--- a/sysdeps/aarch64/Makefile\n+++ b/sysdeps/aarch64/Makefile\n@@ -82,9 +82,11 @@ tests-internal += \\\n tst-sme-clone3 \\\n tst-sme-fork \\\n tst-sme-vfork \\\n+ tst-sme-za-disable-fail \\\n # tests-internal\n \n $(objpfx)tst-sme-clone3: $(objpfx)clone3.o $(objpfx)__arm_za_disable.o\n+$(objpfx)tst-sme-za-disable-fail: $(objpfx)__arm_za_disable.o\n endif\n \n ifeq ($(subdir),malloc)\ndiff --git a/sysdeps/aarch64/__arm_za_disable.S b/sysdeps/aarch64/__arm_za_disable.S\nindex c9663e3bcb..f360c8c77b 100644\n--- a/sysdeps/aarch64/__arm_za_disable.S\n+++ b/sysdeps/aarch64/__arm_za_disable.S\n@@ -88,16 +88,6 @@ L(save_loop):\n L(end):\n \tret\n L(fail):\n-\tpaciasp\n-\tcfi_negate_ra_state\n-\tstp\tx29, x30, [sp, -32]!\n-\tcfi_adjust_cfa_offset (32)\n-\tcfi_rel_offset (x29, 0)\n-\tcfi_rel_offset (x30, 8)\n-\tmov\tx29, sp\n-\t.inst\t0x04e0e3f0 /* cntd\tx16 */\n-\tstr\tx16, [sp, 16]\n-\tcfi_rel_offset (46, 16)\n \t.inst\t0xd503467f /* smstop */\n \tadrp\tx0, L(msg)\n \tadd\tx0, x0, :lo12:L(msg)\ndiff --git a/sysdeps/aarch64/tst-sme-helper.h b/sysdeps/aarch64/tst-sme-helper.h\nindex 2ae2cc2f47..66e016f0b8 100644\n--- a/sysdeps/aarch64/tst-sme-helper.h\n+++ b/sysdeps/aarch64/tst-sme-helper.h\n@@ -23,7 +23,7 @@ struct blk {\n };\n \n /* Read SVCR to get SM (bit0) and ZA (bit1) state. */\n-static unsigned long\n+static unsigned long __attribute__ ((unused))\n get_svcr (void)\n {\n register unsigned long x0 asm (\"x0\");\n@@ -34,7 +34,7 @@ get_svcr (void)\n }\n \n /* Returns tpidr2. */\n-static void *\n+static __attribute__ ((unused)) void *\n get_tpidr2 (void)\n {\n register unsigned long x0 asm (\"x0\");\n@@ -45,7 +45,7 @@ get_tpidr2 (void)\n }\n \n /* Obtains current streaming SVE vector register size. */\n-static unsigned long\n+static unsigned long __attribute__ ((unused))\n get_svl (void)\n {\n register unsigned long x0 asm (\"x0\");\n@@ -56,7 +56,7 @@ get_svl (void)\n }\n \n /* PSTATE.ZA = 1, set ZA state to active. */\n-static void\n+static void __attribute__ ((unused))\n start_za (void)\n {\n asm volatile (\n@@ -64,7 +64,7 @@ start_za (void)\n }\n \n /* Load data into ZA byte by byte from p. */\n-static void __attribute__ ((noinline))\n+static void __attribute__ ((noinline, unused))\n load_za (const void *buf, unsigned long svl)\n {\n register unsigned long x15 asm (\"x15\") = 0;\n@@ -84,7 +84,7 @@ load_za (const void *buf, unsigned long svl)\n }\n \n /* Set tpidr2 to BLK. */\n-static void\n+static void __attribute__ ((unused))\n set_tpidr2 (struct blk *blk)\n {\n register unsigned long x0 asm (\"x0\") = (unsigned long)blk;\ndiff --git a/sysdeps/aarch64/tst-sme-za-disable-fail.c b/sysdeps/aarch64/tst-sme-za-disable-fail.c\nnew file mode 100644\nindex 0000000000..d3a6bebaf9\n--- /dev/null\n+++ b/sysdeps/aarch64/tst-sme-za-disable-fail.c\n@@ -0,0 +1,67 @@\n+/* Test that __libc_arm_za_disable aborts on unknown TPIDR2 extensions.\n+ Copyright (C) 2026 Free Software Foundation, Inc.\n+ This file is part of the GNU C Library.\n+\n+ The GNU C Library is free software; you can redistribute it and/or\n+ modify it under the terms of the GNU Lesser General Public\n+ License as published by the Free Software Foundation; either\n+ version 2.1 of the License, or (at your option) any later version.\n+\n+ The GNU C Library is distributed in the hope that it will be useful,\n+ but WITHOUT ANY WARRANTY; without even the implied warranty of\n+ MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU\n+ Lesser General Public License for more details.\n+\n+ You should have received a copy of the GNU Lesser General Public\n+ License along with the GNU C Library; if not, see\n+ <https://www.gnu.org/licenses/>. */\n+\n+#include <signal.h>\n+#include <stdint.h>\n+#include <sys/auxv.h>\n+\n+#include <support/capture_subprocess.h>\n+#include <support/check.h>\n+#include <support/test-driver.h>\n+\n+#include \"tst-sme-helper.h\"\n+\n+extern void __libc_arm_za_disable (void);\n+\n+/* Required by __arm_za_disable.o and provided by the startup code\n+ as a hidden symbol. */\n+uint64_t _dl_hwcap2;\n+\n+static struct blk blk = {\n+ .za_save_buffer = NULL,\n+ .num_za_save_slices = 0,\n+ .__reserved = { 1, 0, 0, 0, 0, 0 },\n+};\n+\n+static void\n+do_abort (void *closure)\n+{\n+ start_za ();\n+ set_tpidr2 (closure);\n+ __libc_arm_za_disable ();\n+}\n+\n+static int\n+do_test (void)\n+{\n+ _dl_hwcap2 = getauxval (AT_HWCAP2);\n+ if ((_dl_hwcap2 & HWCAP2_SME) == 0)\n+ FAIL_UNSUPPORTED (\"kernel or CPU does not support SME\");\n+\n+ struct support_capture_subprocess result\n+ = support_capture_subprocess (do_abort, &blk);\n+ support_capture_subprocess_check (&result, \"tst-sme-za-disable-fail\",\n+\t\t\t\t -SIGABRT, sc_allow_stderr);\n+ TEST_COMPARE_STRING (result.err.buffer,\n+\t\t \"FATAL: __libc_arm_za_disable failed.\\n\");\n+ support_capture_subprocess_free (&result);\n+\n+ return 0;\n+}\n+\n+#include <support/test-driver.c>\n", "prefixes": [] }