Patch Detail
get:
Show a patch.
patch:
Update a patch.
put:
Update a patch.
GET /api/patches/2225619/?format=api
{ "id": 2225619, "url": "http://patchwork.ozlabs.org/api/patches/2225619/?format=api", "web_url": "http://patchwork.ozlabs.org/project/qemu-devel/patch/20260421093715.2995067-3-frank.chang@sifive.com/", "project": { "id": 14, "url": "http://patchwork.ozlabs.org/api/projects/14/?format=api", "name": "QEMU Development", "link_name": "qemu-devel", "list_id": "qemu-devel.nongnu.org", "list_email": "qemu-devel@nongnu.org", "web_url": "", "scm_url": "", "webscm_url": "", "list_archive_url": "", "list_archive_url_format": "", "commit_url_format": "" }, "msgid": "<20260421093715.2995067-3-frank.chang@sifive.com>", "list_archive_url": null, "date": "2026-04-21T09:37:11", "name": "[v4,2/6] target/riscv: Add a helper to return the current effective priv mode", "commit_ref": null, "pull_url": null, "state": "new", "archived": false, "hash": "2b5dd71440da5634de81fc770fd2d3317da740ca", "submitter": { "id": 79604, "url": "http://patchwork.ozlabs.org/api/people/79604/?format=api", "name": "Frank Chang", "email": "frank.chang@sifive.com" }, "delegate": null, "mbox": "http://patchwork.ozlabs.org/project/qemu-devel/patch/20260421093715.2995067-3-frank.chang@sifive.com/mbox/", "series": [ { "id": 500769, "url": "http://patchwork.ozlabs.org/api/series/500769/?format=api", "web_url": "http://patchwork.ozlabs.org/project/qemu-devel/list/?series=500769", "date": "2026-04-21T09:37:09", "name": "Fix Zjpm implementation", "version": 4, "mbox": "http://patchwork.ozlabs.org/series/500769/mbox/" } ], "comments": "http://patchwork.ozlabs.org/api/patches/2225619/comments/", "check": "pending", "checks": "http://patchwork.ozlabs.org/api/patches/2225619/checks/", "tags": {}, "related": [], "headers": { "Return-Path": "<qemu-devel-bounces+incoming=patchwork.ozlabs.org@nongnu.org>", "X-Original-To": "incoming@patchwork.ozlabs.org", "Delivered-To": "patchwork-incoming@legolas.ozlabs.org", "Authentication-Results": [ "legolas.ozlabs.org;\n\tdkim=pass (2048-bit key;\n unprotected) header.d=sifive.com header.i=@sifive.com header.a=rsa-sha256\n header.s=google header.b=asuohkno;\n\tdkim-atps=neutral", "legolas.ozlabs.org;\n spf=pass (sender SPF authorized) smtp.mailfrom=nongnu.org\n (client-ip=209.51.188.17; helo=lists1p.gnu.org;\n envelope-from=qemu-devel-bounces+incoming=patchwork.ozlabs.org@nongnu.org;\n receiver=patchwork.ozlabs.org)" ], "Received": [ "from lists1p.gnu.org (lists1p.gnu.org [209.51.188.17])\n\t(using TLSv1.2 with cipher ECDHE-ECDSA-AES256-GCM-SHA384 (256/256 bits))\n\t(No client certificate requested)\n\tby legolas.ozlabs.org (Postfix) with ESMTPS id 4g0HN80nbXz1yCv\n\tfor <incoming@patchwork.ozlabs.org>; Tue, 21 Apr 2026 19:38:16 +1000 (AEST)", "from localhost ([::1] helo=lists1p.gnu.org)\n\tby lists1p.gnu.org with esmtp (Exim 4.90_1)\n\t(envelope-from <qemu-devel-bounces@nongnu.org>)\n\tid 1wF7Y0-00006R-03; Tue, 21 Apr 2026 05:37:36 -0400", "from eggs.gnu.org ([2001:470:142:3::10])\n by lists1p.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_256_GCM_SHA384:256)\n (Exim 4.90_1) (envelope-from <frank.chang@sifive.com>)\n id 1wF7Xu-000055-Rp\n for qemu-devel@nongnu.org; Tue, 21 Apr 2026 05:37:32 -0400", "from mail-pf1-x430.google.com ([2607:f8b0:4864:20::430])\n by eggs.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_128_GCM_SHA256:128)\n (Exim 4.90_1) (envelope-from <frank.chang@sifive.com>)\n id 1wF7Xt-0007rT-6j\n for qemu-devel@nongnu.org; Tue, 21 Apr 2026 05:37:30 -0400", "by mail-pf1-x430.google.com with SMTP id\n d2e1a72fcca58-82d0b68837aso2571395b3a.2\n for <qemu-devel@nongnu.org>; Tue, 21 Apr 2026 02:37:28 -0700 (PDT)", "from hsinchu16.internal.sifive.com ([210.176.154.34])\n by smtp.gmail.com with ESMTPSA id\n d2e1a72fcca58-82f8e981be6sm15904589b3a.9.2026.04.21.02.37.24\n (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256);\n Tue, 21 Apr 2026 02:37:26 -0700 (PDT)" ], "DKIM-Signature": "v=1; a=rsa-sha256; c=relaxed/relaxed;\n d=sifive.com; s=google; t=1776764247; x=1777369047; darn=nongnu.org;\n h=content-transfer-encoding:mime-version:references:in-reply-to\n :message-id:date:subject:cc:to:from:from:to:cc:subject:date\n :message-id:reply-to;\n bh=VEioh2IayfhJrxVNIwfPDLydV5qmzTqIwQsaJf8KtQk=;\n b=asuohknoNkKAiPelRxAJVnTuUSZuaVZDZeiNSP9bDEqFK0dac5Zlpg2kit5I5iYGXX\n TYPkeRZoDF+SmrrOV0brWnCnUhicU4bxizslRaapqbQp8g/06y3JPSI2+FoLEEB3u82M\n gnRnbWtXDwFbQcbyp562MCoMUrN3K00Yvbcwpo+ZX8RUipd1ufd1ZYJb0PYV4cf0whyw\n UAH8p/QRBIfFZdIhpYy+G6jg28/RfsuIJtgq84hmLPaBIefHLT4xGorenE7iL71m6L51\n 7dKki5YuXrt8XBYw4jlTpZrDKReo+aSS8H+ZdhQqrmKDcri7wapI8wwbYXYjKlwXi4aw\n 3pZg==", "X-Google-DKIM-Signature": "v=1; a=rsa-sha256; c=relaxed/relaxed;\n d=1e100.net; s=20251104; t=1776764247; x=1777369047;\n h=content-transfer-encoding:mime-version:references:in-reply-to\n :message-id:date:subject:cc:to:from:x-gm-gg:x-gm-message-state:from\n :to:cc:subject:date:message-id:reply-to;\n bh=VEioh2IayfhJrxVNIwfPDLydV5qmzTqIwQsaJf8KtQk=;\n b=p6nD9kGInmQe85ML5uKUayq0rdVda8D1J813ep1wWcXfp98cti8F9n4qw84tU6TTHP\n U0hsLL2uKP+Tf94uHvD+Bp60E5JZvK8hzDIeuTaS5X95o6xDnHQH7swZiLw+/8Fl4Va6\n SHBiGXyfDpGW9UKNMGN2f9XdM4R+urbj3HryEEGysogpz5u1sKQP1Hv+8m8fqQQ/fTI9\n Eoh1F/fiP1IopttCv64qzewIxcR7uU+lgOalDxTXDLmyssTMy7hWXRM4V4oDhfi7tv82\n J22+RhSAGHLMvp0EyGEZvgY4+o+S5g1fFg+F5FzWYrehwrZxzYHaOBlEBnzrboEQOUBp\n yC9w==", "X-Gm-Message-State": "AOJu0YxP9lft/614s/m2M2BkYTLsjKpV4qB1KBc6cfqSwY8WCJ/SIfgB\n kwzFAoenz+jcR/NZkY77AzrJiLjJKsQtcIARzrbz7TUokGq0GBJZyuq6iApuogydB/0FsCpXQHa\n rXs49WzLt3rp6j6uSpoOqSsve2szmvIP09VhtOJ62xfocmr36NNcBMJ7c6Gi+/86nlmYEsSiWzS\n A09+a5XXItR50BfjQQGE6lHfxR7J7eTvz/KKVNNHNburb5Yd25", "X-Gm-Gg": "AeBDiesF03K4S0Eax06TI2m9mHlVChZ0q6g3J12+E9A58I+kAVXiOX98MDnOI3wYOEl\n f7yJcMJZiNJXnDN88JQk294tYVGI6zT2I/PvnqsvvAQ2TUloh2Rw7S3Z3GDEMB6T5JUGYPCXw5w\n umOG6ubzCdPoQtSLIvEMDXjnR+RbFOHc2nOQnNsFioAr5mJuFDzFcXQVr6xh0kPJmReEwnAQzli\n SW33GVyqtTMZ0Qd9QjG9xly7HcL/KEnMpsRTA3PJIDg62896gTAMrn3M3AO/u5lNT9YjZr1ChCc\n mcNMrGDsNqBhDdd6MSSulQPNvJVSdV3v4+D4k2FbLvnppYfY6tNLgMT1KcycQodwmpqEn2dqHRj\n vZYstx2c5B+MimfWa5Q/WUOMtkaqHNEFlVOI58c9jJZ/90RJIBdyTmyXq4n13cpeIerxrIF3KZj\n FIuoh2lWzIlWARBefyhAd+RALEpbSgY8ZrSdwrX1GtqsqQWM9OTAMmjFzekjx/", "X-Received": "by 2002:a05:6a00:93a8:b0:82f:9c37:ea65 with SMTP id\n d2e1a72fcca58-82f9c37fbdcmr11126305b3a.42.1776764247101;\n Tue, 21 Apr 2026 02:37:27 -0700 (PDT)", "From": "frank.chang@sifive.com", "To": "qemu-devel@nongnu.org", "Cc": "Palmer Dabbelt <palmer@dabbelt.com>,\n Alistair Francis <alistair.francis@wdc.com>,\n Weiwei Li <liwei1518@gmail.com>,\n Daniel Henrique Barboza <daniel.barboza@oss.qualcomm.com>,\n Liu Zhiwei <zhiwei_liu@linux.alibaba.com>,\n Chao Liu <chao.liu.zevorn@gmail.com>,\n qemu-riscv@nongnu.org (open list:RISC-V TCG CPUs),\n Frank Chang <frank.chang@sifive.com>", "Subject": "[PATCH v4 2/6] target/riscv: Add a helper to return the current\n effective priv mode", "Date": "Tue, 21 Apr 2026 17:37:11 +0800", "Message-ID": "<20260421093715.2995067-3-frank.chang@sifive.com>", "X-Mailer": "git-send-email 2.43.0", "In-Reply-To": "<20260421093715.2995067-1-frank.chang@sifive.com>", "References": "<20260421093715.2995067-1-frank.chang@sifive.com>", "MIME-Version": "1.0", "Content-Transfer-Encoding": "8bit", "Received-SPF": "pass client-ip=2607:f8b0:4864:20::430;\n envelope-from=frank.chang@sifive.com; helo=mail-pf1-x430.google.com", "X-Spam_score_int": "-20", "X-Spam_score": "-2.1", "X-Spam_bar": "--", "X-Spam_report": "(-2.1 / 5.0 requ) BAYES_00=-1.9, DKIM_SIGNED=0.1,\n DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1,\n RCVD_IN_DNSWL_NONE=-0.0001, SPF_HELO_NONE=0.001,\n SPF_PASS=-0.001 autolearn=unavailable autolearn_force=no", "X-Spam_action": "no action", "X-BeenThere": "qemu-devel@nongnu.org", "X-Mailman-Version": "2.1.29", "Precedence": "list", "List-Id": "qemu development <qemu-devel.nongnu.org>", "List-Unsubscribe": "<https://lists.nongnu.org/mailman/options/qemu-devel>,\n <mailto:qemu-devel-request@nongnu.org?subject=unsubscribe>", "List-Archive": "<https://lists.nongnu.org/archive/html/qemu-devel>", "List-Post": "<mailto:qemu-devel@nongnu.org>", "List-Help": "<mailto:qemu-devel-request@nongnu.org?subject=help>", "List-Subscribe": "<https://lists.nongnu.org/mailman/listinfo/qemu-devel>,\n <mailto:qemu-devel-request@nongnu.org?subject=subscribe>", "Errors-To": "qemu-devel-bounces+incoming=patchwork.ozlabs.org@nongnu.org", "Sender": "qemu-devel-bounces+incoming=patchwork.ozlabs.org@nongnu.org" }, "content": "From: Frank Chang <frank.chang@sifive.com>\n\nThis helper returns the current effective privilege mode.\n\nSigned-off-by: Frank Chang <frank.chang@sifive.com>\n---\n target/riscv/cpu.h | 37 +++++++++++++++++++++++++++++++++++++\n target/riscv/cpu_helper.c | 15 +++++----------\n 2 files changed, 42 insertions(+), 10 deletions(-)", "diff": "diff --git a/target/riscv/cpu.h b/target/riscv/cpu.h\nindex 4c0676ed53b..672f0dab0fb 100644\n--- a/target/riscv/cpu.h\n+++ b/target/riscv/cpu.h\n@@ -806,6 +806,43 @@ static inline RISCVMXL riscv_cpu_sxl(CPURISCVState *env)\n }\n #endif\n \n+/*\n+ * Returns the current effective privilege mode.\n+ *\n+ * @env: CPURISCVState\n+ * @priv: The returned effective privilege mode.\n+ * @virt: The returned effective virtualization mode.\n+ *\n+ * Returns true if the effective privilege mode is modified.\n+ */\n+static inline QEMU_ALWAYS_INLINE\n+bool riscv_cpu_eff_priv(CPURISCVState *env, int *priv, bool *virt)\n+{\n+ int mode = env->priv;\n+ bool virt_enabled = false;\n+ bool mode_modified = false;\n+\n+#ifndef CONFIG_USER_ONLY\n+ if (mode == PRV_M && get_field(env->mstatus, MSTATUS_MPRV)) {\n+ mode = get_field(env->mstatus, MSTATUS_MPP);\n+ virt_enabled = get_field(env->mstatus, MSTATUS_MPV) && (mode != PRV_M);\n+ mode_modified = true;\n+ } else {\n+ virt_enabled = env->virt_enabled;\n+ }\n+#endif\n+\n+ if (priv) {\n+ *priv = mode;\n+ }\n+\n+ if (virt) {\n+ *virt = virt_enabled;\n+ }\n+\n+ return mode_modified;\n+}\n+\n static inline bool riscv_cpu_allow_16bit_insn(const RISCVCPUConfig *cfg,\n target_long priv_ver,\n uint32_t misa_ext)\ndiff --git a/target/riscv/cpu_helper.c b/target/riscv/cpu_helper.c\nindex 659150c6462..513bad21afa 100644\n--- a/target/riscv/cpu_helper.c\n+++ b/target/riscv/cpu_helper.c\n@@ -45,19 +45,14 @@ int riscv_env_mmu_index(CPURISCVState *env, bool ifetch)\n #else\n bool virt = env->virt_enabled;\n int mode = env->priv;\n+ bool mode_modified = false;\n \n /* All priv -> mmu_idx mapping are here */\n if (!ifetch) {\n- uint64_t status = env->mstatus;\n-\n- if (mode == PRV_M && get_field(status, MSTATUS_MPRV)) {\n- mode = get_field(env->mstatus, MSTATUS_MPP);\n- virt = get_field(env->mstatus, MSTATUS_MPV) &&\n- (mode != PRV_M);\n- if (virt) {\n- status = env->vsstatus;\n- }\n- }\n+ mode_modified = riscv_cpu_eff_priv(env, &mode, &virt);\n+ uint64_t status = (mode_modified && virt) ? env->vsstatus :\n+ env->mstatus;\n+\n if (mode == PRV_S && get_field(status, MSTATUS_SUM)) {\n mode = MMUIdx_S_SUM;\n }\n", "prefixes": [ "v4", "2/6" ] }