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GET /api/patches/2225576/?format=api
{ "id": 2225576, "url": "http://patchwork.ozlabs.org/api/patches/2225576/?format=api", "web_url": "http://patchwork.ozlabs.org/project/gcc/patch/420a68dd-ac35-4296-93ac-a1f150efb89f@linux.ibm.com/", "project": { "id": 17, "url": "http://patchwork.ozlabs.org/api/projects/17/?format=api", "name": "GNU Compiler Collection", "link_name": "gcc", "list_id": "gcc-patches.gcc.gnu.org", "list_email": "gcc-patches@gcc.gnu.org", "web_url": null, "scm_url": null, "webscm_url": null, "list_archive_url": "", "list_archive_url_format": "", "commit_url_format": "" }, "msgid": "<420a68dd-ac35-4296-93ac-a1f150efb89f@linux.ibm.com>", "list_archive_url": null, "date": "2026-04-21T07:56:17", "name": "[V2] rs6000: Add Future ISA compare and swap equal AMO operations [RFC02689]", "commit_ref": null, "pull_url": null, "state": "new", "archived": false, "hash": "fcc36168f6ad3f52a4ad99ff2c444fe62f548d0a", "submitter": { "id": 88218, "url": "http://patchwork.ozlabs.org/api/people/88218/?format=api", "name": "jeevitha", "email": "jeevitha@linux.ibm.com" }, "delegate": null, "mbox": "http://patchwork.ozlabs.org/project/gcc/patch/420a68dd-ac35-4296-93ac-a1f150efb89f@linux.ibm.com/mbox/", "series": [ { "id": 500754, "url": "http://patchwork.ozlabs.org/api/series/500754/?format=api", "web_url": "http://patchwork.ozlabs.org/project/gcc/list/?series=500754", "date": "2026-04-21T07:56:17", "name": "[V2] rs6000: Add Future ISA compare and swap equal AMO operations [RFC02689]", "version": 2, "mbox": "http://patchwork.ozlabs.org/series/500754/mbox/" } ], "comments": "http://patchwork.ozlabs.org/api/patches/2225576/comments/", "check": "pending", "checks": "http://patchwork.ozlabs.org/api/patches/2225576/checks/", "tags": {}, "related": [], "headers": { "Return-Path": "<gcc-patches-bounces~incoming=patchwork.ozlabs.org@gcc.gnu.org>", "X-Original-To": [ "incoming@patchwork.ozlabs.org", "gcc-patches@gcc.gnu.org" ], "Delivered-To": [ "patchwork-incoming@legolas.ozlabs.org", "gcc-patches@gcc.gnu.org" ], "Authentication-Results": [ "legolas.ozlabs.org;\n\tdkim=pass (2048-bit key;\n unprotected) header.d=ibm.com header.i=@ibm.com header.a=rsa-sha256\n header.s=pp1 header.b=i1dWUdhR;\n\tdkim-atps=neutral", "legolas.ozlabs.org;\n spf=pass (sender SPF authorized) smtp.mailfrom=gcc.gnu.org\n (client-ip=2620:52:6:3111::32; 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charset=UTF-8", "Content-Transfer-Encoding": "7bit", "X-TM-AS-GCONF": "00", "X-Authority-Analysis": "v=2.4 cv=L78theT8 c=1 sm=1 tr=0 ts=69e72da6 cx=c_pps\n a=GFwsV6G8L6GxiO2Y/PsHdQ==:117 a=GFwsV6G8L6GxiO2Y/PsHdQ==:17\n a=IkcTkHD0fZMA:10 a=A5OVakUREuEA:10 a=VkNPw1HP01LnGYTKEx00:22\n a=RnoormkPH1_aCDwRdu11:22 a=RzCfie-kr_QcCd8fBx8p:22 a=VnNF1IyMAAAA:8\n a=KlTMe1r_96bB31xhdEEA:9 a=QEXdDO2ut3YA:10", "X-Proofpoint-Spam-Details-Enc": "AW1haW4tMjYwNDIxMDA3NSBTYWx0ZWRfX3WBwVt3rH84l\n Dt6iLOAL44rj+kX4IUbaMFt9/mNbnD/5+H5/2xaIHI7EC7OZCjB5rgR7eHTXTeWsO7tn9tRQnR4\n qhmmaNVTCIm5OxoNBFyKVbXeJpQFGWkFmFWlSsC3FIYLhwjWyJ/hE3BYruyLauL8EvObYQWLLBk\n Bw6CNnAzrnyropkAalklxTQJtDv4z3x9nD6EzFnLX8DxloDsGvk2YlVrbK/Tk8vXqcD1iyNTzw0\n AA9cyEYKyT43fSvylvaIRDE/AEvGTFlYe2i4Omz6nkLAmfLo595iE/Y9tnb9Z0NiqhE34Y1XzGZ\n ueXhHRWk53zDtn4BcpYW5WUKWZJ49MDVMt1WszVK8/AFlkSLgJ8Hkk7samuvuOI5D75l8amIPcz\n nf0zWZnyBaQM9peb0DgO15pdFLfddB7tcJXPvyPZ3rUX9gCwHkHH6D4y4arYb45rWlxSPg/j6zs\n drB9H79SkfGi0OgRKRg==", "X-Proofpoint-GUID": "S6AjqDhKG9ok-VEXA5V9USK5v8z55CsA", "X-Proofpoint-ORIG-GUID": "S6AjqDhKG9ok-VEXA5V9USK5v8z55CsA", "X-Proofpoint-Virus-Version": "vendor=baseguard\n engine=ICAP:2.0.293,Aquarius:18.0.1143,Hydra:6.1.51,FMLib:17.12.100.49\n definitions=2026-04-21_01,2026-04-20_02,2025-10-01_01", "X-Proofpoint-Spam-Details": "rule=outbound_notspam policy=outbound score=0\n priorityscore=1501 impostorscore=0 spamscore=0 bulkscore=0 suspectscore=0\n lowpriorityscore=0 adultscore=0 clxscore=1015 malwarescore=0 phishscore=0\n classifier=typeunknown authscore=0 authtc= authcc= route=outbound adjust=0\n reason=mlx scancount=1 engine=8.22.0-2604070000 definitions=main-2604210075", "X-BeenThere": "gcc-patches@gcc.gnu.org", "X-Mailman-Version": "2.1.30", "Precedence": "list", "List-Id": "Gcc-patches mailing list <gcc-patches.gcc.gnu.org>", "List-Unsubscribe": "<https://gcc.gnu.org/mailman/options/gcc-patches>,\n <mailto:gcc-patches-request@gcc.gnu.org?subject=unsubscribe>", "List-Archive": "<https://gcc.gnu.org/pipermail/gcc-patches/>", "List-Post": "<mailto:gcc-patches@gcc.gnu.org>", "List-Help": "<mailto:gcc-patches-request@gcc.gnu.org?subject=help>", "List-Subscribe": "<https://gcc.gnu.org/mailman/listinfo/gcc-patches>,\n <mailto:gcc-patches-request@gcc.gnu.org?subject=subscribe>", "Errors-To": "gcc-patches-bounces~incoming=patchwork.ozlabs.org@gcc.gnu.org" }, "content": "Hi,\n\nThis patch depends on the -mcpu=future and ISA 3.0 AMO implementation\npatches and will be upstreamed after those patches are upstreamed.\nThese changes have been bootstrapped and regression tested on\npowerpc64le-linux.\n\nChanges from V1:\n* Corrected wording in amo.h and the test file\n* Added changes to extend.texi\n\nThis patch adds support for compare-and-swap-equal atomic memory\noperations that may be added to a future PowerPC processor. Note that\nthe names of these functions may change in the future.\n\nAdd _AMO_LD_CS_EQ to the _AMO_LD enum and define four new\ncompare-and-swap equal helper functions, all guarded by _ARCH_FUTURE.\nFor non-Future targets, provide error-attribute stubs to emit a\ncompile-time diagnostic.\n\n2026-04-21 Jeevitha Palanisamy <jeevitha@linux.ibm.com>\n\ngcc/\n\t* config/rs6000/amo.h (_AMO_LD): Add _AMO_LD_CS_EQ enumerator,\n\tgated on _ARCH_FUTURE.\n\t(amo_lwat_cas_eq, amo_lwat_scas_eq, amo_ldat_cas_eq,\n\tamo_ldat_scas_eq): New compare-and-swap equal helper functions.\n\t(_AMO_ERR_CMPSWP): New macro for error-attribute stubs on\n\tnon-Future targets.\n\t* doc/extend.texi (PowerPC Atomic Memory Operation Functions):\n\tDocument new functions.\n\ngcc/testsuite/\n\t* gcc.target/powerpc/amo8.c: New test.", "diff": "diff --git a/gcc/config/rs6000/amo.h b/gcc/config/rs6000/amo.h\nindex 2b52ec755de..922dccaaced 100644\n--- a/gcc/config/rs6000/amo.h\n+++ b/gcc/config/rs6000/amo.h\n@@ -44,6 +44,9 @@ enum _AMO_LD {\n _AMO_LD_SMIN\t\t= 0x07,\t\t/* Fetch and Signed Minimum. */\n _AMO_LD_SWAP\t\t= 0x08,\t\t/* Swap. */\n _AMO_LD_CS_NE \t= 0x10, /* Compare and Swap Not Equal. */\n+#ifdef _ARCH_FUTURE\n+ _AMO_LD_CS_EQ \t= 0x11, /* Compare and Swap Equal. */\n+#endif\n _AMO_LD_INC_BOUNDED\t= 0x18,\t\t/* Fetch and Increment Bounded. */\n _AMO_LD_INC_EQUAL\t= 0x19,\t\t/* Fetch and Increment Equal. */\n _AMO_LD_DEC_BOUNDED\t= 0x1C\t\t/* Fetch and Decrement Bounded. */\n@@ -159,6 +162,28 @@ _AMO_LD_INCREMENT (amo_ldat_sinc_eq, int64_t, \"ldat\", _AMO_LD_INC_EQUAL)\n _AMO_LD_INCREMENT (amo_ldat_sinc_bounded, int64_t, \"ldat\", _AMO_LD_INC_BOUNDED)\n _AMO_LD_DECREMENT (amo_ldat_sdec_bounded, int64_t, \"ldat\", _AMO_LD_DEC_BOUNDED)\n \n+/* Future specific compare-and-swap equal operations. */\n+#ifdef _ARCH_FUTURE\n+_AMO_LD_CMPSWP (amo_lwat_cas_eq, uint32_t, \"lwat\", _AMO_LD_CS_EQ)\n+_AMO_LD_CMPSWP (amo_lwat_scas_eq, int32_t, \"lwat\", _AMO_LD_CS_EQ)\n+_AMO_LD_CMPSWP (amo_ldat_cas_eq, uint64_t, \"ldat\", _AMO_LD_CS_EQ)\n+_AMO_LD_CMPSWP (amo_ldat_scas_eq, int64_t, \"ldat\", _AMO_LD_CS_EQ)\n+#else /* ! _ARCH_FUTURE */\n+/* Dummy declarations with GCC error attribute: Triggers error on use. */\n+#define _AMO_ERR_CMPSWP(NAME, TYPE) \\\n+extern TYPE \\\n+NAME (TYPE *_ADDR, TYPE _COND, TYPE _VALUE) \\\n+ __attribute__ ((error (#NAME \" requires ISA<future> which is enabled with\" \\\n+\t\t\t\t\" -mcpu=future option; not available on\"\t\\\n+\t\t\t\t\" ISA 3.1 or earlier\")));\n+\n+_AMO_ERR_CMPSWP (amo_lwat_cas_eq, uint32_t)\n+_AMO_ERR_CMPSWP (amo_lwat_scas_eq, int32_t)\n+_AMO_ERR_CMPSWP (amo_ldat_cas_eq, uint64_t)\n+_AMO_ERR_CMPSWP (amo_ldat_scas_eq, int64_t)\n+#undef _AMO_ERR_CMPSWP\n+#endif\n+\n /* Enumeration of the STWAT/STDAT sub-opcodes. */\n enum _AMO_ST {\n _AMO_ST_ADD\t\t= 0x00,\t\t/* Store Add. */\ndiff --git a/gcc/doc/extend.texi b/gcc/doc/extend.texi\nindex c70bcd3952f..8a0f03c8a9b 100644\n--- a/gcc/doc/extend.texi\n+++ b/gcc/doc/extend.texi\n@@ -26939,6 +26939,24 @@ void amo_stdat_smin (int64_t *, int64_t);\n void amo_stdat_stwin (int64_t *, int64_t);\n @end smallexample\n \n+Future ISA of the PowerPC added new atomic memory operation (AMO) instructions.\n+\n+The AMO functions described in this section may be available on future PowerPC\n+processors. At present, these functions exist to allow testing of new\n+instructions. There is no guarantee that these instructions will actually be\n+implemented.\n+\n+The functions supported are:\n+\n+@smallexample\n+#include <amo.h>\n+\n+uint32_t amo_lwat_cas_eq (uint32_t *, uint32_t, uint32_t);\n+int32_t amo_lwat_scas_eq (int32_t *, int32_t, int32_t);\n+uint64_t amo_ldat_cas_eq (uint64_t *, uint64_t, uint64_t);\n+int64_t amo_ldat_scas_eq (int64_t *, int64_t, int64_t);\n+@end smallexample\n+\n @node PowerPC Matrix-Multiply Assist Built-in Functions\n @subsection PowerPC Matrix-Multiply Assist Built-in Functions\n ISA 3.1 of the PowerPC added new Matrix-Multiply Assist (MMA) instructions.\ndiff --git a/gcc/testsuite/gcc.target/powerpc/amo8.c b/gcc/testsuite/gcc.target/powerpc/amo8.c\nnew file mode 100644\nindex 00000000000..e29b4800278\n--- /dev/null\n+++ b/gcc/testsuite/gcc.target/powerpc/amo8.c\n@@ -0,0 +1,35 @@\n+/* { dg-do compile } */\n+/* { dg-options \"-mdejagnu-cpu=future -O2\" } */\n+\n+#include <amo.h>\n+#include <stdint.h>\n+\n+/* Test whether the compiler generates expected code for the ISA <future> AMO\n+ (atomic memory operations) functions */\n+\n+uint32_t\n+do_lw_cs_eq (uint32_t *mem, uint32_t cond, uint32_t value)\n+{\n+ return amo_lwat_cas_eq (mem, cond, value);\n+}\n+\n+int32_t\n+do_lw_scs_eq (int32_t *mem, int32_t cond, int32_t value)\n+{\n+ return amo_lwat_scas_eq (mem, cond, value);\n+}\n+\n+uint64_t\n+do_ld_cs_eq (uint64_t *mem, uint64_t cond, uint64_t value)\n+{\n+ return amo_ldat_cas_eq (mem, cond, value);\n+}\n+\n+int64_t\n+do_ld_scs_eq (int64_t *mem, int64_t cond, int64_t value)\n+{\n+ return amo_ldat_scas_eq (mem, cond, value);\n+}\n+\n+/* { dg-final { scan-assembler-times {\\mlwat\\M} 2 } } */\n+/* { dg-final { scan-assembler-times {\\mldat\\M} 2 } } */\n", "prefixes": [ "V2" ] }