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GET /api/patches/2225423/?format=api
{ "id": 2225423, "url": "http://patchwork.ozlabs.org/api/patches/2225423/?format=api", "web_url": "http://patchwork.ozlabs.org/project/gcc/patch/aebnle_ToWvLZSdy@cowardly-lion.the-meissners.org/", "project": { "id": 17, "url": "http://patchwork.ozlabs.org/api/projects/17/?format=api", "name": "GNU Compiler Collection", "link_name": "gcc", "list_id": "gcc-patches.gcc.gnu.org", "list_email": "gcc-patches@gcc.gnu.org", "web_url": null, "scm_url": null, "webscm_url": null, "list_archive_url": "", "list_archive_url_format": "", "commit_url_format": "" }, "msgid": "<aebnle_ToWvLZSdy@cowardly-lion.the-meissners.org>", "list_archive_url": null, "date": "2026-04-21T02:57:25", "name": "GCC 17.0 PowerPC patches V6 [PATCH 1/5]: Use vector pair load/store for memcpy with -mcpu=future", "commit_ref": null, "pull_url": null, "state": "new", "archived": false, "hash": "1048bdc6d7fff189a1aaccafc13af410682a9d28", "submitter": { "id": 73991, "url": "http://patchwork.ozlabs.org/api/people/73991/?format=api", "name": "Michael Meissner", "email": "meissner@linux.ibm.com" }, "delegate": null, "mbox": "http://patchwork.ozlabs.org/project/gcc/patch/aebnle_ToWvLZSdy@cowardly-lion.the-meissners.org/mbox/", "series": [ { "id": 500715, "url": "http://patchwork.ozlabs.org/api/series/500715/?format=api", "web_url": "http://patchwork.ozlabs.org/project/gcc/list/?series=500715", "date": "2026-04-21T02:57:25", "name": "GCC 17.0 PowerPC patches V6 [PATCH 1/5]: Use vector pair load/store for memcpy with -mcpu=future", "version": 1, "mbox": "http://patchwork.ozlabs.org/series/500715/mbox/" } ], "comments": "http://patchwork.ozlabs.org/api/patches/2225423/comments/", "check": "pending", "checks": "http://patchwork.ozlabs.org/api/patches/2225423/checks/", "tags": {}, "related": [], "headers": { "Return-Path": "<gcc-patches-bounces~incoming=patchwork.ozlabs.org@gcc.gnu.org>", "X-Original-To": [ "incoming@patchwork.ozlabs.org", "gcc-patches@gcc.gnu.org" ], "Delivered-To": [ "patchwork-incoming@legolas.ozlabs.org", "gcc-patches@gcc.gnu.org" ], "Authentication-Results": [ "legolas.ozlabs.org;\n\tdkim=pass (2048-bit key;\n unprotected) header.d=ibm.com header.i=@ibm.com header.a=rsa-sha256\n header.s=pp1 header.b=USoTM3r7;\n\tdkim-atps=neutral", "legolas.ozlabs.org;\n spf=pass (sender SPF authorized) smtp.mailfrom=gcc.gnu.org\n (client-ip=2620:52:6:3111::32; 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a=rsa-sha256; d=sourceware.org; s=key; t=1776740254; cv=none;\n b=Q/E/EOUA5SVdBX3jduqjrIg+odPzCAoLOW4Hus4zmGrVTvFPLDeS1c90ep/Nu+gzbxqoqp/j6rzDj127Es+PPXKfizd9WwJ3YCdL02LtznYOkd/jR6a8ndy8wJy4adn+QYM2BMQkrMo5fmgVjEfEe5qTUfdGou+3qYEY1pmmLDA=", "ARC-Message-Signature": "i=1; a=rsa-sha256; d=sourceware.org; s=key;\n t=1776740254; c=relaxed/simple;\n bh=yDQF1R8JSvQyY5NeCUSGXVSMEVe9muSbx0A1qjfaodg=;\n h=DKIM-Signature:Date:From:To:Subject:Message-ID:MIME-Version;\n b=crkGlqMkIXxP+4y3okRBV0tKEtQ+UQgBKY9hnRm7IVHcjlIveWsgl65VTPPTHQwc4Po2ib9EFCfWqLYVyeri7wPUDp84EVQKDR1vxEagYcn4zgCGwjbms8kldzEEqxi1+ADlWEkthAgGV5IIVZ7mmioAaBp4UApiYERLUHa+TrY=", "ARC-Authentication-Results": "i=1; server2.sourceware.org", "DKIM-Signature": "v=1; a=rsa-sha256; c=relaxed/relaxed; d=ibm.com; h=\n content-type:date:from:in-reply-to:message-id:mime-version\n :references:subject:to; s=pp1; bh=QI6piRs/kGQ47Zk1yPXO+5WUwUpkkM\n yDTqCkoPj4jRk=; b=USoTM3r7/jeclOBe7YJgTNiCoKz2sN+VGzTFInXvqbkeY5\n 3oYpDJPEGtDaXb0N+V34XZvC1K/CO8r/jBdLpIZ6UtveXzZxq+wksb8BUUcRzots\n tA5qtSsN4lbqavsWIR3NSpHw0uvFpswoSs0xIsKZQLBB//4/h0W5jAWVYMZA+Vv+\n DqB7rwV3yfosOhfhhNkWg8pbitGEsS80hnrYIiXuBOWbk1rLPzriD6vweUKXYliZ\n XqbgUG7Uc+BAs1hmI0q0Cydu2SnM2wscm5hJaL4Iaes8ZOarIeBEf4Fud3tNED50\n /HCctypChzvTVHV0jRUBe+GL2zDcV346NaxBBKqQ==", "Date": "Mon, 20 Apr 2026 22:57:25 -0400", "From": "Michael Meissner <meissner@linux.ibm.com>", "To": "Michael Meissner <meissner@linux.ibm.com>, gcc-patches@gcc.gnu.org,\n Segher Boessenkool <segher@kernel.crashing.org>,\n jeevitha <jeevitha@linux.ibm.com>,\n Surya Kumari Jangala <jskumari@linux.ibm.com>,\n Kishan Parmar <kishan@linux.ibm.com>,\n Avinash Jayakar <avinashd@linux.ibm.com>,\n Ayappan Perumal <ayappap2@in.ibm.com>,\n Juergen Christ <jchrist@linux.ibm.com>", "Subject": "GCC 17.0 PowerPC patches V6 [PATCH 1/5]: Use vector pair load/store\n for memcpy with -mcpu=future", "Message-ID": "<aebnle_ToWvLZSdy@cowardly-lion.the-meissners.org>", "Mail-Followup-To": "Michael Meissner <meissner@linux.ibm.com>,\n gcc-patches@gcc.gnu.org,\n Segher Boessenkool <segher@kernel.crashing.org>,\n jeevitha <jeevitha@linux.ibm.com>,\n Surya Kumari Jangala <jskumari@linux.ibm.com>,\n Kishan Parmar <kishan@linux.ibm.com>,\n Avinash Jayakar <avinashd@linux.ibm.com>,\n Ayappan Perumal <ayappap2@in.ibm.com>,\n Juergen Christ <jchrist@linux.ibm.com>", "References": "<aebT1QQbPenBOFeH@cowardly-lion.the-meissners.org>\n <aebmUidtQeOwvHIY@cowardly-lion.the-meissners.org>", "MIME-Version": "1.0", "Content-Type": "text/plain; charset=us-ascii", "Content-Disposition": "inline", "In-Reply-To": "<aebmUidtQeOwvHIY@cowardly-lion.the-meissners.org>", "X-TM-AS-GCONF": "00", "X-Proofpoint-Spam-Details-Enc": "AW1haW4tMjYwNDIxMDAyNiBTYWx0ZWRfX96YFt+Vvn1CZ\n +wT8lhhWlQdxTLlgeNYjWwiuB7RTk3+SAmJCUXK5+ehZwuUrkGdlbBrAyo2E8XqsMsx7au/YHp8\n UOygO/guh7AtmI+ZafATHx60xxrA0MCYW97M9Pbc8c82dgFXuWFkQE3abhQZtiIEIXMbUfXjI89\n LHOPXg1KTpJT/YkSx4XfkGVkx+SOsO6mahmkAM2lMztHaCeRT5tqMFTn7fvOK9GoNeE+m2AMysw\n f3+vsKz6mdp6S/7jikYj2ha09tNf1RtB3XG7k0a8E2pJuxVIA37/1EV9Yr62NDV7eCUBCDLtImk\n jpeUSNwI+Ji0MmrdLD23wMhR878kDY+eaaybi9CVFjhJm5IsNnF1JtkQwSGACwmsaLgZFrOd7oR\n yvf2zmgVbu3AZD6YjVv6LB3u/PSNgn1FDk3kbc4xeS4Gn/M9BW0JG2QqwuMo0GR1gwoYCM38cBw\n lDuaBv6MuP1sCTnvDLQ==", "X-Proofpoint-GUID": "nB9e0norgkXIG46gHiKPLntA8k_ii-DP", "X-Authority-Analysis": "v=2.4 cv=SOJykuvH c=1 sm=1 tr=0 ts=69e6e79c cx=c_pps\n a=5BHTudwdYE3Te8bg5FgnPg==:117 a=5BHTudwdYE3Te8bg5FgnPg==:17\n a=kj9zAlcOel0A:10 a=A5OVakUREuEA:10 a=VkNPw1HP01LnGYTKEx00:22\n a=RnoormkPH1_aCDwRdu11:22 a=uAbxVGIbfxUO_5tXvNgY:22 a=mDV3o1hIAAAA:8\n a=VnNF1IyMAAAA:8 a=YQM_uYt39cxvAERtK8MA:9 a=CjuIK1q_8ugA:10", "X-Proofpoint-ORIG-GUID": "nB9e0norgkXIG46gHiKPLntA8k_ii-DP", "X-Proofpoint-Virus-Version": "vendor=baseguard\n engine=ICAP:2.0.293,Aquarius:18.0.1143,Hydra:6.1.51,FMLib:17.12.100.49\n definitions=2026-04-20_05,2026-04-20_02,2025-10-01_01", "X-Proofpoint-Spam-Details": "rule=outbound_notspam policy=outbound score=0\n malwarescore=0 spamscore=0 priorityscore=1501 lowpriorityscore=0\n clxscore=1015 phishscore=0 suspectscore=0 adultscore=0 impostorscore=0\n bulkscore=0 classifier=typeunknown authscore=0 authtc= authcc= route=outbound\n adjust=0 reason=mlx scancount=1 engine=8.22.0-2604070000\n definitions=main-2604210026", "X-BeenThere": "gcc-patches@gcc.gnu.org", "X-Mailman-Version": "2.1.30", "Precedence": "list", "List-Id": "Gcc-patches mailing list <gcc-patches.gcc.gnu.org>", "List-Unsubscribe": "<https://gcc.gnu.org/mailman/options/gcc-patches>,\n <mailto:gcc-patches-request@gcc.gnu.org?subject=unsubscribe>", "List-Archive": "<https://gcc.gnu.org/pipermail/gcc-patches/>", "List-Post": "<mailto:gcc-patches@gcc.gnu.org>", "List-Help": "<mailto:gcc-patches-request@gcc.gnu.org?subject=help>", "List-Subscribe": "<https://gcc.gnu.org/mailman/listinfo/gcc-patches>,\n <mailto:gcc-patches-request@gcc.gnu.org?subject=subscribe>", "Errors-To": "gcc-patches-bounces~incoming=patchwork.ozlabs.org@gcc.gnu.org" }, "content": "In the development for the power10 processor, GCC did not enable using the load\nvector pair and store vector pair instructions when optimizing things like\nmemory copy. This patch enables using those instructions if -mcpu=future is\nused.\n\nThis patch needs the -mcpu=future patch posted on April 8th, 2026:\n\n * https://gcc.gnu.org/pipermail/gcc-patches/2026-April/712532.html\n\nI have built bootstrap little endian compilers on power10 systems, and\nbig endian compiler on power9 systems. There were no regression in the\ntests. Can I add the patches to the GCC trunk after the -mcpu=future\npatch is applied and GCC 17 has opened up?\n\n2026-04-20 Michael Meissner <meissner@linux.ibm.com>\n\ngcc/\n\n\t* config/rs6000/rs6000-cpus.def (FUTURE_MASKS_SERVER): Enable using load\n\tvector pair and store vector pair instructions for memory copy\n\toperations.\n\t(POWERPC_MASKS): Make the option for enabling using load vector pair and\n\tstore vector pair operations set and reset when the PowerPC processor is\n\tchanged.\n\t* config/rs6000/rs6000.cc (rs6000_machine_from_flags): Disable\n\t-mblock-ops-vector-pair from influencing .machine selection.\n\ngcc/testsuite/\n\n\t* gcc.target/powerpc/future-3.c: New test.\n---\n gcc/config/rs6000/rs6000-cpus.def | 9 ++++++++-\n gcc/config/rs6000/rs6000.cc | 2 +-\n gcc/testsuite/gcc.target/powerpc/future-3.c | 22 +++++++++++++++++++++\n 3 files changed, 31 insertions(+), 2 deletions(-)\n create mode 100644 gcc/testsuite/gcc.target/powerpc/future-3.c", "diff": "diff --git a/gcc/config/rs6000/rs6000-cpus.def b/gcc/config/rs6000/rs6000-cpus.def\nindex a110860acce..dc67e287672 100644\n--- a/gcc/config/rs6000/rs6000-cpus.def\n+++ b/gcc/config/rs6000/rs6000-cpus.def\n@@ -83,8 +83,14 @@\n #define POWER11_MASKS_SERVER (ISA_3_1_MASKS_SERVER\t\t\t\\\n \t\t\t | OPTION_MASK_POWER11)\n \n-/* -mcpu=future flags. */\n+/* -mcpu=future flags.\n+\n+ During the development of the power10 support for GCC, using load/store\n+ vector pair instructions for string operations was turned off by default,\n+ because there was a use case that had really bad performance. Assume this\n+ will be fixed in potential future machines. */\n #define FUTURE_MASKS_SERVER\t(POWER11_MASKS_SERVER\t\t\t\\\n+\t\t\t\t | OPTION_MASK_BLOCK_OPS_VECTOR_PAIR\t\\\n \t\t\t\t | OPTION_MASK_FUTURE)\n \n /* Flags that need to be turned off if -mno-vsx. */\n@@ -115,6 +121,7 @@\n \n /* Mask of all options to set the default isa flags based on -mcpu=<xxx>. */\n #define POWERPC_MASKS\t\t(OPTION_MASK_ALTIVEC\t\t\t\\\n+\t\t\t\t | OPTION_MASK_BLOCK_OPS_VECTOR_PAIR\t\\\n \t\t\t\t | OPTION_MASK_CMPB\t\t\t\\\n \t\t\t\t | OPTION_MASK_CRYPTO\t\t\t\\\n \t\t\t\t | OPTION_MASK_DFP\t\t\t\\\ndiff --git a/gcc/config/rs6000/rs6000.cc b/gcc/config/rs6000/rs6000.cc\nindex 7d61001cb34..4999cb6f54e 100644\n--- a/gcc/config/rs6000/rs6000.cc\n+++ b/gcc/config/rs6000/rs6000.cc\n@@ -5911,7 +5911,7 @@ rs6000_machine_from_flags (void)\n \n /* Disable the flags that should never influence the .machine selection. */\n flags &= ~(OPTION_MASK_PPC_GFXOPT | OPTION_MASK_PPC_GPOPT | OPTION_MASK_ISEL\n-\t | OPTION_MASK_ALTIVEC);\n+\t | OPTION_MASK_ALTIVEC | OPTION_MASK_BLOCK_OPS_VECTOR_PAIR);\n \n if ((flags & (FUTURE_MASKS_SERVER & ~POWER11_MASKS_SERVER)) != 0)\n return \"future\";\ndiff --git a/gcc/testsuite/gcc.target/powerpc/future-3.c b/gcc/testsuite/gcc.target/powerpc/future-3.c\nnew file mode 100644\nindex 00000000000..afa22228b96\n--- /dev/null\n+++ b/gcc/testsuite/gcc.target/powerpc/future-3.c\n@@ -0,0 +1,22 @@\n+/* 32-bit doesn't generate vector pair instructions. */\n+/* { dg-do compile { target lp64 } } */\n+/* { dg-options \"-mdejagnu-cpu=future -O2\" } */\n+\n+/* Test to see that memcpy will use load/store vector pair with\n+ -mcpu=future. */\n+\n+#ifndef SIZE\n+#define SIZE 4\n+#endif\n+\n+extern vector double to[SIZE], from[SIZE];\n+\n+void\n+copy (void)\n+{\n+ __builtin_memcpy (to, from, sizeof (to));\n+ return;\n+}\n+\n+/* { dg-final { scan-assembler {\\mlxvpx?\\M} } } */\n+/* { dg-final { scan-assembler {\\mstxvpx?\\M} } } */\n", "prefixes": [] }