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GET /api/patches/2225360/?format=api
{ "id": 2225360, "url": "http://patchwork.ozlabs.org/api/patches/2225360/?format=api", "web_url": "http://patchwork.ozlabs.org/project/linux-gpio/patch/20260420213529.1645560-9-l.scorcia@gmail.com/", "project": { "id": 42, "url": "http://patchwork.ozlabs.org/api/projects/42/?format=api", "name": "Linux GPIO development", "link_name": "linux-gpio", "list_id": "linux-gpio.vger.kernel.org", "list_email": "linux-gpio@vger.kernel.org", "web_url": "", "scm_url": "", "webscm_url": "", "list_archive_url": "", "list_archive_url_format": "", "commit_url_format": "" }, "msgid": "<20260420213529.1645560-9-l.scorcia@gmail.com>", "list_archive_url": null, "date": "2026-04-20T21:30:07", "name": "[v5,8/9] pinctrl: mediatek: mt6397: Add MediaTek MT6392", "commit_ref": null, "pull_url": null, "state": "new", "archived": false, "hash": "2f36218b4a767b1e11f85c31704720daead77f10", "submitter": { "id": 92693, "url": "http://patchwork.ozlabs.org/api/people/92693/?format=api", "name": "Luca Leonardo Scorcia", "email": "l.scorcia@gmail.com" }, "delegate": null, "mbox": "http://patchwork.ozlabs.org/project/linux-gpio/patch/20260420213529.1645560-9-l.scorcia@gmail.com/mbox/", "series": [ { "id": 500687, "url": "http://patchwork.ozlabs.org/api/series/500687/?format=api", "web_url": "http://patchwork.ozlabs.org/project/linux-gpio/list/?series=500687", "date": "2026-04-20T21:30:02", "name": "Add support for MT6392 PMIC", "version": 5, "mbox": "http://patchwork.ozlabs.org/series/500687/mbox/" } ], "comments": "http://patchwork.ozlabs.org/api/patches/2225360/comments/", "check": "pending", "checks": "http://patchwork.ozlabs.org/api/patches/2225360/checks/", "tags": {}, "related": [], "headers": { "Return-Path": "\n <linux-gpio+bounces-35284-incoming=patchwork.ozlabs.org@vger.kernel.org>", "X-Original-To": [ "incoming@patchwork.ozlabs.org", "linux-gpio@vger.kernel.org" ], "Delivered-To": "patchwork-incoming@legolas.ozlabs.org", "Authentication-Results": [ "legolas.ozlabs.org;\n\tdkim=pass (2048-bit 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Kozlowski <krzk+dt@kernel.org>,\n\tConor Dooley <conor+dt@kernel.org>,\n\tSen Chu <sen.chu@mediatek.com>,\n\tSean Wang <sean.wang@mediatek.com>,\n\tMacpaul Lin <macpaul.lin@mediatek.com>,\n\tLee Jones <lee@kernel.org>,\n\tMatthias Brugger <matthias.bgg@gmail.com>,\n\tLinus Walleij <linusw@kernel.org>,\n\tLiam Girdwood <lgirdwood@gmail.com>,\n\tMark Brown <broonie@kernel.org>,\n\tGary Bisson <bisson.gary@gmail.com>,\n\tLouis-Alexis Eyraud <louisalexis.eyraud@collabora.com>,\n\tJulien Massot <julien.massot@collabora.com>,\n\tVal Packett <val@packett.cool>,\n\tFabien Parent <parent.f@gmail.com>,\n\tAkari Tsuyukusa <akkun11.open@gmail.com>,\n\tChen Zhong <chen.zhong@mediatek.com>,\n\tlinux-input@vger.kernel.org,\n\tdevicetree@vger.kernel.org,\n\tlinux-kernel@vger.kernel.org,\n\tlinux-pm@vger.kernel.org,\n\tlinux-arm-kernel@lists.infradead.org,\n\tlinux-gpio@vger.kernel.org", "Subject": "[PATCH v5 8/9] pinctrl: mediatek: mt6397: Add MediaTek MT6392", "Date": "Mon, 20 Apr 2026 22:30:07 +0100", "Message-ID": "<20260420213529.1645560-9-l.scorcia@gmail.com>", "X-Mailer": "git-send-email 2.43.0", "In-Reply-To": "<20260420213529.1645560-1-l.scorcia@gmail.com>", "References": "<20260420213529.1645560-1-l.scorcia@gmail.com>", "Precedence": "bulk", "X-Mailing-List": "linux-gpio@vger.kernel.org", "List-Id": "<linux-gpio.vger.kernel.org>", "List-Subscribe": "<mailto:linux-gpio+subscribe@vger.kernel.org>", "List-Unsubscribe": "<mailto:linux-gpio+unsubscribe@vger.kernel.org>", "MIME-Version": "1.0", "Content-Transfer-Encoding": "8bit" }, "content": "Add support for the MT6392 pinctrl device, which is very similar to\nMT6397 with a handful of different property values and its own pins\ndefinition.\n\nUpdate the MT6397 driver to retrieve device data from the match table and\nuse it for driver init.\n\nSigned-off-by: Luca Leonardo Scorcia <l.scorcia@gmail.com>\nReviewed-by: AngeloGioacchino Del Regno <angelogioacchino.delregno@collabora.com>\n---\n drivers/pinctrl/mediatek/pinctrl-mt6397.c | 37 ++++++++++-\n drivers/pinctrl/mediatek/pinctrl-mtk-mt6392.h | 64 +++++++++++++++++++\n 2 files changed, 99 insertions(+), 2 deletions(-)\n create mode 100644 drivers/pinctrl/mediatek/pinctrl-mtk-mt6392.h", "diff": "diff --git a/drivers/pinctrl/mediatek/pinctrl-mt6397.c b/drivers/pinctrl/mediatek/pinctrl-mt6397.c\nindex 03d0f65d7bcc..8ba02e70595c 100644\n--- a/drivers/pinctrl/mediatek/pinctrl-mt6397.c\n+++ b/drivers/pinctrl/mediatek/pinctrl-mt6397.c\n@@ -12,10 +12,32 @@\n #include <linux/mfd/mt6397/core.h>\n \n #include \"pinctrl-mtk-common.h\"\n+#include \"pinctrl-mtk-mt6392.h\"\n #include \"pinctrl-mtk-mt6397.h\"\n \n #define MT6397_PIN_REG_BASE 0xc000\n \n+static const struct mtk_pinctrl_devdata mt6392_pinctrl_data = {\n+\t.pins = mtk_pins_mt6392,\n+\t.npins = ARRAY_SIZE(mtk_pins_mt6392),\n+\t.dir_offset = (MT6397_PIN_REG_BASE + 0x000),\n+\t.ies_offset = MTK_PINCTRL_NOT_SUPPORT,\n+\t.smt_offset = MTK_PINCTRL_NOT_SUPPORT,\n+\t.pullen_offset = (MT6397_PIN_REG_BASE + 0x020),\n+\t.pullsel_offset = (MT6397_PIN_REG_BASE + 0x040),\n+\t.dout_offset = (MT6397_PIN_REG_BASE + 0x080),\n+\t.din_offset = (MT6397_PIN_REG_BASE + 0x0a0),\n+\t.pinmux_offset = (MT6397_PIN_REG_BASE + 0x0c0),\n+\t.type1_start = 7,\n+\t.type1_end = 7,\n+\t.port_shf = 3,\n+\t.port_mask = 0x3,\n+\t.port_align = 2,\n+\t.mode_mask = 0xf,\n+\t.mode_per_reg = 5,\n+\t.mode_shf = 4,\n+};\n+\n static const struct mtk_pinctrl_devdata mt6397_pinctrl_data = {\n \t.pins = mtk_pins_mt6397,\n \t.npins = ARRAY_SIZE(mtk_pins_mt6397),\n@@ -40,13 +62,24 @@ static const struct mtk_pinctrl_devdata mt6397_pinctrl_data = {\n static int mt6397_pinctrl_probe(struct platform_device *pdev)\n {\n \tstruct mt6397_chip *mt6397;\n+\tconst struct mtk_pinctrl_devdata *data;\n+\n+\tdata = device_get_match_data(&pdev->dev);\n+\tif (!data)\n+\t\treturn -ENOENT;\n \n \tmt6397 = dev_get_drvdata(pdev->dev.parent);\n-\treturn mtk_pctrl_init(pdev, &mt6397_pinctrl_data, mt6397->regmap);\n+\treturn mtk_pctrl_init(pdev, data, mt6397->regmap);\n }\n \n static const struct of_device_id mt6397_pctrl_match[] = {\n-\t{ .compatible = \"mediatek,mt6397-pinctrl\", },\n+\t{\n+\t\t.compatible = \"mediatek,mt6392-pinctrl\",\n+\t\t.data = &mt6392_pinctrl_data\n+\t}, {\n+\t\t.compatible = \"mediatek,mt6397-pinctrl\",\n+\t\t.data = &mt6397_pinctrl_data\n+\t},\n \t{ }\n };\n \ndiff --git a/drivers/pinctrl/mediatek/pinctrl-mtk-mt6392.h b/drivers/pinctrl/mediatek/pinctrl-mtk-mt6392.h\nnew file mode 100644\nindex 000000000000..e7241af28fdb\n--- /dev/null\n+++ b/drivers/pinctrl/mediatek/pinctrl-mtk-mt6392.h\n@@ -0,0 +1,64 @@\n+/* SPDX-License-Identifier: GPL-2.0 */\n+#ifndef __PINCTRL_MTK_MT6392_H\n+#define __PINCTRL_MTK_MT6392_H\n+\n+#include <linux/pinctrl/pinctrl.h>\n+#include \"pinctrl-mtk-common.h\"\n+\n+static const struct mtk_desc_pin mtk_pins_mt6392[] = {\n+\tMTK_PIN(PINCTRL_PIN(0, \"INT\"),\n+\t\tNULL, \"mt6392\",\n+\t\tMTK_EINT_FUNCTION(NO_EINT_SUPPORT, NO_EINT_SUPPORT),\n+\t\tMTK_FUNCTION(0, \"GPIO0\"),\n+\t\tMTK_FUNCTION(1, \"INT\"),\n+\t\tMTK_FUNCTION(5, \"TEST_CK2\"),\n+\t\tMTK_FUNCTION(6, \"TEST_IN1\"),\n+\t\tMTK_FUNCTION(7, \"TEST_OUT1\")\n+\t),\n+\tMTK_PIN(PINCTRL_PIN(1, \"SRCLKEN\"),\n+\t\tNULL, \"mt6392\",\n+\t\tMTK_EINT_FUNCTION(NO_EINT_SUPPORT, NO_EINT_SUPPORT),\n+\t\tMTK_FUNCTION(0, \"GPIO1\"),\n+\t\tMTK_FUNCTION(1, \"SRCLKEN\"),\n+\t\tMTK_FUNCTION(5, \"TEST_CK0\"),\n+\t\tMTK_FUNCTION(6, \"TEST_IN2\"),\n+\t\tMTK_FUNCTION(7, \"TEST_OUT2\")\n+\t),\n+\tMTK_PIN(PINCTRL_PIN(2, \"RTC_32K1V8\"),\n+\t\tNULL, \"mt6392\",\n+\t\tMTK_EINT_FUNCTION(NO_EINT_SUPPORT, NO_EINT_SUPPORT),\n+\t\tMTK_FUNCTION(0, \"GPIO2\"),\n+\t\tMTK_FUNCTION(1, \"RTC_32K1V8\"),\n+\t\tMTK_FUNCTION(5, \"TEST_CK1\"),\n+\t\tMTK_FUNCTION(6, \"TEST_IN3\"),\n+\t\tMTK_FUNCTION(7, \"TEST_OUT3\")\n+\t),\n+\tMTK_PIN(PINCTRL_PIN(3, \"SPI_CLK\"),\n+\t\tNULL, \"mt6392\",\n+\t\tMTK_EINT_FUNCTION(NO_EINT_SUPPORT, NO_EINT_SUPPORT),\n+\t\tMTK_FUNCTION(0, \"GPIO3\"),\n+\t\tMTK_FUNCTION(1, \"SPI_CLK\")\n+\t),\n+\tMTK_PIN(PINCTRL_PIN(4, \"SPI_CSN\"),\n+\t\tNULL, \"mt6392\",\n+\t\tMTK_EINT_FUNCTION(NO_EINT_SUPPORT, NO_EINT_SUPPORT),\n+\t\tMTK_FUNCTION(0, \"GPIO4\"),\n+\t\tMTK_FUNCTION(1, \"SPI_CSN\")\n+\t),\n+\tMTK_PIN(PINCTRL_PIN(5, \"SPI_MOSI\"),\n+\t\tNULL, \"mt6392\",\n+\t\tMTK_EINT_FUNCTION(NO_EINT_SUPPORT, NO_EINT_SUPPORT),\n+\t\tMTK_FUNCTION(0, \"GPIO5\"),\n+\t\tMTK_FUNCTION(1, \"SPI_MOSI\")\n+\t),\n+\tMTK_PIN(PINCTRL_PIN(6, \"SPI_MISO\"),\n+\t\tNULL, \"mt6392\",\n+\t\tMTK_EINT_FUNCTION(NO_EINT_SUPPORT, NO_EINT_SUPPORT),\n+\t\tMTK_FUNCTION(0, \"GPIO6\"),\n+\t\tMTK_FUNCTION(1, \"SPI_MISO\"),\n+\t\tMTK_FUNCTION(6, \"TEST_IN4\"),\n+\t\tMTK_FUNCTION(7, \"TEST_OUT4\")\n+\t),\n+};\n+\n+#endif /* __PINCTRL_MTK_MT6392_H */\n", "prefixes": [ "v5", "8/9" ] }