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GET /api/patches/2225357/?format=api
{ "id": 2225357, "url": "http://patchwork.ozlabs.org/api/patches/2225357/?format=api", "web_url": "http://patchwork.ozlabs.org/project/linux-gpio/patch/20260420213529.1645560-5-l.scorcia@gmail.com/", "project": { "id": 42, "url": "http://patchwork.ozlabs.org/api/projects/42/?format=api", "name": "Linux GPIO development", "link_name": "linux-gpio", "list_id": "linux-gpio.vger.kernel.org", "list_email": "linux-gpio@vger.kernel.org", "web_url": "", "scm_url": "", "webscm_url": "", "list_archive_url": "", "list_archive_url_format": "", "commit_url_format": "" }, "msgid": "<20260420213529.1645560-5-l.scorcia@gmail.com>", "list_archive_url": null, "date": "2026-04-20T21:30:03", "name": "[v5,4/9] dt-bindings: pinctrl: mediatek,mt65xx: Add MT6392 pinctrl", "commit_ref": null, "pull_url": null, "state": "new", "archived": false, "hash": "272e7a783e846a3f0866e495b9d61e52f3a23d96", "submitter": { "id": 92693, "url": "http://patchwork.ozlabs.org/api/people/92693/?format=api", "name": "Luca Leonardo Scorcia", "email": "l.scorcia@gmail.com" }, "delegate": null, "mbox": "http://patchwork.ozlabs.org/project/linux-gpio/patch/20260420213529.1645560-5-l.scorcia@gmail.com/mbox/", "series": [ { "id": 500687, "url": "http://patchwork.ozlabs.org/api/series/500687/?format=api", "web_url": "http://patchwork.ozlabs.org/project/linux-gpio/list/?series=500687", "date": "2026-04-20T21:30:02", "name": "Add support for MT6392 PMIC", "version": 5, "mbox": "http://patchwork.ozlabs.org/series/500687/mbox/" } ], "comments": "http://patchwork.ozlabs.org/api/patches/2225357/comments/", "check": "pending", "checks": "http://patchwork.ozlabs.org/api/patches/2225357/checks/", "tags": {}, "related": [], "headers": { "Return-Path": "\n <linux-gpio+bounces-35280-incoming=patchwork.ozlabs.org@vger.kernel.org>", "X-Original-To": [ "incoming@patchwork.ozlabs.org", "linux-gpio@vger.kernel.org" ], "Delivered-To": "patchwork-incoming@legolas.ozlabs.org", "Authentication-Results": [ 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AFNElJ+E/M01rpbzXjdawcKQjj2k6ko6FO1Os5A9qUqqw6p8RXJ46Va4ga851W0dNweyk5vHzEvAn52Xixlk@vger.kernel.org", "X-Gm-Message-State": "AOJu0YyzKDlC01mDj+FAejLBfwQ8pX7Ivo3JVNcm6ubr+tmHeL9sCEzN\n\tXU27tlDW1v1T9dLg6uez2oi97quf2BYRYFwzoihyCyofb11vNtJRbn64", "X-Gm-Gg": "AeBDievcltxIsQNBNzBHcsc23+evVbBSaDbODMSWLBdnX0PwmZVqgg724KwmjzJOf7a\n\tJDcpm0y9+UisriEMXr//gEm1SPN28ZEmqJWCkBGEhCIuxBrlJLHrN74wKk5/1me87OnAIYFceUP\n\ta2rmKomn2JnnQz8rvURK1arS3fclVl/YXR29OylpXeQUCxnzQjakEPtL5MzrxrfAPr+jlpwD48V\n\taujaPXklN4VFWt9B2Ny66wgKAA2qicuawBJygBedwX2ozTTiCM/GZHD1OOvONTa2gM2SBGQ5dY/\n\tADIZLVFmPEsRIwaY5gmReF9qtqd3wtFQahRCs/qgjN+jBqVl0BKsuBQ2Gb8CGgRU9by9b+sjc+g\n\tNSLcYwJdD0bd6/mXL0qcvh8w9qpCkT38b0J1/rHuQmFP0SRgDHZSz2JMUif5/udCyCN4BxTvmys\n\ttSusitAW0TvtksLPYCk7dCG5eOU7s5HA==", "X-Received": "by 2002:a05:600c:8115:b0:488:ac01:72b6 with SMTP id\n 5b1f17b1804b1-488fb77d7d3mr178338515e9.21.1776721070421;\n Mon, 20 Apr 2026 14:37:50 -0700 (PDT)", "From": "Luca Leonardo Scorcia <l.scorcia@gmail.com>", "To": "linux-mediatek@lists.infradead.org", "Cc": "Luca Leonardo Scorcia <l.scorcia@gmail.com>,\n\tAngeloGioacchino Del Regno <angelogioacchino.delregno@collabora.com>,\n\tDmitry Torokhov <dmitry.torokhov@gmail.com>,\n\tRob Herring <robh@kernel.org>,\n\tKrzysztof Kozlowski <krzk+dt@kernel.org>,\n\tConor Dooley <conor+dt@kernel.org>,\n\tSen Chu <sen.chu@mediatek.com>,\n\tSean Wang <sean.wang@mediatek.com>,\n\tMacpaul Lin <macpaul.lin@mediatek.com>,\n\tLee Jones <lee@kernel.org>,\n\tMatthias Brugger <matthias.bgg@gmail.com>,\n\tLinus Walleij <linusw@kernel.org>,\n\tLiam Girdwood <lgirdwood@gmail.com>,\n\tMark Brown <broonie@kernel.org>,\n\tLouis-Alexis Eyraud <louisalexis.eyraud@collabora.com>,\n\tGary Bisson <bisson.gary@gmail.com>,\n\tVal Packett <val@packett.cool>,\n\tJulien Massot <julien.massot@collabora.com>,\n\tFabien Parent <parent.f@gmail.com>,\n\tAkari Tsuyukusa <akkun11.open@gmail.com>,\n\tChen Zhong <chen.zhong@mediatek.com>,\n\tlinux-input@vger.kernel.org,\n\tdevicetree@vger.kernel.org,\n\tlinux-kernel@vger.kernel.org,\n\tlinux-pm@vger.kernel.org,\n\tlinux-arm-kernel@lists.infradead.org,\n\tlinux-gpio@vger.kernel.org", "Subject": "[PATCH v5 4/9] dt-bindings: pinctrl: mediatek,mt65xx: Add MT6392\n pinctrl", "Date": "Mon, 20 Apr 2026 22:30:03 +0100", "Message-ID": "<20260420213529.1645560-5-l.scorcia@gmail.com>", "X-Mailer": "git-send-email 2.43.0", "In-Reply-To": "<20260420213529.1645560-1-l.scorcia@gmail.com>", "References": "<20260420213529.1645560-1-l.scorcia@gmail.com>", "Precedence": "bulk", "X-Mailing-List": "linux-gpio@vger.kernel.org", "List-Id": "<linux-gpio.vger.kernel.org>", "List-Subscribe": "<mailto:linux-gpio+subscribe@vger.kernel.org>", "List-Unsubscribe": "<mailto:linux-gpio+unsubscribe@vger.kernel.org>", "MIME-Version": "1.0", "Content-Transfer-Encoding": "8bit" }, "content": "Add a compatible for the pinctrl device of the MT6392 PMIC, a variant of\nthe already supported MT6397.\n\nSigned-off-by: Luca Leonardo Scorcia <l.scorcia@gmail.com>\nReviewed-by: AngeloGioacchino Del Regno <angelogioacchino.delregno@collabora.com>\n---\n .../pinctrl/mediatek,mt65xx-pinctrl.yaml | 1 +\n .../pinctrl/mediatek,mt6392-pinfunc.h | 39 +++++++++++++++++++\n 2 files changed, 40 insertions(+)\n create mode 100644 include/dt-bindings/pinctrl/mediatek,mt6392-pinfunc.h", "diff": "diff --git a/Documentation/devicetree/bindings/pinctrl/mediatek,mt65xx-pinctrl.yaml b/Documentation/devicetree/bindings/pinctrl/mediatek,mt65xx-pinctrl.yaml\nindex aa71398cf522..1468c6f87cfa 100644\n--- a/Documentation/devicetree/bindings/pinctrl/mediatek,mt65xx-pinctrl.yaml\n+++ b/Documentation/devicetree/bindings/pinctrl/mediatek,mt65xx-pinctrl.yaml\n@@ -17,6 +17,7 @@ properties:\n enum:\n - mediatek,mt2701-pinctrl\n - mediatek,mt2712-pinctrl\n+ - mediatek,mt6392-pinctrl\n - mediatek,mt6397-pinctrl\n - mediatek,mt7623-pinctrl\n - mediatek,mt8127-pinctrl\ndiff --git a/include/dt-bindings/pinctrl/mediatek,mt6392-pinfunc.h b/include/dt-bindings/pinctrl/mediatek,mt6392-pinfunc.h\nnew file mode 100644\nindex 000000000000..c65278c8103d\n--- /dev/null\n+++ b/include/dt-bindings/pinctrl/mediatek,mt6392-pinfunc.h\n@@ -0,0 +1,39 @@\n+/* SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) */\n+#ifndef __DTS_MT6392_PINFUNC_H\n+#define __DTS_MT6392_PINFUNC_H\n+\n+#include <dt-bindings/pinctrl/mt65xx.h>\n+\n+#define MT6392_PIN_0_INT__FUNC_GPIO0 (MTK_PIN_NO(0) | 0)\n+#define MT6392_PIN_0_INT__FUNC_INT (MTK_PIN_NO(0) | 1)\n+#define MT6392_PIN_0_INT__FUNC_TEST_CK2 (MTK_PIN_NO(0) | 5)\n+#define MT6392_PIN_0_INT__FUNC_TEST_IN1 (MTK_PIN_NO(0) | 6)\n+#define MT6392_PIN_0_INT__FUNC_TEST_OUT1 (MTK_PIN_NO(0) | 7)\n+\n+#define MT6392_PIN_1_SRCLKEN__FUNC_GPIO1 (MTK_PIN_NO(1) | 0)\n+#define MT6392_PIN_1_SRCLKEN__FUNC_SRCLKEN (MTK_PIN_NO(1) | 1)\n+#define MT6392_PIN_1_SRCLKEN__FUNC_TEST_CK0 (MTK_PIN_NO(1) | 5)\n+#define MT6392_PIN_1_SRCLKEN__FUNC_TEST_IN2 (MTK_PIN_NO(1) | 6)\n+#define MT6392_PIN_1_SRCLKEN__FUNC_TEST_OUT2 (MTK_PIN_NO(1) | 7)\n+\n+#define MT6392_PIN_2_RTC_32K1V8__FUNC_GPIO2 (MTK_PIN_NO(2) | 0)\n+#define MT6392_PIN_2_RTC_32K1V8__FUNC_RTC_32K1V8 (MTK_PIN_NO(2) | 1)\n+#define MT6392_PIN_2_RTC_32K1V8__FUNC_TEST_CK1 (MTK_PIN_NO(2) | 5)\n+#define MT6392_PIN_2_RTC_32K1V8__FUNC_TEST_IN3 (MTK_PIN_NO(2) | 6)\n+#define MT6392_PIN_2_RTC_32K1V8__FUNC_TEST_OUT3 (MTK_PIN_NO(2) | 7)\n+\n+#define MT6392_PIN_3_SPI_CLK__FUNC_GPIO3 (MTK_PIN_NO(3) | 0)\n+#define MT6392_PIN_3_SPI_CLK__FUNC_SPI_CLK (MTK_PIN_NO(3) | 1)\n+\n+#define MT6392_PIN_4_SPI_CSN__FUNC_GPIO4 (MTK_PIN_NO(4) | 0)\n+#define MT6392_PIN_4_SPI_CSN__FUNC_SPI_CSN (MTK_PIN_NO(4) | 1)\n+\n+#define MT6392_PIN_5_SPI_MOSI__FUNC_GPIO5 (MTK_PIN_NO(5) | 0)\n+#define MT6392_PIN_5_SPI_MOSI__FUNC_SPI_MOSI (MTK_PIN_NO(5) | 1)\n+\n+#define MT6392_PIN_6_SPI_MISO__FUNC_GPIO6 (MTK_PIN_NO(6) | 0)\n+#define MT6392_PIN_6_SPI_MISO__FUNC_SPI_MISO (MTK_PIN_NO(6) | 1)\n+#define MT6392_PIN_6_SPI_MISO__FUNC_TEST_IN4 (MTK_PIN_NO(6) | 6)\n+#define MT6392_PIN_6_SPI_MISO__FUNC_TEST_OUT4 (MTK_PIN_NO(6) | 7)\n+\n+#endif /* __DTS_MT6392_PINFUNC_H */\n", "prefixes": [ "v5", "4/9" ] }