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GET /api/patches/2225270/?format=api
{ "id": 2225270, "url": "http://patchwork.ozlabs.org/api/patches/2225270/?format=api", "web_url": "http://patchwork.ozlabs.org/project/linux-pci/patch/20260420183920.3626389-3-zhipingz@meta.com/", "project": { "id": 28, "url": "http://patchwork.ozlabs.org/api/projects/28/?format=api", "name": "Linux PCI development", "link_name": "linux-pci", "list_id": "linux-pci.vger.kernel.org", "list_email": "linux-pci@vger.kernel.org", "web_url": null, "scm_url": null, "webscm_url": null, "list_archive_url": "", "list_archive_url_format": "", "commit_url_format": "" }, "msgid": "<20260420183920.3626389-3-zhipingz@meta.com>", "list_archive_url": null, "date": "2026-04-20T18:39:16", "name": "[v1,2/2] RDMA/mlx5: get tph for p2p access when registering dma-buf mr", "commit_ref": null, "pull_url": null, "state": "new", "archived": false, "hash": "09622597b5e598a458a1222f03b91f75cb77a3c5", "submitter": { "id": 92088, "url": "http://patchwork.ozlabs.org/api/people/92088/?format=api", "name": "Zhiping Zhang", "email": "zhipingz@meta.com" }, "delegate": null, "mbox": "http://patchwork.ozlabs.org/project/linux-pci/patch/20260420183920.3626389-3-zhipingz@meta.com/mbox/", "series": [ { "id": 500663, "url": "http://patchwork.ozlabs.org/api/series/500663/?format=api", "web_url": "http://patchwork.ozlabs.org/project/linux-pci/list/?series=500663", "date": "2026-04-20T18:39:14", "name": "Retrieve TPH from dma-buf for PCIe P2P memory access", "version": 1, "mbox": "http://patchwork.ozlabs.org/series/500663/mbox/" } ], "comments": "http://patchwork.ozlabs.org/api/patches/2225270/comments/", "check": "pending", "checks": "http://patchwork.ozlabs.org/api/patches/2225270/checks/", "tags": {}, "related": [], "headers": { "Return-Path": "\n <linux-pci+bounces-52796-incoming=patchwork.ozlabs.org@vger.kernel.org>", "X-Original-To": [ "incoming@patchwork.ozlabs.org", "linux-pci@vger.kernel.org" ], "Delivered-To": "patchwork-incoming@legolas.ozlabs.org", "Authentication-Results": [ "legolas.ozlabs.org;\n\tdkim=pass (2048-bit key;\n unprotected) header.d=meta.com header.i=@meta.com header.a=rsa-sha256\n header.s=s2048-2025-q2 header.b=jnuippCf;\n\tdkim-atps=neutral", "legolas.ozlabs.org;\n spf=pass (sender SPF authorized) smtp.mailfrom=vger.kernel.org\n (client-ip=2600:3c0a:e001:db::12fc:5321; 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arc=none smtp.client-ip=67.231.153.30", "DKIM-Signature": "v=1; a=rsa-sha256; c=relaxed/relaxed; d=meta.com; h=cc\n\t:content-transfer-encoding:content-type:date:from:in-reply-to\n\t:message-id:mime-version:references:subject:to; s=s2048-2025-q2;\n\t bh=DGqOu01vpSuNphcdtrhRRkwLn0VqkagmIQlTluku0bA=; b=jnuippCfhRbm\n\tHkPxmEAYYUi2QERkMuRu+8exogPBuVqeUQk+QsD2paT+AJA4Uff+XHVqyhhD5rrZ\n\tkbkalvv7jUat0+5FhZuI0DmhU+NzckxDXnU4aZMZNnb0RPYc52dZs5EL99NzYOt1\n\tdWTrKN4qAFnFMaLBtjeK9AKyuwzRnWDOTnQS1SkeURvLLHZWw3rycsa8q829GwpA\n\t4d6/71Pfcfuxu22I+N5+a0j9AIZhqskybM9fznRu13B46hsB4rAI4H+G7C3gjKb5\n\t6YiZoh/aQQcBm4Fh0ZfLLNuRzoFadx627hnW1bc/km3rr+PkOK+eSOv+4pMjqiQd\n\tDFwD7SVBfg==", "From": "Zhiping Zhang <zhipingz@meta.com>", "To": "Stanislav Fomichev <sdf@meta.com>, Keith Busch <kbusch@kernel.org>", "CC": "Jason Gunthorpe <jgg@ziepe.ca>, Leon Romanovsky <leon@kernel.org>,\n Bjorn\n Helgaas <helgaas@kernel.org>, <linux-rdma@vger.kernel.org>,\n <linux-pci@vger.kernel.org>, <netdev@vger.kernel.org>,\n <dri-devel@lists.freedesktop.org>, Yochai Cohen <yochai@nvidia.com>,\n Yishai\n Hadas <yishaih@nvidia.com>, Zhiping Zhang <zhipingz@meta.com>", "Subject": "[PATCH v1 2/2] RDMA/mlx5: get tph for p2p access when registering\n dma-buf mr", "Date": "Mon, 20 Apr 2026 11:39:16 -0700", "Message-ID": "<20260420183920.3626389-3-zhipingz@meta.com>", "X-Mailer": "git-send-email 2.52.0", "In-Reply-To": "<20260420183920.3626389-1-zhipingz@meta.com>", "References": "<20260420183920.3626389-1-zhipingz@meta.com>", "Precedence": "bulk", "X-Mailing-List": "linux-pci@vger.kernel.org", "List-Id": "<linux-pci.vger.kernel.org>", "List-Subscribe": "<mailto:linux-pci+subscribe@vger.kernel.org>", "List-Unsubscribe": "<mailto:linux-pci+unsubscribe@vger.kernel.org>", "MIME-Version": "1.0", "Content-Transfer-Encoding": "quoted-printable", "X-FB-Internal": "Safe", "Content-Type": "text/plain", "X-Proofpoint-Spam-Details-Enc": "AW1haW4tMjYwNDIwMDE4NCBTYWx0ZWRfX4Esapk3dnerq\n aaCnekRLueccrM+y0RWdCzBnw0y8iqoqC2g00PrMQhslFZUh31KRb2JnccBkOwuTWqvbgij3NyF\n ovU17DL40L9P7s9R3RYobq8ds+7DUpDNlK72Zp/9Nir4q5zqCDYw7mo9DdqMb2FWfDlkcdMLzbT\n haOuSUCruOr6H21yNl3nDdDgWz60L6Pj98G4lAkanb/9GtQXVVGrLnSiLpTca+xjjN+tLllpeXI\n JjNwvIjaGzCof8NLnrsW5PpyZGa9g/78+RpC6kcsethyslRBfIbNcmqUnU/hVALliG2IC07rBNF\n rL1L0oeroJNkKrZT5SuxuGcEddgbCBf3nz0uBaFVHbg4VxqcPCdS0lqAfHJpm2tgbzxfD+KRsEL\n LZEYRcqqdUQWGP6RWRN0kwmufEYwXzOEaNu0d8gMTejEEgjXvtci2OAA2pdiZhyCOHFBkfSmFdq\n Xr0UiVumpVr4zNEtJvg==", "X-Proofpoint-ORIG-GUID": "Wslw2XCITesLyjgcusj-fyY7jdyZqXpX", "X-Authority-Analysis": "v=2.4 cv=VevH+lp9 c=1 sm=1 tr=0 ts=69e67755 cx=c_pps\n a=CB4LiSf2rd0gKozIdrpkBw==:117 a=CB4LiSf2rd0gKozIdrpkBw==:17\n a=A5OVakUREuEA:10 a=VkNPw1HP01LnGYTKEx00:22 a=7x6HtfJdh03M6CCDgxCd:22\n a=JnKecZnUtZousrUlYMGU:22 a=VabnemYjAAAA:8 a=c4au4WjlRKfxtgWlyl4A:9\n a=gKebqoRLp9LExxC7YDUY:22", "X-Proofpoint-GUID": "Wslw2XCITesLyjgcusj-fyY7jdyZqXpX", "X-Proofpoint-Virus-Version": "vendor=baseguard\n engine=ICAP:2.0.293,Aquarius:18.0.1143,Hydra:6.1.51,FMLib:17.12.100.49\n definitions=2026-04-20_03,2026-04-20_02,2025-10-01_01" }, "content": "Query dma-buf TPH metadata when registering a dma-buf MR for peer to\npeer access and translate the raw steering tag into an mlx5 steering tag\nindex. Factor mlx5_st_alloc_index() so callers that already have a raw\nsteering tag can allocate the corresponding mlx5 index directly. Keep the\nDMAH path as the first priority and only fall back to dma-buf metadata when\nno DMAH is supplied.\n\nPass the device's supported ST width (8 or 16 bit, derived from\npdev->tph_req_type) to get_tph() so the exporter can reject tags that\nexceed the consumer's capability. Initialize ret in mlx5_st_create() so the\ncached steering-tag path returns success cleanly under clang builds.\n\nSigned-off-by: Zhiping Zhang <zhipingz@meta.com>\n---\n drivers/infiniband/hw/mlx5/mr.c | 38 +++++++++++++++++++\n .../net/ethernet/mellanox/mlx5/core/lib/st.c | 25 ++++++++----\n include/linux/mlx5/driver.h | 7 ++++\n 3 files changed, 62 insertions(+), 8 deletions(-)", "diff": "diff --git a/drivers/infiniband/hw/mlx5/mr.c b/drivers/infiniband/hw/mlx5/mr.c\nindex 665323b90b64..618c84815d48 100644\n--- a/drivers/infiniband/hw/mlx5/mr.c\n+++ b/drivers/infiniband/hw/mlx5/mr.c\n@@ -46,6 +46,8 @@\n #include \"data_direct.h\"\n #include \"dmah.h\"\n \n+MODULE_IMPORT_NS(\"DMA_BUF\");\n+\n enum {\n \tMAX_PENDING_REG_MR = 8,\n };\n@@ -1622,6 +1624,40 @@ static struct dma_buf_attach_ops mlx5_ib_dmabuf_attach_ops = {\n \t.move_notify = mlx5_ib_dmabuf_invalidate_cb,\n };\n \n+static void get_tph_mr_dmabuf(struct mlx5_ib_dev *dev, int fd, u16 *st_index,\n+\t\t\t u8 *ph)\n+{\n+\tstruct pci_dev *pdev = dev->mdev->pdev;\n+\tstruct dma_buf *dmabuf;\n+\tu16 steering_tag;\n+\tu8 st_width;\n+\tint ret;\n+\n+\tst_width = (pdev->tph_req_type == PCI_TPH_REQ_EXT_TPH) ? 16 : 8;\n+\n+\tdmabuf = dma_buf_get(fd);\n+\tif (IS_ERR(dmabuf))\n+\t\treturn;\n+\n+\tif (!dmabuf->ops->get_tph)\n+\t\tgoto end_dbuf_put;\n+\n+\tret = dmabuf->ops->get_tph(dmabuf, &steering_tag, ph, st_width);\n+\tif (ret) {\n+\t\tmlx5_ib_dbg(dev, \"get_tph failed (%d)\\n\", ret);\n+\t\tgoto end_dbuf_put;\n+\t}\n+\n+\tret = mlx5_st_alloc_index_by_tag(dev->mdev, steering_tag, st_index);\n+\tif (ret) {\n+\t\t*ph = MLX5_IB_NO_PH;\n+\t\tmlx5_ib_dbg(dev, \"st_alloc_index_by_tag failed (%d)\\n\", ret);\n+\t}\n+\n+end_dbuf_put:\n+\tdma_buf_put(dmabuf);\n+}\n+\n static struct ib_mr *\n reg_user_mr_dmabuf(struct ib_pd *pd, struct device *dma_device,\n \t\t u64 offset, u64 length, u64 virt_addr,\n@@ -1664,6 +1700,8 @@ reg_user_mr_dmabuf(struct ib_pd *pd, struct device *dma_device,\n \t\tph = dmah->ph;\n \t\tif (dmah->valid_fields & BIT(IB_DMAH_CPU_ID_EXISTS))\n \t\t\tst_index = mdmah->st_index;\n+\t} else {\n+\t\tget_tph_mr_dmabuf(dev, fd, &st_index, &ph);\n \t}\n \n \tmr = alloc_cacheable_mr(pd, &umem_dmabuf->umem, virt_addr,\ndiff --git a/drivers/net/ethernet/mellanox/mlx5/core/lib/st.c b/drivers/net/ethernet/mellanox/mlx5/core/lib/st.c\nindex 997be91f0a13..724b67c3f3a6 100644\n--- a/drivers/net/ethernet/mellanox/mlx5/core/lib/st.c\n+++ b/drivers/net/ethernet/mellanox/mlx5/core/lib/st.c\n@@ -29,7 +29,7 @@ struct mlx5_st *mlx5_st_create(struct mlx5_core_dev *dev)\n \tu8 direct_mode = 0;\n \tu16 num_entries;\n \tu32 tbl_loc;\n-\tint ret;\n+\tint ret = 0;\n \n \tif (!MLX5_CAP_GEN(dev, mkey_pcie_tph))\n \t\treturn NULL;\n@@ -92,23 +92,18 @@ void mlx5_st_destroy(struct mlx5_core_dev *dev)\n \tkfree(st);\n }\n \n-int mlx5_st_alloc_index(struct mlx5_core_dev *dev, enum tph_mem_type mem_type,\n-\t\t\tunsigned int cpu_uid, u16 *st_index)\n+int mlx5_st_alloc_index_by_tag(struct mlx5_core_dev *dev, u16 tag,\n+\t\t\t u16 *st_index)\n {\n \tstruct mlx5_st_idx_data *idx_data;\n \tstruct mlx5_st *st = dev->st;\n \tunsigned long index;\n \tu32 xa_id;\n-\tu16 tag;\n \tint ret;\n \n \tif (!st)\n \t\treturn -EOPNOTSUPP;\n \n-\tret = pcie_tph_get_cpu_st(dev->pdev, mem_type, cpu_uid, &tag);\n-\tif (ret)\n-\t\treturn ret;\n-\n \tif (st->direct_mode) {\n \t\t*st_index = tag;\n \t\treturn 0;\n@@ -152,6 +147,20 @@ int mlx5_st_alloc_index(struct mlx5_core_dev *dev, enum tph_mem_type mem_type,\n \tmutex_unlock(&st->lock);\n \treturn ret;\n }\n+EXPORT_SYMBOL_GPL(mlx5_st_alloc_index_by_tag);\n+\n+int mlx5_st_alloc_index(struct mlx5_core_dev *dev, enum tph_mem_type mem_type,\n+\t\t\tunsigned int cpu_uid, u16 *st_index)\n+{\n+\tu16 tag;\n+\tint ret;\n+\n+\tret = pcie_tph_get_cpu_st(dev->pdev, mem_type, cpu_uid, &tag);\n+\tif (ret)\n+\t\treturn ret;\n+\n+\treturn mlx5_st_alloc_index_by_tag(dev, tag, st_index);\n+}\n EXPORT_SYMBOL_GPL(mlx5_st_alloc_index);\n \n int mlx5_st_dealloc_index(struct mlx5_core_dev *dev, u16 st_index)\ndiff --git a/include/linux/mlx5/driver.h b/include/linux/mlx5/driver.h\nindex 04dcd09f7517..c1d2d603bd96 100644\n--- a/include/linux/mlx5/driver.h\n+++ b/include/linux/mlx5/driver.h\n@@ -1177,10 +1177,17 @@ int mlx5_dm_sw_icm_dealloc(struct mlx5_core_dev *dev, enum mlx5_sw_icm_type type\n \t\t\t u64 length, u16 uid, phys_addr_t addr, u32 obj_id);\n \n #ifdef CONFIG_PCIE_TPH\n+int mlx5_st_alloc_index_by_tag(struct mlx5_core_dev *dev, u16 tag,\n+\t\t\t u16 *st_index);\n int mlx5_st_alloc_index(struct mlx5_core_dev *dev, enum tph_mem_type mem_type,\n \t\t\tunsigned int cpu_uid, u16 *st_index);\n int mlx5_st_dealloc_index(struct mlx5_core_dev *dev, u16 st_index);\n #else\n+static inline int mlx5_st_alloc_index_by_tag(struct mlx5_core_dev *dev,\n+\t\t\t\t\t u16 tag, u16 *st_index)\n+{\n+\treturn -EOPNOTSUPP;\n+}\n static inline int mlx5_st_alloc_index(struct mlx5_core_dev *dev,\n \t\t\t\t enum tph_mem_type mem_type,\n \t\t\t\t unsigned int cpu_uid, u16 *st_index)\n", "prefixes": [ "v1", "2/2" ] }