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GET /api/patches/2224442/?format=api
{ "id": 2224442, "url": "http://patchwork.ozlabs.org/api/patches/2224442/?format=api", "web_url": "http://patchwork.ozlabs.org/project/uboot/patch/20260416144426.12728-2-micbis.openwrt@gmail.com/", "project": { "id": 18, "url": "http://patchwork.ozlabs.org/api/projects/18/?format=api", "name": "U-Boot", "link_name": "uboot", "list_id": "u-boot.lists.denx.de", "list_email": "u-boot@lists.denx.de", "web_url": null, "scm_url": null, "webscm_url": null, "list_archive_url": "", "list_archive_url_format": "", "commit_url_format": "" }, "msgid": "<20260416144426.12728-2-micbis.openwrt@gmail.com>", "list_archive_url": null, "date": "2026-04-16T14:44:25", "name": "[v2,1/2] regulator: rzg2l: implement connectivity notification", "commit_ref": null, "pull_url": null, "state": "superseded", "archived": false, "hash": "8dadde787886e428ff41151ccc2b4558000efed1", "submitter": { "id": 93164, "url": "http://patchwork.ozlabs.org/api/people/93164/?format=api", "name": "Michele Bisogno", "email": "micbis.openwrt@gmail.com" }, "delegate": { "id": 1699, "url": "http://patchwork.ozlabs.org/api/users/1699/?format=api", "username": "marex", "first_name": "Marek", "last_name": "Vasut", "email": "marek.vasut@gmail.com" }, "mbox": "http://patchwork.ozlabs.org/project/uboot/patch/20260416144426.12728-2-micbis.openwrt@gmail.com/mbox/", "series": [ { "id": 500323, "url": "http://patchwork.ozlabs.org/api/series/500323/?format=api", "web_url": "http://patchwork.ozlabs.org/project/uboot/list/?series=500323", "date": "2026-04-16T14:44:24", "name": "This is version 2 of the RZ/G2L support.", "version": 2, "mbox": "http://patchwork.ozlabs.org/series/500323/mbox/" } ], "comments": "http://patchwork.ozlabs.org/api/patches/2224442/comments/", "check": "pending", "checks": "http://patchwork.ozlabs.org/api/patches/2224442/checks/", "tags": {}, "related": [], "headers": { "Return-Path": "<u-boot-bounces@lists.denx.de>", "X-Original-To": "incoming@patchwork.ozlabs.org", "Delivered-To": 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"u-boot@lists.denx.de", "Cc": "marek.vasut+renesas@mailbox.org, paul@pbarker.dev, jh80.chung@samsung.com,\n peng.fan@nxp.com, lukma@denx.de, mkorpershoek@kernel.org,\n trini@konsulko.com, Michele Bisogno <micbis.openwrt@gmail.com>", "Subject": "[PATCH v2 1/2] regulator: rzg2l: implement connectivity notification", "Date": "Thu, 16 Apr 2026 16:44:25 +0200", "Message-Id": "<20260416144426.12728-2-micbis.openwrt@gmail.com>", "X-Mailer": "git-send-email 2.34.1", "In-Reply-To": "<20260416144426.12728-1-micbis.openwrt@gmail.com>", "References": "<20260416144426.12728-1-micbis.openwrt@gmail.com>", "MIME-Version": "1.0", "Content-Transfer-Encoding": "8bit", "X-Mailman-Approved-At": "Fri, 17 Apr 2026 14:43:59 +0200", "X-BeenThere": "u-boot@lists.denx.de", "X-Mailman-Version": "2.1.39", "Precedence": "list", "List-Id": "U-Boot discussion <u-boot.lists.denx.de>", "List-Unsubscribe": "<https://lists.denx.de/options/u-boot>,\n <mailto:u-boot-request@lists.denx.de?subject=unsubscribe>", "List-Archive": "<https://lists.denx.de/pipermail/u-boot/>", "List-Post": "<mailto:u-boot@lists.denx.de>", "List-Help": "<mailto:u-boot-request@lists.denx.de?subject=help>", "List-Subscribe": "<https://lists.denx.de/listinfo/u-boot>,\n <mailto:u-boot-request@lists.denx.de?subject=subscribe>", "Errors-To": "u-boot-bounces@lists.denx.de", "Sender": "\"U-Boot\" <u-boot-bounces@lists.denx.de>", "X-Virus-Scanned": "clamav-milter 0.103.8 at phobos.denx.de", "X-Virus-Status": "Clean" }, "content": "Implement CON_CTRL manual connectivity notification.\nBy setting SEL_CONNECT and CONNECT_1, the UTM+ core is notified of\nconnection status in peripheral mode.\n---\n drivers/power/regulator/rzg2l-usbphy-regulator.c | 10 ++++++++--\n 1 file changed, 8 insertions(+), 2 deletions(-)", "diff": "diff --git a/drivers/power/regulator/rzg2l-usbphy-regulator.c b/drivers/power/regulator/rzg2l-usbphy-regulator.c\nindex 0354555d0b5..03f8dec4f08 100644\n--- a/drivers/power/regulator/rzg2l-usbphy-regulator.c\n+++ b/drivers/power/regulator/rzg2l-usbphy-regulator.c\n@@ -9,16 +9,22 @@\n #include <renesas/rzg2l-usbphy.h>\n \n #define VBENCTL\t\t\t0x03c\n+#define CON_CTRL\t\t0x020\n #define VBENCTL_VBUS_SEL\tBIT(0)\n+#define SEL_CONNECT\t\tBIT(4)\n+#define CONNECT_1\t\tBIT(0)\n \n static int rzg2l_usbphy_regulator_set_enable(struct udevice *dev, bool enable)\n {\n \tstruct rzg2l_usbphy_ctrl_priv *priv = dev_get_priv(dev->parent);\n \n-\tif (enable)\n+\tif (enable) {\n \t\tclrbits_le32(priv->regs + VBENCTL, VBENCTL_VBUS_SEL);\n-\telse\n+\t\tsetbits_le32(priv->regs + CON_CTRL, SEL_CONNECT | CONNECT_1);\n+\t} else {\n \t\tsetbits_le32(priv->regs + VBENCTL, VBENCTL_VBUS_SEL);\n+\t\tclrbits_le32(priv->regs + CON_CTRL, SEL_CONNECT | CONNECT_1);\n+\t}\n \n \treturn 0;\n }\n", "prefixes": [ "v2", "1/2" ] }