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GET /api/patches/2224387/?format=api
{ "id": 2224387, "url": "http://patchwork.ozlabs.org/api/patches/2224387/?format=api", "web_url": "http://patchwork.ozlabs.org/project/qemu-devel/patch/20260417105618.3621-25-magnuskulke@linux.microsoft.com/", "project": { "id": 14, "url": "http://patchwork.ozlabs.org/api/projects/14/?format=api", "name": "QEMU Development", "link_name": "qemu-devel", "list_id": "qemu-devel.nongnu.org", "list_email": "qemu-devel@nongnu.org", "web_url": "", "scm_url": "", "webscm_url": "", "list_archive_url": "", "list_archive_url_format": "", "commit_url_format": "" }, "msgid": "<20260417105618.3621-25-magnuskulke@linux.microsoft.com>", "list_archive_url": null, "date": "2026-04-17T10:56:08", "name": "[24/34] target/i386/mshv: migrate SIMP and SIEFP state", "commit_ref": null, "pull_url": null, "state": "new", "archived": false, "hash": "927d17f9c91154eb52cabe296825abe2e2702283", "submitter": { "id": 90753, "url": "http://patchwork.ozlabs.org/api/people/90753/?format=api", "name": "Magnus Kulke", "email": "magnuskulke@linux.microsoft.com" }, "delegate": null, "mbox": "http://patchwork.ozlabs.org/project/qemu-devel/patch/20260417105618.3621-25-magnuskulke@linux.microsoft.com/mbox/", "series": [ { "id": 500310, "url": "http://patchwork.ozlabs.org/api/series/500310/?format=api", "web_url": "http://patchwork.ozlabs.org/project/qemu-devel/list/?series=500310", "date": "2026-04-17T10:55:44", "name": "Add migration support to the MSHV accelerator", "version": 1, "mbox": "http://patchwork.ozlabs.org/series/500310/mbox/" } ], "comments": "http://patchwork.ozlabs.org/api/patches/2224387/comments/", "check": "pending", "checks": "http://patchwork.ozlabs.org/api/patches/2224387/checks/", "tags": {}, "related": [], "headers": { "Return-Path": "<qemu-devel-bounces+incoming=patchwork.ozlabs.org@nongnu.org>", "X-Original-To": "incoming@patchwork.ozlabs.org", "Delivered-To": "patchwork-incoming@legolas.ozlabs.org", "Authentication-Results": [ "legolas.ozlabs.org;\n\tdkim=pass (1024-bit key;\n unprotected) header.d=linux.microsoft.com header.i=@linux.microsoft.com\n header.a=rsa-sha256 header.s=default header.b=TSUs93Mz;\n\tdkim-atps=neutral", "legolas.ozlabs.org;\n spf=pass (sender SPF authorized) smtp.mailfrom=nongnu.org\n (client-ip=209.51.188.17; helo=lists1p.gnu.org;\n envelope-from=qemu-devel-bounces+incoming=patchwork.ozlabs.org@nongnu.org;\n receiver=patchwork.ozlabs.org)" ], "Received": [ "from lists1p.gnu.org (lists1p.gnu.org [209.51.188.17])\n\t(using TLSv1.2 with cipher ECDHE-ECDSA-AES256-GCM-SHA384 (256/256 bits))\n\t(No client certificate requested)\n\tby legolas.ozlabs.org (Postfix) with ESMTPS id 4fxsLT58wGz1yD3\n\tfor <incoming@patchwork.ozlabs.org>; Fri, 17 Apr 2026 20:58:25 +1000 (AEST)", "from localhost ([::1] helo=lists1p.gnu.org)\n\tby lists1p.gnu.org with esmtp (Exim 4.90_1)\n\t(envelope-from <qemu-devel-bounces@nongnu.org>)\n\tid 1wDgto-0003Qm-8V; Fri, 17 Apr 2026 06:58:12 -0400", "from eggs.gnu.org ([2001:470:142:3::10])\n by lists1p.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_256_GCM_SHA384:256)\n (Exim 4.90_1) (envelope-from <magnuskulke@linux.microsoft.com>)\n id 1wDgti-00034p-Kh\n for qemu-devel@nongnu.org; Fri, 17 Apr 2026 06:58:06 -0400", "from linux.microsoft.com ([13.77.154.182])\n by eggs.gnu.org with esmtp (Exim 4.90_1)\n (envelope-from <magnuskulke@linux.microsoft.com>) id 1wDgtg-0001pE-2W\n for qemu-devel@nongnu.org; Fri, 17 Apr 2026 06:58:06 -0400", "from DESKTOP-TUU1E5L.fritz.box (p5086d620.dip0.t-ipconnect.de\n [80.134.214.32])\n by linux.microsoft.com (Postfix) with ESMTPSA id 0B9B320B712D;\n Fri, 17 Apr 2026 03:57:49 -0700 (PDT)" ], "DKIM-Filter": "OpenDKIM Filter v2.11.0 linux.microsoft.com 0B9B320B712D", "DKIM-Signature": "v=1; a=rsa-sha256; c=relaxed/relaxed; d=linux.microsoft.com;\n s=default; t=1776423472;\n bh=8LRFoDvkoSwOFad+Yv7eHmLjTcf3xGXpVfslGPCOAsE=;\n h=From:To:Cc:Subject:Date:In-Reply-To:References:From;\n b=TSUs93MzrlprHhTHfyUabUYIWNksaCsXXaNsjs+M6NqcxrwuqABNMkEv0k3pgxpXz\n i0ObXlrWeVNY5w4RdfA1ClC9lHrQhuKcXnXyztZkk/t+wdHHIkViy9IDL8g4qcq73N\n MCrmUx6HhmYmAMuWIZzSAulHzSJtjWcQxv9I6fNY=", "From": "Magnus Kulke <magnuskulke@linux.microsoft.com>", "To": "qemu-devel@nongnu.org", "Cc": "kvm@vger.kernel.org, Magnus Kulke <magnuskulke@microsoft.com>,\n Wei Liu <liuwe@microsoft.com>, \"Michael S. Tsirkin\" <mst@redhat.com>,\n\t=?utf-8?q?C=C3=A9dric_Le_Goater?= <clg@redhat.com>,\n Zhao Liu <zhao1.liu@intel.com>,\n Richard Henderson <richard.henderson@linaro.org>,\n Paolo Bonzini <pbonzini@redhat.com>, Wei Liu <wei.liu@kernel.org>,\n Magnus Kulke <magnuskulke@linux.microsoft.com>,\n Alex Williamson <alex@shazbot.org>,\n Marcel Apfelbaum <marcel.apfelbaum@gmail.com>, =?utf-8?q?Philippe_Mathieu-D?=\n\t=?utf-8?q?aud=C3=A9?= <philmd@linaro.org>,\n Marcelo Tosatti <mtosatti@redhat.com>", "Subject": "[PATCH 24/34] target/i386/mshv: migrate SIMP and SIEFP state", "Date": "Fri, 17 Apr 2026 12:56:08 +0200", "Message-Id": "<20260417105618.3621-25-magnuskulke@linux.microsoft.com>", "X-Mailer": "git-send-email 2.34.1", "In-Reply-To": "<20260417105618.3621-1-magnuskulke@linux.microsoft.com>", "References": "<20260417105618.3621-1-magnuskulke@linux.microsoft.com>", "MIME-Version": "1.0", "Content-Transfer-Encoding": "8bit", "Received-SPF": "pass client-ip=13.77.154.182;\n envelope-from=magnuskulke@linux.microsoft.com; helo=linux.microsoft.com", "X-Spam_score_int": "-42", "X-Spam_score": "-4.3", "X-Spam_bar": "----", "X-Spam_report": "(-4.3 / 5.0 requ) BAYES_00=-1.9, DKIM_SIGNED=0.1,\n DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, RCVD_IN_DNSWL_MED=-2.3,\n RCVD_IN_VALIDITY_RPBL_BLOCKED=0.001, RCVD_IN_VALIDITY_SAFE_BLOCKED=0.001,\n SPF_HELO_PASS=-0.001, SPF_PASS=-0.001 autolearn=ham autolearn_force=no", "X-Spam_action": "no action", "X-BeenThere": "qemu-devel@nongnu.org", "X-Mailman-Version": "2.1.29", "Precedence": "list", "List-Id": "qemu development <qemu-devel.nongnu.org>", "List-Unsubscribe": "<https://lists.nongnu.org/mailman/options/qemu-devel>,\n <mailto:qemu-devel-request@nongnu.org?subject=unsubscribe>", "List-Archive": "<https://lists.nongnu.org/archive/html/qemu-devel>", "List-Post": "<mailto:qemu-devel@nongnu.org>", "List-Help": "<mailto:qemu-devel-request@nongnu.org?subject=help>", "List-Subscribe": "<https://lists.nongnu.org/mailman/listinfo/qemu-devel>,\n <mailto:qemu-devel-request@nongnu.org?subject=subscribe>", "Errors-To": "qemu-devel-bounces+incoming=patchwork.ozlabs.org@nongnu.org", "Sender": "qemu-devel-bounces+incoming=patchwork.ozlabs.org@nongnu.org" }, "content": "This part SynIC state is retrieved from the hypervisor via aligned state\npages:\n\n- Add new synic source file\n- Centralize the synic_enabled() check\n- r/w pages from the hyper via aligned pages\n- only handle pages when synic is enabled\n- add buffers for migration to VM state\n\nSigned-off-by: Magnus Kulke <magnuskulke@linux.microsoft.com>\n---\n include/system/mshv_int.h | 7 ++\n target/i386/cpu.h | 5 ++\n target/i386/machine.c | 26 ++++++\n target/i386/mshv/meson.build | 1 +\n target/i386/mshv/mshv-cpu.c | 64 +++++++++++++++\n target/i386/mshv/msr.c | 7 +-\n target/i386/mshv/synic.c | 155 +++++++++++++++++++++++++++++++++++\n 7 files changed, 260 insertions(+), 5 deletions(-)\n create mode 100644 target/i386/mshv/synic.c", "diff": "diff --git a/include/system/mshv_int.h b/include/system/mshv_int.h\nindex 29b363e73e..80df4030c5 100644\n--- a/include/system/mshv_int.h\n+++ b/include/system/mshv_int.h\n@@ -119,4 +119,11 @@ int mshv_init_msrs(const CPUState *cpu);\n int mshv_get_msrs(CPUState *cpu);\n int mshv_set_msrs(const CPUState *cpu);\n \n+/* synic */\n+int mshv_get_simp(int cpu_fd, uint8_t *page);\n+int mshv_set_simp(int cpu_fd, const uint8_t *page);\n+int mshv_get_siefp(int cpu_fd, uint8_t *page);\n+int mshv_set_siefp(int cpu_fd, const uint8_t *page);\n+bool mshv_synic_enabled(const CPUState *cpu);\n+\n #endif\ndiff --git a/target/i386/cpu.h b/target/i386/cpu.h\nindex 0b539155c4..d010d26146 100644\n--- a/target/i386/cpu.h\n+++ b/target/i386/cpu.h\n@@ -33,6 +33,7 @@\n #include \"qemu/cpu-float.h\"\n #include \"qemu/timer.h\"\n #include \"standard-headers/asm-x86/kvm_para.h\"\n+#include \"hw/hyperv/hvgdk_mini.h\"\n \n #define XEN_NR_VIRQS 24\n \n@@ -2291,6 +2292,10 @@ typedef struct CPUArchState {\n #if defined(CONFIG_HVF) || defined(CONFIG_MSHV) || defined(CONFIG_WHPX)\n void *emu_mmio_buf;\n #endif\n+#if defined(CONFIG_MSHV)\n+ uint8_t hv_simp_page[HV_HYP_PAGE_SIZE];\n+ uint8_t hv_siefp_page[HV_HYP_PAGE_SIZE];\n+#endif\n \n uint64_t mcg_cap;\n uint64_t mcg_ctl;\ndiff --git a/target/i386/machine.c b/target/i386/machine.c\nindex 48a2a4b319..f94cc544b3 100644\n--- a/target/i386/machine.c\n+++ b/target/i386/machine.c\n@@ -952,6 +952,29 @@ static const VMStateDescription vmstate_msr_hyperv_reenlightenment = {\n }\n };\n \n+#ifdef CONFIG_MSHV\n+static bool mshv_synic_vp_state_needed(void *opaque)\n+{\n+ X86CPU *cpu = opaque;\n+ CPUX86State *env = &cpu->env;\n+\n+ /* Only migrate SIMP/SIEFP if SynIC is enabled */\n+ return env->msr_hv_synic_control & 1;\n+}\n+\n+static const VMStateDescription vmstate_mshv_synic_vp_state = {\n+ .name = \"cpu/mshv_synic_vp_state\",\n+ .version_id = 1,\n+ .minimum_version_id = 1,\n+ .needed = mshv_synic_vp_state_needed,\n+ .fields = (const VMStateField[]) {\n+ VMSTATE_BUFFER(env.hv_simp_page, X86CPU),\n+ VMSTATE_BUFFER(env.hv_siefp_page, X86CPU),\n+ VMSTATE_END_OF_LIST()\n+ }\n+};\n+#endif\n+\n static bool avx512_needed(void *opaque)\n {\n X86CPU *cpu = opaque;\n@@ -1916,6 +1939,9 @@ const VMStateDescription vmstate_x86_cpu = {\n &vmstate_cet,\n #ifdef TARGET_X86_64\n &vmstate_apx,\n+#endif\n+#ifdef CONFIG_MSHV\n+ &vmstate_mshv_synic_vp_state,\n #endif\n NULL\n }\ndiff --git a/target/i386/mshv/meson.build b/target/i386/mshv/meson.build\nindex f44e84688d..a847a6c74c 100644\n--- a/target/i386/mshv/meson.build\n+++ b/target/i386/mshv/meson.build\n@@ -4,6 +4,7 @@ i386_mshv_ss.add(files(\n 'mshv-apic.c',\n 'mshv-cpu.c',\n 'msr.c',\n+ 'synic.c',\n ))\n \n i386_system_ss.add_all(when: 'CONFIG_MSHV', if_true: i386_mshv_ss)\ndiff --git a/target/i386/mshv/mshv-cpu.c b/target/i386/mshv/mshv-cpu.c\nindex 760fcfe8da..36549857ae 100644\n--- a/target/i386/mshv/mshv-cpu.c\n+++ b/target/i386/mshv/mshv-cpu.c\n@@ -128,6 +128,33 @@ static int get_lapic(CPUState *cpu)\n return 0;\n }\n \n+static int get_synic_state(CPUState *cpu)\n+{\n+ X86CPU *x86cpu = X86_CPU(cpu);\n+ CPUX86State *env = &x86cpu->env;\n+ int cpu_fd = mshv_vcpufd(cpu);\n+ int ret;\n+\n+ /* SIMP/SIEFP can only be read when SynIC is enabled */\n+ if (!mshv_synic_enabled(cpu)) {\n+ return 0;\n+ }\n+\n+ ret = mshv_get_simp(cpu_fd, env->hv_simp_page);\n+ if (ret < 0) {\n+ error_report(\"failed to get simp state\");\n+ return -1;\n+ }\n+\n+ ret = mshv_get_siefp(cpu_fd, env->hv_siefp_page);\n+ if (ret < 0) {\n+ error_report(\"failed to get siefp state\");\n+ return -1;\n+ }\n+\n+ return 0;\n+}\n+\n static void populate_fpu(const hv_register_assoc *assocs, X86CPU *x86cpu)\n {\n union hv_register_value value;\n@@ -585,6 +612,11 @@ int mshv_arch_load_vcpu_state(CPUState *cpu)\n return ret;\n }\n \n+ ret = get_synic_state(cpu);\n+ if (ret < 0) {\n+ return ret;\n+ }\n+\n return 0;\n }\n \n@@ -1000,6 +1032,33 @@ static int set_lapic(const CPUState *cpu)\n return 0;\n }\n \n+static int set_synic_state(const CPUState *cpu)\n+{\n+ X86CPU *x86cpu = X86_CPU(cpu);\n+ CPUX86State *env = &x86cpu->env;\n+ int cpu_fd = mshv_vcpufd(cpu);\n+ int ret;\n+\n+ /* SIMP/SIEFP can only be written when SynIC is enabled */\n+ if (!mshv_synic_enabled(cpu)) {\n+ return 0;\n+ }\n+\n+ ret = mshv_set_simp(cpu_fd, env->hv_simp_page);\n+ if (ret < 0) {\n+ error_report(\"failed to set simp state\");\n+ return -1;\n+ }\n+\n+ ret = mshv_set_siefp(cpu_fd, env->hv_siefp_page);\n+ if (ret < 0) {\n+ error_report(\"failed to set siefp state\");\n+ return -1;\n+ }\n+\n+ return 0;\n+}\n+\n int mshv_arch_store_vcpu_state(const CPUState *cpu)\n {\n int ret;\n@@ -1036,6 +1095,11 @@ int mshv_arch_store_vcpu_state(const CPUState *cpu)\n return ret;\n }\n \n+ ret = set_synic_state(cpu);\n+ if (ret < 0) {\n+ return ret;\n+ }\n+\n return 0;\n }\n \ndiff --git a/target/i386/mshv/msr.c b/target/i386/mshv/msr.c\nindex b985500797..a2d48249e9 100644\n--- a/target/i386/mshv/msr.c\n+++ b/target/i386/mshv/msr.c\n@@ -334,7 +334,6 @@ int mshv_get_msrs(CPUState *cpu)\n size_t i, j;\n uint32_t name;\n X86CPU *x86cpu = X86_CPU(cpu);\n- bool synic_enabled;\n \n set_hv_name_in_assocs(assocs, n_assocs);\n \n@@ -362,8 +361,7 @@ int mshv_get_msrs(CPUState *cpu)\n store_in_env(cpu, assocs, n_assocs);\n \n /* Read SINT MSRs only if SynIC is enabled */\n- synic_enabled = x86cpu->env.msr_hv_synic_control & 1;\n- if (synic_enabled) {\n+ if (mshv_synic_enabled(cpu)) {\n QEMU_BUILD_BUG_ON(MSHV_MSR_TOTAL_COUNT < HV_SINT_COUNT);\n \n for (i = 0; i < HV_SINT_COUNT; i++) {\n@@ -417,7 +415,6 @@ int mshv_set_msrs(const CPUState *cpu)\n int ret;\n size_t i, j;\n X86CPU *x86cpu = X86_CPU(cpu);\n- bool synic_enabled = x86cpu->env.msr_hv_synic_control & 1;\n \n load_from_env(cpu, assocs, n_assocs);\n \n@@ -451,7 +448,7 @@ int mshv_set_msrs(const CPUState *cpu)\n }\n \n /* SINT MSRs can only be written if SCONTROL has been set, so we split */\n- if (synic_enabled) {\n+ if (mshv_synic_enabled(cpu)) {\n QEMU_BUILD_BUG_ON(MSHV_MSR_TOTAL_COUNT < HV_SINT_COUNT);\n \n for (i = 0; i < HV_SINT_COUNT; i++) {\ndiff --git a/target/i386/mshv/synic.c b/target/i386/mshv/synic.c\nnew file mode 100644\nindex 0000000000..8f9fee6ed7\n--- /dev/null\n+++ b/target/i386/mshv/synic.c\n@@ -0,0 +1,155 @@\n+/*\n+ * QEMU MSHV SynIC support\n+ *\n+ * Copyright Microsoft, Corp. 2026\n+ *\n+ * Authors: Magnus Kulke <magnuskulke@microsoft.com>\n+ *\n+ * SPDX-License-Identifier: GPL-2.0-or-later\n+ */\n+\n+#include \"qemu/osdep.h\"\n+#include \"qemu/memalign.h\"\n+#include \"qemu/error-report.h\"\n+\n+#include \"system/mshv.h\"\n+#include \"system/mshv_int.h\"\n+\n+#include \"linux/mshv.h\"\n+#include \"hw/hyperv/hvgdk_mini.h\"\n+#include \"cpu.h\"\n+\n+#include <sys/ioctl.h>\n+\n+bool mshv_synic_enabled(const CPUState *cpu)\n+{\n+ X86CPU *x86cpu = X86_CPU(cpu);\n+\n+ return x86cpu->env.msr_hv_synic_control & 1;\n+}\n+\n+static int get_vp_state(int cpu_fd, struct mshv_get_set_vp_state *state)\n+{\n+ int ret;\n+\n+ ret = ioctl(cpu_fd, MSHV_GET_VP_STATE, state);\n+ if (ret < 0) {\n+ error_report(\"failed to get vp state: %s\", strerror(errno));\n+ return -1;\n+ }\n+\n+ return 0;\n+}\n+\n+static int set_vp_state(int cpu_fd, const struct mshv_get_set_vp_state *state)\n+{\n+ int ret;\n+\n+ ret = ioctl(cpu_fd, MSHV_SET_VP_STATE, state);\n+ if (ret < 0) {\n+ error_report(\"failed to set vp state: %s\", strerror(errno));\n+ return -1;\n+ }\n+\n+ return 0;\n+}\n+\n+int mshv_get_simp(int cpu_fd, uint8_t *page)\n+{\n+ int ret;\n+ void *buffer;\n+ struct mshv_get_set_vp_state args = {0};\n+\n+ buffer = qemu_memalign(HV_HYP_PAGE_SIZE, HV_HYP_PAGE_SIZE);\n+ args.buf_ptr = (uint64_t)buffer;\n+ args.buf_sz = HV_HYP_PAGE_SIZE;\n+ args.type = MSHV_VP_STATE_SIMP;\n+\n+ ret = get_vp_state(cpu_fd, &args);\n+\n+ if (ret < 0) {\n+ qemu_vfree(buffer);\n+ error_report(\"failed to get simp\");\n+ return -1;\n+ }\n+\n+ memcpy(page, buffer, HV_HYP_PAGE_SIZE);\n+ qemu_vfree(buffer);\n+\n+ return 0;\n+}\n+\n+int mshv_set_simp(int cpu_fd, const uint8_t *page)\n+{\n+ int ret;\n+ void *buffer;\n+ struct mshv_get_set_vp_state args = {0};\n+\n+ buffer = qemu_memalign(HV_HYP_PAGE_SIZE, HV_HYP_PAGE_SIZE);\n+ args.buf_ptr = (uint64_t)buffer;\n+ args.buf_sz = HV_HYP_PAGE_SIZE;\n+ args.type = MSHV_VP_STATE_SIMP;\n+\n+ assert(page);\n+ memcpy(buffer, page, HV_HYP_PAGE_SIZE);\n+\n+ ret = set_vp_state(cpu_fd, &args);\n+ qemu_vfree(buffer);\n+\n+ if (ret < 0) {\n+ error_report(\"failed to set simp\");\n+ return -1;\n+ }\n+\n+ return 0;\n+}\n+\n+int mshv_get_siefp(int cpu_fd, uint8_t *page)\n+{\n+ int ret;\n+ void *buffer;\n+ struct mshv_get_set_vp_state args = {0};\n+\n+ buffer = qemu_memalign(HV_HYP_PAGE_SIZE, HV_HYP_PAGE_SIZE);\n+ args.buf_ptr = (uint64_t)buffer;\n+ args.buf_sz = HV_HYP_PAGE_SIZE;\n+ args.type = MSHV_VP_STATE_SIEFP,\n+\n+ ret = get_vp_state(cpu_fd, &args);\n+\n+ if (ret < 0) {\n+ qemu_vfree(buffer);\n+ error_report(\"failed to get siefp\");\n+ return -1;\n+ }\n+\n+ memcpy(page, buffer, HV_HYP_PAGE_SIZE);\n+ qemu_vfree(buffer);\n+\n+ return 0;\n+}\n+\n+int mshv_set_siefp(int cpu_fd, const uint8_t *page)\n+{\n+ int ret;\n+ void *buffer;\n+ struct mshv_get_set_vp_state args = {0};\n+\n+ buffer = qemu_memalign(HV_HYP_PAGE_SIZE, HV_HYP_PAGE_SIZE);\n+ args.buf_ptr = (uint64_t)buffer;\n+ args.buf_sz = HV_HYP_PAGE_SIZE;\n+ args.type = MSHV_VP_STATE_SIEFP,\n+\n+ assert(page);\n+ memcpy(buffer, page, HV_HYP_PAGE_SIZE);\n+\n+ ret = set_vp_state(cpu_fd, &args);\n+ qemu_vfree(buffer);\n+\n+ if (ret < 0) {\n+ error_report(\"failed to set simp\");\n+ return -1;\n+ }\n+\n+ return 0;\n+}\n", "prefixes": [ "24/34" ] }