get:
Show a patch.

patch:
Update a patch.

put:
Update a patch.

GET /api/patches/2223934/?format=api
HTTP 200 OK
Allow: GET, PUT, PATCH, HEAD, OPTIONS
Content-Type: application/json
Vary: Accept

{
    "id": 2223934,
    "url": "http://patchwork.ozlabs.org/api/patches/2223934/?format=api",
    "web_url": "http://patchwork.ozlabs.org/project/qemu-devel/patch/20260416121116.527927-10-magnuskulke@linux.microsoft.com/",
    "project": {
        "id": 14,
        "url": "http://patchwork.ozlabs.org/api/projects/14/?format=api",
        "name": "QEMU Development",
        "link_name": "qemu-devel",
        "list_id": "qemu-devel.nongnu.org",
        "list_email": "qemu-devel@nongnu.org",
        "web_url": "",
        "scm_url": "",
        "webscm_url": "",
        "list_archive_url": "",
        "list_archive_url_format": "",
        "commit_url_format": ""
    },
    "msgid": "<20260416121116.527927-10-magnuskulke@linux.microsoft.com>",
    "list_archive_url": null,
    "date": "2026-04-16T12:11:16",
    "name": "[v6,9/9] accel/mshv: disable la57 (5lvl paging)",
    "commit_ref": null,
    "pull_url": null,
    "state": "new",
    "archived": false,
    "hash": "85dd21959d688d93a45aee8f0c0a032c89cc961e",
    "submitter": {
        "id": 90753,
        "url": "http://patchwork.ozlabs.org/api/people/90753/?format=api",
        "name": "Magnus Kulke",
        "email": "magnuskulke@linux.microsoft.com"
    },
    "delegate": null,
    "mbox": "http://patchwork.ozlabs.org/project/qemu-devel/patch/20260416121116.527927-10-magnuskulke@linux.microsoft.com/mbox/",
    "series": [
        {
            "id": 500142,
            "url": "http://patchwork.ozlabs.org/api/series/500142/?format=api",
            "web_url": "http://patchwork.ozlabs.org/project/qemu-devel/list/?series=500142",
            "date": "2026-04-16T12:11:08",
            "name": "Support QEMU cpu models in MSHV accelerator",
            "version": 6,
            "mbox": "http://patchwork.ozlabs.org/series/500142/mbox/"
        }
    ],
    "comments": "http://patchwork.ozlabs.org/api/patches/2223934/comments/",
    "check": "pending",
    "checks": "http://patchwork.ozlabs.org/api/patches/2223934/checks/",
    "tags": {},
    "related": [],
    "headers": {
        "Return-Path": "<qemu-devel-bounces+incoming=patchwork.ozlabs.org@nongnu.org>",
        "X-Original-To": "incoming@patchwork.ozlabs.org",
        "Delivered-To": "patchwork-incoming@legolas.ozlabs.org",
        "Authentication-Results": [
            "legolas.ozlabs.org;\n\tdkim=pass (1024-bit key;\n unprotected) header.d=linux.microsoft.com header.i=@linux.microsoft.com\n header.a=rsa-sha256 header.s=default header.b=arGSoVhp;\n\tdkim-atps=neutral",
            "legolas.ozlabs.org;\n spf=pass (sender SPF authorized) smtp.mailfrom=nongnu.org\n (client-ip=209.51.188.17; helo=lists1p.gnu.org;\n envelope-from=qemu-devel-bounces+incoming=patchwork.ozlabs.org@nongnu.org;\n receiver=patchwork.ozlabs.org)"
        ],
        "Received": [
            "from lists1p.gnu.org (lists1p.gnu.org [209.51.188.17])\n\t(using TLSv1.2 with cipher ECDHE-ECDSA-AES256-GCM-SHA384 (256/256 bits))\n\t(No client certificate requested)\n\tby legolas.ozlabs.org (Postfix) with ESMTPS id 4fxH2d1259z1yCv\n\tfor <incoming@patchwork.ozlabs.org>; Thu, 16 Apr 2026 22:12:41 +1000 (AEST)",
            "from localhost ([::1] helo=lists1p.gnu.org)\n\tby lists1p.gnu.org with esmtp (Exim 4.90_1)\n\t(envelope-from <qemu-devel-bounces@nongnu.org>)\n\tid 1wDLZS-0008V5-Fm; Thu, 16 Apr 2026 08:11:46 -0400",
            "from eggs.gnu.org ([2001:470:142:3::10])\n by lists1p.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_256_GCM_SHA384:256)\n (Exim 4.90_1) (envelope-from <magnuskulke@linux.microsoft.com>)\n id 1wDLZQ-0008Ts-Ir\n for qemu-devel@nongnu.org; Thu, 16 Apr 2026 08:11:44 -0400",
            "from linux.microsoft.com ([13.77.154.182])\n by eggs.gnu.org with esmtp (Exim 4.90_1)\n (envelope-from <magnuskulke@linux.microsoft.com>) id 1wDLZO-0002Pm-TF\n for qemu-devel@nongnu.org; Thu, 16 Apr 2026 08:11:44 -0400",
            "from DESKTOP-TUU1E5L.localdomain (unknown [167.220.208.32])\n by linux.microsoft.com (Postfix) with ESMTPSA id D532220B712B;\n Thu, 16 Apr 2026 05:11:40 -0700 (PDT)"
        ],
        "DKIM-Filter": "OpenDKIM Filter v2.11.0 linux.microsoft.com D532220B712B",
        "DKIM-Signature": "v=1; a=rsa-sha256; c=relaxed/relaxed; d=linux.microsoft.com;\n s=default; t=1776341502;\n bh=DZsSiTRYYYWERd2emTJ5lJqB6CAtgOgvEgvN3Gna9x4=;\n h=From:To:Cc:Subject:Date:In-Reply-To:References:From;\n b=arGSoVhpZgU313kM7IngW55g7EMhtu7jh4vnhY8fa8uWSlks0QbTwTR3J87vQIvfv\n bqO0jJWxlNqPh8/KLmBwMih3QK8vyvX4Gv0y+RiYjNQjH7qq5b/zINPqSfnA+rkfOi\n mpGmuxDaTfH87Nb1azeYVsmipkgUU+BVNVx3HWlo=",
        "From": "Magnus Kulke <magnuskulke@linux.microsoft.com>",
        "To": "qemu-devel@nongnu.org",
        "Cc": "Wei Liu <wei.liu@kernel.org>,\n Magnus Kulke <magnuskulke@linux.microsoft.com>,\n Zhao Liu <zhao1.liu@intel.com>, Paolo Bonzini <pbonzini@redhat.com>,\n Wei Liu <liuwe@microsoft.com>, Magnus Kulke <magnuskulke@microsoft.com>",
        "Subject": "[PATCH v6 9/9] accel/mshv: disable la57 (5lvl paging)",
        "Date": "Thu, 16 Apr 2026 14:11:16 +0200",
        "Message-Id": "<20260416121116.527927-10-magnuskulke@linux.microsoft.com>",
        "X-Mailer": "git-send-email 2.34.1",
        "In-Reply-To": "<20260416121116.527927-1-magnuskulke@linux.microsoft.com>",
        "References": "<20260416121116.527927-1-magnuskulke@linux.microsoft.com>",
        "MIME-Version": "1.0",
        "Content-Transfer-Encoding": "8bit",
        "Received-SPF": "pass client-ip=13.77.154.182;\n envelope-from=magnuskulke@linux.microsoft.com; helo=linux.microsoft.com",
        "X-Spam_score_int": "-42",
        "X-Spam_score": "-4.3",
        "X-Spam_bar": "----",
        "X-Spam_report": "(-4.3 / 5.0 requ) BAYES_00=-1.9, DKIM_SIGNED=0.1,\n DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, RCVD_IN_DNSWL_MED=-2.3,\n RCVD_IN_VALIDITY_RPBL_BLOCKED=0.001, RCVD_IN_VALIDITY_SAFE_BLOCKED=0.001,\n SPF_HELO_PASS=-0.001, SPF_PASS=-0.001 autolearn=ham autolearn_force=no",
        "X-Spam_action": "no action",
        "X-BeenThere": "qemu-devel@nongnu.org",
        "X-Mailman-Version": "2.1.29",
        "Precedence": "list",
        "List-Id": "qemu development <qemu-devel.nongnu.org>",
        "List-Unsubscribe": "<https://lists.nongnu.org/mailman/options/qemu-devel>,\n <mailto:qemu-devel-request@nongnu.org?subject=unsubscribe>",
        "List-Archive": "<https://lists.nongnu.org/archive/html/qemu-devel>",
        "List-Post": "<mailto:qemu-devel@nongnu.org>",
        "List-Help": "<mailto:qemu-devel-request@nongnu.org?subject=help>",
        "List-Subscribe": "<https://lists.nongnu.org/mailman/listinfo/qemu-devel>,\n <mailto:qemu-devel-request@nongnu.org?subject=subscribe>",
        "Errors-To": "qemu-devel-bounces+incoming=patchwork.ozlabs.org@nongnu.org",
        "Sender": "qemu-devel-bounces+incoming=patchwork.ozlabs.org@nongnu.org"
    },
    "content": "This change disable la57 paging on the mshv hypervisor on both the\nmshv processor feature bitmap and mask the cpuid feature leaf to the\nguest.\n\nSince the removal of hypervisor-assisted gva=>gpa translation in\n1c85a4a3d7 we have seen MMIO errors in guests on la57-enabled hw. We\nwill have to investigate and test this further.\n\nSigned-off-by: Magnus Kulke <magnuskulke@linux.microsoft.com>\nReviewed-by: Anirudh Rayabharam (Microsoft) <anirudh@anirudhrb.com>\nReviewed-by: Wei Liu <wei.liu@kernel.org>\n---\n accel/mshv/mshv-all.c       |  7 +++++++\n include/system/mshv_int.h   |  2 ++\n target/i386/mshv/mshv-cpu.c | 15 +++++++++++++++\n 3 files changed, 24 insertions(+)",
    "diff": "diff --git a/accel/mshv/mshv-all.c b/accel/mshv/mshv-all.c\nindex c50641f174..a557623531 100644\n--- a/accel/mshv/mshv-all.c\n+++ b/accel/mshv/mshv-all.c\n@@ -142,6 +142,8 @@ static int create_partition(int mshv_fd, int *vm_fd)\n     int ret;\n     uint64_t pt_flags, host_proc_features;\n     union hv_partition_processor_xsave_features disabled_xsave_features;\n+    union hv_partition_processor_features disabled_partition_features = {0};\n+\n     struct mshv_create_partition_v2 args = {0};\n \n     QEMU_BUILD_BUG_ON(MSHV_NUM_CPU_FEATURES_BANKS != 2);\n@@ -177,6 +179,11 @@ static int create_partition(int mshv_fd, int *vm_fd)\n     }\n     args.pt_cpu_fbanks[1] = ~host_proc_features;\n \n+    /* arch-specific features we disable regardless of host support */\n+    mshv_arch_disable_partition_proc_features(&disabled_partition_features);\n+    args.pt_cpu_fbanks[0] |= disabled_partition_features.as_uint64[0];\n+    args.pt_cpu_fbanks[1] |= disabled_partition_features.as_uint64[1];\n+\n     /* populate args structure */\n     args.pt_flags = pt_flags;\n     args.pt_isolation = MSHV_PT_ISOLATION_NONE;\ndiff --git a/include/system/mshv_int.h b/include/system/mshv_int.h\nindex 35386c422f..ca156cdf4b 100644\n--- a/include/system/mshv_int.h\n+++ b/include/system/mshv_int.h\n@@ -94,6 +94,8 @@ void mshv_arch_init_vcpu(CPUState *cpu);\n void mshv_arch_destroy_vcpu(CPUState *cpu);\n void mshv_arch_amend_proc_features(\n     union hv_partition_synthetic_processor_features *features);\n+void mshv_arch_disable_partition_proc_features(\n+     union hv_partition_processor_features *disabled_features);\n int mshv_arch_post_init_vm(int vm_fd);\n \n typedef struct mshv_root_hvcall mshv_root_hvcall;\ndiff --git a/target/i386/mshv/mshv-cpu.c b/target/i386/mshv/mshv-cpu.c\nindex b90e2983c8..eb3e167c0d 100644\n--- a/target/i386/mshv/mshv-cpu.c\n+++ b/target/i386/mshv/mshv-cpu.c\n@@ -1129,6 +1129,12 @@ void mshv_arch_amend_proc_features(\n     features->access_guest_idle_reg = 1;\n }\n \n+void mshv_arch_disable_partition_proc_features(\n+     union hv_partition_processor_features *disabled_features)\n+{\n+    disabled_features->la57_support = 1;\n+}\n+\n static int set_memory_info(const struct hyperv_message *msg,\n                            struct hv_x64_memory_intercept_message *info)\n {\n@@ -1682,6 +1688,15 @@ uint32_t mshv_get_supported_cpuid(uint32_t func, uint32_t idx, int reg)\n         ret &= ~CPUID_EXT_VMX;\n     }\n \n+    if (func == 0x07 && idx == 0 && reg == R_ECX) {\n+        /*\n+         * LA57 (5-level paging) causes incorrect GVA=>GPA translations\n+         * in the instruction decoder/emulator. Disable until page table\n+         * walk in x86_mmu.c works w/ 5-level paging.\n+         */\n+        ret &= ~CPUID_7_0_ECX_LA57;\n+    }\n+\n     return ret;\n }\n \n",
    "prefixes": [
        "v6",
        "9/9"
    ]
}