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GET /api/patches/2223897/?format=api
{ "id": 2223897, "url": "http://patchwork.ozlabs.org/api/patches/2223897/?format=api", "web_url": "http://patchwork.ozlabs.org/project/linux-pci/patch/20260416111422.183860-4-sherry.sun@nxp.com/", "project": { "id": 28, "url": "http://patchwork.ozlabs.org/api/projects/28/?format=api", "name": "Linux PCI development", "link_name": "linux-pci", "list_id": "linux-pci.vger.kernel.org", "list_email": "linux-pci@vger.kernel.org", "web_url": null, "scm_url": null, "webscm_url": null, "list_archive_url": "", "list_archive_url_format": "", "commit_url_format": "" }, "msgid": "<20260416111422.183860-4-sherry.sun@nxp.com>", "list_archive_url": null, "date": "2026-04-16T11:14:13", "name": "[V13,03/12] PCI: imx6: Assert PERST# before enabling regulators", "commit_ref": null, "pull_url": null, "state": "new", "archived": false, "hash": "62d1ebc7c98301a0f45a12b0e2759bcf378331ba", "submitter": { "id": 77063, "url": "http://patchwork.ozlabs.org/api/people/77063/?format=api", "name": "Sherry Sun", "email": "sherry.sun@nxp.com" }, "delegate": null, "mbox": "http://patchwork.ozlabs.org/project/linux-pci/patch/20260416111422.183860-4-sherry.sun@nxp.com/mbox/", "series": [ { "id": 500134, "url": "http://patchwork.ozlabs.org/api/series/500134/?format=api", "web_url": "http://patchwork.ozlabs.org/project/linux-pci/list/?series=500134", "date": "2026-04-16T11:14:11", "name": "pci-imx6: Add support for parsing the reset property in new Root Port binding", "version": 13, "mbox": "http://patchwork.ozlabs.org/series/500134/mbox/" } ], "comments": "http://patchwork.ozlabs.org/api/patches/2223897/comments/", "check": "pending", "checks": "http://patchwork.ozlabs.org/api/patches/2223897/checks/", "tags": {}, "related": [], "headers": { "Return-Path": "\n <linux-pci+bounces-52600-incoming=patchwork.ozlabs.org@vger.kernel.org>", "X-Original-To": [ "incoming@patchwork.ozlabs.org", "linux-pci@vger.kernel.org" ], "Delivered-To": "patchwork-incoming@legolas.ozlabs.org", "Authentication-Results": [ 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"DKIM-Signature": "v=1; a=rsa-sha256; c=relaxed/relaxed; d=nxp.com; s=selector1;\n h=From:Date:Subject:Message-ID:Content-Type:MIME-Version:X-MS-Exchange-SenderADCheck;\n bh=jGVHqOPs/4jMGkcftvgjRX5BCFrejfz9iGaZzDJBg8s=;\n b=nTiCyp4st81yTX7ACgopFjVtUd5tYEVE0oSYuubPscjDF4TwornARmmsGmKjAc68ubGm01o+c1ycXtvTFsLgcOA1znMphBXvRXXDa2SPzeBADwww9L03cKRwcT+EpJfC3MaubBE+jYzevOKVA2c3GwqOW24o5a9kPWbkXnAdCMHDYQFWof2HnEuIl+b96SWMRzVl5r0I6xz7366b/3n5X6/6/1qFnys6f227KeqWX+bxq7PHYnk5KNTa+Ps9R9jSNzkDysXrOKgcDX4Vm2FoJeGU6Nuf83uAKe4tj70c7avIJsgBuMd31DOYDkOoTXTnjD1xL0F/729HefG4FxOARg==", "From": "Sherry Sun <sherry.sun@nxp.com>", "To": "robh@kernel.org,\n\tkrzk+dt@kernel.org,\n\tconor+dt@kernel.org,\n\tFrank.Li@nxp.com,\n\ts.hauer@pengutronix.de,\n\tkernel@pengutronix.de,\n\tfestevam@gmail.com,\n\tlpieralisi@kernel.org,\n\tkwilczynski@kernel.org,\n\tmani@kernel.org,\n\tbhelgaas@google.com,\n\thongxing.zhu@nxp.com,\n\tl.stach@pengutronix.de", "Cc": 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/pvjZxRQ4W+wL95iu+5oZnw6hK2m1Ofp0pziWQkxdK1sJgoIDZa+UIOq1O0I6pkUnuX1gZZtjNvw6tJp7pIdZKpe/zMbKwYvHmCNHpVcrjvOsaD7KNLnVyBzurRhiOqpirDzUKC16Mv0QSr52Aqn3zazo1+Cd8TxDrjoy8lwqVOGwYYHEOSrhKTwdD+QaLIAL5UNp6mG12ZJju80GKd5tutCoxcfTUp7/Jml7qHy9645FVTHfXIEM/nliMGYfvbBdpTX18Kv7J2NZVsTUY2xyo6aguBDacntx+wVX+ikyHoVsfcE2siNFMiWkeXmpOW7evax/Zs19e/a3TLgX+GwMmDRWRvCVDDZROlSOByN1x0EgJbbrmPuZHCDRmyC/XwxFV74abaxn69D4F9HjiKr6VlBB7HThmGolAu8KgOKX6YnMsUdHOCp2JZE7nV18uOPzqi5T4bLMQHiX7jE4kL/LSkN2zsyvmux/iAlKW73VQc5+zds2TWkt93bCEML5MqxmVIF3I+bggRWoWnVYNlXyU+Cr2/4voB3FUcZYZRy7+EQeUfP/+TRhrM8rPTwoF2aU/mm35/zSTkOAS0YeAzmiVGV+XrvmVJUwyMCT88wp6MYU4gXdGMjQ04hJk0m4piFcXfbyBFVJI5V8U9R+JYuok5lvqiq3rf0mceMZP06qbY+w7BiTd/c7TF4X4Y3GPxLaCyZoRlg/z1CyDKh9z0wFrln1qHFLYe7NWuNX2pnRGgBpCTesd3y4L61heRfUt3lDZcIFEmOK+WSraajIaMb+Yc31nvJ4QANMjWfFgZ0YxK55+cQbO9JVGo1mA+WVPCkK1e1uKJjzc5xv5tc4lbV/nM+47vvTOo0Yv6dVnIz8hFouippnqzstiJFE2YxdbkldDexec+GmN4M2j9zWOy84tyXvNmnPTQsfZ625lFCDWrFAf37Oj3kvZlxQnD6q8iItxGKkviRuGA+i+LKYE76K4ocVeNiunVqkJJ9YZ0gBTJu6DGVqmgs3j1wqYPY+fBfVop7jSkmvjkel56AAjFTj977xzcrMen0yIPjYk+MvNTjZc46v7fbdQszXzErdSKrD6QuoxPwlaQZLvTf6QyvQb8kH1bqGJzriVmKZMTYbDlVHMsBEwRQG+09QARJmYPYhy+wlWYv/Kp5ZzdaxKaD9CJxPKQyMfARlCvMl/kb+U9TxIyR85NhRRs9adxCv84KFjZeFJGKLIXAhRQf6K8T5/Ny5+yGAs9C6q12W7mpfuZNveEdfS7rGFZjhZBS/5vgUQhrb16v6BPWNHF/6iMusYP69/3Ud0fThqnxIVHyV1j5FUVZBPcJfVOpm4ASd5dF9E+F/e9jKguMobQLmFkABGqSTWEExujKB8GBP73nAg1+eRvD691SfRAw5X9svIV+ApQP399oEVn2Oi3s5tiqwQVinzD8kQyDrGQ884WEi3bohJK0TaCeMdOXZTjLcbAr4nibIgllJwJ9gL+zWujEca1co1x8FENfqRLR+hsn+V1PHEo1uveKG/CdnhQq6tLn7P+yo0LRKy6I2omJVes9haYxl4NG1Dm80raFvIekLAtMslqu9OqIsc7fq34uSQ9jYRQU717JdT4kNBim4qTAB26/WQeAOgTZpY+TbP1FKqjBkjsmi94CY5erXEJDmfHQ6lYW2zSvcOFapTADF8gWNe73hXQPu/0QlIMtwpKtIavkoSWmQYrZCZX3HN7fCIAD0FP4/vATva+siXO59HSlEw==", "X-OriginatorOrg": "nxp.com", "X-MS-Exchange-CrossTenant-Network-Message-Id": "\n df8c594e-962a-428c-4506-08de9ba92360", "X-MS-Exchange-CrossTenant-AuthSource": "VI0PR04MB12114.eurprd04.prod.outlook.com", "X-MS-Exchange-CrossTenant-AuthAs": "Internal", "X-MS-Exchange-CrossTenant-OriginalArrivalTime": "16 Apr 2026 11:13:07.9233\n (UTC)", "X-MS-Exchange-CrossTenant-FromEntityHeader": "Hosted", "X-MS-Exchange-CrossTenant-Id": "686ea1d3-bc2b-4c6f-a92c-d99c5c301635", "X-MS-Exchange-CrossTenant-MailboxType": "HOSTED", "X-MS-Exchange-CrossTenant-UserPrincipalName": "\n r/1N35lPVHHduUoTj5pJi1xDAXgeS5jeSDjk+un6/vayCTJU6stbklaHXq++IjnPa5MgIB6fU88npZ5sdlWKlw==", "X-MS-Exchange-Transport-CrossTenantHeadersStamped": "AS8PR04MB8804" }, "content": "The PCIe endpoint may start responding or driving signals as soon as\nits supply is enabled, even before the reference clock is stable.\nAsserting PERST# before enabling the regulator ensures that the\nendpoint remains in reset throughout the entire power-up sequence,\nuntil both power and refclk are known to be stable and link\ninitialization can safely begin.\n\nCurrently, the driver enables the vpcie3v3aux regulator in\nimx_pcie_probe() before PERST# is asserted in imx_pcie_host_init(),\nwhich may cause PCIe endpoint undefined behavior during early\npower-up. However, there is no issue so far because PERST# is\nrequested as GPIOD_OUT_HIGH in imx_pcie_probe(), which guarantees\nthat PERST# is asserted before enabling the vpcie3v3aux regulator.\n\nThis is prepare for the upcoming changes that will parse the reset\nproperty using the new Root Port binding, which will use GPIOD_ASIS\nwhen requesting the reset GPIO. With GPIOD_ASIS, the GPIO state is not\nguaranteed, so explicit sequencing is required.\n\nFix the power sequencing by:\n1. Moving vpcie3v3aux regulator enable from probe to\n imx_pcie_host_init(), where it can be properly sequenced with PERST#.\n2. Moving imx_pcie_assert_perst() before regulator and clock enable to\n ensure correct ordering.\n\nSigned-off-by: Sherry Sun <sherry.sun@nxp.com>\n---\n drivers/pci/controller/dwc/pci-imx6.c | 49 +++++++++++++++++++++------\n 1 file changed, 39 insertions(+), 10 deletions(-)", "diff": "diff --git a/drivers/pci/controller/dwc/pci-imx6.c b/drivers/pci/controller/dwc/pci-imx6.c\nindex e35044cc5218..735127ed1455 100644\n--- a/drivers/pci/controller/dwc/pci-imx6.c\n+++ b/drivers/pci/controller/dwc/pci-imx6.c\n@@ -168,6 +168,8 @@ struct imx_pcie {\n \tu32\t\t\ttx_swing_full;\n \tu32\t\t\ttx_swing_low;\n \tstruct regulator\t*vpcie;\n+\tstruct regulator\t*vpcie_aux;\n+\tbool\t\t\tvpcie_aux_enabled;\n \tstruct regulator\t*vph;\n \tvoid __iomem\t\t*phy_base;\n \n@@ -1222,6 +1224,13 @@ static void imx_pcie_disable_device(struct pci_host_bridge *bridge,\n \timx_pcie_remove_lut(imx_pcie, pci_dev_id(pdev));\n }\n \n+static void imx_pcie_vpcie_aux_disable(void *data)\n+{\n+\tstruct regulator *vpcie_aux = data;\n+\n+\tregulator_disable(vpcie_aux);\n+}\n+\n static void imx_pcie_assert_perst(struct imx_pcie *imx_pcie, bool assert)\n {\n \tif (assert) {\n@@ -1242,6 +1251,24 @@ static int imx_pcie_host_init(struct dw_pcie_rp *pp)\n \tstruct imx_pcie *imx_pcie = to_imx_pcie(pci);\n \tint ret;\n \n+\timx_pcie_assert_perst(imx_pcie, true);\n+\n+\t/* Keep 3.3Vaux supply enabled for the entire PCIe controller lifecycle */\n+\tif (imx_pcie->vpcie_aux && !imx_pcie->vpcie_aux_enabled) {\n+\t\tret = regulator_enable(imx_pcie->vpcie_aux);\n+\t\tif (ret) {\n+\t\t\tdev_err(dev, \"failed to enable vpcie_aux regulator: %d\\n\",\n+\t\t\t\tret);\n+\t\t\treturn ret;\n+\t\t}\n+\t\timx_pcie->vpcie_aux_enabled = true;\n+\n+\t\tret = devm_add_action_or_reset(dev, imx_pcie_vpcie_aux_disable,\n+\t\t\t\t\t imx_pcie->vpcie_aux);\n+\t\tif (ret)\n+\t\t\treturn ret;\n+\t}\n+\n \tif (imx_pcie->vpcie) {\n \t\tret = regulator_enable(imx_pcie->vpcie);\n \t\tif (ret) {\n@@ -1251,25 +1278,24 @@ static int imx_pcie_host_init(struct dw_pcie_rp *pp)\n \t\t}\n \t}\n \n+\tret = imx_pcie_clk_enable(imx_pcie);\n+\tif (ret) {\n+\t\tdev_err(dev, \"unable to enable pcie clocks: %d\\n\", ret);\n+\t\tgoto err_reg_disable;\n+\t}\n+\n \tif (pp->bridge && imx_check_flag(imx_pcie, IMX_PCIE_FLAG_HAS_LUT)) {\n \t\tpp->bridge->enable_device = imx_pcie_enable_device;\n \t\tpp->bridge->disable_device = imx_pcie_disable_device;\n \t}\n \n \timx_pcie_assert_core_reset(imx_pcie);\n-\timx_pcie_assert_perst(imx_pcie, true);\n \n \tif (imx_pcie->drvdata->init_phy)\n \t\timx_pcie->drvdata->init_phy(imx_pcie);\n \n \timx_pcie_configure_type(imx_pcie);\n \n-\tret = imx_pcie_clk_enable(imx_pcie);\n-\tif (ret) {\n-\t\tdev_err(dev, \"unable to enable pcie clocks: %d\\n\", ret);\n-\t\tgoto err_reg_disable;\n-\t}\n-\n \tif (imx_pcie->phy) {\n \t\tret = phy_init(imx_pcie->phy);\n \t\tif (ret) {\n@@ -1782,9 +1808,12 @@ static int imx_pcie_probe(struct platform_device *pdev)\n \tof_property_read_u32(node, \"fsl,max-link-speed\", &pci->max_link_speed);\n \timx_pcie->supports_clkreq = of_property_read_bool(node, \"supports-clkreq\");\n \n-\tret = devm_regulator_get_enable_optional(&pdev->dev, \"vpcie3v3aux\");\n-\tif (ret < 0 && ret != -ENODEV)\n-\t\treturn dev_err_probe(dev, ret, \"failed to enable Vaux supply\\n\");\n+\timx_pcie->vpcie_aux = devm_regulator_get_optional(&pdev->dev, \"vpcie3v3aux\");\n+\tif (IS_ERR(imx_pcie->vpcie_aux)) {\n+\t\tif (PTR_ERR(imx_pcie->vpcie_aux) != -ENODEV)\n+\t\t\treturn PTR_ERR(imx_pcie->vpcie_aux);\n+\t\timx_pcie->vpcie_aux = NULL;\n+\t}\n \n \timx_pcie->vpcie = devm_regulator_get_optional(&pdev->dev, \"vpcie\");\n \tif (IS_ERR(imx_pcie->vpcie)) {\n", "prefixes": [ "V13", "03/12" ] }