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GET /api/patches/2222953/?format=api
{ "id": 2222953, "url": "http://patchwork.ozlabs.org/api/patches/2222953/?format=api", "web_url": "http://patchwork.ozlabs.org/project/qemu-devel/patch/20260414053715.1378021-5-gaurav.sharma_7@nxp.com/", "project": { "id": 14, "url": "http://patchwork.ozlabs.org/api/projects/14/?format=api", "name": "QEMU Development", "link_name": "qemu-devel", "list_id": "qemu-devel.nongnu.org", "list_email": "qemu-devel@nongnu.org", "web_url": "", "scm_url": "", "webscm_url": "", "list_archive_url": "", "list_archive_url_format": "", "commit_url_format": "" }, "msgid": "<20260414053715.1378021-5-gaurav.sharma_7@nxp.com>", "list_archive_url": null, "date": "2026-04-14T05:37:04", "name": "[PATCHv5,04/15] hw/arm/fsl-imx8mm: Add Clock Control Module IP to iMX8MM", "commit_ref": null, "pull_url": null, "state": "new", "archived": false, "hash": "cadbf6e0ae993693a554b122330a1682ede23a01", "submitter": { "id": 92057, "url": "http://patchwork.ozlabs.org/api/people/92057/?format=api", "name": "Gaurav Sharma", "email": "gaurav.sharma_7@nxp.com" }, "delegate": null, "mbox": "http://patchwork.ozlabs.org/project/qemu-devel/patch/20260414053715.1378021-5-gaurav.sharma_7@nxp.com/mbox/", "series": [ { "id": 499777, "url": "http://patchwork.ozlabs.org/api/series/499777/?format=api", "web_url": "http://patchwork.ozlabs.org/project/qemu-devel/list/?series=499777", "date": "2026-04-14T05:37:06", "name": "Adding comprehensive support for i.MX8MM EVK board", "version": 1, "mbox": "http://patchwork.ozlabs.org/series/499777/mbox/" } ], "comments": "http://patchwork.ozlabs.org/api/patches/2222953/comments/", "check": "pending", "checks": "http://patchwork.ozlabs.org/api/patches/2222953/checks/", "tags": {}, "related": [], "headers": { "Return-Path": "<qemu-devel-bounces+incoming=patchwork.ozlabs.org@nongnu.org>", "X-Original-To": "incoming@patchwork.ozlabs.org", "Delivered-To": "patchwork-incoming@legolas.ozlabs.org", "Authentication-Results": "legolas.ozlabs.org;\n spf=pass (sender SPF authorized) smtp.mailfrom=nongnu.org\n (client-ip=209.51.188.17; helo=lists1p.gnu.org;\n envelope-from=qemu-devel-bounces+incoming=patchwork.ozlabs.org@nongnu.org;\n receiver=patchwork.ozlabs.org)", "Received": [ "from lists1p.gnu.org (lists1p.gnu.org [209.51.188.17])\n\t(using TLSv1.2 with cipher ECDHE-ECDSA-AES256-GCM-SHA384 (256/256 bits))\n\t(No client certificate requested)\n\tby legolas.ozlabs.org (Postfix) with ESMTPS id 4fvtPy71RJz1y2d\n\tfor <incoming@patchwork.ozlabs.org>; Tue, 14 Apr 2026 15:39:34 +1000 (AEST)", "from localhost ([::1] helo=lists1p.gnu.org)\n\tby lists1p.gnu.org with esmtp (Exim 4.90_1)\n\t(envelope-from <qemu-devel-bounces@nongnu.org>)\n\tid 1wCWSn-0003p1-PD; Tue, 14 Apr 2026 01:37:29 -0400", "from eggs.gnu.org ([2001:470:142:3::10])\n by lists1p.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_256_GCM_SHA384:256)\n (Exim 4.90_1) (envelope-from <gaurav.sharma_7@nxp.com>)\n id 1wCWSj-0003nV-63\n for qemu-devel@nongnu.org; Tue, 14 Apr 2026 01:37:27 -0400", "from inva021.nxp.com ([92.121.34.21])\n by eggs.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_256_GCM_SHA384:256)\n (Exim 4.90_1) (envelope-from <gaurav.sharma_7@nxp.com>)\n id 1wCWSg-00044C-HE\n for qemu-devel@nongnu.org; Tue, 14 Apr 2026 01:37:24 -0400", "from inva021.nxp.com (localhost [127.0.0.1])\n by inva021.eu-rdc02.nxp.com (Postfix) with ESMTP id 6265B201B48;\n Tue, 14 Apr 2026 07:37:21 +0200 (CEST)", "from aprdc01srsp001v.ap-rdc01.nxp.com\n (aprdc01srsp001v.ap-rdc01.nxp.com [165.114.16.16])\n by inva021.eu-rdc02.nxp.com (Postfix) with ESMTP id 2A89020224D;\n Tue, 14 Apr 2026 07:37:21 +0200 (CEST)", "from lsv031015.swis.in-blr01.nxp.com\n (lsv031015.swis.in-blr01.nxp.com [10.12.177.77])\n by aprdc01srsp001v.ap-rdc01.nxp.com (Postfix) with ESMTP id 4AB7C1802227;\n Tue, 14 Apr 2026 13:37:20 +0800 (+08)" ], "From": "Gaurav Sharma <gaurav.sharma_7@nxp.com>", "To": "qemu-devel@nongnu.org", "Cc": "pbonzini@redhat.com, peter.maydell@linaro.org,\n Gaurav Sharma <gaurav.sharma_7@nxp.com>,\n Bernhard Beschow <shentey@gmail.com>", "Subject": "[PATCHv5 04/15] hw/arm/fsl-imx8mm: Add Clock Control Module IP to\n iMX8MM", "Date": "Tue, 14 Apr 2026 11:07:04 +0530", "Message-Id": "<20260414053715.1378021-5-gaurav.sharma_7@nxp.com>", "X-Mailer": "git-send-email 2.34.1", "In-Reply-To": "<20260414053715.1378021-1-gaurav.sharma_7@nxp.com>", "References": "<20260414053715.1378021-1-gaurav.sharma_7@nxp.com>", "MIME-Version": "1.0", "Content-Transfer-Encoding": "8bit", "X-Virus-Scanned": "ClamAV using ClamSMTP", "Received-SPF": "pass client-ip=92.121.34.21;\n envelope-from=gaurav.sharma_7@nxp.com; helo=inva021.nxp.com", "X-Spam_score_int": "-41", "X-Spam_score": "-4.2", "X-Spam_bar": "----", "X-Spam_report": "(-4.2 / 5.0 requ) BAYES_00=-1.9, RCVD_IN_DNSWL_MED=-2.3,\n RCVD_IN_VALIDITY_RPBL_BLOCKED=0.001, RCVD_IN_VALIDITY_SAFE_BLOCKED=0.001,\n SPF_HELO_NONE=0.001, SPF_PASS=-0.001 autolearn=ham autolearn_force=no", "X-Spam_action": "no action", "X-BeenThere": "qemu-devel@nongnu.org", "X-Mailman-Version": "2.1.29", "Precedence": "list", "List-Id": "qemu development <qemu-devel.nongnu.org>", "List-Unsubscribe": "<https://lists.nongnu.org/mailman/options/qemu-devel>,\n <mailto:qemu-devel-request@nongnu.org?subject=unsubscribe>", "List-Archive": "<https://lists.nongnu.org/archive/html/qemu-devel>", "List-Post": "<mailto:qemu-devel@nongnu.org>", "List-Help": "<mailto:qemu-devel-request@nongnu.org?subject=help>", "List-Subscribe": "<https://lists.nongnu.org/mailman/listinfo/qemu-devel>,\n <mailto:qemu-devel-request@nongnu.org?subject=subscribe>", "Errors-To": "qemu-devel-bounces+incoming=patchwork.ozlabs.org@nongnu.org", "Sender": "qemu-devel-bounces+incoming=patchwork.ozlabs.org@nongnu.org" }, "content": "Add the Clock Control Module (CCM) device to i.MX8MM SoC.\nThe CCM implementation is shared with i.MX8MP as the register\nlayout is identical between the two variants.Hence iMX8MM will\nbe using the source of iMX8MP CCM.\n\nReviewed-by: Bernhard Beschow <shentey@gmail.com>\nSigned-off-by: Gaurav Sharma <gaurav.sharma_7@nxp.com>\n---\n hw/arm/Kconfig | 1 +\n hw/arm/fsl-imx8mm.c | 10 ++++++++++\n include/hw/arm/fsl-imx8mm.h | 2 ++\n 3 files changed, 13 insertions(+)", "diff": "diff --git a/hw/arm/Kconfig b/hw/arm/Kconfig\nindex 1a9193fe1a..c785f3f3a3 100644\n--- a/hw/arm/Kconfig\n+++ b/hw/arm/Kconfig\n@@ -622,6 +622,7 @@ config FSL_IMX8MM\n bool\n select ARM_GIC\n select FSL_IMX8MP_ANALOG\n+ select FSL_IMX8MP_CCM\n select IMX\n \n config FSL_IMX8MM_EVK\ndiff --git a/hw/arm/fsl-imx8mm.c b/hw/arm/fsl-imx8mm.c\nindex 5145d1d72c..ec7c467068 100644\n--- a/hw/arm/fsl-imx8mm.c\n+++ b/hw/arm/fsl-imx8mm.c\n@@ -169,6 +169,8 @@ static void fsl_imx8mm_init(Object *obj)\n \n object_initialize_child(obj, \"gic\", &s->gic, gicv3_class_name());\n \n+ object_initialize_child(obj, \"ccm\", &s->ccm, TYPE_IMX8MP_CCM);\n+\n object_initialize_child(obj, \"analog\", &s->analog, TYPE_IMX8MP_ANALOG);\n \n for (i = 0; i < FSL_IMX8MM_NUM_UARTS; i++) {\n@@ -305,6 +307,13 @@ static void fsl_imx8mm_realize(DeviceState *dev, Error **errp)\n }\n }\n \n+ /* CCM */\n+ if (!sysbus_realize(SYS_BUS_DEVICE(&s->ccm), errp)) {\n+ return;\n+ }\n+ sysbus_mmio_map(SYS_BUS_DEVICE(&s->ccm), 0,\n+ fsl_imx8mm_memmap[FSL_IMX8MM_CCM].addr);\n+\n /* Analog */\n object_property_set_uint(OBJECT(&s->analog), \"arm-pll-fdiv-ctl0-reset\",\n 0x000fa030, &error_abort);\n@@ -350,6 +359,7 @@ static void fsl_imx8mm_realize(DeviceState *dev, Error **errp)\n for (i = 0; i < ARRAY_SIZE(fsl_imx8mm_memmap); i++) {\n switch (i) {\n case FSL_IMX8MM_ANA_PLL:\n+ case FSL_IMX8MM_CCM:\n case FSL_IMX8MM_GIC_DIST:\n case FSL_IMX8MM_GIC_REDIST:\n case FSL_IMX8MM_RAM:\ndiff --git a/include/hw/arm/fsl-imx8mm.h b/include/hw/arm/fsl-imx8mm.h\nindex 0a020c32a1..df35f0f5ac 100644\n--- a/include/hw/arm/fsl-imx8mm.h\n+++ b/include/hw/arm/fsl-imx8mm.h\n@@ -14,6 +14,7 @@\n #include \"hw/char/imx_serial.h\"\n #include \"hw/intc/arm_gicv3_common.h\"\n #include \"hw/misc/imx8mp_analog.h\"\n+#include \"hw/misc/imx8mp_ccm.h\"\n #include \"qom/object.h\"\n #include \"qemu/units.h\"\n \n@@ -34,6 +35,7 @@ struct FslImx8mmState {\n \n ARMCPU cpu[FSL_IMX8MM_NUM_CPUS];\n GICv3State gic;\n+ IMX8MPCCMState ccm;\n IMX8MPAnalogState analog;\n IMXSerialState uart[FSL_IMX8MM_NUM_UARTS];\n MemoryRegion ocram;\n", "prefixes": [ "PATCHv5", "04/15" ] }