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GET /api/patches/2221972/?format=api
{ "id": 2221972, "url": "http://patchwork.ozlabs.org/api/patches/2221972/?format=api", "web_url": "http://patchwork.ozlabs.org/project/gcc/patch/PAWPR08MB8982692EB1AF594BBC0230C483592@PAWPR08MB8982.eurprd08.prod.outlook.com/", "project": { "id": 17, "url": "http://patchwork.ozlabs.org/api/projects/17/?format=api", "name": "GNU Compiler Collection", "link_name": "gcc", "list_id": "gcc-patches.gcc.gnu.org", "list_email": "gcc-patches@gcc.gnu.org", "web_url": null, "scm_url": null, "webscm_url": null, "list_archive_url": "", "list_archive_url_format": "", "commit_url_format": "" }, "msgid": "<PAWPR08MB8982692EB1AF594BBC0230C483592@PAWPR08MB8982.eurprd08.prod.outlook.com>", "list_archive_url": null, "date": "2026-04-10T14:04:22", "name": "AArch64: Cleanup code models", "commit_ref": null, "pull_url": null, "state": "new", "archived": false, "hash": "43f937720f9f3f8b642cfa1ddc9200168ab0e8d5", "submitter": { "id": 67598, "url": "http://patchwork.ozlabs.org/api/people/67598/?format=api", "name": "Wilco Dijkstra", "email": "Wilco.Dijkstra@arm.com" }, "delegate": null, "mbox": "http://patchwork.ozlabs.org/project/gcc/patch/PAWPR08MB8982692EB1AF594BBC0230C483592@PAWPR08MB8982.eurprd08.prod.outlook.com/mbox/", "series": [ { "id": 499465, "url": "http://patchwork.ozlabs.org/api/series/499465/?format=api", "web_url": "http://patchwork.ozlabs.org/project/gcc/list/?series=499465", "date": "2026-04-10T14:04:22", "name": "AArch64: Cleanup code models", "version": 1, "mbox": "http://patchwork.ozlabs.org/series/499465/mbox/" } ], "comments": "http://patchwork.ozlabs.org/api/patches/2221972/comments/", "check": "pending", "checks": "http://patchwork.ozlabs.org/api/patches/2221972/checks/", "tags": {}, "related": [], "headers": { "Return-Path": "<gcc-patches-bounces~incoming=patchwork.ozlabs.org@gcc.gnu.org>", "X-Original-To": [ "incoming@patchwork.ozlabs.org", "gcc-patches@gcc.gnu.org" ], "Delivered-To": [ "patchwork-incoming@legolas.ozlabs.org", "gcc-patches@gcc.gnu.org" ], "Authentication-Results": [ "legolas.ozlabs.org;\n\tdkim=pass (1024-bit key;\n unprotected) header.d=arm.com header.i=@arm.com header.a=rsa-sha256\n header.s=selector1 header.b=RjI7YKu4;\n\tdkim=pass (1024-bit key) header.d=arm.com header.i=@arm.com\n header.a=rsa-sha256 header.s=selector1 header.b=RjI7YKu4;\n\tdkim-atps=neutral", "legolas.ozlabs.org;\n spf=pass (sender SPF authorized) smtp.mailfrom=gcc.gnu.org\n (client-ip=2620:52:6:3111::32; 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Ip=[4.158.2.129];\n Helo=[outbound-uk1.az.dlp.m.darktrace.com]", "X-MS-Exchange-CrossTenant-AuthSource": "\n DU2PEPF00028D0E.eurprd03.prod.outlook.com", "X-MS-Exchange-CrossTenant-AuthAs": "Anonymous", "X-MS-Exchange-CrossTenant-FromEntityHeader": "HybridOnPrem", "X-BeenThere": "gcc-patches@gcc.gnu.org", "X-Mailman-Version": "2.1.30", "Precedence": "list", "List-Id": "Gcc-patches mailing list <gcc-patches.gcc.gnu.org>", "List-Unsubscribe": "<https://gcc.gnu.org/mailman/options/gcc-patches>,\n <mailto:gcc-patches-request@gcc.gnu.org?subject=unsubscribe>", "List-Archive": "<https://gcc.gnu.org/pipermail/gcc-patches/>", "List-Post": "<mailto:gcc-patches@gcc.gnu.org>", "List-Help": "<mailto:gcc-patches-request@gcc.gnu.org?subject=help>", "List-Subscribe": "<https://gcc.gnu.org/mailman/listinfo/gcc-patches>,\n <mailto:gcc-patches-request@gcc.gnu.org?subject=subscribe>", "Errors-To": "gcc-patches-bounces~incoming=patchwork.ozlabs.org@gcc.gnu.org" }, "content": "Cleanup code models - remove the confusing AARCH64_CMODEL_TINY_PIC,\nAARCH64_CMODEL_SMALL_PIC and AARCH64_CMODEL_SMALL_SPIC. This simplifies\na lot of code. No change to generated code.\n\nPasses regress, OK for commit?\n\ngcc:\n\t* config/aarch64/aarch64.h (HAS_LONG_COND_BRANCH): Unused, remove.\n\t(HAS_LONG_UNCOND_BRANCH): unused, remove.\n\t* config/aarch64/aarch64.cc (aarch64_use_pseudo_pic_reg): Declare.\n\t(aarch64_rtx_costs): Update.\n\t(aarch64_override_options_after_change_1): Likewise.\n\t(initialize_aarch64_code_model): Simplify.\n\t(aarch64_classify_tls_symbol): Likewise.\n\t(aarch64_classify_symbol): Simplify, remove duplicated code.\n\t(aarch64_asm_preferred_eh_data_format): Update.\n\t(aarch64_use_pseudo_pic_reg): Update.\n\t* config/aarch64/aarch64-c.cc (aarch64_update_cpp_builtins):\n\tRemove uses of AARCH64_CMODEL_TINY_PIC, AARCH64_CMODEL_SMALL_PIC,\n\tand AARCH64_CMODEL_SMALL_SPIC.\n\t* config/aarch64/aarch64-opts.h (aarch64_code_model):\n\tRemove AARCH64_CMODEL_TINY_PIC, AARCH64_CMODEL_SMALL_PIC and\n\tAARCH64_CMODEL_SMALL_SPIC.\n\n---", "diff": "diff --git a/gcc/config/aarch64/aarch64-c.cc b/gcc/config/aarch64/aarch64-c.cc\nindex b2cc3e67f6daf8045ce0cc9a5870edf06591ebec..9c9918151e7514781c98c0b41e59d45a131a1271 100644\n--- a/gcc/config/aarch64/aarch64-c.cc\n+++ b/gcc/config/aarch64/aarch64-c.cc\n@@ -181,11 +181,9 @@ aarch64_update_cpp_builtins (cpp_reader *pfile)\n switch (aarch64_cmodel)\n {\n case AARCH64_CMODEL_TINY:\n- case AARCH64_CMODEL_TINY_PIC:\n \tbuiltin_define (\"__AARCH64_CMODEL_TINY__\");\n \tbreak;\n case AARCH64_CMODEL_SMALL:\n- case AARCH64_CMODEL_SMALL_PIC:\n \tbuiltin_define (\"__AARCH64_CMODEL_SMALL__\");\n \tbreak;\n case AARCH64_CMODEL_LARGE:\ndiff --git a/gcc/config/aarch64/aarch64-opts.h b/gcc/config/aarch64/aarch64-opts.h\nindex 45527809549a13564a9a527008b11d9d3998486b..423285d6b0f94f823c4883421d7d068f3d77405a 100644\n--- a/gcc/config/aarch64/aarch64-opts.h\n+++ b/gcc/config/aarch64/aarch64-opts.h\n@@ -61,26 +61,16 @@ enum aarch64_tls_type {\n TLS_DESCRIPTORS\n };\n \n-/* The code model defines the address generation strategy.\n- Most have a PIC and non-PIC variant. */\n+/* The code model defines the address generation strategy. */\n enum aarch64_code_model {\n- /* Static code and data fit within a 1MB region.\n+ /* Static code, data and GOT/PLT fit within a 1MB region.\n Not fully implemented, mostly treated as SMALL. */\n AARCH64_CMODEL_TINY,\n- /* Static code, data and GOT/PLT fit within a 1MB region.\n- Not fully implemented, mostly treated as SMALL_PIC. */\n- AARCH64_CMODEL_TINY_PIC,\n- /* Static code and data fit within a 4GB region.\n- The default non-PIC code model. */\n- AARCH64_CMODEL_SMALL,\n /* Static code, data and GOT/PLT fit within a 4GB region.\n- The default PIC code model. */\n- AARCH64_CMODEL_SMALL_PIC,\n- /* -fpic for small memory model.\n- GOT size to 28KiB (4K*8-4K) or 3580 entries. */\n- AARCH64_CMODEL_SMALL_SPIC,\n- /* No assumptions about addresses of code and data.\n- The PIC variant is not yet implemented. */\n+ The default code model. */\n+ AARCH64_CMODEL_SMALL,\n+ /* Static code, rodata and GOT/PLT fit within a 4GB region,\n+ data/bss are unlimited. */\n AARCH64_CMODEL_LARGE\n };\n \ndiff --git a/gcc/config/aarch64/aarch64.cc b/gcc/config/aarch64/aarch64.cc\nindex 6dcb68da16e0bd713e7c3bef3e691205e1d897e2..418d08efb385493471c7b535915c0612e16292d1 100644\n--- a/gcc/config/aarch64/aarch64.cc\n+++ b/gcc/config/aarch64/aarch64.cc\n@@ -370,6 +370,7 @@ static bool aarch64_builtin_support_vector_misalignment (machine_mode mode,\n static machine_mode aarch64_simd_container_mode (scalar_mode, poly_int64);\n static bool aarch64_print_address_internal (FILE*, machine_mode, rtx,\n \t\t\t\t\t aarch64_addr_query_type);\n+bool aarch64_use_pseudo_pic_reg (void);\n \n /* The processor for which instructions should be scheduled. */\n enum aarch64_cpu aarch64_tune = AARCH64_CPU_cortexa53;\n@@ -16109,22 +16110,20 @@ cost_plus:\n case SYMBOL_REF:\n \n if (aarch64_cmodel == AARCH64_CMODEL_LARGE\n-\t || aarch64_cmodel == AARCH64_CMODEL_SMALL_SPIC)\n+\t || aarch64_use_pseudo_pic_reg ())\n \t{\n \t /* LDR. */\n \t if (speed)\n \t *cost += extra_cost->ldst.load;\n \t}\n- else if (aarch64_cmodel == AARCH64_CMODEL_SMALL\n-\t || aarch64_cmodel == AARCH64_CMODEL_SMALL_PIC)\n+ else if (aarch64_cmodel == AARCH64_CMODEL_SMALL)\n \t{\n \t /* ADRP, followed by ADD. */\n \t *cost += COSTS_N_INSNS (1);\n \t if (speed)\n \t *cost += 2 * extra_cost->alu.arith;\n \t}\n- else if (aarch64_cmodel == AARCH64_CMODEL_TINY\n-\t || aarch64_cmodel == AARCH64_CMODEL_TINY_PIC)\n+ else if (aarch64_cmodel == AARCH64_CMODEL_TINY)\n \t{\n \t /* ADR. */\n \t if (speed)\n@@ -19586,8 +19585,7 @@ aarch64_override_options_after_change_1 (struct gcc_options *opts)\n \n /* In the tiny memory model it makes no sense to disallow PC relative\n literal pool loads. */\n- if (aarch64_cmodel == AARCH64_CMODEL_TINY\n- || aarch64_cmodel == AARCH64_CMODEL_TINY_PIC)\n+ if (aarch64_cmodel == AARCH64_CMODEL_TINY)\n aarch64_pcrelative_literal_loads = true;\n \n /* When enabling the lower precision Newton series for the square root, also\n@@ -20214,35 +20212,13 @@ static void\n initialize_aarch64_code_model (struct gcc_options *opts)\n {\n aarch64_cmodel = opts->x_aarch64_cmodel_var;\n- switch (opts->x_aarch64_cmodel_var)\n+ if (aarch64_cmodel == AARCH64_CMODEL_LARGE)\n {\n- case AARCH64_CMODEL_TINY:\n- if (opts->x_flag_pic)\n-\taarch64_cmodel = AARCH64_CMODEL_TINY_PIC;\n- break;\n- case AARCH64_CMODEL_SMALL:\n- if (opts->x_flag_pic)\n-\t{\n-#ifdef HAVE_AS_SMALL_PIC_RELOCS\n-\t aarch64_cmodel = (flag_pic == 2\n-\t\t\t ? AARCH64_CMODEL_SMALL_PIC\n-\t\t\t : AARCH64_CMODEL_SMALL_SPIC);\n-#else\n-\t aarch64_cmodel = AARCH64_CMODEL_SMALL_PIC;\n-#endif\n-\t}\n- break;\n- case AARCH64_CMODEL_LARGE:\n if (opts->x_flag_pic)\n \tsorry (\"code model %qs with %<-f%s%>\", \"large\",\n \t opts->x_flag_pic > 1 ? \"PIC\" : \"pic\");\n if (opts->x_aarch64_abi == AARCH64_ABI_ILP32)\n \tsorry (\"code model %qs not supported in ilp32 mode\", \"large\");\n- break;\n- case AARCH64_CMODEL_TINY_PIC:\n- case AARCH64_CMODEL_SMALL_PIC:\n- case AARCH64_CMODEL_SMALL_SPIC:\n- gcc_unreachable ();\n }\n }\n \n@@ -22127,23 +22103,16 @@ aarch64_tls_symbol_p (rtx x)\n enum aarch64_symbol_type\n aarch64_classify_tls_symbol (rtx x)\n {\n- enum tls_model tls_kind = tls_symbolic_operand_type (x);\n-\n- switch (tls_kind)\n+ switch (tls_symbolic_operand_type (x))\n {\n case TLS_MODEL_GLOBAL_DYNAMIC:\n case TLS_MODEL_LOCAL_DYNAMIC:\n return TARGET_TLS_DESC ? SYMBOL_SMALL_TLSDESC : SYMBOL_SMALL_TLSGD;\n \n case TLS_MODEL_INITIAL_EXEC:\n- switch (aarch64_cmodel)\n-\t{\n-\tcase AARCH64_CMODEL_TINY:\n-\tcase AARCH64_CMODEL_TINY_PIC:\n-\t return SYMBOL_TINY_TLSIE;\n-\tdefault:\n-\t return SYMBOL_SMALL_TLSIE;\n-\t}\n+ if (aarch64_cmodel == AARCH64_CMODEL_TINY)\n+\treturn SYMBOL_TINY_TLSIE;\n+ return SYMBOL_SMALL_TLSIE;\n \n case TLS_MODEL_LOCAL_EXEC:\n if (aarch64_tls_size == 12)\n@@ -22157,10 +22126,6 @@ aarch64_classify_tls_symbol (rtx x)\n else\n \tgcc_unreachable ();\n \n- case TLS_MODEL_EMULATED:\n- case TLS_MODEL_NONE:\n- return SYMBOL_FORCE_TO_MEM;\n-\n default:\n gcc_unreachable ();\n }\n@@ -22176,23 +22141,13 @@ aarch64_classify_symbol (rtx x, HOST_WIDE_INT offset)\n \n if (LABEL_REF_P (x))\n {\n- switch (aarch64_cmodel)\n-\t{\n-\tcase AARCH64_CMODEL_LARGE:\n-\t return SYMBOL_FORCE_TO_MEM;\n+ if (aarch64_cmodel == AARCH64_CMODEL_TINY)\n+\treturn SYMBOL_TINY_ABSOLUTE;\n \n-\tcase AARCH64_CMODEL_TINY_PIC:\n-\tcase AARCH64_CMODEL_TINY:\n-\t return SYMBOL_TINY_ABSOLUTE;\n+ if (aarch64_cmodel == AARCH64_CMODEL_LARGE)\n+\treturn SYMBOL_FORCE_TO_MEM;\n \n-\tcase AARCH64_CMODEL_SMALL_SPIC:\n-\tcase AARCH64_CMODEL_SMALL_PIC:\n-\tcase AARCH64_CMODEL_SMALL:\n-\t return SYMBOL_SMALL_ABSOLUTE;\n-\n-\tdefault:\n-\t gcc_unreachable ();\n-\t}\n+ return SYMBOL_SMALL_ABSOLUTE;\n }\n \n if (SYMBOL_REF_P (x))\n@@ -22200,17 +22155,22 @@ aarch64_classify_symbol (rtx x, HOST_WIDE_INT offset)\n if (aarch64_tls_symbol_p (x))\n \treturn aarch64_classify_tls_symbol (x);\n \n- switch (aarch64_cmodel)\n+ /* With -fPIC non-local symbols use the GOT. For orthogonality\n+\t always use the GOT for extern weak symbols. */\n+ if (!TARGET_PECOFF\n+\t && (flag_pic || SYMBOL_REF_WEAK (x))\n+\t && !aarch64_symbol_binds_local_p (x))\n \t{\n-\tcase AARCH64_CMODEL_TINY_PIC:\n-\tcase AARCH64_CMODEL_TINY:\n-\t /* With -fPIC non-local symbols use the GOT. For orthogonality\n-\t always use the GOT for extern weak symbols. */\n-\t if (!TARGET_PECOFF\n-\t && (flag_pic || SYMBOL_REF_WEAK (x))\n-\t && !aarch64_symbol_binds_local_p (x))\n+\t if (aarch64_cmodel == AARCH64_CMODEL_TINY)\n \t return SYMBOL_TINY_GOT;\n+\t if (aarch64_use_pseudo_pic_reg ())\n+\t return SYMBOL_SMALL_GOT_28K;\n+\t return SYMBOL_SMALL_GOT_4G;\n+\t}\n \n+ switch (aarch64_cmodel)\n+\t{\n+\tcase AARCH64_CMODEL_TINY:\n \t /* When we retrieve symbol + offset address, we have to make sure\n \t the offset does not cause overflow of the final address. But\n \t we have no way of knowing the address of symbol at compile time\n@@ -22226,15 +22186,7 @@ aarch64_classify_symbol (rtx x, HOST_WIDE_INT offset)\n \t return SYMBOL_TINY_ABSOLUTE;\n \n \n-\tcase AARCH64_CMODEL_SMALL_SPIC:\n-\tcase AARCH64_CMODEL_SMALL_PIC:\n \tcase AARCH64_CMODEL_SMALL:\n-\t if (!TARGET_PECOFF\n-\t && (flag_pic || SYMBOL_REF_WEAK (x))\n-\t && !aarch64_symbol_binds_local_p (x))\n-\t return aarch64_cmodel == AARCH64_CMODEL_SMALL_SPIC\n-\t\t ? SYMBOL_SMALL_GOT_28K : SYMBOL_SMALL_GOT_4G;\n-\n \t /* Same reasoning as the tiny code model, but the offset cap here is\n \t 1MB, allowing +/-3.9GB for the offset to the symbol. */\n \t if (!(IN_RANGE (offset, -0x100000, 0x100000)\n@@ -22257,8 +22209,7 @@ aarch64_classify_symbol (rtx x, HOST_WIDE_INT offset)\n \t}\n }\n \n- /* By default push everything into the constant pool. */\n- return SYMBOL_FORCE_TO_MEM;\n+ gcc_unreachable ();\n }\n \n bool\n@@ -26231,10 +26182,7 @@ aarch64_asm_preferred_eh_data_format (int code ATTRIBUTE_UNUSED, int global)\n switch (aarch64_cmodel)\n {\n case AARCH64_CMODEL_TINY:\n- case AARCH64_CMODEL_TINY_PIC:\n case AARCH64_CMODEL_SMALL:\n- case AARCH64_CMODEL_SMALL_PIC:\n- case AARCH64_CMODEL_SMALL_SPIC:\n /* text+got+data < 4Gb. 4-byte signed relocs are sufficient\n \t for everything. */\n type = DW_EH_PE_sdata4;\n@@ -30254,13 +30202,17 @@ aarch64_empty_mask_is_expensive (unsigned)\n return false;\n }\n \n-/* Return 1 if pseudo register should be created and used to hold\n- GOT address for PIC code. */\n+/* Return true if a pseudo register should be created and used to hold the\n+ GOT address for -fpic. */\n \n bool\n aarch64_use_pseudo_pic_reg (void)\n {\n- return aarch64_cmodel == AARCH64_CMODEL_SMALL_SPIC;\n+#ifdef HAVE_AS_SMALL_PIC_RELOCS\n+ return flag_pic == 1 && aarch64_cmodel == AARCH64_CMODEL_SMALL;\n+#else\n+ return false;\n+#endif\n }\n \n /* Implement TARGET_UNSPEC_MAY_TRAP_P. */\ndiff --git a/gcc/config/aarch64/aarch64.h b/gcc/config/aarch64/aarch64.h\nindex d61705d78f61924c1635d6fd9304fea23bb18aa2..681dff03bbf0dc8a9c135d756a9798008449411c 100644\n--- a/gcc/config/aarch64/aarch64.h\n+++ b/gcc/config/aarch64/aarch64.h\n@@ -1500,16 +1500,6 @@ typedef struct\n \n extern enum aarch64_code_model aarch64_cmodel;\n \n-/* When using the tiny addressing model conditional and unconditional branches\n- can span the whole of the available address space (1MB). */\n-#define HAS_LONG_COND_BRANCH\t\t\t\t\\\n- (aarch64_cmodel == AARCH64_CMODEL_TINY\t\t\\\n- || aarch64_cmodel == AARCH64_CMODEL_TINY_PIC)\n-\n-#define HAS_LONG_UNCOND_BRANCH\t\t\t\t\\\n- (aarch64_cmodel == AARCH64_CMODEL_TINY\t\t\\\n- || aarch64_cmodel == AARCH64_CMODEL_TINY_PIC)\n-\n #define TARGET_HAS_FMV_TARGET_ATTRIBUTE 0\n \n #define TARGET_SUPPORTS_WIDE_INT 1\n", "prefixes": [] }