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GET /api/patches/2221743/?format=api
{ "id": 2221743, "url": "http://patchwork.ozlabs.org/api/patches/2221743/?format=api", "web_url": "http://patchwork.ozlabs.org/project/uboot/patch/20260410082332.102522-1-weijie.gao@mediatek.com/", "project": { "id": 18, "url": "http://patchwork.ozlabs.org/api/projects/18/?format=api", "name": "U-Boot", "link_name": "uboot", "list_id": "u-boot.lists.denx.de", "list_email": "u-boot@lists.denx.de", "web_url": null, "scm_url": null, "webscm_url": null, "list_archive_url": "", "list_archive_url_format": "", "commit_url_format": "" }, "msgid": "<20260410082332.102522-1-weijie.gao@mediatek.com>", "list_archive_url": null, "date": "2026-04-10T08:23:32", "name": "pinctrl: mediatek: mt7981: fix some register offsets and fields", "commit_ref": null, "pull_url": null, "state": "new", "archived": false, "hash": "5c0b7bd011dbc3d39f30a84907b51a0415a4dc7f", "submitter": { "id": 75269, "url": "http://patchwork.ozlabs.org/api/people/75269/?format=api", "name": "Weijie Gao", "email": "weijie.gao@mediatek.com" }, "delegate": null, "mbox": "http://patchwork.ozlabs.org/project/uboot/patch/20260410082332.102522-1-weijie.gao@mediatek.com/mbox/", "series": [ { "id": 499423, "url": "http://patchwork.ozlabs.org/api/series/499423/?format=api", "web_url": "http://patchwork.ozlabs.org/project/uboot/list/?series=499423", "date": "2026-04-10T08:23:32", "name": "pinctrl: mediatek: mt7981: fix some register offsets and fields", "version": 1, "mbox": "http://patchwork.ozlabs.org/series/499423/mbox/" } ], "comments": "http://patchwork.ozlabs.org/api/patches/2221743/comments/", "check": "pending", "checks": "http://patchwork.ozlabs.org/api/patches/2221743/checks/", "tags": {}, "related": [], "headers": { "Return-Path": "<u-boot-bounces@lists.denx.de>", "X-Original-To": "incoming@patchwork.ozlabs.org", "Delivered-To": "patchwork-incoming@legolas.ozlabs.org", "Authentication-Results": [ "legolas.ozlabs.org;\n\tdkim=pass (1024-bit key;\n unprotected) header.d=mediatek.com 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"D41D8CD98F00B204E9800998ECF8427E", "From": "Weijie Gao <weijie.gao@mediatek.com>", "To": "<u-boot@lists.denx.de>", "CC": "GSS_MTK_Uboot_upstream <GSS_MTK_Uboot_upstream@mediatek.com>, Tom Rini\n <trini@konsulko.com>, Weijie Gao <weijie.gao@mediatek.com>", "Subject": "[PATCH] pinctrl: mediatek: mt7981: fix some register offsets and\n fields", "Date": "Fri, 10 Apr 2026 16:23:32 +0800", "Message-ID": "<20260410082332.102522-1-weijie.gao@mediatek.com>", "X-Mailer": "git-send-email 2.17.0", "MIME-Version": "1.0", "Content-Type": "text/plain", "X-MTK": "N", "X-BeenThere": "u-boot@lists.denx.de", "X-Mailman-Version": "2.1.39", "Precedence": "list", "List-Id": "U-Boot discussion <u-boot.lists.denx.de>", "List-Unsubscribe": "<https://lists.denx.de/options/u-boot>,\n <mailto:u-boot-request@lists.denx.de?subject=unsubscribe>", "List-Archive": "<https://lists.denx.de/pipermail/u-boot/>", "List-Post": "<mailto:u-boot@lists.denx.de>", "List-Help": "<mailto:u-boot-request@lists.denx.de?subject=help>", "List-Subscribe": "<https://lists.denx.de/listinfo/u-boot>,\n <mailto:u-boot-request@lists.denx.de?subject=subscribe>", "Errors-To": "u-boot-bounces@lists.denx.de", "Sender": "\"U-Boot\" <u-boot-bounces@lists.denx.de>", "X-Virus-Scanned": "clamav-milter 0.103.8 at phobos.denx.de", "X-Virus-Status": "Clean" }, "content": "This patch fixes mt7981 pin register offsets and field definitions.\n\nSigned-off-by: Weijie Gao <weijie.gao@mediatek.com>\n---\n drivers/pinctrl/mediatek/pinctrl-mt7981.c | 16 ++++++++--------\n 1 file changed, 8 insertions(+), 8 deletions(-)", "diff": "diff --git a/drivers/pinctrl/mediatek/pinctrl-mt7981.c b/drivers/pinctrl/mediatek/pinctrl-mt7981.c\nindex 8875c276f36..5219b147797 100644\n--- a/drivers/pinctrl/mediatek/pinctrl-mt7981.c\n+++ b/drivers/pinctrl/mediatek/pinctrl-mt7981.c\n@@ -106,7 +106,7 @@ static const struct mtk_pin_field_calc mt7981_pin_ies_range[] = {\n \n \tPIN_FIELD_BASE(9, 9, 5, 0x20, 0x10, 9, 1),\n \tPIN_FIELD_BASE(10, 10, 5, 0x20, 0x10, 8, 1),\n-\tPIN_FIELD_BASE(11, 11, 5, 0x40, 0x10, 10, 1),\n+\tPIN_FIELD_BASE(11, 11, 5, 0x20, 0x10, 10, 1),\n \tPIN_FIELD_BASE(12, 12, 5, 0x20, 0x10, 7, 1),\n \tPIN_FIELD_BASE(13, 13, 5, 0x20, 0x10, 11, 1),\n \n@@ -215,7 +215,7 @@ static const struct mtk_pin_field_calc mt7981_pin_smt_range[] = {\n \tPIN_FIELD_BASE(41, 41, 7, 0x70, 0x10, 0, 1),\n \tPIN_FIELD_BASE(42, 42, 7, 0x70, 0x10, 9, 1),\n \tPIN_FIELD_BASE(43, 43, 7, 0x70, 0x10, 7, 1),\n-\tPIN_FIELD_BASE(44, 44, 7, 0x30, 0x10, 8, 1),\n+\tPIN_FIELD_BASE(44, 44, 7, 0x70, 0x10, 8, 1),\n \tPIN_FIELD_BASE(45, 45, 7, 0x70, 0x10, 3, 1),\n \tPIN_FIELD_BASE(46, 46, 7, 0x70, 0x10, 4, 1),\n \tPIN_FIELD_BASE(47, 47, 7, 0x70, 0x10, 5, 1),\n@@ -279,8 +279,8 @@ static const struct mtk_pin_field_calc mt7981_pin_drv_range[] = {\n \n \tPIN_FIELD_BASE(2, 2, 5, 0x00, 0x10, 18, 3),\n \n-\tPIN_FIELD_BASE(3, 3, 4, 0x00, 0x10, 18, 1),\n-\tPIN_FIELD_BASE(4, 4, 4, 0x00, 0x10, 6, 1),\n+\tPIN_FIELD_BASE(3, 3, 4, 0x00, 0x10, 18, 3),\n+\tPIN_FIELD_BASE(4, 4, 4, 0x00, 0x10, 6, 3),\n \tPIN_FIELD_BASE(5, 5, 4, 0x00, 0x10, 3, 3),\n \tPIN_FIELD_BASE(6, 6, 4, 0x00, 0x10, 9, 3),\n \tPIN_FIELD_BASE(7, 7, 4, 0x00, 0x10, 0, 3),\n@@ -288,9 +288,9 @@ static const struct mtk_pin_field_calc mt7981_pin_drv_range[] = {\n \n \tPIN_FIELD_BASE(9, 9, 5, 0x00, 0x10, 27, 3),\n \tPIN_FIELD_BASE(10, 10, 5, 0x00, 0x10, 24, 3),\n-\tPIN_FIELD_BASE(11, 11, 5, 0x00, 0x10, 0, 3),\n+\tPIN_FIELD_BASE(11, 11, 5, 0x10, 0x10, 0, 3),\n \tPIN_FIELD_BASE(12, 12, 5, 0x00, 0x10, 21, 3),\n-\tPIN_FIELD_BASE(13, 13, 5, 0x00, 0x10, 3, 3),\n+\tPIN_FIELD_BASE(13, 13, 5, 0x10, 0x10, 3, 3),\n \n \tPIN_FIELD_BASE(14, 14, 4, 0x00, 0x10, 27, 3),\n \n@@ -302,7 +302,7 @@ static const struct mtk_pin_field_calc mt7981_pin_drv_range[] = {\n \tPIN_FIELD_BASE(20, 20, 2, 0x00, 0x10, 9, 3),\n \tPIN_FIELD_BASE(21, 21, 2, 0x00, 0x10, 18, 3),\n \tPIN_FIELD_BASE(22, 22, 2, 0x00, 0x10, 21, 3),\n-\tPIN_FIELD_BASE(23, 23, 2, 0x00, 0x10, 0, 3),\n+\tPIN_FIELD_BASE(23, 23, 2, 0x10, 0x10, 0, 3),\n \tPIN_FIELD_BASE(24, 24, 2, 0x00, 0x10, 27, 3),\n \tPIN_FIELD_BASE(25, 25, 2, 0x00, 0x10, 24, 3),\n \n@@ -368,7 +368,7 @@ static const struct mtk_pin_field_calc mt7981_pin_pupd_range[] = {\n \tPIN_FIELD_BASE(17, 17, 2, 0x30, 0x10, 5, 1),\n \tPIN_FIELD_BASE(18, 18, 2, 0x30, 0x10, 4, 1),\n \tPIN_FIELD_BASE(19, 19, 2, 0x30, 0x10, 2, 1),\n-\tPIN_FIELD_BASE(20, 20, 2, 0x90, 0x10, 3, 1),\n+\tPIN_FIELD_BASE(20, 20, 2, 0x30, 0x10, 3, 1),\n \tPIN_FIELD_BASE(21, 21, 2, 0x30, 0x10, 6, 1),\n \tPIN_FIELD_BASE(22, 22, 2, 0x30, 0x10, 7, 1),\n \tPIN_FIELD_BASE(23, 23, 2, 0x30, 0x10, 10, 1),\n", "prefixes": [] }