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GET /api/patches/2219831/?format=api
{ "id": 2219831, "url": "http://patchwork.ozlabs.org/api/patches/2219831/?format=api", "web_url": "http://patchwork.ozlabs.org/project/gcc/patch/20260404160507.662670-1-sloosemore@baylibre.com/", "project": { "id": 17, "url": "http://patchwork.ozlabs.org/api/projects/17/?format=api", "name": "GNU Compiler Collection", "link_name": "gcc", "list_id": "gcc-patches.gcc.gnu.org", "list_email": "gcc-patches@gcc.gnu.org", "web_url": null, "scm_url": null, "webscm_url": null, "list_archive_url": "", "list_archive_url_format": "", "commit_url_format": "" }, "msgid": "<20260404160507.662670-1-sloosemore@baylibre.com>", "list_archive_url": null, "date": "2026-04-04T16:05:07", "name": "[PUSHED] doc, i386: Document more CPUs as having CX16 support [PR107337]", "commit_ref": null, "pull_url": null, "state": "new", "archived": false, "hash": "e2c9a91ff52614f7faa356676f94eb46c667fa9e", "submitter": { "id": 87955, "url": "http://patchwork.ozlabs.org/api/people/87955/?format=api", "name": "Sandra Loosemore", "email": "sloosemore@baylibre.com" }, "delegate": null, "mbox": "http://patchwork.ozlabs.org/project/gcc/patch/20260404160507.662670-1-sloosemore@baylibre.com/mbox/", "series": [ { "id": 498738, "url": "http://patchwork.ozlabs.org/api/series/498738/?format=api", "web_url": "http://patchwork.ozlabs.org/project/gcc/list/?series=498738", "date": "2026-04-04T16:05:07", "name": "[PUSHED] doc, i386: Document more CPUs as having CX16 support [PR107337]", "version": 1, "mbox": "http://patchwork.ozlabs.org/series/498738/mbox/" } ], "comments": "http://patchwork.ozlabs.org/api/patches/2219831/comments/", "check": "pending", "checks": "http://patchwork.ozlabs.org/api/patches/2219831/checks/", "tags": {}, "related": [], "headers": { "Return-Path": "<gcc-patches-bounces~incoming=patchwork.ozlabs.org@gcc.gnu.org>", "X-Original-To": [ "incoming@patchwork.ozlabs.org", "gcc-patches@gcc.gnu.org" ], "Delivered-To": [ "patchwork-incoming@legolas.ozlabs.org", "gcc-patches@gcc.gnu.org" ], "Authentication-Results": [ "legolas.ozlabs.org;\n\tdkim=pass (2048-bit key;\n unprotected) header.d=baylibre-com.20251104.gappssmtp.com\n header.i=@baylibre-com.20251104.gappssmtp.com header.a=rsa-sha256\n header.s=20251104 header.b=efcNgqov;\n\tdkim-atps=neutral", "legolas.ozlabs.org;\n spf=pass (sender SPF authorized) smtp.mailfrom=gcc.gnu.org\n (client-ip=2620:52:6:3111::32; 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I checked the code\nagainst the list of CPUs in the issue and found one more (novalake)\naffected CPU that was added since then.\n\ngcc/ChangeLog\n\tPR target/107337\n\t* doc/invoke.texi (x86 Options): Add CX16 feature to nocona,\n\talderlake, arrowlake, arrowlake-s, pantherlake, novalake,\n\tbonnell, sierraforest, grandridge, clearwaterforest, and amdfam10\n\tfamily processors.\n---\n gcc/doc/invoke.texi | 30 ++++++++++++++++++------------\n 1 file changed, 18 insertions(+), 12 deletions(-)", "diff": "diff --git a/gcc/doc/invoke.texi b/gcc/doc/invoke.texi\nindex 44d7a8f14a9..bcde816d2fc 100644\n--- a/gcc/doc/invoke.texi\n+++ b/gcc/doc/invoke.texi\n@@ -34888,7 +34888,7 @@ instruction set support.\n \n @item nocona\n Improved version of Intel Pentium 4 CPU with 64-bit extensions, MMX, SSE,\n-SSE2, SSE3 and FXSR instruction set support.\n+SSE2, SSE3, CX16 and FXSR instruction set support.\n \n @item core2\n Intel Core 2 CPU with 64-bit extensions, MMX, SSE, SSE2, SSE3, SSSE3, CX16,\n@@ -35001,7 +35001,8 @@ VPCLMULQDQ, AVX512BITALG, RDPID and AVX512VPOPCNTDQ instruction set support.\n @itemx meteorlake\n @itemx gracemont\n Intel Alder Lake/Raptor Lake/Meteor Lake/Gracemont CPU with 64-bit extensions,\n-MOVBE, MMX, SSE, SSE2, SSE3, SSSE3, SSE4.1, SSE4.2, POPCNT, AES, PREFETCHW,\n+MOVBE, MMX, SSE, SSE2, SSE3, SSSE3, SSE4.1, SSE4.2, POPCNT, CX16,\n+AES, PREFETCHW,\n PCLMUL, RDRND, XSAVE, XSAVEC, XSAVES, XSAVEOPT, FSGSBASE, PTWRITE, RDPID, SGX,\n GFNI-SSE, CLWB, MOVDIRI, MOVDIR64B, WAITPKG, ADCX, AVX, AVX2, BMI, BMI2, F16C,\n FMA, LZCNT, PCONFIG, PKU, VAES, VPCLMULQDQ, SERIALIZE, HRESET, KL, WIDEKL and\n@@ -35009,7 +35010,8 @@ AVX-VNNI instruction set support.\n \n @item arrowlake\n Intel Arrow Lake CPU with 64-bit extensions, MOVBE, MMX, SSE, SSE2, SSE3,\n-SSSE3, SSE4.1, SSE4.2, POPCNT, AES, PREFETCHW, PCLMUL, RDRND, XSAVE, XSAVEC,\n+SSSE3, SSE4.1, SSE4.2, POPCNT, CX16,\n+AES, PREFETCHW, PCLMUL, RDRND, XSAVE, XSAVEC,\n XSAVES, XSAVEOPT, FSGSBASE, PTWRITE, RDPID, SGX, GFNI-SSE, CLWB, MOVDIRI,\n MOVDIR64B, WAITPKG, ADCX, AVX, AVX2, BMI, BMI2, F16C, FMA, LZCNT, PCONFIG, PKU,\n VAES, VPCLMULQDQ, SERIALIZE, HRESET, KL, WIDEKL, AVX-VNNI, UINTR, AVXIFMA,\n@@ -35018,7 +35020,7 @@ AVXVNNIINT8, AVXNECONVERT and CMPCCXADD instruction set support.\n @item arrowlake-s\n @itemx lunarlake\n Intel Arrow Lake S/Lunar Lake CPU with 64-bit extensions, MOVBE, MMX, SSE,\n-SSE2, SSE3, SSSE3, SSE4.1, SSE4.2, POPCNT, AES, PREFETCHW, PCLMUL, RDRND,\n+SSE2, SSE3, SSSE3, SSE4.1, SSE4.2, POPCNT, CX16, AES, PREFETCHW, PCLMUL, RDRND,\n XSAVE, XSAVEC, XSAVES, XSAVEOPT, FSGSBASE, PTWRITE, RDPID, SGX, GFNI-SSE, CLWB,\n MOVDIRI, MOVDIR64B, WAITPKG, ADCX, AVX, AVX2, BMI, BMI2, F16C, FMA, LZCNT,\n PCONFIG, PKU, VAES, VPCLMULQDQ, SERIALIZE, HRESET, KL, WIDEKL, AVX-VNNI, UINTR,\n@@ -35028,7 +35030,7 @@ SM4 instruction set support.\n @item pantherlake\n @itemx wildcatlake\n Intel Panther Lake/Wildcat Lake CPU with 64-bit extensions, MOVBE, MMX, SSE,\n-SSE2, SSE3, SSSE3, SSE4.1, SSE4.2, POPCNT, AES, PREFETCHW, PCLMUL, RDRND,\n+SSE2, SSE3, SSSE3, SSE4.1, SSE4.2, POPCNT, CX16, AES, PREFETCHW, PCLMUL, RDRND,\n XSAVE, XSAVEC, XSAVES, XSAVEOPT, FSGSBASE, PTWRITE, RDPID, SGX, GFNI-SSE,\n CLWB, MOVDIRI, MOVDIR64B, WAITPKG, ADCX, AVX, AVX2, BMI, BMI2, F16C, FMA,\n LZCNT, PCONFIG, PKU, VAES, VPCLMULQDQ, SERIALIZE, HRESET, AVX-VNNI, UINTR,\n@@ -35037,7 +35039,8 @@ SM4 instruction set support.\n \n @item novalake\n Intel Nova Lake CPU with 64-bit extensions, MOVBE, MMX, SSE, SSE2, SSE3,\n-SSSE3, SSE4.1, SSE4.2, POPCNT, AES, PREFETCHW, PCLMUL, RDRND, XSAVE, XSAVEC,\n+SSSE3, SSE4.1, SSE4.2, POPCNT, CX16,\n+AES, PREFETCHW, PCLMUL, RDRND, XSAVE, XSAVEC,\n XSAVES, XSAVEOPT, FSGSBASE, PTWRITE, RDPID, SGX, GFNI-SSE, CLWB, MOVDIRI,\n MOVDIR64B, WAITPKG, ADCX, AVX, AVX2, BMI, BMI2, F16C, FMA, LZCNT, PCONFIG, PKU,\n VAES, VPCLMULQDQ, SERIALIZE, HRESET, AVX-VNNI, UINTR, AVXIFMA, AVXVNNIINT8,\n@@ -35093,8 +35096,8 @@ AMX-FP8, AMX-TF32, MOVRS and AMX-MOVRS instruction set support.\n \n @item bonnell\n @itemx atom\n-Intel Bonnell CPU with 64-bit extensions, MOVBE, MMX, SSE, SSE2, SSE3 and SSSE3\n-instruction set support.\n+Intel Bonnell CPU with 64-bit extensions, MOVBE, MMX, SSE, SSE2, SSE3, SSSE3\n+and CX16 instruction set support.\n \n @item silvermont\n @itemx slm\n@@ -35123,7 +35126,8 @@ support.\n \n @item sierraforest\n Intel Sierra Forest CPU with 64-bit extensions, MOVBE, MMX, SSE, SSE2, SSE3,\n-SSSE3, SSE4.1, SSE4.2, POPCNT, AES, PREFETCHW, PCLMUL, RDRND, XSAVE, XSAVEC,\n+SSSE3, SSE4.1, SSE4.2, POPCNT, CX16,\n+AES, PREFETCHW, PCLMUL, RDRND, XSAVE, XSAVEC,\n XSAVES, XSAVEOPT, FSGSBASE, PTWRITE, RDPID, SGX, GFNI-SSE, CLWB, MOVDIRI,\n MOVDIR64B, CLDEMOTE, WAITPKG, ADCX, AVX, AVX2, BMI, BMI2, F16C, FMA, LZCNT,\n PCONFIG, PKU, VAES, VPCLMULQDQ, SERIALIZE, HRESET, KL, WIDEKL, AVX-VNNI,\n@@ -35132,7 +35136,8 @@ support.\n \n @item grandridge\n Intel Grand Ridge CPU with 64-bit extensions, MOVBE, MMX, SSE, SSE2, SSE3,\n-SSSE3, SSE4.1, SSE4.2, POPCNT, AES, PREFETCHW, PCLMUL, RDRND, XSAVE, XSAVEC,\n+SSSE3, SSE4.1, SSE4.2, POPCNT, CX16,\n+AES, PREFETCHW, PCLMUL, RDRND, XSAVE, XSAVEC,\n XSAVES, XSAVEOPT, FSGSBASE, PTWRITE, RDPID, SGX, GFNI-SSE, CLWB, MOVDIRI,\n MOVDIR64B, CLDEMOTE, WAITPKG, ADCX, AVX, AVX2, BMI, BMI2, F16C, FMA, LZCNT,\n PCONFIG, PKU, VAES, VPCLMULQDQ, SERIALIZE, HRESET, KL, WIDEKL, AVX-VNNI,\n@@ -35141,7 +35146,8 @@ support.\n \n @item clearwaterforest\n Intel Clearwater Forest CPU with 64-bit extensions, MOVBE, MMX, SSE, SSE2,\n-SSE3, SSSE3, SSE4.1, SSE4.2, POPCNT, AES, PREFETCHW, PCLMUL, RDRND, XSAVE,\n+SSE3, SSSE3, SSE4.1, SSE4.2, POPCNT, CX16,\n+AES, PREFETCHW, PCLMUL, RDRND, XSAVE,\n XSAVEC, XSAVES, XSAVEOPT, FSGSBASE, PTWRITE, RDPID, SGX, GFNI-SSE, CLWB,\n MOVDIRI, MOVDIR64B, CLDEMOTE, WAITPKG, ADCX, AVX, AVX2, BMI, BMI2, F16C, FMA,\n LZCNT, PCONFIG, PKU, VAES, VPCLMULQDQ, SERIALIZE, HRESET, AVX-VNNI, ENQCMD,\n@@ -35183,7 +35189,7 @@ Improved versions of AMD K8 cores with SSE3 instruction set support.\n @item amdfam10\n @itemx barcelona\n CPUs based on AMD Family 10h cores with x86-64 instruction set support. (This\n-supersets MMX, SSE, SSE2, SSE3, SSE4A, 3DNow!, enhanced 3DNow!, ABM and 64-bit\n+supersets CX16, MMX, SSE, SSE2, SSE3, SSE4A, 3DNow!, enhanced 3DNow!, ABM and 64-bit\n instruction set extensions.)\n \n @item bdver1\n", "prefixes": [ "PUSHED" ] }