Patch Detail
get:
Show a patch.
patch:
Update a patch.
put:
Update a patch.
GET /api/patches/2219782/?format=api
{ "id": 2219782, "url": "http://patchwork.ozlabs.org/api/patches/2219782/?format=api", "web_url": "http://patchwork.ozlabs.org/project/uboot/patch/3a5148a1-4e12-4924-92b5-51837ab8ffbc@gmail.com/", "project": { "id": 18, "url": "http://patchwork.ozlabs.org/api/projects/18/?format=api", "name": "U-Boot", "link_name": "uboot", "list_id": "u-boot.lists.denx.de", "list_email": "u-boot@lists.denx.de", "web_url": null, "scm_url": null, "webscm_url": null, "list_archive_url": "", "list_archive_url_format": "", "commit_url_format": "" }, "msgid": "<3a5148a1-4e12-4924-92b5-51837ab8ffbc@gmail.com>", "list_archive_url": null, "date": "2026-04-04T11:21:31", "name": "[v2,2/2] usb: phy: remove rockchip_usb2_phy.c", "commit_ref": null, "pull_url": null, "state": "new", "archived": false, "hash": "d043268a08c2d6f6daebbeec547b4fe71fd68078", "submitter": { "id": 75645, "url": "http://patchwork.ozlabs.org/api/people/75645/?format=api", "name": "Johan Jonker", "email": "jbx6244@gmail.com" }, "delegate": null, "mbox": "http://patchwork.ozlabs.org/project/uboot/patch/3a5148a1-4e12-4924-92b5-51837ab8ffbc@gmail.com/mbox/", "series": [ { "id": 498718, "url": "http://patchwork.ozlabs.org/api/series/498718/?format=api", "web_url": "http://patchwork.ozlabs.org/project/uboot/list/?series=498718", "date": "2026-04-04T11:20:01", "name": "Add Rockchip USBPHY DM driver", "version": 2, "mbox": "http://patchwork.ozlabs.org/series/498718/mbox/" } ], "comments": "http://patchwork.ozlabs.org/api/patches/2219782/comments/", "check": "pending", "checks": "http://patchwork.ozlabs.org/api/patches/2219782/checks/", "tags": {}, "related": [], "headers": { "Return-Path": "<u-boot-bounces@lists.denx.de>", "X-Original-To": "incoming@patchwork.ozlabs.org", "Delivered-To": "patchwork-incoming@legolas.ozlabs.org", "Authentication-Results": [ "legolas.ozlabs.org;\n\tdkim=pass (2048-bit key;\n unprotected) header.d=gmail.com header.i=@gmail.com header.a=rsa-sha256\n header.s=20251104 header.b=qCDxqiE9;\n\tdkim-atps=neutral", "legolas.ozlabs.org;\n spf=pass (sender SPF authorized) smtp.mailfrom=lists.denx.de\n (client-ip=85.214.62.61; helo=phobos.denx.de;\n envelope-from=u-boot-bounces@lists.denx.de; receiver=patchwork.ozlabs.org)", "phobos.denx.de;\n dmarc=pass (p=none dis=none) header.from=gmail.com", "phobos.denx.de;\n spf=pass smtp.mailfrom=u-boot-bounces@lists.denx.de", "phobos.denx.de;\n\tdkim=pass (2048-bit key;\n unprotected) header.d=gmail.com header.i=@gmail.com header.b=\"qCDxqiE9\";\n\tdkim-atps=neutral", "phobos.denx.de;\n dmarc=pass (p=none dis=none) header.from=gmail.com", "phobos.denx.de;\n spf=pass smtp.mailfrom=jbx6244@gmail.com" ], "Received": [ "from phobos.denx.de (phobos.denx.de [85.214.62.61])\n\t(using TLSv1.3 with cipher TLS_AES_256_GCM_SHA384 (256/256 bits)\n\t key-exchange x25519 server-signature ECDSA (secp384r1) server-digest SHA384)\n\t(No client certificate requested)\n\tby legolas.ozlabs.org (Postfix) with ESMTPS id 4fntTN0bGGz1yCs\n\tfor <incoming@patchwork.ozlabs.org>; Sat, 04 Apr 2026 22:21:44 +1100 (AEDT)", "from h2850616.stratoserver.net (localhost [IPv6:::1])\n\tby phobos.denx.de (Postfix) with ESMTP id 0AD81840AA;\n\tSat, 4 Apr 2026 13:21:37 +0200 (CEST)", "by phobos.denx.de (Postfix, from userid 109)\n id 7E2D7840B0; Sat, 4 Apr 2026 13:21:35 +0200 (CEST)", "from mail-ej1-x635.google.com (mail-ej1-x635.google.com\n [IPv6:2a00:1450:4864:20::635])\n (using TLSv1.3 with cipher TLS_AES_128_GCM_SHA256 (128/128 bits))\n (No client certificate requested)\n by phobos.denx.de (Postfix) with ESMTPS id 1BAAE83642\n for <u-boot@lists.denx.de>; Sat, 4 Apr 2026 13:21:33 +0200 (CEST)", "by mail-ej1-x635.google.com with SMTP id\n a640c23a62f3a-b9840bc8030so35194366b.1\n for <u-boot@lists.denx.de>; Sat, 04 Apr 2026 04:21:33 -0700 (PDT)", "from ?IPV6:2a02:a449:4071:0:32d0:42ff:fe10:6983?\n ([2a02:a449:4071:0:32d0:42ff:fe10:6983])\n by smtp.gmail.com with ESMTPSA id\n 4fb4d7f45d1cf-66e033a787fsm2301860a12.14.2026.04.04.04.21.31\n (version=TLS1_3 cipher=TLS_AES_128_GCM_SHA256 bits=128/128);\n Sat, 04 Apr 2026 04:21:31 -0700 (PDT)" ], "X-Spam-Checker-Version": "SpamAssassin 3.4.2 (2018-09-13) on phobos.denx.de", "X-Spam-Level": "", "X-Spam-Status": "No, score=-0.8 required=5.0 tests=BAYES_00,DKIM_SIGNED,\n DKIM_VALID,DKIM_VALID_AU,DKIM_VALID_EF,FORGED_GMAIL_RCVD,\n FREEMAIL_ENVFROM_END_DIGIT,FREEMAIL_FROM,RCVD_IN_DNSWL_BLOCKED,\n SPF_HELO_NONE,SPF_PASS autolearn=no autolearn_force=no version=3.4.2", "DKIM-Signature": "v=1; a=rsa-sha256; c=relaxed/relaxed;\n d=gmail.com; s=20251104; t=1775301692; x=1775906492; darn=lists.denx.de;\n h=content-transfer-encoding:in-reply-to:content-language:references\n :cc:to:subject:from:user-agent:mime-version:date:message-id:from:to\n :cc:subject:date:message-id:reply-to;\n bh=5RdjIKhtQP1zWY5CLrhfgaZ47zFWxzOWJKOPB7dYO0c=;\n b=qCDxqiE9HlOnWd6svIIu4aXWC2LVrxMC3PAoOoPVXkY4yE7z991e1qcuoU0KisuAx7\n j3XlzUtGZ6DsXFV1g/qALr1v/O/ZBKCWdHNxtleXP9jxWd1n2aVMa9LhgzqgaIeL6Pvl\n cyTblltCdH45JSaw7/tPNR0WYfvBsCPDma09+dxtInd/KyvKIxQhuOvChrzZtQ9sPab1\n f5+0S56cK+O210fRVszcUziuuoeYNX7xZA/MS9FbZ7wPTRk5woRXps6giAnJCSDy51wF\n YwM48DR+WbtnmXkD/q7AUByaqUOrMFHBkzivNrMcHzvE3k7JdzdgMEGCWL/lz+vSVwkJ\n gfBg==", "X-Google-DKIM-Signature": "v=1; a=rsa-sha256; c=relaxed/relaxed;\n d=1e100.net; s=20251104; t=1775301692; x=1775906492;\n h=content-transfer-encoding:in-reply-to:content-language:references\n :cc:to:subject:from:user-agent:mime-version:date:message-id:x-gm-gg\n :x-gm-message-state:from:to:cc:subject:date:message-id:reply-to;\n bh=5RdjIKhtQP1zWY5CLrhfgaZ47zFWxzOWJKOPB7dYO0c=;\n b=auw89hVoXbns9joJeIIWpSblv2nsbqdPCddOvVLUMU39qGEkj20vfmuAcqHU4JUM1v\n pBpP+lLvMpYufwDAkdwzwxd9v2C/fj1ILEApgVT1AJf0mWI7tDpB0DQmbDUgR+rRqJmd\n 2cQluj7Er1pwz1KNiP+6MGcMCwnnksGV1AAchHQacAOc+B43fkuahPuPdvvjgr7PXIvY\n EFYkYwXzU+KxXO+eDiZdtlq2b2PQvAJR9xkluJnW7/u/03wvm6a/ql6bjQwVWwKA/1k2\n hKgLzLJyPDSDF82RjiIfxGl02EcsIZSLMWqw94ooLK06kdTy4KtbsCGIJjTk273VWFqx\n v0cg==", "X-Forwarded-Encrypted": "i=1;\n AJvYcCUU/ywrLnt2XZ1HleVGBfSCJYyv2f6W5287C0Ig6NJktkFLyLyFZqhHzMCZXdxtO/ziAyI1k7k=@lists.denx.de", "X-Gm-Message-State": "AOJu0YxOs0QhbAnzj8AOnLvjP07InSokW09kd8roLLFwHfPtY1yfIT3E\n gvDYDCZnW47N0Rrod8zQgA0jG/kTPRnifk3fqcCpcLnTMVI4y9+p1Ejo", "X-Gm-Gg": "AeBDieuzy98CWdV7z75d0hkq0mxAIfhvJGhxsp9mMo9U9RS9CZEnrqJYi4hhMfSis2A\n 788d7d8uIvOtYk2a/kBk0ynKL6AWDVMo8mZJwb/bDHYVUjNM/kD1RLcVcSIeD4lEdOHvjukuFts\n iqOUSZ1JW4nL3xTsTxL7GCPPXsxD8odpcAxaD9zbZ2BsqEU/4FGJ0Usk1+vOoLWDXssd75OSW8M\n K7pY7IlIKXQAviM6GCIbJ3qbAQnbb/gyYQQD1UVijLdW8rn2HM6hqG+LwhVsWCjC7KOd9l/u87h\n nV15Y7i80va0Asz7zaXkZWpZyPSFyTzLSDCmVfb+xs/HqALsPmXone6wXyB2E0c9w/JF7ueaZLM\n rAKJRjKKZpjJJetbNeBS0hslWd8gfRy2sqgW1JIeC+4I9Qz1/2r6juh+I++L0yRKi435+TpoZNp\n lLFGJxnez02v3dmcqva0Q2ddEf3ANsECRCUsMuxi6x5l9ohlOMnu6tn9fYu2cklg==", "X-Received": "by 2002:a05:6402:34c4:b0:66e:a6a2:5e0 with SMTP id\n 4fb4d7f45d1cf-66ea6a20724mr122234a12.6.1775301692276;\n Sat, 04 Apr 2026 04:21:32 -0700 (PDT)", "Message-ID": "<3a5148a1-4e12-4924-92b5-51837ab8ffbc@gmail.com>", "Date": "Sat, 4 Apr 2026 13:21:31 +0200", "MIME-Version": "1.0", "User-Agent": "Mozilla Thunderbird", "From": "Johan Jonker <jbx6244@gmail.com>", "Subject": "[PATCH v2 2/2] usb: phy: remove rockchip_usb2_phy.c", "To": "kever.yang@rock-chips.com", "Cc": "sjg@chromium.org, philipp.tomsich@vrull.eu, trini@konsulko.com,\n hl@rock-chips.com, jernej.skrabec@gmail.com, w.egorov@phytec.de,\n jagan@amarulasolutions.com, heiko@sntech.de, jonas@kwiboo.se,\n michael@amarulasolutions.com, marex@denx.de, u-boot@lists.denx.de,\n upstream@lists.phytec.de", "References": "<a3aaa5dc-b959-4301-8d35-f295a019823a@gmail.com>", "Content-Language": "en-US, ar-EG", "In-Reply-To": "<a3aaa5dc-b959-4301-8d35-f295a019823a@gmail.com>", "Content-Type": "text/plain; charset=UTF-8", "Content-Transfer-Encoding": "7bit", "X-BeenThere": "u-boot@lists.denx.de", "X-Mailman-Version": "2.1.39", "Precedence": "list", "List-Id": "U-Boot discussion <u-boot.lists.denx.de>", "List-Unsubscribe": "<https://lists.denx.de/options/u-boot>,\n <mailto:u-boot-request@lists.denx.de?subject=unsubscribe>", "List-Archive": "<https://lists.denx.de/pipermail/u-boot/>", "List-Post": "<mailto:u-boot@lists.denx.de>", "List-Help": "<mailto:u-boot-request@lists.denx.de?subject=help>", "List-Subscribe": "<https://lists.denx.de/listinfo/u-boot>,\n <mailto:u-boot-request@lists.denx.de?subject=subscribe>", "Errors-To": "u-boot-bounces@lists.denx.de", "Sender": "\"U-Boot\" <u-boot-bounces@lists.denx.de>", "X-Virus-Scanned": "clamav-milter 0.103.8 at phobos.denx.de", "X-Virus-Status": "Clean" }, "content": "Remove rockchip_usb2_phy.c and replace it by phy-rockchip-usb2.c\nAdjust defconfigs. Enable CONFIG_DM_RESET where needed to compile\nth phy driver. Add grf bind function for usbphy node.\nRemove a variable no longer needed from an include file.\n\nSigned-off-by: Johan Jonker <jbx6244@gmail.com>\n---\n\nChanged V2:\nAdd grf bind function\nRestyle\n---\n arch/arm/mach-rockchip/board.c | 28 -----\n arch/arm/mach-rockchip/rk3066/syscon_rk3066.c | 26 ++++\n arch/arm/mach-rockchip/rk3188/syscon_rk3188.c | 26 ++++\n arch/arm/mach-rockchip/rk3288/syscon_rk3288.c | 26 ++++\n configs/chromebit_mickey_defconfig | 2 +-\n configs/chromebook_jerry_defconfig | 2 +-\n configs/chromebook_minnie_defconfig | 2 +-\n configs/chromebook_speedy_defconfig | 2 +-\n configs/evb-rk3288-rk808_defconfig | 2 +-\n configs/firefly-rk3288_defconfig | 4 +-\n configs/miqi-rk3288_defconfig | 4 +-\n configs/mk808_defconfig | 2 +-\n configs/phycore-rk3288_defconfig | 3 +-\n configs/popmetal-rk3288_defconfig | 3 +-\n configs/rock-pi-n8-rk3288_defconfig | 2 +-\n configs/rock2_defconfig | 3 +-\n configs/rock_defconfig | 3 +-\n configs/tinker-rk3288_defconfig | 4 +-\n configs/tinker-s-rk3288_defconfig | 4 +-\n configs/vyasa-rk3288_defconfig | 2 +-\n drivers/usb/phy/Kconfig | 3 -\n drivers/usb/phy/Makefile | 1 -\n drivers/usb/phy/rockchip_usb2_phy.c | 113 ------------------\n include/usb/dwc2_udc.h | 1 -\n 24 files changed, 102 insertions(+), 166 deletions(-)\n delete mode 100644 drivers/usb/phy/rockchip_usb2_phy.c\n\n--\n2.39.5", "diff": "diff --git a/arch/arm/mach-rockchip/board.c b/arch/arm/mach-rockchip/board.c\nindex 2e6bb38b9235..1538f4fef081 100644\n--- a/arch/arm/mach-rockchip/board.c\n+++ b/arch/arm/mach-rockchip/board.c\n@@ -269,34 +269,6 @@ int board_usb_init(int index, enum usb_init_type init)\n \t}\n \totg_data.regs_otg = ofnode_get_addr(node);\n\n-#ifdef CONFIG_ROCKCHIP_USB2_PHY\n-\tint ret;\n-\tu32 phandle, offset;\n-\tofnode phy_node;\n-\n-\tret = ofnode_read_u32(node, \"phys\", &phandle);\n-\tif (ret)\n-\t\treturn ret;\n-\n-\tnode = ofnode_get_by_phandle(phandle);\n-\tif (!ofnode_valid(node)) {\n-\t\tdebug(\"Not found usb phy device\\n\");\n-\t\treturn -ENODEV;\n-\t}\n-\n-\tphy_node = ofnode_get_parent(node);\n-\tif (!ofnode_valid(node)) {\n-\t\tdebug(\"Not found usb phy device\\n\");\n-\t\treturn -ENODEV;\n-\t}\n-\n-\totg_data.phy_of_node = phy_node;\n-\tret = ofnode_read_u32(node, \"reg\", &offset);\n-\tif (ret)\n-\t\treturn ret;\n-\totg_data.regs_phy = offset +\n-\t\t(u32)syscon_get_first_range(ROCKCHIP_SYSCON_GRF);\n-#endif\n \treturn dwc2_udc_probe(&otg_data);\n }\n\ndiff --git a/arch/arm/mach-rockchip/rk3066/syscon_rk3066.c b/arch/arm/mach-rockchip/rk3066/syscon_rk3066.c\nindex ff269b53b542..3514e547d523 100644\n--- a/arch/arm/mach-rockchip/rk3066/syscon_rk3066.c\n+++ b/arch/arm/mach-rockchip/rk3066/syscon_rk3066.c\n@@ -5,10 +5,33 @@\n */\n\n #include <dm.h>\n+#include <dm/lists.h>\n #include <log.h>\n #include <syscon.h>\n #include <asm/arch-rockchip/clock.h>\n\n+#if CONFIG_IS_ENABLED(OF_REAL) && IS_ENABLED(CONFIG_PHY_ROCKCHIP_USB2)\n+static int rk3066_syscon_bind(struct udevice *dev)\n+{\n+\tif (dev->driver_data == ROCKCHIP_SYSCON_GRF) {\n+\t\tofnode subnode = ofnode_find_subnode(dev_ofnode(dev), \"usbphy\");\n+\n+\t\tif (ofnode_valid(subnode)) {\n+\t\t\tstruct udevice *usbphy_dev;\n+\t\t\tint ret;\n+\n+\t\t\tret = device_bind_driver_to_node(dev, \"rockchip_usbphy\", \"usbphy\",\n+\t\t\t\t\t\t\t subnode, &usbphy_dev);\n+\t\t\tif (ret)\n+\t\t\t\treturn ret;\n+\n+\t\t\tusbphy_dev->driver_data = usbphy_dev->driver->of_match->data;\n+\t\t}\n+\t}\n+\n+\treturn 0;\n+}\n+#endif\n static const struct udevice_id rk3066_syscon_ids[] = {\n \t{ .compatible = \"rockchip,rk3066-noc\", .data = ROCKCHIP_SYSCON_NOC },\n \t{ .compatible = \"rockchip,rk3066-grf\", .data = ROCKCHIP_SYSCON_GRF },\n@@ -20,6 +43,9 @@ U_BOOT_DRIVER(syscon_rk3066) = {\n \t.name = \"rk3066_syscon\",\n \t.id = UCLASS_SYSCON,\n \t.of_match = rk3066_syscon_ids,\n+#if CONFIG_IS_ENABLED(OF_REAL) && IS_ENABLED(CONFIG_PHY_ROCKCHIP_USB2)\n+\t.bind = rk3066_syscon_bind,\n+#endif\n };\n\n #if CONFIG_IS_ENABLED(OF_PLATDATA)\ndiff --git a/arch/arm/mach-rockchip/rk3188/syscon_rk3188.c b/arch/arm/mach-rockchip/rk3188/syscon_rk3188.c\nindex 6df054e5b27d..1c4a2b8680ae 100644\n--- a/arch/arm/mach-rockchip/rk3188/syscon_rk3188.c\n+++ b/arch/arm/mach-rockchip/rk3188/syscon_rk3188.c\n@@ -9,6 +9,29 @@\n #include <syscon.h>\n #include <asm/arch-rockchip/clock.h>\n\n+#if CONFIG_IS_ENABLED(OF_REAL) && IS_ENABLED(CONFIG_PHY_ROCKCHIP_USB2)\n+static int rk3188_syscon_bind(struct udevice *dev)\n+{\n+\tif (dev->driver_data == ROCKCHIP_SYSCON_GRF) {\n+\t\tofnode subnode = ofnode_find_subnode(dev_ofnode(dev), \"usbphy\");\n+\n+\t\tif (ofnode_valid(subnode)) {\n+\t\t\tstruct udevice *usbphy_dev;\n+\t\t\tint ret;\n+\n+\t\t\tret = device_bind_driver_to_node(dev, \"rockchip_usbphy\", \"usbphy\",\n+\t\t\t\t\t\t\t subnode, &usbphy_dev);\n+\t\t\tif (ret)\n+\t\t\t\treturn ret;\n+\n+\t\t\tusbphy_dev->driver_data = usbphy_dev->driver->of_match->data;\n+\t\t}\n+\t}\n+\n+\treturn 0;\n+}\n+#endif\n+\n static const struct udevice_id rk3188_syscon_ids[] = {\n \t{ .compatible = \"rockchip,rk3188-noc\", .data = ROCKCHIP_SYSCON_NOC },\n \t{ .compatible = \"rockchip,rk3188-grf\", .data = ROCKCHIP_SYSCON_GRF },\n@@ -20,6 +43,9 @@ U_BOOT_DRIVER(syscon_rk3188) = {\n \t.name = \"rk3188_syscon\",\n \t.id = UCLASS_SYSCON,\n \t.of_match = rk3188_syscon_ids,\n+#if CONFIG_IS_ENABLED(OF_REAL) && IS_ENABLED(CONFIG_PHY_ROCKCHIP_USB2)\n+\t.bind = rk3188_syscon_bind,\n+#endif\n };\n\n #if CONFIG_IS_ENABLED(OF_PLATDATA)\ndiff --git a/arch/arm/mach-rockchip/rk3288/syscon_rk3288.c b/arch/arm/mach-rockchip/rk3288/syscon_rk3288.c\nindex 6413d0a88a16..86bc0927502a 100644\n--- a/arch/arm/mach-rockchip/rk3288/syscon_rk3288.c\n+++ b/arch/arm/mach-rockchip/rk3288/syscon_rk3288.c\n@@ -12,6 +12,29 @@\n #include <syscon.h>\n #include <asm/arch-rockchip/clock.h>\n\n+#if CONFIG_IS_ENABLED(OF_REAL) && IS_ENABLED(CONFIG_PHY_ROCKCHIP_USB2)\n+static int rk3288_syscon_bind(struct udevice *dev)\n+{\n+\tif (dev->driver_data == ROCKCHIP_SYSCON_GRF) {\n+\t\tofnode subnode = ofnode_find_subnode(dev_ofnode(dev), \"usbphy\");\n+\n+\t\tif (ofnode_valid(subnode)) {\n+\t\t\tstruct udevice *usbphy_dev;\n+\t\t\tint ret;\n+\n+\t\t\tret = device_bind_driver_to_node(dev, \"rockchip_usbphy\", \"usbphy\",\n+\t\t\t\t\t\t\t subnode, &usbphy_dev);\n+\t\t\tif (ret)\n+\t\t\t\treturn ret;\n+\n+\t\t\tusbphy_dev->driver_data = usbphy_dev->driver->of_match->data;\n+\t\t}\n+\t}\n+\n+\treturn 0;\n+}\n+#endif\n+\n static const struct udevice_id rk3288_syscon_ids[] = {\n \t{ .compatible = \"rockchip,rk3288-noc\", .data = ROCKCHIP_SYSCON_NOC },\n \t{ .compatible = \"rockchip,rk3288-grf\", .data = ROCKCHIP_SYSCON_GRF },\n@@ -24,6 +47,9 @@ U_BOOT_DRIVER(syscon_rk3288) = {\n \t.name = \"rk3288_syscon\",\n \t.id = UCLASS_SYSCON,\n \t.of_match = rk3288_syscon_ids,\n+#if CONFIG_IS_ENABLED(OF_REAL) && IS_ENABLED(CONFIG_PHY_ROCKCHIP_USB2)\n+\t.bind = rk3288_syscon_bind,\n+#endif\n };\n\n #if CONFIG_IS_ENABLED(OF_PLATDATA)\ndiff --git a/configs/chromebit_mickey_defconfig b/configs/chromebit_mickey_defconfig\nindex 60ceae8f1531..b574f8bceebd 100644\n--- a/configs/chromebit_mickey_defconfig\n+++ b/configs/chromebit_mickey_defconfig\n@@ -82,6 +82,7 @@ CONFIG_MMC_DW=y\n CONFIG_MMC_DW_ROCKCHIP=y\n CONFIG_SPI_FLASH_GIGADEVICE=y\n CONFIG_SPI_FLASH_WINBOND=y\n+CONFIG_PHY_ROCKCHIP_USB2=y\n CONFIG_PINCTRL=y\n CONFIG_PINCONF=y\n CONFIG_SPL_PINCTRL=y\n@@ -102,7 +103,6 @@ CONFIG_SYSRESET=y\n CONFIG_USB=y\n # CONFIG_SPL_DM_USB is not set\n CONFIG_USB_DWC2=y\n-CONFIG_ROCKCHIP_USB2_PHY=y\n CONFIG_VIDEO=y\n # CONFIG_VIDEO_BPP8 is not set\n CONFIG_CONSOLE_TRUETYPE=y\ndiff --git a/configs/chromebook_jerry_defconfig b/configs/chromebook_jerry_defconfig\nindex 5e89311affe3..9f0d4d94cbca 100644\n--- a/configs/chromebook_jerry_defconfig\n+++ b/configs/chromebook_jerry_defconfig\n@@ -82,6 +82,7 @@ CONFIG_MMC_DW=y\n CONFIG_MMC_DW_ROCKCHIP=y\n CONFIG_SPI_FLASH_GIGADEVICE=y\n CONFIG_SPI_FLASH_WINBOND=y\n+CONFIG_PHY_ROCKCHIP_USB2=y\n CONFIG_PINCTRL=y\n CONFIG_PINCONF=y\n CONFIG_SPL_PINCTRL=y\n@@ -106,7 +107,6 @@ CONFIG_SYSRESET=y\n CONFIG_USB=y\n # CONFIG_SPL_DM_USB is not set\n CONFIG_USB_DWC2=y\n-CONFIG_ROCKCHIP_USB2_PHY=y\n CONFIG_VIDEO=y\n # CONFIG_VIDEO_BPP8 is not set\n CONFIG_CONSOLE_TRUETYPE=y\ndiff --git a/configs/chromebook_minnie_defconfig b/configs/chromebook_minnie_defconfig\nindex 6e0158fd4a9e..ae8c1d3fc9a1 100644\n--- a/configs/chromebook_minnie_defconfig\n+++ b/configs/chromebook_minnie_defconfig\n@@ -83,6 +83,7 @@ CONFIG_MMC_DW=y\n CONFIG_MMC_DW_ROCKCHIP=y\n CONFIG_SPI_FLASH_GIGADEVICE=y\n CONFIG_SPI_FLASH_WINBOND=y\n+CONFIG_PHY_ROCKCHIP_USB2=y\n CONFIG_PINCTRL=y\n CONFIG_PINCONF=y\n CONFIG_SPL_PINCTRL=y\n@@ -107,7 +108,6 @@ CONFIG_SYSRESET=y\n CONFIG_USB=y\n # CONFIG_SPL_DM_USB is not set\n CONFIG_USB_DWC2=y\n-CONFIG_ROCKCHIP_USB2_PHY=y\n CONFIG_VIDEO=y\n # CONFIG_VIDEO_BPP8 is not set\n CONFIG_CONSOLE_TRUETYPE=y\ndiff --git a/configs/chromebook_speedy_defconfig b/configs/chromebook_speedy_defconfig\nindex 86f1399c0e3c..7b4258f18427 100644\n--- a/configs/chromebook_speedy_defconfig\n+++ b/configs/chromebook_speedy_defconfig\n@@ -83,6 +83,7 @@ CONFIG_MMC_DW=y\n CONFIG_MMC_DW_ROCKCHIP=y\n CONFIG_SPI_FLASH_GIGADEVICE=y\n CONFIG_SPI_FLASH_WINBOND=y\n+CONFIG_PHY_ROCKCHIP_USB2=y\n CONFIG_PINCTRL=y\n CONFIG_PINCONF=y\n CONFIG_SPL_PINCTRL=y\n@@ -107,7 +108,6 @@ CONFIG_SYSRESET=y\n CONFIG_USB=y\n # CONFIG_SPL_DM_USB is not set\n CONFIG_USB_DWC2=y\n-CONFIG_ROCKCHIP_USB2_PHY=y\n CONFIG_VIDEO=y\n # CONFIG_VIDEO_BPP8 is not set\n CONFIG_CONSOLE_TRUETYPE=y\ndiff --git a/configs/evb-rk3288-rk808_defconfig b/configs/evb-rk3288-rk808_defconfig\nindex 2112e475ad31..5244c42b7b4e 100644\n--- a/configs/evb-rk3288-rk808_defconfig\n+++ b/configs/evb-rk3288-rk808_defconfig\n@@ -71,6 +71,7 @@ CONFIG_MMC_DW=y\n CONFIG_MMC_DW_ROCKCHIP=y\n CONFIG_ETH_DESIGNWARE=y\n CONFIG_GMAC_ROCKCHIP=y\n+CONFIG_PHY_ROCKCHIP_USB2=y\n CONFIG_PINCTRL=y\n CONFIG_SPL_PINCTRL=y\n CONFIG_DM_PMIC=y\n@@ -85,7 +86,6 @@ CONFIG_SYS_NS16550_MEM32=y\n CONFIG_SYSRESET=y\n CONFIG_USB=y\n CONFIG_USB_DWC2=y\n-CONFIG_ROCKCHIP_USB2_PHY=y\n CONFIG_USB_GADGET=y\n CONFIG_USB_GADGET_DWC2_OTG=y\n CONFIG_VIDEO=y\ndiff --git a/configs/firefly-rk3288_defconfig b/configs/firefly-rk3288_defconfig\nindex 54e3c41f3ccf..0999bf03d60a 100644\n--- a/configs/firefly-rk3288_defconfig\n+++ b/configs/firefly-rk3288_defconfig\n@@ -62,11 +62,12 @@ CONFIG_MISC=y\n CONFIG_ROCKCHIP_EFUSE=y\n CONFIG_MMC_DW=y\n CONFIG_MMC_DW_ROCKCHIP=y\n-CONFIG_PHY_REALTEK=y\n CONFIG_DM_ETH_PHY=y\n CONFIG_PHY_GIGE=y\n CONFIG_ETH_DESIGNWARE=y\n CONFIG_GMAC_ROCKCHIP=y\n+CONFIG_PHY_REALTEK=y\n+CONFIG_PHY_ROCKCHIP_USB2=y\n CONFIG_PINCTRL=y\n CONFIG_SPL_PINCTRL=y\n CONFIG_DM_PMIC=y\n@@ -82,7 +83,6 @@ CONFIG_SYS_NS16550_MEM32=y\n CONFIG_SYSRESET=y\n CONFIG_USB=y\n CONFIG_USB_DWC2=y\n-CONFIG_ROCKCHIP_USB2_PHY=y\n CONFIG_USB_KEYBOARD=y\n CONFIG_USB_HOST_ETHER=y\n CONFIG_USB_ETHER_ASIX=y\ndiff --git a/configs/miqi-rk3288_defconfig b/configs/miqi-rk3288_defconfig\nindex 4cbd4b97172a..827f1ae159e1 100644\n--- a/configs/miqi-rk3288_defconfig\n+++ b/configs/miqi-rk3288_defconfig\n@@ -59,11 +59,12 @@ CONFIG_MISC=y\n CONFIG_ROCKCHIP_EFUSE=y\n CONFIG_MMC_DW=y\n CONFIG_MMC_DW_ROCKCHIP=y\n-CONFIG_PHY_REALTEK=y\n CONFIG_DM_ETH_PHY=y\n CONFIG_PHY_GIGE=y\n CONFIG_ETH_DESIGNWARE=y\n CONFIG_GMAC_ROCKCHIP=y\n+CONFIG_PHY_REALTEK=y\n+CONFIG_PHY_ROCKCHIP_USB2=y\n CONFIG_PINCTRL=y\n CONFIG_SPL_PINCTRL=y\n CONFIG_DM_PMIC=y\n@@ -79,7 +80,6 @@ CONFIG_SYS_NS16550_MEM32=y\n CONFIG_SYSRESET=y\n CONFIG_USB=y\n CONFIG_USB_DWC2=y\n-CONFIG_ROCKCHIP_USB2_PHY=y\n CONFIG_USB_KEYBOARD=y\n CONFIG_USB_HOST_ETHER=y\n CONFIG_USB_ETHER_ASIX=y\ndiff --git a/configs/mk808_defconfig b/configs/mk808_defconfig\nindex b983128e1def..3b63e5f930bb 100644\n--- a/configs/mk808_defconfig\n+++ b/configs/mk808_defconfig\n@@ -92,6 +92,7 @@ CONFIG_MMC_UHS_SUPPORT=y\n CONFIG_SPL_MMC_UHS_SUPPORT=y\n CONFIG_MMC_DW=y\n CONFIG_MMC_DW_ROCKCHIP=y\n+CONFIG_PHY_ROCKCHIP_USB2=y\n CONFIG_PINCTRL=y\n CONFIG_DM_PMIC=y\n # CONFIG_SPL_PMIC_CHILDREN is not set\n@@ -111,7 +112,6 @@ CONFIG_TPL_TIMER=y\n CONFIG_DESIGNWARE_APB_TIMER=y\n CONFIG_USB=y\n CONFIG_USB_DWC2=y\n-CONFIG_ROCKCHIP_USB2_PHY=y\n CONFIG_USB_GADGET=y\n CONFIG_USB_GADGET_DWC2_OTG=y\n CONFIG_USB_FUNCTION_ROCKUSB=y\ndiff --git a/configs/phycore-rk3288_defconfig b/configs/phycore-rk3288_defconfig\nindex a374f90982e0..bafe49818637 100644\n--- a/configs/phycore-rk3288_defconfig\n+++ b/configs/phycore-rk3288_defconfig\n@@ -9,6 +9,7 @@ CONFIG_CUSTOM_SYS_INIT_SP_ADDR=0x100000\n CONFIG_SF_DEFAULT_SPEED=20000000\n CONFIG_ENV_OFFSET=0x3F8000\n CONFIG_DEFAULT_DEVICE_TREE=\"rockchip/rk3288-phycore-rdk\"\n+CONFIG_DM_RESET=y\n CONFIG_SYS_MONITOR_LEN=614400\n CONFIG_ROCKCHIP_RK3288=y\n CONFIG_SPL_ROCKCHIP_BACK_TO_BROM=y\n@@ -68,6 +69,7 @@ CONFIG_MMC_DW=y\n CONFIG_MMC_DW_ROCKCHIP=y\n CONFIG_ETH_DESIGNWARE=y\n CONFIG_GMAC_ROCKCHIP=y\n+CONFIG_PHY_ROCKCHIP_USB2=y\n CONFIG_PINCTRL=y\n CONFIG_SPL_PINCTRL=y\n CONFIG_DM_PMIC=y\n@@ -82,7 +84,6 @@ CONFIG_SYS_NS16550_MEM32=y\n CONFIG_SYSRESET=y\n CONFIG_USB=y\n CONFIG_USB_DWC2=y\n-CONFIG_ROCKCHIP_USB2_PHY=y\n CONFIG_USB_HOST_ETHER=y\n CONFIG_USB_ETHER_ASIX=y\n CONFIG_USB_ETHER_SMSC95XX=y\ndiff --git a/configs/popmetal-rk3288_defconfig b/configs/popmetal-rk3288_defconfig\nindex 52d38f4108c3..a4d0bd705fdf 100644\n--- a/configs/popmetal-rk3288_defconfig\n+++ b/configs/popmetal-rk3288_defconfig\n@@ -9,6 +9,7 @@ CONFIG_CUSTOM_SYS_INIT_SP_ADDR=0x100000\n CONFIG_SF_DEFAULT_SPEED=20000000\n CONFIG_ENV_OFFSET=0x3F8000\n CONFIG_DEFAULT_DEVICE_TREE=\"rockchip/rk3288-popmetal\"\n+CONFIG_DM_RESET=y\n CONFIG_SYS_MONITOR_LEN=614400\n CONFIG_ROCKCHIP_RK3288=y\n CONFIG_SPL_ROCKCHIP_BACK_TO_BROM=y\n@@ -64,6 +65,7 @@ CONFIG_MMC_DW=y\n CONFIG_MMC_DW_ROCKCHIP=y\n CONFIG_ETH_DESIGNWARE=y\n CONFIG_GMAC_ROCKCHIP=y\n+CONFIG_PHY_ROCKCHIP_USB2=y\n CONFIG_PINCTRL=y\n CONFIG_SPL_PINCTRL=y\n CONFIG_DM_PMIC=y\n@@ -78,7 +80,6 @@ CONFIG_SYS_NS16550_MEM32=y\n CONFIG_SYSRESET=y\n CONFIG_USB=y\n CONFIG_USB_DWC2=y\n-CONFIG_ROCKCHIP_USB2_PHY=y\n CONFIG_USB_HOST_ETHER=y\n CONFIG_USB_ETHER_ASIX=y\n CONFIG_USB_ETHER_SMSC95XX=y\ndiff --git a/configs/rock-pi-n8-rk3288_defconfig b/configs/rock-pi-n8-rk3288_defconfig\nindex 242aa89bcce0..71749c3b8741 100644\n--- a/configs/rock-pi-n8-rk3288_defconfig\n+++ b/configs/rock-pi-n8-rk3288_defconfig\n@@ -63,6 +63,7 @@ CONFIG_MMC_DW=y\n CONFIG_MMC_DW_ROCKCHIP=y\n CONFIG_ETH_DESIGNWARE=y\n CONFIG_GMAC_ROCKCHIP=y\n+CONFIG_PHY_ROCKCHIP_USB2=y\n CONFIG_PINCTRL=y\n CONFIG_SPL_PINCTRL=y\n CONFIG_DM_PMIC=y\n@@ -81,7 +82,6 @@ CONFIG_USB=y\n CONFIG_USB_EHCI_HCD=y\n CONFIG_USB_EHCI_GENERIC=y\n CONFIG_USB_DWC2=y\n-CONFIG_ROCKCHIP_USB2_PHY=y\n CONFIG_USB_KEYBOARD=y\n # CONFIG_USB_KEYBOARD_FN_KEYS is not set\n CONFIG_USB_GADGET=y\ndiff --git a/configs/rock2_defconfig b/configs/rock2_defconfig\nindex 025b55e2171b..6ebda3a36992 100644\n--- a/configs/rock2_defconfig\n+++ b/configs/rock2_defconfig\n@@ -9,6 +9,7 @@ CONFIG_CUSTOM_SYS_INIT_SP_ADDR=0x100000\n CONFIG_SF_DEFAULT_SPEED=20000000\n CONFIG_ENV_OFFSET=0x3F8000\n CONFIG_DEFAULT_DEVICE_TREE=\"rockchip/rk3288-rock2-square\"\n+CONFIG_DM_RESET=y\n CONFIG_SYS_MONITOR_LEN=614400\n CONFIG_ROCKCHIP_RK3288=y\n CONFIG_SPL_ROCKCHIP_BACK_TO_BROM=y\n@@ -65,6 +66,7 @@ CONFIG_MMC_DW=y\n CONFIG_MMC_DW_ROCKCHIP=y\n CONFIG_ETH_DESIGNWARE=y\n CONFIG_GMAC_ROCKCHIP=y\n+CONFIG_PHY_ROCKCHIP_USB2=y\n CONFIG_PINCTRL=y\n CONFIG_SPL_PINCTRL=y\n CONFIG_DM_PMIC=y\n@@ -80,7 +82,6 @@ CONFIG_SYS_NS16550_MEM32=y\n CONFIG_SYSRESET=y\n CONFIG_USB=y\n CONFIG_USB_DWC2=y\n-CONFIG_ROCKCHIP_USB2_PHY=y\n CONFIG_USB_KEYBOARD=y\n CONFIG_USB_GADGET=y\n CONFIG_USB_GADGET_DWC2_OTG=y\ndiff --git a/configs/rock_defconfig b/configs/rock_defconfig\nindex 71e504713c16..753deb349afd 100644\n--- a/configs/rock_defconfig\n+++ b/configs/rock_defconfig\n@@ -12,6 +12,7 @@ CONFIG_CUSTOM_SYS_INIT_SP_ADDR=0x60100000\n CONFIG_SF_DEFAULT_SPEED=20000000\n CONFIG_ENV_OFFSET=0x3F8000\n CONFIG_DEFAULT_DEVICE_TREE=\"rockchip/rk3188-radxarock\"\n+CONFIG_DM_RESET=y\n CONFIG_ROCKCHIP_RK3188=y\n # CONFIG_ROCKCHIP_STIMER is not set\n CONFIG_TARGET_ROCK=y\n@@ -53,6 +54,7 @@ CONFIG_SYS_I2C_ROCKCHIP=y\n CONFIG_LED=y\n CONFIG_MMC_DW=y\n CONFIG_MMC_DW_ROCKCHIP=y\n+CONFIG_PHY_ROCKCHIP_USB2=y\n CONFIG_PINCTRL=y\n CONFIG_DM_PMIC=y\n # CONFIG_SPL_PMIC_CHILDREN is not set\n@@ -68,7 +70,6 @@ CONFIG_TIMER=y\n CONFIG_SPL_TIMER=y\n CONFIG_ROCKCHIP_TIMER=y\n CONFIG_USB=y\n-CONFIG_ROCKCHIP_USB2_PHY=y\n CONFIG_RANDOM_UUID=y\n CONFIG_SPL_TINY_MEMSET=y\n CONFIG_CMD_DHRYSTONE=y\ndiff --git a/configs/tinker-rk3288_defconfig b/configs/tinker-rk3288_defconfig\nindex 2e701a5ff722..a1d8acc70e3c 100644\n--- a/configs/tinker-rk3288_defconfig\n+++ b/configs/tinker-rk3288_defconfig\n@@ -62,11 +62,12 @@ CONFIG_ROCKCHIP_EFUSE=y\n CONFIG_I2C_EEPROM=y\n CONFIG_MMC_DW=y\n CONFIG_MMC_DW_ROCKCHIP=y\n-CONFIG_PHY_REALTEK=y\n CONFIG_DM_ETH_PHY=y\n CONFIG_PHY_GIGE=y\n CONFIG_ETH_DESIGNWARE=y\n CONFIG_GMAC_ROCKCHIP=y\n+CONFIG_PHY_REALTEK=y\n+CONFIG_PHY_ROCKCHIP_USB2=y\n CONFIG_PINCTRL=y\n CONFIG_SPL_PINCTRL=y\n CONFIG_DM_PMIC=y\n@@ -81,7 +82,6 @@ CONFIG_SYS_NS16550_MEM32=y\n CONFIG_SYSRESET=y\n CONFIG_USB=y\n CONFIG_USB_DWC2=y\n-CONFIG_ROCKCHIP_USB2_PHY=y\n CONFIG_USB_KEYBOARD=y\n CONFIG_USB_HOST_ETHER=y\n CONFIG_USB_ETHER_ASIX=y\ndiff --git a/configs/tinker-s-rk3288_defconfig b/configs/tinker-s-rk3288_defconfig\nindex 816903c8430e..902742b73bf0 100644\n--- a/configs/tinker-s-rk3288_defconfig\n+++ b/configs/tinker-s-rk3288_defconfig\n@@ -62,11 +62,12 @@ CONFIG_ROCKCHIP_EFUSE=y\n CONFIG_I2C_EEPROM=y\n CONFIG_MMC_DW=y\n CONFIG_MMC_DW_ROCKCHIP=y\n-CONFIG_PHY_REALTEK=y\n CONFIG_DM_ETH_PHY=y\n CONFIG_PHY_GIGE=y\n CONFIG_ETH_DESIGNWARE=y\n CONFIG_GMAC_ROCKCHIP=y\n+CONFIG_PHY_REALTEK=y\n+CONFIG_PHY_ROCKCHIP_USB2=y\n CONFIG_PINCTRL=y\n CONFIG_SPL_PINCTRL=y\n CONFIG_DM_PMIC=y\n@@ -81,7 +82,6 @@ CONFIG_SYS_NS16550_MEM32=y\n CONFIG_SYSRESET=y\n CONFIG_USB=y\n CONFIG_USB_DWC2=y\n-CONFIG_ROCKCHIP_USB2_PHY=y\n CONFIG_USB_KEYBOARD=y\n CONFIG_USB_HOST_ETHER=y\n CONFIG_USB_ETHER_ASIX=y\ndiff --git a/configs/vyasa-rk3288_defconfig b/configs/vyasa-rk3288_defconfig\nindex 1d7e22653608..a0e160e6d70c 100644\n--- a/configs/vyasa-rk3288_defconfig\n+++ b/configs/vyasa-rk3288_defconfig\n@@ -72,6 +72,7 @@ CONFIG_MMC_DW=y\n CONFIG_MMC_DW_ROCKCHIP=y\n CONFIG_ETH_DESIGNWARE=y\n CONFIG_GMAC_ROCKCHIP=y\n+CONFIG_PHY_ROCKCHIP_USB2=y\n CONFIG_PINCTRL=y\n CONFIG_SPL_PINCTRL=y\n CONFIG_DM_PMIC=y\n@@ -87,7 +88,6 @@ CONFIG_SYS_NS16550_MEM32=y\n CONFIG_SYSRESET=y\n CONFIG_USB=y\n CONFIG_USB_DWC2=y\n-CONFIG_ROCKCHIP_USB2_PHY=y\n CONFIG_USB_KEYBOARD=y\n CONFIG_USB_HOST_ETHER=y\n CONFIG_USB_ETHER_ASIX=y\ndiff --git a/drivers/usb/phy/Kconfig b/drivers/usb/phy/Kconfig\nindex c505862f1e15..9c91f63786ac 100644\n--- a/drivers/usb/phy/Kconfig\n+++ b/drivers/usb/phy/Kconfig\n@@ -7,6 +7,3 @@ comment \"USB Phy\"\n\n config TWL4030_USB\n \tbool \"TWL4030 PHY\"\n-\n-config ROCKCHIP_USB2_PHY\n-\tbool \"Rockchip USB2 PHY\"\ndiff --git a/drivers/usb/phy/Makefile b/drivers/usb/phy/Makefile\nindex b67a70bbe8ed..cf6109dee610 100644\n--- a/drivers/usb/phy/Makefile\n+++ b/drivers/usb/phy/Makefile\n@@ -4,4 +4,3 @@\n # Tom Rix <Tom.Rix@windriver.com>\n\n obj-$(CONFIG_TWL4030_USB) += twl4030.o\n-obj-$(CONFIG_ROCKCHIP_USB2_PHY) += rockchip_usb2_phy.o\ndiff --git a/drivers/usb/phy/rockchip_usb2_phy.c b/drivers/usb/phy/rockchip_usb2_phy.c\ndeleted file mode 100644\nindex bdbd0d44813a..000000000000\n--- a/drivers/usb/phy/rockchip_usb2_phy.c\n+++ /dev/null\n@@ -1,113 +0,0 @@\n-// SPDX-License-Identifier: GPL-2.0+\n-/*\n- * Copyright 2016 Rockchip Electronics Co., Ltd\n- */\n-\n-#include <hang.h>\n-#include <log.h>\n-#include <asm/io.h>\n-#include <linux/bitops.h>\n-#include <linux/delay.h>\n-\n-#include \"../gadget/dwc2_udc_otg_priv.h\"\n-\n-#define BIT_WRITEABLE_SHIFT\t16\n-\n-struct usb2phy_reg {\n-\tunsigned int offset;\n-\tunsigned int bitend;\n-\tunsigned int bitstart;\n-\tunsigned int disable;\n-\tunsigned int enable;\n-};\n-\n-/**\n- * struct rockchip_usb2_phy_cfg: usb-phy port configuration\n- * @port_reset: usb otg per-port reset register\n- * @soft_con: software control usb otg register\n- * @suspend: phy suspend register\n- */\n-struct rockchip_usb2_phy_cfg {\n-\tstruct usb2phy_reg port_reset;\n-\tstruct usb2phy_reg soft_con;\n-\tstruct usb2phy_reg suspend;\n-};\n-\n-struct rockchip_usb2_phy_dt_id {\n-\tchar\t\tcompatible[128];\n-\tconst void\t*data;\n-};\n-\n-static const struct rockchip_usb2_phy_cfg rk3066a_pdata = {\n-\t.port_reset\t= {0x00, 12, 12, 0, 1},\n-\t.soft_con\t= {0x08, 2, 2, 0, 1},\n-\t.suspend\t= {0x08, 8, 3, (0x01 << 3), (0x2A << 3)},\n-};\n-\n-static const struct rockchip_usb2_phy_cfg rk3288_pdata = {\n-\t.port_reset = {0x00, 12, 12, 0, 1},\n-\t.soft_con = {0x08, 2, 2, 0, 1},\n-\t.suspend\t= {0x0c, 5, 0, 0x01, 0x2A},\n-};\n-\n-static struct rockchip_usb2_phy_dt_id rockchip_usb2_phy_dt_ids[] = {\n-\t{ .compatible = \"rockchip,rk3066a-usb-phy\", .data = &rk3066a_pdata },\n-\t{ .compatible = \"rockchip,rk3188-usb-phy\", .data = &rk3288_pdata },\n-\t{ .compatible = \"rockchip,rk3288-usb-phy\", .data = &rk3288_pdata },\n-\t{}\n-};\n-\n-static void property_enable(struct dwc2_plat_otg_data *pdata,\n-\t\t\t\t const struct usb2phy_reg *reg, bool en)\n-{\n-\tunsigned int val, mask, tmp;\n-\n-\ttmp = en ? reg->enable : reg->disable;\n-\tmask = GENMASK(reg->bitend, reg->bitstart);\n-\tval = (tmp << reg->bitstart) | (mask << BIT_WRITEABLE_SHIFT);\n-\n-\twritel(val, pdata->regs_phy + reg->offset);\n-}\n-\n-void otg_phy_init(struct dwc2_udc *dev)\n-{\n-\tstruct dwc2_plat_otg_data *pdata = dev->pdata;\n-\tstruct rockchip_usb2_phy_cfg *phy_cfg = NULL;\n-\tstruct rockchip_usb2_phy_dt_id *of_id;\n-\tint i;\n-\n-\tfor (i = 0; i < ARRAY_SIZE(rockchip_usb2_phy_dt_ids); i++) {\n-\t\tof_id = &rockchip_usb2_phy_dt_ids[i];\n-\t\tif (ofnode_device_is_compatible(pdata->phy_of_node,\n-\t\t\t\t\t\tof_id->compatible)){\n-\t\t\tphy_cfg = (struct rockchip_usb2_phy_cfg *)of_id->data;\n-\t\t\tbreak;\n-\t\t}\n-\t}\n-\tif (!phy_cfg) {\n-\t\tdebug(\"Can't find device platform data\\n\");\n-\n-\t\thang();\n-\t\treturn;\n-\t}\n-\tpdata->priv = phy_cfg;\n-\t/* disable software control */\n-\tproperty_enable(pdata, &phy_cfg->soft_con, false);\n-\n-\t/* reset otg port */\n-\tproperty_enable(pdata, &phy_cfg->port_reset, true);\n-\tmdelay(1);\n-\tproperty_enable(pdata, &phy_cfg->port_reset, false);\n-\tudelay(1);\n-}\n-\n-void otg_phy_off(struct dwc2_udc *dev)\n-{\n-\tstruct dwc2_plat_otg_data *pdata = dev->pdata;\n-\tstruct rockchip_usb2_phy_cfg *phy_cfg = pdata->priv;\n-\n-\t/* enable software control */\n-\tproperty_enable(pdata, &phy_cfg->soft_con, true);\n-\t/* enter suspend */\n-\tproperty_enable(pdata, &phy_cfg->suspend, true);\n-}\ndiff --git a/include/usb/dwc2_udc.h b/include/usb/dwc2_udc.h\nindex aa37e957b47c..c8610ef8c98a 100644\n--- a/include/usb/dwc2_udc.h\n+++ b/include/usb/dwc2_udc.h\n@@ -15,7 +15,6 @@\n\n struct dwc2_plat_otg_data {\n \tvoid\t\t*priv;\n-\tofnode\t\tphy_of_node;\n \tint\t\t(*phy_control)(int on);\n \tuintptr_t\tregs_phy;\n \tuintptr_t\tregs_otg;\n", "prefixes": [ "v2", "2/2" ] }