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GET /api/patches/2219737/?format=api
{ "id": 2219737, "url": "http://patchwork.ozlabs.org/api/patches/2219737/?format=api", "web_url": "http://patchwork.ozlabs.org/project/qemu-devel/patch/20260404042015.86580-10-mohamed@unpredictable.fr/", "project": { "id": 14, "url": "http://patchwork.ozlabs.org/api/projects/14/?format=api", "name": "QEMU Development", "link_name": "qemu-devel", "list_id": "qemu-devel.nongnu.org", "list_email": "qemu-devel@nongnu.org", "web_url": "", "scm_url": "", "webscm_url": "", "list_archive_url": "", "list_archive_url_format": "", "commit_url_format": "" }, "msgid": "<20260404042015.86580-10-mohamed@unpredictable.fr>", "list_archive_url": null, "date": "2026-04-04T04:20:13", "name": "[v6,09/11] whpx: i386: use WHvX64RegisterCr8 only when kernel-irqchip=off", "commit_ref": null, "pull_url": null, "state": "new", "archived": false, "hash": "fdf8a7880917f8e1e26cefbbd6846b1aeb98968d", "submitter": { "id": 91318, "url": "http://patchwork.ozlabs.org/api/people/91318/?format=api", "name": "Mohamed Mediouni", "email": "mohamed@unpredictable.fr" }, "delegate": null, "mbox": "http://patchwork.ozlabs.org/project/qemu-devel/patch/20260404042015.86580-10-mohamed@unpredictable.fr/mbox/", "series": [ { "id": 498696, "url": "http://patchwork.ozlabs.org/api/series/498696/?format=api", "web_url": "http://patchwork.ozlabs.org/project/qemu-devel/list/?series=498696", "date": "2026-04-04T04:20:05", "name": "whpx: i386: bug fixes, feature probing and CPUID", "version": 6, "mbox": "http://patchwork.ozlabs.org/series/498696/mbox/" } ], "comments": "http://patchwork.ozlabs.org/api/patches/2219737/comments/", "check": "pending", "checks": "http://patchwork.ozlabs.org/api/patches/2219737/checks/", "tags": {}, "related": [], "headers": { "Return-Path": "<qemu-devel-bounces+incoming=patchwork.ozlabs.org@nongnu.org>", "X-Original-To": "incoming@patchwork.ozlabs.org", "Delivered-To": "patchwork-incoming@legolas.ozlabs.org", "Authentication-Results": [ "legolas.ozlabs.org;\n\tdkim=pass (2048-bit key;\n unprotected) header.d=unpredictable.fr header.i=@unpredictable.fr\n header.a=rsa-sha256 header.s=sig1 header.b=F7C+hvoS;\n\tdkim-atps=neutral", "legolas.ozlabs.org;\n spf=pass (sender SPF authorized) smtp.mailfrom=nongnu.org\n (client-ip=209.51.188.17; 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Sat, 04 Apr 2026 00:20:38 -0400", "from outbound.st.icloud.com (unknown [127.0.0.2])\n by p00-icloudmta-asmtp-us-east-1a-10-percent-0 (Postfix) with ESMTPS id\n B06E618000B3; Sat, 04 Apr 2026 04:20:32 +0000 (UTC)", "from localhost.localdomain (unknown [17.42.251.67])\n by p00-icloudmta-asmtp-us-east-1a-10-percent-0 (Postfix) with ESMTPSA id\n 81C661800097; Sat, 04 Apr 2026 04:20:30 +0000 (UTC)" ], "Dkim-Signature": "v=1; a=rsa-sha256; c=relaxed/relaxed; d=unpredictable.fr;\n s=sig1; t=1775276435; x=1777868435;\n bh=+hn/b907vnbE0dvYvh4HHSsKO/zS5B54ItsSB46awcE=;\n h=From:To:Subject:Date:Message-ID:MIME-Version:x-icloud-hme;\n b=F7C+hvoSOQ7nyEK9WalGYQDhXBBVkrL8XcjRS/zFdwlgiLzLqTW2vUZQZNAZm96hNSPLWb1ZPvM1a2i0NJlFoWM9ZMER5Nbujii1d6sMVlu/cwbTrmlV6i/3cbk22/zc7HjX454SkEEoL1pJRmfNaEgTmzmqFVxil84fucQ0sc8A5M+h3ESn/752Gf/O/9ZaIecoGqHWR166zCeW7ZoCAXIoZpJySvSzlWGYwU1bgJXwvO+UXt4Gsi/ivOHP4tgcl0BJQwPlVn8tJuTmcJ0G+HC8xqC/cb2eksdR2bpjUFxtS02AXwZrdF6LNDG4S1o1OB4t0Fojyr/MVZBugQonng==", "mail-alias-created-date": "1752046281608", "From": "Mohamed Mediouni <mohamed@unpredictable.fr>", "To": "qemu-devel@nongnu.org", "Cc": "Wei Liu <wei.liu@kernel.org>, Roman Bolshakov <rbolshakov@ddn.com>,\n Pedro Barbuda <pbarbuda@microsoft.com>,\n Mohamed Mediouni <mohamed@unpredictable.fr>,\n Phil Dennis-Jordan <phil@philjordan.eu>,\n Paolo Bonzini <pbonzini@redhat.com>, Zhao Liu <zhao1.liu@intel.com>", "Subject": "[PATCH v6 09/11] whpx: i386: use WHvX64RegisterCr8 only when\n kernel-irqchip=off", "Date": "Sat, 4 Apr 2026 06:20:13 +0200", "Message-ID": "<20260404042015.86580-10-mohamed@unpredictable.fr>", "X-Mailer": "git-send-email 2.50.1", "In-Reply-To": "<20260404042015.86580-1-mohamed@unpredictable.fr>", "References": "<20260404042015.86580-1-mohamed@unpredictable.fr>", "MIME-Version": "1.0", "Content-Transfer-Encoding": "8bit", "X-Proofpoint-Spam-Details-Enc": "AW1haW4tMjYwNDA0MDAzNCBTYWx0ZWRfX02eIjIs0fE6D\n xM5Pc7voNyL5u/dLKmo+ZSGAltf9EWGQUJxQ4fhR+UbG/YO+TyQyILx4m8Qo9pr/NJoUePH1w39\n SxzOd9fCg5C3iBIK7L2w+3Uw7P1oIa7D7NrYUMwwusJuyU/AtbiHC36K6s5KSyzwd1zzj7hdgwg\n q9Z4OTXrAMcqwsqUTJs1/gIU7f57B97U9jJbps/MMXb9Fo/Vd9e3kb29fWf8FocLqb2v4WarPBK\n Wkpvzd0o4yKjZTYIoFd3NMwohb59dEz/dsJgQpnsYi4M/03k8+2gLyPV6y81DVXHKWTd9DsR5Va\n FHdQ95zHi6m6JANryi0nx1NQzCp3DdWuzzajZwo1mppawnnuPoSS7q5p5ulJEE=", "X-Proofpoint-ORIG-GUID": "l7WeCXRaIsYgVuj_Bxd4oaVVP5mxde-X", "X-Authority-Info-Out": "v=2.4 cv=aqW/yCZV c=1 sm=1 tr=0 ts=69d09191\n cx=c_apl:c_pps:t_out a=YrL12D//S6tul8v/L+6tKg==:117\n a=YrL12D//S6tul8v/L+6tKg==:17 a=A5OVakUREuEA:10 a=VkNPw1HP01LnGYTKEx00:22\n a=4IdwVP5-j8YZXVcKM5MA:9", "X-Proofpoint-GUID": "l7WeCXRaIsYgVuj_Bxd4oaVVP5mxde-X", "X-Proofpoint-Virus-Version": "vendor=baseguard\n engine=ICAP:2.0.293,Aquarius:18.0.1143,Hydra:6.1.51,FMLib:17.12.100.49\n definitions=2026-04-03_07,2026-04-03_01,2025-10-01_01", "X-Proofpoint-Spam-Details": "rule=notspam policy=default score=0 spamscore=0\n suspectscore=0 clxscore=1030 mlxlogscore=866 bulkscore=0 adultscore=0\n phishscore=0 malwarescore=0 lowpriorityscore=0 mlxscore=0 classifier=spam\n authscore=0 adjust=0 reason=mlx scancount=1 engine=8.22.0-2601150000\n definitions=main-2604040034", "Received-SPF": "pass client-ip=57.103.79.12;\n envelope-from=mohamed@unpredictable.fr; helo=outbound.st.icloud.com", "X-Spam_score_int": "-20", "X-Spam_score": "-2.1", "X-Spam_bar": "--", "X-Spam_report": "(-2.1 / 5.0 requ) BAYES_00=-1.9, DKIM_SIGNED=0.1,\n DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1,\n RCVD_IN_MSPIKE_H2=0.001, RCVD_IN_VALIDITY_CERTIFIED_BLOCKED=0.001,\n RCVD_IN_VALIDITY_RPBL_BLOCKED=0.001, SPF_HELO_PASS=-0.001,\n SPF_PASS=-0.001 autolearn=ham autolearn_force=no", "X-Spam_action": "no action", "X-BeenThere": "qemu-devel@nongnu.org", "X-Mailman-Version": "2.1.29", "Precedence": "list", "List-Id": "qemu development <qemu-devel.nongnu.org>", "List-Unsubscribe": "<https://lists.nongnu.org/mailman/options/qemu-devel>,\n <mailto:qemu-devel-request@nongnu.org?subject=unsubscribe>", "List-Archive": "<https://lists.nongnu.org/archive/html/qemu-devel>", "List-Post": "<mailto:qemu-devel@nongnu.org>", "List-Help": "<mailto:qemu-devel-request@nongnu.org?subject=help>", "List-Subscribe": "<https://lists.nongnu.org/mailman/listinfo/qemu-devel>,\n <mailto:qemu-devel-request@nongnu.org?subject=subscribe>", "Errors-To": "qemu-devel-bounces+incoming=patchwork.ozlabs.org@nongnu.org", "Sender": "qemu-devel-bounces+incoming=patchwork.ozlabs.org@nongnu.org" }, "content": "When kernel-irqchip=on, manage TPR as part of the APIC state instead entirely.\n\nThis fixes some failure to set state errors.\n\nSigned-off-by: Mohamed Mediouni <mohamed@unpredictable.fr>\n---\n target/i386/whpx/whpx-all.c | 37 ++++++++++++++++++++++---------------\n 1 file changed, 22 insertions(+), 15 deletions(-)", "diff": "diff --git a/target/i386/whpx/whpx-all.c b/target/i386/whpx/whpx-all.c\nindex 97284b954b..a3e91ca533 100644\n--- a/target/i386/whpx/whpx-all.c\n+++ b/target/i386/whpx/whpx-all.c\n@@ -93,7 +93,6 @@ static const WHV_REGISTER_NAME whpx_register_names[] = {\n WHvX64RegisterCr2,\n WHvX64RegisterCr3,\n WHvX64RegisterCr4,\n- WHvX64RegisterCr8,\n \n /* X64 Debug Registers */\n /*\n@@ -457,8 +456,11 @@ void whpx_set_registers(CPUState *cpu, WHPXStateLevel level)\n vcxt.values[idx++].Reg64 = env->cr[3];\n assert(whpx_register_names[idx] == WHvX64RegisterCr4);\n vcxt.values[idx++].Reg64 = env->cr[4];\n- assert(whpx_register_names[idx] == WHvX64RegisterCr8);\n- vcxt.values[idx++].Reg64 = vcpu->tpr;\n+ /* For kernel-irqchip=on, TPR is managed as part of APIC state */\n+ if (!whpx_irqchip_in_kernel()) {\n+ WHV_REGISTER_VALUE cr8 = {.Reg64 = vcpu->tpr};\n+ whpx_set_reg(cpu, WHvX64RegisterCr8, cr8);\n+ }\n \n /* 8 Debug Registers - Skipped */\n \n@@ -714,11 +716,14 @@ void whpx_get_registers(CPUState *cpu, WHPXStateLevel level)\n env->cr[3] = vcxt.values[idx++].Reg64;\n assert(whpx_register_names[idx] == WHvX64RegisterCr4);\n env->cr[4] = vcxt.values[idx++].Reg64;\n- assert(whpx_register_names[idx] == WHvX64RegisterCr8);\n- tpr = vcxt.values[idx++].Reg64;\n- if (tpr != vcpu->tpr) {\n- vcpu->tpr = tpr;\n- cpu_set_apic_tpr(x86_cpu->apic_state, tpr);\n+\n+ /* For kernel-irqchip=on, TPR is managed as part of APIC state */\n+ if (!whpx_irqchip_in_kernel()) {\n+ tpr = vcpu->exit_ctx.VpContext.Cr8;\n+ if (tpr != vcpu->tpr) {\n+ vcpu->tpr = tpr;\n+ cpu_set_apic_tpr(x86_cpu->apic_state, tpr);\n+ }\n }\n \n /* 8 Debug Registers - Skipped */\n@@ -1660,7 +1665,7 @@ static void whpx_vcpu_pre_run(CPUState *cpu)\n \n /* Sync the TPR to the CR8 if was modified during the intercept */\n tpr = cpu_get_apic_tpr(x86_cpu->apic_state);\n- if (tpr != vcpu->tpr) {\n+ if (!whpx_irqchip_in_kernel() && tpr != vcpu->tpr) {\n vcpu->tpr = tpr;\n reg_values[reg_count].Reg64 = tpr;\n qatomic_set(&cpu->exit_request, true);\n@@ -1707,12 +1712,14 @@ static void whpx_vcpu_post_run(CPUState *cpu)\n \n env->eflags = vcpu->exit_ctx.VpContext.Rflags;\n \n- uint64_t tpr = vcpu->exit_ctx.VpContext.Cr8;\n- if (vcpu->tpr != tpr) {\n- vcpu->tpr = tpr;\n- bql_lock();\n- cpu_set_apic_tpr(x86_cpu->apic_state, vcpu->tpr);\n- bql_unlock();\n+ if (!whpx_irqchip_in_kernel()) {\n+ uint64_t tpr = vcpu->exit_ctx.VpContext.Cr8;\n+ if (vcpu->tpr != tpr) {\n+ vcpu->tpr = tpr;\n+ bql_lock();\n+ cpu_set_apic_tpr(x86_cpu->apic_state, vcpu->tpr);\n+ bql_unlock();\n+ }\n }\n \n vcpu->interruption_pending =\n", "prefixes": [ "v6", "09/11" ] }