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GET /api/patches/2219634/?format=api
HTTP 200 OK
Allow: GET, PUT, PATCH, HEAD, OPTIONS
Content-Type: application/json
Vary: Accept

{
    "id": 2219634,
    "url": "http://patchwork.ozlabs.org/api/patches/2219634/?format=api",
    "web_url": "http://patchwork.ozlabs.org/project/linux-mtd/patch/20260403-winbond-v6-18-rc1-spi-nor-swp-v4-9-833dab5e7288@bootlin.com/",
    "project": {
        "id": 3,
        "url": "http://patchwork.ozlabs.org/api/projects/3/?format=api",
        "name": "Linux MTD development",
        "link_name": "linux-mtd",
        "list_id": "linux-mtd.lists.infradead.org",
        "list_email": "linux-mtd@lists.infradead.org",
        "web_url": null,
        "scm_url": null,
        "webscm_url": null,
        "list_archive_url": "",
        "list_archive_url_format": "",
        "commit_url_format": ""
    },
    "msgid": "<20260403-winbond-v6-18-rc1-spi-nor-swp-v4-9-833dab5e7288@bootlin.com>",
    "list_archive_url": null,
    "date": "2026-04-03T16:09:27",
    "name": "[v4,09/27] mtd: spi-nor: swp: Use a pointer for SR instead of a single byte",
    "commit_ref": null,
    "pull_url": null,
    "state": "new",
    "archived": false,
    "hash": "a28f02b61ab2c742030ab96d5774b7a3e81b5acb",
    "submitter": {
        "id": 73368,
        "url": "http://patchwork.ozlabs.org/api/people/73368/?format=api",
        "name": "Miquel Raynal",
        "email": "miquel.raynal@bootlin.com"
    },
    "delegate": null,
    "mbox": "http://patchwork.ozlabs.org/project/linux-mtd/patch/20260403-winbond-v6-18-rc1-spi-nor-swp-v4-9-833dab5e7288@bootlin.com/mbox/",
    "series": [
        {
            "id": 498652,
            "url": "http://patchwork.ozlabs.org/api/series/498652/?format=api",
            "web_url": "http://patchwork.ozlabs.org/project/linux-mtd/list/?series=498652",
            "date": "2026-04-03T16:09:18",
            "name": "mtd: spi-nor: Enhance software protection",
            "version": 4,
            "mbox": "http://patchwork.ozlabs.org/series/498652/mbox/"
        }
    ],
    "comments": "http://patchwork.ozlabs.org/api/patches/2219634/comments/",
    "check": "pending",
    "checks": "http://patchwork.ozlabs.org/api/patches/2219634/checks/",
    "tags": {},
    "related": [],
    "headers": {
        "Return-Path": "\n <linux-mtd-bounces+incoming=patchwork.ozlabs.org@lists.infradead.org>",
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        ],
        "From": "Miquel Raynal <miquel.raynal@bootlin.com>",
        "Date": "Fri, 03 Apr 2026 18:09:27 +0200",
        "Subject": "[PATCH v4 09/27] mtd: spi-nor: swp: Use a pointer for SR instead\n of a single byte",
        "MIME-Version": "1.0",
        "Message-Id": "\n <20260403-winbond-v6-18-rc1-spi-nor-swp-v4-9-833dab5e7288@bootlin.com>",
        "References": "\n <20260403-winbond-v6-18-rc1-spi-nor-swp-v4-0-833dab5e7288@bootlin.com>",
        "In-Reply-To": "\n <20260403-winbond-v6-18-rc1-spi-nor-swp-v4-0-833dab5e7288@bootlin.com>",
        "To": "Pratyush Yadav <pratyush@kernel.org>, Michael Walle <mwalle@kernel.org>,\n Takahiro Kuwano <takahiro.kuwano@infineon.com>,\n Richard Weinberger <richard@nod.at>, Vignesh Raghavendra <vigneshr@ti.com>,\n Jonathan Corbet <corbet@lwn.net>",
        "Cc": "Sean Anderson <sean.anderson@linux.dev>,\n Thomas Petazzoni <thomas.petazzoni@bootlin.com>,\n Steam Lin <STLin2@winbond.com>, linux-mtd@lists.infradead.org,\n linux-kernel@vger.kernel.org, linux-doc@vger.kernel.org,\n Miquel Raynal <miquel.raynal@bootlin.com>",
        "X-Mailer": "b4 0.14.3",
        "X-Last-TLS-Session-Version": "TLSv1.3",
        "X-CRM114-Version": "20100106-BlameMichelson ( TRE 0.8.0 (BSD) ) MR-646709E3 ",
        "X-CRM114-CacheID": "sfid-20260403_091000_185610_382B6CA4 ",
        "X-CRM114-Status": "GOOD (  14.93  )",
        "X-Spam-Score": "-2.1 (--)",
        "X-Spam-Report": "Spam detection software,\n running on the system \"bombadil.infradead.org\",\n has NOT identified this incoming email as spam.  The original\n message has been attached to this so you can view it or label\n similar future email.  If you have any questions, see\n the administrator of that system for details.\n Content preview:  At this stage, the Status Register is most often seen as a\n    single byte. This is subject to change when we will need to read the CMP\n   bit which is located in the Control Register (kind of secondary stat [...]    \n Content analysis details:   (-2.1 points, 5.0 required)\n  pts rule name              description\n ---- ----------------------\n --------------------------------------------------\n  0.0 RCVD_IN_VALIDITY_SAFE_BLOCKED RBL: ADMINISTRATOR NOTICE: The query to\n                              Validity was blocked.  See\n                             https://knowledge.validity.com/hc/en-us/articles/20961730681243\n                              for more information.\n                             [185.246.85.4 listed in sa-accredit.habeas.com]\n  0.0 RCVD_IN_VALIDITY_CERTIFIED_BLOCKED RBL: ADMINISTRATOR NOTICE: The\n                             query to Validity was blocked.  See\n                             https://knowledge.validity.com/hc/en-us/articles/20961730681243\n                              for more information.\n                           [185.246.85.4 listed in\n sa-trusted.bondedsender.org]\n -0.0 SPF_HELO_PASS          SPF: HELO matches SPF record\n -0.0 SPF_PASS               SPF: sender matches SPF record\n  0.1 DKIM_SIGNED            Message has a DKIM or DK signature,\n not necessarily valid\n -0.1 DKIM_VALID_EF          Message has a valid DKIM or DK signature from\n                             envelope-from domain\n -0.1 DKIM_VALID             Message has at least one valid DKIM or DK\n signature\n -0.1 DKIM_VALID_AU          Message has a valid DKIM or DK signature from\n author's\n                             domain\n -1.9 BAYES_00               BODY: Bayes spam probability is 0 to 1%\n                             [score: 0.0000]\n  0.0 RCVD_IN_VALIDITY_RPBL_BLOCKED RBL: ADMINISTRATOR NOTICE: The query to\n                              Validity was blocked.  See\n                             https://knowledge.validity.com/hc/en-us/articles/20961730681243\n                              for more information.\n                             [185.246.85.4 listed in bl.score.senderscore.com]",
        "X-BeenThere": "linux-mtd@lists.infradead.org",
        "X-Mailman-Version": "2.1.34",
        "Precedence": "list",
        "List-Id": "Linux MTD discussion mailing list <linux-mtd.lists.infradead.org>",
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        "Sender": "\"linux-mtd\" <linux-mtd-bounces@lists.infradead.org>",
        "Errors-To": "linux-mtd-bounces+incoming=patchwork.ozlabs.org@lists.infradead.org"
    },
    "content": "At this stage, the Status Register is most often seen as a single\nbyte. This is subject to change when we will need to read the CMP bit\nwhich is located in the Control Register (kind of secondary status\nregister). Both will need to be carried.\n\nChange a few prototypes to carry a u8 pointer. This way it also makes it\nvery clear where we access the first register, and where we will access\nthe second.\n\nThere is no functional change.\n\nSigned-off-by: Miquel Raynal <miquel.raynal@bootlin.com>\n---\n drivers/mtd/spi-nor/swp.c | 48 ++++++++++++++++++++++++-----------------------\n 1 file changed, 25 insertions(+), 23 deletions(-)",
    "diff": "diff --git a/drivers/mtd/spi-nor/swp.c b/drivers/mtd/spi-nor/swp.c\nindex 246f6d5ca8dd..af6e577d9b42 100644\n--- a/drivers/mtd/spi-nor/swp.c\n+++ b/drivers/mtd/spi-nor/swp.c\n@@ -53,13 +53,13 @@ static u64 spi_nor_get_min_prot_length_sr(struct spi_nor *nor)\n \t\treturn sector_size;\n }\n \n-static void spi_nor_get_locked_range_sr(struct spi_nor *nor, u8 sr, loff_t *ofs,\n+static void spi_nor_get_locked_range_sr(struct spi_nor *nor, const u8 *sr, loff_t *ofs,\n \t\t\t\t\tu64 *len)\n {\n \tu64 min_prot_len;\n \tu8 mask = spi_nor_get_sr_bp_mask(nor);\n \tu8 tb_mask = spi_nor_get_sr_tb_mask(nor);\n-\tu8 bp, val = sr & mask;\n+\tu8 bp, val = sr[0] & mask;\n \n \tif (nor->flags & SNOR_F_HAS_SR_BP3_BIT6 && val & SR_BP3_BIT6)\n \t\tval = (val & ~SR_BP3_BIT6) | SR_BP3;\n@@ -79,7 +79,7 @@ static void spi_nor_get_locked_range_sr(struct spi_nor *nor, u8 sr, loff_t *ofs,\n \tif (*len > nor->params->size)\n \t\t*len = nor->params->size;\n \n-\tif (nor->flags & SNOR_F_HAS_SR_TB && sr & tb_mask)\n+\tif (nor->flags & SNOR_F_HAS_SR_TB && sr[0] & tb_mask)\n \t\t*ofs = 0;\n \telse\n \t\t*ofs = nor->params->size - *len;\n@@ -90,7 +90,7 @@ static void spi_nor_get_locked_range_sr(struct spi_nor *nor, u8 sr, loff_t *ofs,\n  * (if @locked is false); false otherwise.\n  */\n static bool spi_nor_check_lock_status_sr(struct spi_nor *nor, loff_t ofs,\n-\t\t\t\t\t u64 len, u8 sr, bool locked)\n+\t\t\t\t\t u64 len, const u8 *sr, bool locked)\n {\n \tloff_t lock_offs, lock_offs_max, offs_max;\n \tu64 lock_len;\n@@ -111,13 +111,13 @@ static bool spi_nor_check_lock_status_sr(struct spi_nor *nor, loff_t ofs,\n \t\treturn (ofs >= lock_offs_max) || (offs_max <= lock_offs);\n }\n \n-static bool spi_nor_is_locked_sr(struct spi_nor *nor, loff_t ofs, u64 len, u8 sr)\n+static bool spi_nor_is_locked_sr(struct spi_nor *nor, loff_t ofs, u64 len, const u8 *sr)\n {\n \treturn spi_nor_check_lock_status_sr(nor, ofs, len, sr, true);\n }\n \n static bool spi_nor_is_unlocked_sr(struct spi_nor *nor, loff_t ofs, u64 len,\n-\t\t\t\t   u8 sr)\n+\t\t\t\t   const u8 *sr)\n {\n \treturn spi_nor_check_lock_status_sr(nor, ofs, len, sr, false);\n }\n@@ -158,7 +158,8 @@ static bool spi_nor_is_unlocked_sr(struct spi_nor *nor, loff_t ofs, u64 len,\n static int spi_nor_sr_lock(struct spi_nor *nor, loff_t ofs, u64 len)\n {\n \tu64 min_prot_len;\n-\tint ret, status_old, status_new;\n+\tint ret;\n+\tu8 status_old[1] = {}, status_new[1] = {};\n \tu8 mask = spi_nor_get_sr_bp_mask(nor);\n \tu8 tb_mask = spi_nor_get_sr_tb_mask(nor);\n \tu8 pow, val;\n@@ -170,7 +171,7 @@ static int spi_nor_sr_lock(struct spi_nor *nor, loff_t ofs, u64 len)\n \tif (ret)\n \t\treturn ret;\n \n-\tstatus_old = nor->bouncebuf[0];\n+\tstatus_old[0] = nor->bouncebuf[0];\n \n \t/* If nothing in our range is unlocked, we don't need to do anything */\n \tif (spi_nor_is_locked_sr(nor, ofs, len, status_old))\n@@ -215,7 +216,7 @@ static int spi_nor_sr_lock(struct spi_nor *nor, loff_t ofs, u64 len)\n \t\t\treturn -EINVAL;\n \t}\n \n-\tstatus_new = (status_old & ~mask & ~tb_mask) | val;\n+\tstatus_new[0] = (status_old[0] & ~mask & ~tb_mask) | val;\n \n \t/*\n \t * Disallow further writes if WP# pin is neither left floating nor\n@@ -223,20 +224,20 @@ static int spi_nor_sr_lock(struct spi_nor *nor, loff_t ofs, u64 len)\n \t * WP# pin hard strapped to GND can be a valid use case.\n \t */\n \tif (!(nor->flags & SNOR_F_NO_WP))\n-\t\tstatus_new |= SR_SRWD;\n+\t\tstatus_new[0] |= SR_SRWD;\n \n \tif (!use_top)\n-\t\tstatus_new |= tb_mask;\n+\t\tstatus_new[0] |= tb_mask;\n \n \t/* Don't bother if they're the same */\n-\tif (status_new == status_old)\n+\tif (status_new[0] == status_old[0])\n \t\treturn 0;\n \n \t/* Only modify protection if it will not unlock other areas */\n-\tif ((status_new & mask) < (status_old & mask))\n+\tif ((status_new[0] & mask) < (status_old[0] & mask))\n \t\treturn -EINVAL;\n \n-\treturn spi_nor_write_sr_and_check(nor, status_new);\n+\treturn spi_nor_write_sr_and_check(nor, status_new[0]);\n }\n \n /*\n@@ -247,7 +248,8 @@ static int spi_nor_sr_lock(struct spi_nor *nor, loff_t ofs, u64 len)\n static int spi_nor_sr_unlock(struct spi_nor *nor, loff_t ofs, u64 len)\n {\n \tu64 min_prot_len;\n-\tint ret, status_old, status_new;\n+\tint ret;\n+\tu8 status_old[1], status_new[1];\n \tu8 mask = spi_nor_get_sr_bp_mask(nor);\n \tu8 tb_mask = spi_nor_get_sr_tb_mask(nor);\n \tu8 pow, val;\n@@ -259,7 +261,7 @@ static int spi_nor_sr_unlock(struct spi_nor *nor, loff_t ofs, u64 len)\n \tif (ret)\n \t\treturn ret;\n \n-\tstatus_old = nor->bouncebuf[0];\n+\tstatus_old[0] = nor->bouncebuf[0];\n \n \t/* If nothing in our range is locked, we don't need to do anything */\n \tif (spi_nor_is_unlocked_sr(nor, ofs, len, status_old))\n@@ -308,24 +310,24 @@ static int spi_nor_sr_unlock(struct spi_nor *nor, loff_t ofs, u64 len)\n \t\t\treturn -EINVAL;\n \t}\n \n-\tstatus_new = (status_old & ~mask & ~tb_mask) | val;\n+\tstatus_new[0] = (status_old[0] & ~mask & ~tb_mask) | val;\n \n \t/* Don't protect status register if we're fully unlocked */\n \tif (lock_len == 0)\n-\t\tstatus_new &= ~SR_SRWD;\n+\t\tstatus_new[0] &= ~SR_SRWD;\n \n \tif (!use_top)\n-\t\tstatus_new |= tb_mask;\n+\t\tstatus_new[0] |= tb_mask;\n \n \t/* Don't bother if they're the same */\n-\tif (status_new == status_old)\n+\tif (status_new[0] == status_old[0])\n \t\treturn 0;\n \n \t/* Only modify protection if it will not lock other areas */\n-\tif ((status_new & mask) > (status_old & mask))\n+\tif ((status_new[0] & mask) > (status_old[0] & mask))\n \t\treturn -EINVAL;\n \n-\treturn spi_nor_write_sr_and_check(nor, status_new);\n+\treturn spi_nor_write_sr_and_check(nor, status_new[0]);\n }\n \n /*\n@@ -343,7 +345,7 @@ static int spi_nor_sr_is_locked(struct spi_nor *nor, loff_t ofs, u64 len)\n \tif (ret)\n \t\treturn ret;\n \n-\treturn spi_nor_is_locked_sr(nor, ofs, len, nor->bouncebuf[0]);\n+\treturn spi_nor_is_locked_sr(nor, ofs, len, nor->bouncebuf);\n }\n \n /*\n",
    "prefixes": [
        "v4",
        "09/27"
    ]
}