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GET /api/patches/2219600/?format=api
{ "id": 2219600, "url": "http://patchwork.ozlabs.org/api/patches/2219600/?format=api", "web_url": "http://patchwork.ozlabs.org/project/gcc/patch/011701dcc378$97407cf0$c5c176d0$@nextmovesoftware.com/", "project": { "id": 17, "url": "http://patchwork.ozlabs.org/api/projects/17/?format=api", "name": "GNU Compiler Collection", "link_name": "gcc", "list_id": "gcc-patches.gcc.gnu.org", "list_email": "gcc-patches@gcc.gnu.org", "web_url": null, "scm_url": null, "webscm_url": null, "list_archive_url": "", "list_archive_url_format": "", "commit_url_format": "" }, "msgid": "<011701dcc378$97407cf0$c5c176d0$@nextmovesoftware.com>", "list_archive_url": null, "date": "2026-04-03T14:45:59", "name": "[x86_64] Refactor AVX512 comparisons in machine description sse.md.", "commit_ref": null, "pull_url": null, "state": "new", "archived": false, "hash": "707ded2520482a4f506545881fbc6ed4aa5e7dda", "submitter": { "id": 68376, "url": "http://patchwork.ozlabs.org/api/people/68376/?format=api", "name": "Roger Sayle", "email": "roger@nextmovesoftware.com" }, "delegate": null, "mbox": "http://patchwork.ozlabs.org/project/gcc/patch/011701dcc378$97407cf0$c5c176d0$@nextmovesoftware.com/mbox/", "series": [ { "id": 498638, "url": "http://patchwork.ozlabs.org/api/series/498638/?format=api", "web_url": "http://patchwork.ozlabs.org/project/gcc/list/?series=498638", "date": "2026-04-03T14:45:59", "name": "[x86_64] Refactor AVX512 comparisons in machine description sse.md.", "version": 1, "mbox": "http://patchwork.ozlabs.org/series/498638/mbox/" } ], "comments": "http://patchwork.ozlabs.org/api/patches/2219600/comments/", "check": "pending", "checks": "http://patchwork.ozlabs.org/api/patches/2219600/checks/", "tags": {}, "related": [], "headers": { "Return-Path": "<gcc-patches-bounces~incoming=patchwork.ozlabs.org@gcc.gnu.org>", "X-Original-To": [ "incoming@patchwork.ozlabs.org", "gcc-patches@gcc.gnu.org" ], "Delivered-To": [ "patchwork-incoming@legolas.ozlabs.org", "gcc-patches@gcc.gnu.org" ], "Authentication-Results": [ "legolas.ozlabs.org;\n\tdkim=fail reason=\"signature verification failed\" (2048-bit key;\n unprotected) header.d=nextmovesoftware.com header.i=@nextmovesoftware.com\n header.a=rsa-sha256 header.s=default header.b=kZI9VcBk;\n\tdkim-atps=neutral", "legolas.ozlabs.org;\n spf=pass (sender SPF authorized) smtp.mailfrom=gcc.gnu.org\n (client-ip=38.145.34.32; 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a=rsa-sha256; d=sourceware.org; s=key;\n t=1775227562; c=relaxed/simple;\n bh=dIv0xTVTkgTUidzY3LJUVY6eCT0cJINOFUIgiKK8njo=;\n h=DKIM-Signature:From:To:Subject:Date:Message-ID:MIME-Version;\n b=eIijLPxEXmNyfzWcJBw54zimLH1XOgbpixJv77MWpk638EWC2rcQF4ztZKIzZZ2aK4uFWEoQWpHZ814m9TAJO5u8O4TvTRafXGxoQ4RDY1+DKQPT/6Q5x58FlJ7DRpE5l5xUaKftgRByKvmmLLoqIppK5hzDn6GmhMz3ja1kC20=", "ARC-Authentication-Results": "i=1; server2.sourceware.org", "DKIM-Signature": "v=1; a=rsa-sha256; q=dns/txt; c=relaxed/relaxed;\n d=nextmovesoftware.com; s=default; h=Content-Type:MIME-Version:Message-ID:\n Date:Subject:Cc:To:From:Sender:Reply-To:Content-Transfer-Encoding:Content-ID:\n Content-Description:Resent-Date:Resent-From:Resent-Sender:Resent-To:Resent-Cc\n :Resent-Message-ID:In-Reply-To:References:List-Id:List-Help:List-Unsubscribe:\n List-Subscribe:List-Post:List-Owner:List-Archive;\n bh=a89O1ACyy9MBPRbx4pdAtweCalAEHkKLMMNJMWovv5Y=; b=kZI9VcBkg3zP5PQqxWxJ1wMg4t\n 7znl7IWL6pvleCfVbQn/BCuqRDt68WKu0Lz0jz+KMeoFn/btT9J0wZc3Xtr83r0WB4crJflUeX/ne\n 4DZvnGnUz8jdZxef/ZZ7PuJapxW1u8VOMJXiksma295FeysxL5J+7h6G9rOlrRUjGSD6L5vZnDTol\n GuOO6gUCi0UP7+0sEZtPw7c8RAmEVnGR0OsUpjpMMsqEdI7ajVXQ3zIHzEn+AeDSduhNGtJAq1Oq8\n MCYVOs4iJkH8nD7T3mL/XPH57+5x5a3K3VRWQ/rYrUb+2Kw4uvsWhSwQTZ30b4RHdz+HFh+eWI2dF\n RzbgWfmw==;", "From": "\"Roger Sayle\" <roger@nextmovesoftware.com>", "To": "\"'GCC Patches'\" <gcc-patches@gcc.gnu.org>", "Cc": "\"'Liu, Hongtao'\" <hongtao.liu@intel.com>,\n \"'Hongtao Liu'\" <crazylht@gmail.com>, \"'Uros Bizjak'\" <ubizjak@gmail.com>", "Subject": "[x86_64 PATCH] Refactor AVX512 comparisons in machine description\n sse.md.", "Date": "Fri, 3 Apr 2026 15:45:59 +0100", "Message-ID": "<011701dcc378$97407cf0$c5c176d0$@nextmovesoftware.com>", "MIME-Version": "1.0", "Content-Type": "multipart/mixed;\n boundary=\"----=_NextPart_000_0118_01DCC380.F904E4F0\"", "X-Mailer": "Microsoft Outlook 16.0", "Content-Language": "en-gb", "Thread-Index": "AdzDd8+Hwe3FF0sORX2hhW22T1PY6w==", "X-AntiAbuse": [ "This header was added to track abuse,\n please include it with any abuse report", "Primary Hostname - server.nextmovesoftware.com", "Original Domain - gcc.gnu.org", "Originator/Caller UID/GID - [47 12] / [47 12]", "Sender Address Domain - nextmovesoftware.com" ], "X-Get-Message-Sender-Via": "server.nextmovesoftware.com: authenticated_id:\n roger@nextmovesoftware.com", "X-Authenticated-Sender": "server.nextmovesoftware.com:\n roger@nextmovesoftware.com", "X-Source": "", "X-Source-Args": "", "X-Source-Dir": "", "X-BeenThere": "gcc-patches@gcc.gnu.org", "X-Mailman-Version": "2.1.30", "Precedence": "list", "List-Id": "Gcc-patches mailing list <gcc-patches.gcc.gnu.org>", "List-Unsubscribe": "<https://gcc.gnu.org/mailman/options/gcc-patches>,\n <mailto:gcc-patches-request@gcc.gnu.org?subject=unsubscribe>", "List-Archive": "<https://gcc.gnu.org/pipermail/gcc-patches/>", "List-Post": "<mailto:gcc-patches@gcc.gnu.org>", "List-Help": "<mailto:gcc-patches-request@gcc.gnu.org?subject=help>", "List-Subscribe": "<https://gcc.gnu.org/mailman/listinfo/gcc-patches>,\n <mailto:gcc-patches-request@gcc.gnu.org?subject=subscribe>", "Errors-To": "gcc-patches-bounces~incoming=patchwork.ozlabs.org@gcc.gnu.org" }, "content": "This patch refactors/tidies up the define_insns for vector comparisons\non 512-bit vectors in sse.md. The motivation is that the current\norganization (accidentally) introduces dubious instructions such as\navx512f_cmpv16si3_mask_round and avx512vl_cmpv2di3_mask_round, which\nare integer comparisons that specify a floating point rounding mode!?\n\nThe problem is caused by the decomposition of mode iterators.\nCurrently, sse.md uses four patterns: (1) for signed comparions\nof floating point and large integer modes (V48H), (2) for signed\ncomparisons of small integer modes (VI12), (3) for unsigned\ncomparisons of small integer modes (VI12) and (4) for unsigned\ncomparisons of large integer modes (VI48). The first pattern\nalso allows for variants specifying the FP rounding mode.\n\nThe refactoring below uses a more sensible decomposition into\nonly three patterns: (1) for [signed] comparisons of floating\npoint modes (VFH), (2) for signed comparisons of integers (VI1248)\nand (3) for unsigned comparisons of integers (VI1248).\n\nFor the record, to show this produces the same coverage:\n\nV48H = v{16,8,4}si v{8,4,2}di v{32,16,8}hf v{16,8,4}sf v{8,4,2}df\nV12 = v{64,32,16}qi v{32,16,8}hi\n\nVFH = v{32,16,8}hf v{16,8,4}sf v{8,4,2}df\nVI1248 = v{64,32,16}qi v{32,16,8}hi v{16,8,4}si v{8,4,2}di\n\nThe simplification also allows a clean-up of predicates\n(for operand[3]) as there are 8 integer comparison operators\nand 32 floating point comparison operators, and we no longer\nneed cmp_imm_predicate to restrict range based upon <mode>.\n\nV48H cmp_imm_predicate -> VFH const_0_to_31_operand (FP)\nVI12 cmp_imm_predicate -> VI1248 const_0_to_7_operand (signed)\nVI12 const_0_to_7_operand ->\nVI48 const_0_to_7_operand -> VI1248 const_0_to_7_operand (unsigned)\n\nHopefully, this makes sense. There are no changes other than\nremoving the non-sensical patterns from insn-emit, insn-recog\nand friends. Tested on x86_64-pc-linux-gnu with make bootstrap\nand make -k check, both with and without --target_board=unix{-m32}\nwith no new failures. Ok for stage 1?\n\n\n2026-04-03 Roger Sayle <roger@nextmovesoftware.com>\n\ngcc/ChangeLog\n * config/i386/sse.md\n (<avx512>_cmp<mode>3<mask_scalar_merge_name><round_saeonly_name>):\n Change mode iterator from V48H_AVX512VL to VFH_AVX512VL and op3's\n predicate from <cmp_imm_predicate> to const_0_to_31_operand.\n (<avx512>_cmp<mode>3<mask_scalar_merge_name>): Change mode\n iterator from VI12_AVX512VL to VI1248_AVX512VLBW.\n (<avx512>_ucmp<mode>3<mask_scalar_merge_name>): Likewise.\n\n\nThanks in advance,\nRoger\n--", "diff": "diff --git a/gcc/config/i386/sse.md b/gcc/config/i386/sse.md\nindex 2e15842b3c7..82c26a154cc 100644\n--- a/gcc/config/i386/sse.md\n+++ b/gcc/config/i386/sse.md\n@@ -4611,12 +4611,13 @@\n (V16HI \"const_0_to_7_operand\") (V32QI \"const_0_to_7_operand\")\n (V8HI \"const_0_to_7_operand\") (V16QI \"const_0_to_7_operand\")])\n \n+;; AVX512 floating point comparisons\n (define_insn \"<avx512>_cmp<mode>3<mask_scalar_merge_name><round_saeonly_name>\"\n [(set (match_operand:<avx512fmaskmode> 0 \"register_operand\" \"=k\")\n \t(unspec:<avx512fmaskmode>\n-\t [(match_operand:V48H_AVX512VL 1 \"register_operand\" \"v\")\n-\t (match_operand:V48H_AVX512VL 2 \"nonimmediate_operand\" \"<round_saeonly_constraint>\")\n-\t (match_operand:SI 3 \"<cmp_imm_predicate>\" \"n\")]\n+\t [(match_operand:VFH_AVX512VL 1 \"register_operand\" \"v\")\n+\t (match_operand:VFH_AVX512VL 2 \"nonimmediate_operand\" \"<round_saeonly_constraint>\")\n+\t (match_operand:SI 3 \"const_0_to_31_operand\" \"n\")]\n \t UNSPEC_PCMP))]\n \"TARGET_AVX512F && <round_saeonly_mode512bit_condition>\"\n \"v<ssecmpintprefix>cmp<ssemodesuffix>\\t{%3, <round_saeonly_mask_scalar_merge_op4>%2, %1, %0<mask_scalar_merge_operand4>|%0<mask_scalar_merge_operand4>, %1, %2<round_saeonly_mask_scalar_merge_op4>, %3}\"\n@@ -4805,14 +4806,15 @@\n (set_attr \"prefix\" \"evex\")\n (set_attr \"mode\" \"TI\")])\n \n+;; AVX512 signed integer comparisons\n (define_insn \"<avx512>_cmp<mode>3<mask_scalar_merge_name>\"\n [(set (match_operand:<avx512fmaskmode> 0 \"register_operand\" \"=k\")\n \t(unspec:<avx512fmaskmode>\n-\t [(match_operand:VI12_AVX512VL 1 \"register_operand\" \"v\")\n-\t (match_operand:VI12_AVX512VL 2 \"nonimmediate_operand\" \"vm\")\n-\t (match_operand:SI 3 \"<cmp_imm_predicate>\" \"n\")]\n+\t [(match_operand:VI1248_AVX512VLBW 1 \"register_operand\" \"v\")\n+\t (match_operand:VI1248_AVX512VLBW 2 \"nonimmediate_operand\" \"vm\")\n+\t (match_operand:SI 3 \"const_0_to_7_operand\" \"n\")]\n \t UNSPEC_PCMP))]\n- \"TARGET_AVX512BW\"\n+ \"TARGET_AVX512F\"\n \"vpcmp<ssemodesuffix>\\t{%3, %2, %1, %0<mask_scalar_merge_operand4>|%0<mask_scalar_merge_operand4>, %1, %2, %3}\"\n [(set_attr \"type\" \"ssecmp\")\n (set_attr \"length_immediate\" \"1\")\n@@ -4940,20 +4942,6 @@\n (set_attr \"prefix\" \"evex\")\n (set_attr \"mode\" \"<sseinsnmode>\")])\n \n-(define_insn \"<avx512>_ucmp<mode>3<mask_scalar_merge_name>\"\n- [(set (match_operand:<avx512fmaskmode> 0 \"register_operand\" \"=k\")\n-\t(unspec:<avx512fmaskmode>\n-\t [(match_operand:VI12_AVX512VL 1 \"register_operand\" \"v\")\n-\t (match_operand:VI12_AVX512VL 2 \"nonimmediate_operand\" \"vm\")\n-\t (match_operand:SI 3 \"const_0_to_7_operand\")]\n-\t UNSPEC_UNSIGNED_PCMP))]\n- \"TARGET_AVX512BW\"\n- \"vpcmpu<ssemodesuffix>\\t{%3, %2, %1, %0<mask_scalar_merge_operand4>|%0<mask_scalar_merge_operand4>, %1, %2, %3}\"\n- [(set_attr \"type\" \"ssecmp\")\n- (set_attr \"length_immediate\" \"1\")\n- (set_attr \"prefix\" \"evex\")\n- (set_attr \"mode\" \"<sseinsnmode>\")])\n-\n (define_insn \"*<avx512>_ucmp<VI12_AVX512VL:mode>3_zero_extend<SWI248x:mode>\"\n [(set (match_operand:SWI248x 0 \"register_operand\" \"=k\")\n \t(zero_extend:SWI248x\n@@ -5029,11 +5017,12 @@\n (set_attr \"prefix\" \"evex\")\n (set_attr \"mode\" \"<sseinsnmode>\")])\n \n+;; AVX512 unsigned integer comparisons\n (define_insn \"<avx512>_ucmp<mode>3<mask_scalar_merge_name>\"\n [(set (match_operand:<avx512fmaskmode> 0 \"register_operand\" \"=k\")\n \t(unspec:<avx512fmaskmode>\n-\t [(match_operand:VI48_AVX512VL 1 \"register_operand\" \"v\")\n-\t (match_operand:VI48_AVX512VL 2 \"nonimmediate_operand\" \"vm\")\n+\t [(match_operand:VI1248_AVX512VLBW 1 \"register_operand\" \"v\")\n+\t (match_operand:VI1248_AVX512VLBW 2 \"nonimmediate_operand\" \"vm\")\n \t (match_operand:SI 3 \"const_0_to_7_operand\")]\n \t UNSPEC_UNSIGNED_PCMP))]\n \"TARGET_AVX512F\"\n", "prefixes": [ "x86_64" ] }