get:
Show a patch.

patch:
Update a patch.

put:
Update a patch.

GET /api/patches/2219520/?format=api
HTTP 200 OK
Allow: GET, PUT, PATCH, HEAD, OPTIONS
Content-Type: application/json
Vary: Accept

{
    "id": 2219520,
    "url": "http://patchwork.ozlabs.org/api/patches/2219520/?format=api",
    "web_url": "http://patchwork.ozlabs.org/project/linux-i2c/patch/20260403084135.1300931-1-aniket.randive@oss.qualcomm.com/",
    "project": {
        "id": 35,
        "url": "http://patchwork.ozlabs.org/api/projects/35/?format=api",
        "name": "Linux I2C development",
        "link_name": "linux-i2c",
        "list_id": "linux-i2c.vger.kernel.org",
        "list_email": "linux-i2c@vger.kernel.org",
        "web_url": "",
        "scm_url": "",
        "webscm_url": "",
        "list_archive_url": "",
        "list_archive_url_format": "",
        "commit_url_format": ""
    },
    "msgid": "<20260403084135.1300931-1-aniket.randive@oss.qualcomm.com>",
    "list_archive_url": null,
    "date": "2026-04-03T08:41:35",
    "name": "[V3] i2c: qcom-geni: Avoid extra TX DMA TRE for single read message in GPI mode",
    "commit_ref": null,
    "pull_url": null,
    "state": "new",
    "archived": false,
    "hash": "887e414655bff9be39ac3a1d7f13c99070b54e35",
    "submitter": {
        "id": 92974,
        "url": "http://patchwork.ozlabs.org/api/people/92974/?format=api",
        "name": "Aniket Randive",
        "email": "aniket.randive@oss.qualcomm.com"
    },
    "delegate": null,
    "mbox": "http://patchwork.ozlabs.org/project/linux-i2c/patch/20260403084135.1300931-1-aniket.randive@oss.qualcomm.com/mbox/",
    "series": [
        {
            "id": 498603,
            "url": "http://patchwork.ozlabs.org/api/series/498603/?format=api",
            "web_url": "http://patchwork.ozlabs.org/project/linux-i2c/list/?series=498603",
            "date": "2026-04-03T08:41:35",
            "name": "[V3] i2c: qcom-geni: Avoid extra TX DMA TRE for single read message in GPI mode",
            "version": 3,
            "mbox": "http://patchwork.ozlabs.org/series/498603/mbox/"
        }
    ],
    "comments": "http://patchwork.ozlabs.org/api/patches/2219520/comments/",
    "check": "pending",
    "checks": "http://patchwork.ozlabs.org/api/patches/2219520/checks/",
    "tags": {},
    "related": [],
    "headers": {
        "Return-Path": "\n <linux-i2c+bounces-16946-incoming=patchwork.ozlabs.org@vger.kernel.org>",
        "X-Original-To": [
            "incoming@patchwork.ozlabs.org",
            "linux-i2c@vger.kernel.org"
        ],
        "Delivered-To": "patchwork-incoming@legolas.ozlabs.org",
        "Authentication-Results": [
            "legolas.ozlabs.org;\n\tdkim=pass (2048-bit key;\n unprotected) header.d=qualcomm.com header.i=@qualcomm.com header.a=rsa-sha256\n header.s=qcppdkim1 header.b=ej4FKVO2;\n\tdkim=pass (2048-bit key;\n unprotected) header.d=oss.qualcomm.com header.i=@oss.qualcomm.com\n header.a=rsa-sha256 header.s=google header.b=ZMPbFf3+;\n\tdkim-atps=neutral",
            "legolas.ozlabs.org;\n spf=pass (sender SPF authorized) smtp.mailfrom=vger.kernel.org\n (client-ip=172.234.253.10; helo=sea.lore.kernel.org;\n envelope-from=linux-i2c+bounces-16946-incoming=patchwork.ozlabs.org@vger.kernel.org;\n receiver=patchwork.ozlabs.org)",
            "smtp.subspace.kernel.org;\n\tdkim=pass (2048-bit key) header.d=qualcomm.com header.i=@qualcomm.com\n header.b=\"ej4FKVO2\";\n\tdkim=pass (2048-bit key) header.d=oss.qualcomm.com header.i=@oss.qualcomm.com\n header.b=\"ZMPbFf3+\"",
            "smtp.subspace.kernel.org;\n arc=none smtp.client-ip=205.220.168.131",
            "smtp.subspace.kernel.org;\n dmarc=pass (p=reject dis=none) header.from=oss.qualcomm.com",
            "smtp.subspace.kernel.org;\n spf=pass smtp.mailfrom=oss.qualcomm.com"
        ],
        "Received": [
            "from sea.lore.kernel.org (sea.lore.kernel.org [172.234.253.10])\n\t(using TLSv1.3 with cipher TLS_AES_256_GCM_SHA384 (256/256 bits)\n\t key-exchange x25519 server-signature ECDSA (secp384r1) server-digest SHA384)\n\t(No client certificate requested)\n\tby legolas.ozlabs.org (Postfix) with ESMTPS id 4fnC3t17Bhz1xtJ\n\tfor <incoming@patchwork.ozlabs.org>; Fri, 03 Apr 2026 19:45:46 +1100 (AEDT)",
            "from smtp.subspace.kernel.org (conduit.subspace.kernel.org\n [100.90.174.1])\n\tby sea.lore.kernel.org (Postfix) with ESMTP id C3F0A3095311\n\tfor <incoming@patchwork.ozlabs.org>; Fri,  3 Apr 2026 08:41:48 +0000 (UTC)",
            "from localhost.localdomain (localhost.localdomain [127.0.0.1])\n\tby smtp.subspace.kernel.org (Postfix) with ESMTP id 8521937DE85;\n\tFri,  3 Apr 2026 08:41:47 +0000 (UTC)",
            "from mx0a-0031df01.pphosted.com (mx0a-0031df01.pphosted.com\n [205.220.168.131])\n\t(using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits))\n\t(No client certificate requested)\n\tby smtp.subspace.kernel.org (Postfix) with ESMTPS id 8A32637B015\n\tfor <linux-i2c@vger.kernel.org>; Fri,  3 Apr 2026 08:41:45 +0000 (UTC)",
            "from pps.filterd (m0279866.ppops.net [127.0.0.1])\n\tby mx0a-0031df01.pphosted.com (8.18.1.11/8.18.1.11) with ESMTP id\n 6336XWC9947872\n\tfor <linux-i2c@vger.kernel.org>; Fri, 3 Apr 2026 08:41:45 GMT",
            "from mail-pf1-f198.google.com (mail-pf1-f198.google.com\n [209.85.210.198])\n\tby mx0a-0031df01.pphosted.com (PPS) with ESMTPS id 4d9xwfhwy3-1\n\t(version=TLSv1.3 cipher=TLS_AES_128_GCM_SHA256 bits=128 verify=NOT)\n\tfor <linux-i2c@vger.kernel.org>; Fri, 03 Apr 2026 08:41:44 +0000 (GMT)",
            "by mail-pf1-f198.google.com with SMTP id\n d2e1a72fcca58-82c4664f75fso1113722b3a.3\n        for <linux-i2c@vger.kernel.org>; Fri, 03 Apr 2026 01:41:44 -0700 (PDT)",
            "from hu-arandive-hyd.qualcomm.com ([202.46.22.19])\n        by smtp.gmail.com with ESMTPSA id\n d2e1a72fcca58-82cf9b2714dsm6757172b3a.1.2026.04.03.01.41.39\n        (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256);\n        Fri, 03 Apr 2026 01:41:43 -0700 (PDT)"
        ],
        "ARC-Seal": "i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116;\n\tt=1775205707; cv=none;\n b=tJKMh2LUo7GMPEO8GuzfqeltZ8CCCrvYccWio9xXigB6L6Kyi3u+qlOZCj+uKHRQPQmcDEYRWOF2HCJlicP7YckzBCjj/aA1wlFy4X2yZz7dzUhiIZ6pZ5OWWyDAvuL+lnZC5GEjQzsUDTeTLzpyzMXBwFy+ZyJelKm5CUyHDk8=",
        "ARC-Message-Signature": "i=1; a=rsa-sha256; d=subspace.kernel.org;\n\ts=arc-20240116; t=1775205707; c=relaxed/simple;\n\tbh=/xJ8nlzEUwBgB9odC2pDNog1qLXHQGWB2GUPekbM6FY=;\n\th=From:To:Cc:Subject:Date:Message-Id:MIME-Version;\n b=MoHveTne0qsgQO0/SfAICBsWr/BZHtyxspx5HMDls6V4GxNds3X/oad1a2QQ9U67MnwSveEiaXBOsOHahu9gpTvR7qIWIhW6zN2h/I//dFFLNT1X5fnGS2fW1/MLnI00cOcLjvwSI+43kefQ1WWOpQwiFVNHnwlUB+iPaBkZ/QM=",
        "ARC-Authentication-Results": "i=1; smtp.subspace.kernel.org;\n dmarc=pass (p=reject dis=none) header.from=oss.qualcomm.com;\n spf=pass smtp.mailfrom=oss.qualcomm.com;\n dkim=pass (2048-bit key) header.d=qualcomm.com header.i=@qualcomm.com\n header.b=ej4FKVO2;\n dkim=pass (2048-bit key) header.d=oss.qualcomm.com header.i=@oss.qualcomm.com\n header.b=ZMPbFf3+; arc=none smtp.client-ip=205.220.168.131",
        "DKIM-Signature": [
            "v=1; a=rsa-sha256; c=relaxed/relaxed; d=qualcomm.com; h=\n\tcc:content-transfer-encoding:date:from:message-id:mime-version\n\t:subject:to; s=qcppdkim1; bh=QmKfAmOnOoidKU2K7M065NqSIxZq6+lb/9v\n\tnAIyjv3o=; b=ej4FKVO2FH0oAp4MNdN5hb1b9k5gUhvwvlo86YCJVpzdmzRdxvR\n\ttVGpIhdjlHoSoeJQnQY+VGGu8Ul+8RQTGPYnGX6MaynkGvZFP2sZgBKU2uwphhzo\n\ts5MJt6+hP552oi9ARgCgfGY++KgDQVAKc2sgtxwtD7dK3hni3/1DQDOIcBi/+EN8\n\to4uqXMR6qtpoDohrSaLpUpuJfRVVSgt2JgUrMWBNq9DQj/QABvcvWuwPi9pZ6Ju/\n\thqfMW06cN+a7m2Zz8zYklHS6vFkvZypXv27+X3/vsSj9u3UDBLwD5taGuJgBncyK\n\tRLZsY9ex3S8ZCYn58Pvu9/UXYxA1DWpWDvA==",
            "v=1; a=rsa-sha256; c=relaxed/relaxed;\n        d=oss.qualcomm.com; s=google; t=1775205704; x=1775810504;\n darn=vger.kernel.org;\n        h=content-transfer-encoding:mime-version:message-id:date:subject:cc\n         :to:from:from:to:cc:subject:date:message-id:reply-to;\n        bh=QmKfAmOnOoidKU2K7M065NqSIxZq6+lb/9vnAIyjv3o=;\n        b=ZMPbFf3+ogIAK80b+3QVo+7FSh4eWr1JFUQW95LT2EJXYuLFaGkplNIY30wgvtcYPD\n         HaLAdxI9AdzAXDdPL7udyy7uEDNFBECwVGm4t1EEgWQf6M3hInqbwbcumOOkKjugiIVw\n         6yTvgC2sVGHp1jtuv1XUsZ5VHCv5PgQfGgl5MFYJYl0LhF7J9JRiaenwqJvIAZRPiZHV\n         tZ1dhYOGY6wswJOoOTWzQq2iRbLcPaL/CXL9LHXKntLvZcGMj1t7DmYkDD0q+qTjI6ej\n         04xvELaJlIdFVhnhYERmPWQ9rtMpD6jEw2Yeow3jbQ/ciT9eDAwg+J5EqCEwfOyW0r7X\n         XTBA=="
        ],
        "X-Google-DKIM-Signature": "v=1; a=rsa-sha256; c=relaxed/relaxed;\n        d=1e100.net; s=20251104; t=1775205704; x=1775810504;\n        h=content-transfer-encoding:mime-version:message-id:date:subject:cc\n         :to:from:x-gm-gg:x-gm-message-state:from:to:cc:subject:date\n         :message-id:reply-to;\n        bh=QmKfAmOnOoidKU2K7M065NqSIxZq6+lb/9vnAIyjv3o=;\n        b=Z83X4bHLYrlJcagw6LQvIH68UQVVnoGw5B9xSjYDXWGE9MmWJfyKdXe6a2IguoduA1\n         dSx6X96yINAv53TLa7UrjTcfnk99BSxfX3ufkyTXpJNAf8UbISbAVHg+4lkyWj/AnQvM\n         Ez4t3T8S0qfD5N/bpfGmAGex4ZcYqDIL7gu72EZOWUXAyMJg9D/qqCa7sfqP+pvTBQZc\n         4cmooHdIb9+gkHP2UYfiwBE9DNMzlvuopn1DlnBEcwogcocZLk9pnd31QLawIuOhNUxD\n         Ru8XGeKPHRmdjaThns84+3D6yRTbtFXyWC/vyttFhFxfINmXUQr/vVF01d/LZQEgDxZ/\n         jDFw==",
        "X-Gm-Message-State": "AOJu0YxtLxuGSovLhzcmrtyToLbJVf/MSoztmYrhpPCy9h0UwBvk1vjX\n\tg1WJ+TijQ3eimjiEDzAlC1TJ4KdxNxUj+NirJBnhLUUacesCePhOiJCaNsrva+SNhBHNox1Y1uO\n\tYczmyIiI8QvNx1UEaZEVCt4Vnq93Zp+m04NH0NUyKn3Cyx/xoYjIjiWNa4Oy10GY=",
        "X-Gm-Gg": "AeBDies4rmgPB4DgL9uO1t0T2KKSyQ8ToB8nH13O+7xAhruXNwe7ReDk1R0mmOd1mPH\n\tec0R7TPF3LKV9vZP2v3dSj6mCxvDY04Gvo+7vtaMPn3Rv89w1nFrMlGZGPaKDUyeG4Fg1mUx8qm\n\tq3Bxx2xj8U0GHAhqd8hPP/lip2qnxzxBFK3PBWH9qMj/rJAZIeVvrL7qxBGaKAw9wFN4RC8MPxD\n\tgG9jQ1V3ygmx8WnXicem4uPyBZapBy5Tmk/ANI1eenzcFKoJNM3hqGG/A7tj1fn4n2lHpgiOVAf\n\t76f55q4gtfIOHSSG2xREWGMJd6wbx9lnz8JAE3SXbkxDPqq5ATpKNTb+jp4ve785PPc3T0+TJGV\n\tBoVEnyZZYrC5q/9xwMCEipcn+4WrlyGlQDfHiqUW4rEI2jd70LLJS4jYf",
        "X-Received": [
            "by 2002:a05:6a00:2d10:b0:82c:9c47:fef9 with SMTP id\n d2e1a72fcca58-82d0da34535mr2228679b3a.2.1775205704172;\n        Fri, 03 Apr 2026 01:41:44 -0700 (PDT)",
            "by 2002:a05:6a00:2d10:b0:82c:9c47:fef9 with SMTP id\n d2e1a72fcca58-82d0da34535mr2228649b3a.2.1775205703692;\n        Fri, 03 Apr 2026 01:41:43 -0700 (PDT)"
        ],
        "From": "Aniket Randive <aniket.randive@oss.qualcomm.com>",
        "To": "mukesh.savaliya@oss.qualcomm.com, viken.dadhaniya@oss.qualcomm.com,\n        andi.shyti@kernel.org, sumit.semwal@linaro.org,\n        christian.koenig@amd.com",
        "Cc": "linux-i2c@vger.kernel.org, linux-arm-msm@vger.kernel.org,\n        linux-kernel@vger.kernel.org, linux-media@vger.kernel.org,\n        dri-devel@lists.freedesktop.org, linaro-mm-sig@lists.linaro.org,\n        naresh.maramaina@oss.qualcomm.com, aniket.randive@oss.qualcomm.com",
        "Subject": "[PATCH V3] i2c: qcom-geni: Avoid extra TX DMA TRE for single read\n message in GPI mode",
        "Date": "Fri,  3 Apr 2026 14:11:35 +0530",
        "Message-Id": "<20260403084135.1300931-1-aniket.randive@oss.qualcomm.com>",
        "X-Mailer": "git-send-email 2.34.1",
        "Precedence": "bulk",
        "X-Mailing-List": "linux-i2c@vger.kernel.org",
        "List-Id": "<linux-i2c.vger.kernel.org>",
        "List-Subscribe": "<mailto:linux-i2c+subscribe@vger.kernel.org>",
        "List-Unsubscribe": "<mailto:linux-i2c+unsubscribe@vger.kernel.org>",
        "MIME-Version": "1.0",
        "Content-Transfer-Encoding": "8bit",
        "X-Proofpoint-GUID": "HqFTYLs-relEBtkznob-ES0y-CWj-6Vo",
        "X-Proofpoint-Spam-Details-Enc": "AW1haW4tMjYwNDAzMDA3NiBTYWx0ZWRfX+8nQgbuYICdl\n 0+TrfTC+7K8QCSFl6rsjFqhQcTLGiBLlH55c9v7mkDH8F4+VaMUZsGmnKe/7PssSEnYZMh6Re1Z\n QnxUG4QPkHpXOwMcSsNB0mEIAHhkT/tejTfdtdz6PAUUoeS3MGIEr6shTz6DMN8ilvvyp8k0qXR\n exIRptJgwYVIXJHszZEwy4vG1XvPJwklDcGX92WhX53Szf203QwmloP5GiK7OOMB1GjlctNaHFB\n acZk52r9GbW90O9I1cSIHDy4qxehaGgI14UbDW8Aw4xSNYtjH6rPF6pLgwbYogkuUfhx7DJnNn9\n tB80llwDZVakUSVGuPiFSTOUXLl2GYXEGY52qlMyp10pw154iwkgVP4HUsKfiCHBf2eNcLNRj6Z\n b7vhvAhjrGbk+6cISsbG+xDgP3bq2tJmbmq2fDmW07yB2NM5QyMpF6hz6pzEFn9arHZVYJEK/0y\n qKuDhJ//fojx1ttgiSA==",
        "X-Proofpoint-ORIG-GUID": "HqFTYLs-relEBtkznob-ES0y-CWj-6Vo",
        "X-Authority-Analysis": "v=2.4 cv=fOo0HJae c=1 sm=1 tr=0 ts=69cf7d48 cx=c_pps\n a=m5Vt/hrsBiPMCU0y4gIsQw==:117 a=fChuTYTh2wq5r3m49p7fHw==:17\n a=A5OVakUREuEA:10 a=s4-Qcg_JpJYA:10 a=VkNPw1HP01LnGYTKEx00:22\n a=u7WPNUs3qKkmUXheDGA7:22 a=YMgV9FUhrdKAYTUUvYB2:22 a=EUspDBNiAAAA:8\n a=qPv6kJ6rrmvbaMxWJaQA:9 a=IoOABgeZipijB_acs4fv:22",
        "X-Proofpoint-Virus-Version": "vendor=baseguard\n engine=ICAP:2.0.293,Aquarius:18.0.1143,Hydra:6.1.51,FMLib:17.12.100.49\n definitions=2026-04-03_02,2026-04-03_01,2025-10-01_01",
        "X-Proofpoint-Spam-Details": "rule=outbound_notspam policy=outbound score=0\n spamscore=0 lowpriorityscore=0 impostorscore=0 clxscore=1015 malwarescore=0\n suspectscore=0 priorityscore=1501 phishscore=0 adultscore=0 bulkscore=0\n classifier=typeunknown authscore=0 authtc= authcc= route=outbound adjust=0\n reason=mlx scancount=1 engine=8.22.0-2603050001 definitions=main-2604030076"
    },
    "content": "In GPI mode, the I2C GENI driver programs an extra TX DMA transfer\ndescriptor (TRE) on the TX channel when handling a single read message.\nThis results in an unintended write phase being issued on the I2C bus,\neven though a read transaction does not require any TX data.\n\nFor a single-byte read, the correct hardware sequence consists of the\nCONFIG and GO commands followed by a single RX DMA TRE. Programming an\nadditional TX DMA TRE is redundant, causes unnecessary DMA buffer\nmapping on the TX channel, and may lead to incorrect bus behavior.\n\nUpdate the transfer logic to avoid programming a TX DMA TRE for single\nread messages in GPI mode.\n\nCo-developed-by: Maramaina Naresh <naresh.maramaina@oss.qualcomm.com>\nSigned-off-by: Maramaina Naresh <naresh.maramaina@oss.qualcomm.com>\nSigned-off-by: Aniket Randive <aniket.randive@oss.qualcomm.com>\n---\nChanges in v3:\n  - Added comment in the driver for better readability and changed the\n    position of 'skip_dma' label to allow dma engine configuration.\n\nChanges in v2:\n  - Updated the commit message.\n\n drivers/i2c/busses/i2c-qcom-geni.c | 20 +++++++++++++++-----\n 1 file changed, 15 insertions(+), 5 deletions(-)",
    "diff": "diff --git a/drivers/i2c/busses/i2c-qcom-geni.c b/drivers/i2c/busses/i2c-qcom-geni.c\nindex a4acb78fafb6..78b92db7c7fd 100644\n--- a/drivers/i2c/busses/i2c-qcom-geni.c\n+++ b/drivers/i2c/busses/i2c-qcom-geni.c\n@@ -625,8 +625,8 @@ static int geni_i2c_gpi(struct geni_i2c_dev *gi2c, struct i2c_msg msgs[],\n {\n \tstruct gpi_i2c_config *peripheral;\n \tunsigned int flags;\n-\tvoid *dma_buf;\n-\tdma_addr_t addr;\n+\tvoid *dma_buf = NULL;\n+\tdma_addr_t addr = 0;\n \tenum dma_data_direction map_dirn;\n \tenum dma_transfer_direction dma_dirn;\n \tstruct dma_async_tx_descriptor *desc;\n@@ -639,6 +639,12 @@ static int geni_i2c_gpi(struct geni_i2c_dev *gi2c, struct i2c_msg msgs[],\n \tgi2c_gpi_xfer = &gi2c->i2c_multi_desc_config;\n \tmsg_idx = gi2c_gpi_xfer->msg_idx_cnt;\n \n+\t/* Skip TX DMA map for I2C_WRITE operation to avoid unintended write cycle */\n+\tif (op == I2C_WRITE && msgs[msg_idx].flags & I2C_M_RD) {\n+\t\tperipheral->multi_msg = true;\n+\t\tgoto skip_dma;\n+\t}\n+\n \tdma_buf = i2c_get_dma_safe_msg_buf(&msgs[msg_idx], 1);\n \tif (!dma_buf) {\n \t\tret = -ENOMEM;\n@@ -658,6 +664,7 @@ static int geni_i2c_gpi(struct geni_i2c_dev *gi2c, struct i2c_msg msgs[],\n \t\tgoto out;\n \t}\n \n+skip_dma:\n \tif (gi2c->is_tx_multi_desc_xfer) {\n \t\tflags = DMA_CTRL_ACK;\n \n@@ -740,9 +747,12 @@ static int geni_i2c_gpi(struct geni_i2c_dev *gi2c, struct i2c_msg msgs[],\n \treturn 0;\n \n err_config:\n-\tdma_unmap_single(gi2c->se.dev->parent, addr,\n-\t\t\t msgs[msg_idx].len, map_dirn);\n-\ti2c_put_dma_safe_msg_buf(dma_buf, &msgs[msg_idx], false);\n+\t/* Avoid DMA unmap as the write operation skipped DMA mapping */\n+\tif (dma_buf) {\n+\t\tdma_unmap_single(gi2c->se.dev->parent, addr,\n+\t\t\t\t msgs[msg_idx].len, map_dirn);\n+\t\ti2c_put_dma_safe_msg_buf(dma_buf, &msgs[msg_idx], false);\n+\t}\n \n out:\n \tgi2c->err = ret;\n",
    "prefixes": [
        "V3"
    ]
}