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GET /api/patches/2219434/?format=api
{ "id": 2219434, "url": "http://patchwork.ozlabs.org/api/patches/2219434/?format=api", "web_url": "http://patchwork.ozlabs.org/project/linux-arc/patch/20260402174925.v3.7.If839f6dde98979fce177f70c6c74689a1904ee76@changeid/", "project": { "id": 48, "url": "http://patchwork.ozlabs.org/api/projects/48/?format=api", "name": "Linux ARC development", "link_name": "linux-arc", "list_id": "linux-snps-arc.lists.infradead.org", "list_email": "linux-snps-arc@lists.infradead.org", "web_url": "", "scm_url": "", "webscm_url": "", "list_archive_url": "", "list_archive_url_format": "", "commit_url_format": "" }, "msgid": "<20260402174925.v3.7.If839f6dde98979fce177f70c6c74689a1904ee76@changeid>", "list_archive_url": null, "date": "2026-04-03T00:49:53", "name": "[v3,7/9] driver core: Replace dev->dma_coherent with DEV_FLAG_DMA_COHERENT", "commit_ref": null, "pull_url": null, "state": "new", "archived": false, "hash": "022c473a6a120f53238ffbf45808501f35dd32e9", "submitter": { "id": 9763, "url": "http://patchwork.ozlabs.org/api/people/9763/?format=api", "name": "Douglas Anderson", "email": "dianders@chromium.org" }, "delegate": null, "mbox": "http://patchwork.ozlabs.org/project/linux-arc/patch/20260402174925.v3.7.If839f6dde98979fce177f70c6c74689a1904ee76@changeid/mbox/", "series": [ { "id": 498571, "url": "http://patchwork.ozlabs.org/api/series/498571/?format=api", "web_url": "http://patchwork.ozlabs.org/project/linux-arc/list/?series=498571", "date": "2026-04-03T00:49:46", "name": "driver core: Fix some race conditions", "version": 3, "mbox": "http://patchwork.ozlabs.org/series/498571/mbox/" } ], "comments": "http://patchwork.ozlabs.org/api/patches/2219434/comments/", "check": "pending", "checks": "http://patchwork.ozlabs.org/api/patches/2219434/checks/", "tags": {}, "related": [], "headers": { "Return-Path": "\n <linux-snps-arc-bounces+incoming=patchwork.ozlabs.org@lists.infradead.org>", "X-Original-To": "incoming@patchwork.ozlabs.org", "Delivered-To": "patchwork-incoming@legolas.ozlabs.org", "Authentication-Results": [ "legolas.ozlabs.org;\n\tdkim=pass (2048-bit key;\n secure) header.d=lists.infradead.org header.i=@lists.infradead.org\n header.a=rsa-sha256 header.s=bombadil.20210309 header.b=v85t3kmz;\n\tdkim=fail reason=\"signature verification failed\" (1024-bit key;\n unprotected) header.d=chromium.org header.i=@chromium.org header.a=rsa-sha256\n header.s=google header.b=HiG23a2V;\n\tdkim-atps=neutral", "legolas.ozlabs.org;\n spf=none (no SPF record) smtp.mailfrom=lists.infradead.org\n (client-ip=2607:7c80:54:3::133; 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Wysocki\" <rafael@kernel.org>,\n\tDanilo Krummrich <dakr@kernel.org>,\n\tAlan Stern <stern@rowland.harvard.edu>", "Cc": "Robin Murphy <robin.murphy@arm.com>,\n\tLeon Romanovsky <leon@kernel.org>,\n\tPaul Burton <paul.burton@mips.com>,\n\tSaravana Kannan <saravanak@kernel.org>,\n\tAlexander Lobakin <aleksander.lobakin@intel.com>,\n\tEric Dumazet <edumazet@google.com>,\n\tToshi Kani <toshi.kani@hp.com>,\n\tChristoph Hellwig <hch@lst.de>,\n\tAlexey Kardashevskiy <aik@ozlabs.ru>,\n\tJohan Hovold <johan@kernel.org>,\n\tDouglas Anderson <dianders@chromium.org>,\n\tFrank.Li@kernel.org,\n\talex@ghiti.fr,\n\tandre.przywara@arm.com,\n\tandrew@lunn.ch,\n\taou@eecs.berkeley.edu,\n\tcatalin.marinas@arm.com,\n\tdmaengine@vger.kernel.org,\n\tdriver-core@lists.linux.dev,\n\tgregory.clement@bootlin.com,\n\tiommu@lists.linux.dev,\n\tjgg@ziepe.ca,\n\tkees@kernel.org,\n\tlinux-arm-kernel@lists.infradead.org,\n\tlinux-kernel@vger.kernel.org,\n\tlinux-mips@vger.kernel.org,\n\tlinux-riscv@lists.infradead.org,\n\tlinux-snps-arc@lists.infradead.org,\n\tlinux@armlinux.org.uk,\n\tm.szyprowski@samsung.com,\n\tpalmer@dabbelt.com,\n\tpeter.ujfalusi@gmail.com,\n\tpjw@kernel.org,\n\tsebastian.hesselbarth@gmail.com,\n\ttsbogend@alpha.franken.de,\n\tvgupta@kernel.org,\n\tvkoul@kernel.org,\n\twill@kernel.org,\n\twilly@infradead.org", "Subject": "[PATCH v3 7/9] driver core: Replace dev->dma_coherent with\n DEV_FLAG_DMA_COHERENT", "Date": "Thu, 2 Apr 2026 17:49:53 -0700", "Message-ID": "\n <20260402174925.v3.7.If839f6dde98979fce177f70c6c74689a1904ee76@changeid>", "X-Mailer": "git-send-email 2.53.0.1213.gd9a14994de-goog", "In-Reply-To": "<20260403005005.30424-1-dianders@chromium.org>", "References": "<20260403005005.30424-1-dianders@chromium.org>", "MIME-Version": "1.0", "X-CRM114-Version": "20100106-BlameMichelson ( TRE 0.8.0 (BSD) ) MR-646709E3 ", "X-CRM114-CacheID": "sfid-20260402_175158_893649_D27785CF ", "X-CRM114-Status": "GOOD ( 24.97 )", "X-Spam-Score": "-2.6 (--)", "X-Spam-Report": "Spam detection software,\n running on the system \"bombadil.infradead.org\",\n has NOT identified this incoming email as spam. The original\n message has been attached to this so you can view it or label\n similar future email. If you have any questions, see\n the administrator of that system for details.\n Content preview: In C,\n bitfields are not necessarily safe to modify from multiple\n threads without locking. Switch \"dma_coherent\" over to the \"flags\" field\n so modifications are safe. Cc: Christoph Hellwig <hch@lst.de> Cc: Paul\n Burton\n <paul.burton@mips.com> Signed-off-by: Douglas Anderson\n <dianders@chromium.org>\n --- Not fixing any known bugs;\n problem is theoretical and found by cod [...] \n Content analysis details: (-2.6 points, 5.0 required)\n pts rule name description\n ---- ----------------------\n --------------------------------------------------\n -0.0 RCVD_IN_DNSWL_NONE RBL: Sender listed at https://www.dnswl.org/, no\n trust\n [2607:f8b0:4864:20:0:0:0:1334 listed in]\n [list.dnswl.org]\n -0.0 SPF_PASS SPF: sender matches SPF record\n 0.0 SPF_HELO_NONE SPF: HELO does not publish an SPF Record\n 0.1 DKIM_SIGNED Message has a DKIM or DK signature,\n not necessarily valid\n -0.1 DKIM_VALID_EF Message has a valid DKIM or DK signature from\n envelope-from domain\n -0.1 DKIM_VALID_AU Message has a valid DKIM or DK signature from\n author's\n domain\n -0.1 DKIM_VALID Message has at least one valid DKIM or DK\n signature\n -1.9 BAYES_00 BODY: Bayes spam probability is 0 to 1%\n [score: 0.0000]\n -0.5 DKIMWL_WL_HIGH DKIMwl.org - High trust sender", "X-BeenThere": "linux-snps-arc@lists.infradead.org", "X-Mailman-Version": "2.1.34", "Precedence": "list", "List-Id": "Linux on Synopsys ARC Processors <linux-snps-arc.lists.infradead.org>", "List-Unsubscribe": "<http://lists.infradead.org/mailman/options/linux-snps-arc>,\n <mailto:linux-snps-arc-request@lists.infradead.org?subject=unsubscribe>", "List-Archive": "<http://lists.infradead.org/pipermail/linux-snps-arc/>", "List-Post": "<mailto:linux-snps-arc@lists.infradead.org>", "List-Help": "<mailto:linux-snps-arc-request@lists.infradead.org?subject=help>", "List-Subscribe": "<http://lists.infradead.org/mailman/listinfo/linux-snps-arc>,\n <mailto:linux-snps-arc-request@lists.infradead.org?subject=subscribe>", "Content-Type": "text/plain; charset=\"us-ascii\"", "Content-Transfer-Encoding": "7bit", "Sender": "\"linux-snps-arc\" <linux-snps-arc-bounces@lists.infradead.org>", "Errors-To": "\n linux-snps-arc-bounces+incoming=patchwork.ozlabs.org@lists.infradead.org" }, "content": "In C, bitfields are not necessarily safe to modify from multiple\nthreads without locking. Switch \"dma_coherent\" over to the \"flags\"\nfield so modifications are safe.\n\nCc: Christoph Hellwig <hch@lst.de>\nCc: Paul Burton <paul.burton@mips.com>\nSigned-off-by: Douglas Anderson <dianders@chromium.org>\n---\nNot fixing any known bugs; problem is theoretical and found by code\ninspection. Change is done somewhat manually and only lightly tested\n(mostly compile-time tested).\n\nNOTE: even though previously we only took up a bit if\nCONFIG_ARCH_HAS_SYNC_DMA_FOR_DEVICE, CONFIG_ARCH_HAS_SYNC_DMA_FOR_CPU,\nor CONFIG_ARCH_HAS_SYNC_DMA_FOR_CPU_ALL, in this change I reserve the\nbit unconditionally. While we could get the \"dynamic\" behavior by\nchanging the flags definition to be an \"enum\", it doesn't seem worth\nit at this point.\n\nChanges in v3:\n- New\n\n arch/arc/mm/dma.c | 4 ++--\n arch/arm/mach-highbank/highbank.c | 2 +-\n arch/arm/mach-mvebu/coherency.c | 2 +-\n arch/arm/mm/dma-mapping-nommu.c | 4 ++--\n arch/arm/mm/dma-mapping.c | 30 ++++++++++++++++--------------\n arch/arm64/mm/dma-mapping.c | 2 +-\n arch/mips/mm/dma-noncoherent.c | 2 +-\n arch/riscv/mm/dma-noncoherent.c | 2 +-\n drivers/base/core.c | 2 +-\n drivers/dma/ti/k3-udma-glue.c | 6 +++---\n drivers/dma/ti/k3-udma.c | 6 +++---\n include/linux/device.h | 10 +++-------\n include/linux/dma-map-ops.h | 2 +-\n 13 files changed, 36 insertions(+), 38 deletions(-)", "diff": "diff --git a/arch/arc/mm/dma.c b/arch/arc/mm/dma.c\nindex 6b85e94f3275..3d56878cb6a2 100644\n--- a/arch/arc/mm/dma.c\n+++ b/arch/arc/mm/dma.c\n@@ -98,8 +98,8 @@ void arch_setup_dma_ops(struct device *dev, bool coherent)\n \t * DMA buffers.\n \t */\n \tif (is_isa_arcv2() && ioc_enable && coherent)\n-\t\tdev->dma_coherent = true;\n+\t\tset_bit(DEV_FLAG_DMA_COHERENT, &dev->flags);\n \n \tdev_info(dev, \"use %scoherent DMA ops\\n\",\n-\t\t dev->dma_coherent ? \"\" : \"non\");\n+\t\t test_bit(DEV_FLAG_DMA_COHERENT, &dev->flags) ? \"\" : \"non\");\n }\ndiff --git a/arch/arm/mach-highbank/highbank.c b/arch/arm/mach-highbank/highbank.c\nindex 47335c7dadf8..ffa3f591f57a 100644\n--- a/arch/arm/mach-highbank/highbank.c\n+++ b/arch/arm/mach-highbank/highbank.c\n@@ -98,7 +98,7 @@ static int highbank_platform_notifier(struct notifier_block *nb,\n \tif (of_property_read_bool(dev->of_node, \"dma-coherent\")) {\n \t\tval = readl(sregs_base + reg);\n \t\twritel(val | 0xff01, sregs_base + reg);\n-\t\tdev->dma_coherent = true;\n+\t\tset_bit(DEV_FLAG_DMA_COHERENT, &dev->flags);\n \t}\n \n \treturn NOTIFY_OK;\ndiff --git a/arch/arm/mach-mvebu/coherency.c b/arch/arm/mach-mvebu/coherency.c\nindex fa2c1e1aeb96..8391303a6a17 100644\n--- a/arch/arm/mach-mvebu/coherency.c\n+++ b/arch/arm/mach-mvebu/coherency.c\n@@ -95,7 +95,7 @@ static int mvebu_hwcc_notifier(struct notifier_block *nb,\n \n \tif (event != BUS_NOTIFY_ADD_DEVICE)\n \t\treturn NOTIFY_DONE;\n-\tdev->dma_coherent = true;\n+\tset_bit(DEV_FLAG_DMA_COHERENT, &dev->flags);\n \n \treturn NOTIFY_OK;\n }\ndiff --git a/arch/arm/mm/dma-mapping-nommu.c b/arch/arm/mm/dma-mapping-nommu.c\nindex fecac107fd0d..ac0a976e30a0 100644\n--- a/arch/arm/mm/dma-mapping-nommu.c\n+++ b/arch/arm/mm/dma-mapping-nommu.c\n@@ -42,11 +42,11 @@ void arch_setup_dma_ops(struct device *dev, bool coherent)\n \t\t * enough to check if MPU is in use or not since in absence of\n \t\t * MPU system memory map is used.\n \t\t */\n-\t\tdev->dma_coherent = cacheid ? coherent : true;\n+\t\tassign_bit(DEV_FLAG_DMA_COHERENT, &dev->flags, cacheid ? coherent : true);\n \t} else {\n \t\t/*\n \t\t * Assume coherent DMA in case MMU/MPU has not been set up.\n \t\t */\n-\t\tdev->dma_coherent = (get_cr() & CR_M) ? coherent : true;\n+\t\tassign_bit(DEV_FLAG_DMA_COHERENT, &dev->flags, (get_cr() & CR_M) ? coherent : true);\n \t}\n }\ndiff --git a/arch/arm/mm/dma-mapping.c b/arch/arm/mm/dma-mapping.c\nindex f304037d1c34..9c2c635d7ac0 100644\n--- a/arch/arm/mm/dma-mapping.c\n+++ b/arch/arm/mm/dma-mapping.c\n@@ -1076,7 +1076,7 @@ static void *arm_iommu_alloc_attrs(struct device *dev, size_t size,\n \tpgprot_t prot = __get_dma_pgprot(attrs, PAGE_KERNEL);\n \tstruct page **pages;\n \tvoid *addr = NULL;\n-\tint coherent_flag = dev->dma_coherent ? COHERENT : NORMAL;\n+\tint coherent_flag = test_bit(DEV_FLAG_DMA_COHERENT, &dev->flags) ? COHERENT : NORMAL;\n \n \t*handle = DMA_MAPPING_ERROR;\n \tsize = PAGE_ALIGN(size);\n@@ -1124,7 +1124,7 @@ static int arm_iommu_mmap_attrs(struct device *dev, struct vm_area_struct *vma,\n \tif (vma->vm_pgoff >= nr_pages)\n \t\treturn -ENXIO;\n \n-\tif (!dev->dma_coherent)\n+\tif (!test_bit(DEV_FLAG_DMA_COHERENT, &dev->flags))\n \t\tvma->vm_page_prot = __get_dma_pgprot(attrs, vma->vm_page_prot);\n \n \terr = vm_map_pages(vma, pages, nr_pages);\n@@ -1141,7 +1141,7 @@ static int arm_iommu_mmap_attrs(struct device *dev, struct vm_area_struct *vma,\n static void arm_iommu_free_attrs(struct device *dev, size_t size, void *cpu_addr,\n \tdma_addr_t handle, unsigned long attrs)\n {\n-\tint coherent_flag = dev->dma_coherent ? COHERENT : NORMAL;\n+\tint coherent_flag = test_bit(DEV_FLAG_DMA_COHERENT, &dev->flags) ? COHERENT : NORMAL;\n \tstruct page **pages;\n \tsize = PAGE_ALIGN(size);\n \n@@ -1202,7 +1202,8 @@ static int __map_sg_chunk(struct device *dev, struct scatterlist *sg,\n \t\tphys_addr_t phys = page_to_phys(sg_page(s));\n \t\tunsigned int len = PAGE_ALIGN(s->offset + s->length);\n \n-\t\tif (!dev->dma_coherent && !(attrs & DMA_ATTR_SKIP_CPU_SYNC))\n+\t\tif (!test_bit(DEV_FLAG_DMA_COHERENT, &dev->flags) &&\n+\t\t !(attrs & DMA_ATTR_SKIP_CPU_SYNC))\n \t\t\tarch_sync_dma_for_device(sg_phys(s), s->length, dir);\n \n \t\tprot = __dma_info_to_prot(dir, attrs);\n@@ -1304,7 +1305,8 @@ static void arm_iommu_unmap_sg(struct device *dev,\n \t\tif (sg_dma_len(s))\n \t\t\t__iommu_remove_mapping(dev, sg_dma_address(s),\n \t\t\t\t\t sg_dma_len(s));\n-\t\tif (!dev->dma_coherent && !(attrs & DMA_ATTR_SKIP_CPU_SYNC))\n+\t\tif (!test_bit(DEV_FLAG_DMA_COHERENT, &dev->flags) &&\n+\t\t !(attrs & DMA_ATTR_SKIP_CPU_SYNC))\n \t\t\tarch_sync_dma_for_cpu(sg_phys(s), s->length, dir);\n \t}\n }\n@@ -1323,7 +1325,7 @@ static void arm_iommu_sync_sg_for_cpu(struct device *dev,\n \tstruct scatterlist *s;\n \tint i;\n \n-\tif (dev->dma_coherent)\n+\tif (test_bit(DEV_FLAG_DMA_COHERENT, &dev->flags))\n \t\treturn;\n \n \tfor_each_sg(sg, s, nents, i)\n@@ -1345,7 +1347,7 @@ static void arm_iommu_sync_sg_for_device(struct device *dev,\n \tstruct scatterlist *s;\n \tint i;\n \n-\tif (dev->dma_coherent)\n+\tif (test_bit(DEV_FLAG_DMA_COHERENT, &dev->flags))\n \t\treturn;\n \n \tfor_each_sg(sg, s, nents, i)\n@@ -1371,7 +1373,7 @@ static dma_addr_t arm_iommu_map_phys(struct device *dev, phys_addr_t phys,\n \tdma_addr_t dma_addr;\n \tint ret, prot;\n \n-\tif (!dev->dma_coherent &&\n+\tif (!test_bit(DEV_FLAG_DMA_COHERENT, &dev->flags) &&\n \t !(attrs & (DMA_ATTR_SKIP_CPU_SYNC | DMA_ATTR_MMIO)))\n \t\tarch_sync_dma_for_device(phys, size, dir);\n \n@@ -1412,7 +1414,7 @@ static void arm_iommu_unmap_phys(struct device *dev, dma_addr_t handle,\n \tif (!iova)\n \t\treturn;\n \n-\tif (!dev->dma_coherent &&\n+\tif (!test_bit(DEV_FLAG_DMA_COHERENT, &dev->flags) &&\n \t !(attrs & (DMA_ATTR_SKIP_CPU_SYNC | DMA_ATTR_MMIO))) {\n \t\tphys_addr_t phys = iommu_iova_to_phys(mapping->domain, iova);\n \n@@ -1431,7 +1433,7 @@ static void arm_iommu_sync_single_for_cpu(struct device *dev,\n \tunsigned int offset = handle & ~PAGE_MASK;\n \tphys_addr_t phys;\n \n-\tif (dev->dma_coherent || !iova)\n+\tif (test_bit(DEV_FLAG_DMA_COHERENT, &dev->flags) || !iova)\n \t\treturn;\n \n \tphys = iommu_iova_to_phys(mapping->domain, iova);\n@@ -1446,7 +1448,7 @@ static void arm_iommu_sync_single_for_device(struct device *dev,\n \tunsigned int offset = handle & ~PAGE_MASK;\n \tphys_addr_t phys;\n \n-\tif (dev->dma_coherent || !iova)\n+\tif (test_bit(DEV_FLAG_DMA_COHERENT, &dev->flags) || !iova)\n \t\treturn;\n \n \tphys = iommu_iova_to_phys(mapping->domain, iova);\n@@ -1701,13 +1703,13 @@ static void arm_teardown_iommu_dma_ops(struct device *dev) { }\n void arch_setup_dma_ops(struct device *dev, bool coherent)\n {\n \t/*\n-\t * Due to legacy code that sets the ->dma_coherent flag from a bus\n-\t * notifier we can't just assign coherent to the ->dma_coherent flag\n+\t * Due to legacy code that sets DEV_FLAG_DMA_COHERENT from a bus\n+\t * notifier we can't just assign coherent to DEV_FLAG_DMA_COHERENT\n \t * here, but instead have to make sure we only set but never clear it\n \t * for now.\n \t */\n \tif (coherent)\n-\t\tdev->dma_coherent = true;\n+\t\tset_bit(DEV_FLAG_DMA_COHERENT, &dev->flags);\n \n \t/*\n \t * Don't override the dma_ops if they have already been set. Ideally\ndiff --git a/arch/arm64/mm/dma-mapping.c b/arch/arm64/mm/dma-mapping.c\nindex b2b5792b2caa..256c7631aff5 100644\n--- a/arch/arm64/mm/dma-mapping.c\n+++ b/arch/arm64/mm/dma-mapping.c\n@@ -48,7 +48,7 @@ void arch_setup_dma_ops(struct device *dev, bool coherent)\n \t\t dev_driver_string(dev), dev_name(dev),\n \t\t ARCH_DMA_MINALIGN, cls);\n \n-\tdev->dma_coherent = coherent;\n+\tassign_bit(DEV_FLAG_DMA_COHERENT, &dev->flags, coherent);\n \n \txen_setup_dma_ops(dev);\n }\ndiff --git a/arch/mips/mm/dma-noncoherent.c b/arch/mips/mm/dma-noncoherent.c\nindex ab4f2a75a7d0..496bf5f4999c 100644\n--- a/arch/mips/mm/dma-noncoherent.c\n+++ b/arch/mips/mm/dma-noncoherent.c\n@@ -139,6 +139,6 @@ void arch_sync_dma_for_cpu(phys_addr_t paddr, size_t size,\n #ifdef CONFIG_ARCH_HAS_SETUP_DMA_OPS\n void arch_setup_dma_ops(struct device *dev, bool coherent)\n {\n-\tdev->dma_coherent = coherent;\n+\tassign_bit(DEV_FLAG_DMA_COHERENT, &dev->flags, coherent);\n }\n #endif\ndiff --git a/arch/riscv/mm/dma-noncoherent.c b/arch/riscv/mm/dma-noncoherent.c\nindex cb89d7e0ba88..3b793a1cc607 100644\n--- a/arch/riscv/mm/dma-noncoherent.c\n+++ b/arch/riscv/mm/dma-noncoherent.c\n@@ -140,7 +140,7 @@ void arch_setup_dma_ops(struct device *dev, bool coherent)\n \t\t \"%s %s: device non-coherent but no non-coherent operations supported\",\n \t\t dev_driver_string(dev), dev_name(dev));\n \n-\tdev->dma_coherent = coherent;\n+\tassign_bit(DEV_FLAG_DMA_COHERENT, &dev->flags, coherent);\n }\n \n void riscv_noncoherent_supported(void)\ndiff --git a/drivers/base/core.c b/drivers/base/core.c\nindex 8dbb7a9c7aab..00005777c21f 100644\n--- a/drivers/base/core.c\n+++ b/drivers/base/core.c\n@@ -3174,7 +3174,7 @@ void device_initialize(struct device *dev)\n #if defined(CONFIG_ARCH_HAS_SYNC_DMA_FOR_DEVICE) || \\\n defined(CONFIG_ARCH_HAS_SYNC_DMA_FOR_CPU) || \\\n defined(CONFIG_ARCH_HAS_SYNC_DMA_FOR_CPU_ALL)\n-\tdev->dma_coherent = dma_default_coherent;\n+\tassign_bit(DEV_FLAG_DMA_COHERENT, &dev->flags, dma_default_coherent);\n #endif\n \tswiotlb_dev_init(dev);\n }\ndiff --git a/drivers/dma/ti/k3-udma-glue.c b/drivers/dma/ti/k3-udma-glue.c\nindex f87d244cc2d6..cda8f4a8f440 100644\n--- a/drivers/dma/ti/k3-udma-glue.c\n+++ b/drivers/dma/ti/k3-udma-glue.c\n@@ -312,7 +312,7 @@ k3_udma_glue_request_tx_chn_common(struct device *dev,\n \n \tif (xudma_is_pktdma(tx_chn->common.udmax)) {\n \t\t/* prepare the channel device as coherent */\n-\t\ttx_chn->common.chan_dev.dma_coherent = true;\n+\t\tset_bit(DEV_FLAG_DMA_COHERENT, &tx_chn->common.chan_dev.flags);\n \t\tdma_coerce_mask_and_coherent(&tx_chn->common.chan_dev,\n \t\t\t\t\t DMA_BIT_MASK(48));\n \t}\n@@ -1003,7 +1003,7 @@ k3_udma_glue_request_rx_chn_priv(struct device *dev, const char *name,\n \n \tif (xudma_is_pktdma(rx_chn->common.udmax)) {\n \t\t/* prepare the channel device as coherent */\n-\t\trx_chn->common.chan_dev.dma_coherent = true;\n+\t\tset_bit(DEV_FLAG_DMA_COHERENT, &rx_chn->common.chan_dev.flags);\n \t\tdma_coerce_mask_and_coherent(&rx_chn->common.chan_dev,\n \t\t\t\t\t DMA_BIT_MASK(48));\n \t}\n@@ -1104,7 +1104,7 @@ k3_udma_glue_request_remote_rx_chn_common(struct k3_udma_glue_rx_channel *rx_chn\n \n \tif (xudma_is_pktdma(rx_chn->common.udmax)) {\n \t\t/* prepare the channel device as coherent */\n-\t\trx_chn->common.chan_dev.dma_coherent = true;\n+\t\tset_bit(DEV_FLAG_DMA_COHERENT, &rx_chn->common.chan_dev.flags);\n \t\tdma_coerce_mask_and_coherent(&rx_chn->common.chan_dev,\n \t\t\t\t\t DMA_BIT_MASK(48));\n \t\trx_chn->single_fdq = false;\ndiff --git a/drivers/dma/ti/k3-udma.c b/drivers/dma/ti/k3-udma.c\nindex c964ebfcf3b6..770aae467fc5 100644\n--- a/drivers/dma/ti/k3-udma.c\n+++ b/drivers/dma/ti/k3-udma.c\n@@ -428,18 +428,18 @@ static void k3_configure_chan_coherency(struct dma_chan *chan, u32 asel)\n \t\t/* No special handling for the channel */\n \t\tchan->dev->chan_dma_dev = false;\n \n-\t\tchan_dev->dma_coherent = false;\n+\t\tclear_bit(DEV_FLAG_DMA_COHERENT, &chan_dev->flags);\n \t\tchan_dev->dma_parms = NULL;\n \t} else if (asel == 14 || asel == 15) {\n \t\tchan->dev->chan_dma_dev = true;\n \n-\t\tchan_dev->dma_coherent = true;\n+\t\tset_bit(DEV_FLAG_DMA_COHERENT, &chan_dev->flags);\n \t\tdma_coerce_mask_and_coherent(chan_dev, DMA_BIT_MASK(48));\n \t\tchan_dev->dma_parms = chan_dev->parent->dma_parms;\n \t} else {\n \t\tdev_warn(chan->device->dev, \"Invalid ASEL value: %u\\n\", asel);\n \n-\t\tchan_dev->dma_coherent = false;\n+\t\tclear_bit(DEV_FLAG_DMA_COHERENT, &chan_dev->flags);\n \t\tchan_dev->dma_parms = NULL;\n \t}\n }\ndiff --git a/include/linux/device.h b/include/linux/device.h\nindex 6c961dac9fdb..c2a6dba7a036 100644\n--- a/include/linux/device.h\n+++ b/include/linux/device.h\n@@ -480,6 +480,8 @@ struct device_physical_location {\n * @DEV_FLAG_STATE_SYNCED: The hardware state of this device has been synced to\n *\t\tmatch the software state of this device by calling the\n *\t\tdriver/bus sync_state() callback.\n+ * @DEV_FLAG_DMA_COHERENT: This particular device is dma coherent, even if the\n+ *\t\tarchitecture supports non-coherent devices.\n */\n enum struct_device_flags {\n \tDEV_FLAG_READY_TO_PROBE,\n@@ -488,6 +490,7 @@ enum struct_device_flags {\n \tDEV_FLAG_DMA_SKIP_SYNC,\n \tDEV_FLAG_DMA_OPS_BYPASS,\n \tDEV_FLAG_STATE_SYNCED,\n+\tDEV_FLAG_DMA_COHERENT,\n };\n \n /**\n@@ -569,8 +572,6 @@ enum struct_device_flags {\n * @offline:\tSet after successful invocation of bus type's .offline().\n * @of_node_reused: Set if the device-tree node is shared with an ancestor\n * device.\n- * @dma_coherent: this particular device is dma coherent, even if the\n- *\t\tarchitecture supports non-coherent devices.\n * @flags:\tDEV_FLAG_XXX flags. Use atomic bitfield operations to modify.\n *\n * At the lowest level, every device in a Linux system is represented by an\n@@ -678,11 +679,6 @@ struct device {\n \tbool\t\t\toffline_disabled:1;\n \tbool\t\t\toffline:1;\n \tbool\t\t\tof_node_reused:1;\n-#if defined(CONFIG_ARCH_HAS_SYNC_DMA_FOR_DEVICE) || \\\n- defined(CONFIG_ARCH_HAS_SYNC_DMA_FOR_CPU) || \\\n- defined(CONFIG_ARCH_HAS_SYNC_DMA_FOR_CPU_ALL)\n-\tbool\t\t\tdma_coherent:1;\n-#endif\n \n \tunsigned long\t\tflags;\n };\ndiff --git a/include/linux/dma-map-ops.h b/include/linux/dma-map-ops.h\nindex 4d9d1fe3277c..91d34678657c 100644\n--- a/include/linux/dma-map-ops.h\n+++ b/include/linux/dma-map-ops.h\n@@ -230,7 +230,7 @@ int dma_direct_set_offset(struct device *dev, phys_addr_t cpu_start,\n extern bool dma_default_coherent;\n static inline bool dev_is_dma_coherent(struct device *dev)\n {\n-\treturn dev->dma_coherent;\n+\treturn test_bit(DEV_FLAG_DMA_COHERENT, &dev->flags);\n }\n #else\n #define dma_default_coherent true\n", "prefixes": [ "v3", "7/9" ] }